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/*
* Copyright (c) 2004-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Lisa Hsu
* Nathan Binkert
*/
#include "cpu/base.hh"
#include "cpu/cpu_exec_context.hh"
#include "kern/kernel_stats.hh"
#include "kern/system_events.hh"
#include "sim/system.hh"
using namespace TheISA;
void
SkipFuncEvent::process(ThreadContext *tc)
{
Addr newpc = tc->readIntReg(ReturnAddressReg);
DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description,
tc->readPC(), newpc);
tc->setPC(newpc);
tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
/*
BranchPred *bp = tc->getCpuPtr()->getBranchPred();
if (bp != NULL) {
bp->popRAS(tc->getThreadNum());
}
*/
}
FnEvent::FnEvent(PCEventQueue *q, const std::string &desc, Addr addr,
Stats::MainBin *bin)
: PCEvent(q, desc, addr), _name(desc), mybin(bin)
{
}
void
FnEvent::process(ThreadContext *tc)
{
if (tc->misspeculating())
return;
tc->getSystemPtr()->kernelBinning->call(tc, mybin);
}
void
IdleStartEvent::process(ThreadContext *tc)
{
if (tc->getKernelStats())
tc->getKernelStats()->setIdleProcess(
tc->readMiscReg(AlphaISA::IPR_PALtemp23), tc);
remove();
}
void
InterruptStartEvent::process(ThreadContext *tc)
{
if (tc->getKernelStats())
tc->getKernelStats()->mode(Kernel::interrupt, tc);
}
void
InterruptEndEvent::process(ThreadContext *tc)
{
// We go back to kernel, if we are user, inside the rti
// pal code we will get switched to user because of the ICM write
if (tc->getKernelStats())
tc->getKernelStats()->mode(Kernel::kernel, tc);
}
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