summaryrefslogtreecommitdiff
path: root/src/mem/ruby/slicc_interface/AbstractController.hh
blob: f1dac39ad2bfd14f3fb597d41e9ef763dd0e9f99 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
/*
 * Copyright (c) 2009 Mark D. Hill and David A. Wood
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__
#define __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__

#include <iostream>
#include <string>

#include "mem/protocol/AccessPermission.hh"
#include "mem/protocol/MachineType.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/DataBlock.hh"
#include "mem/ruby/network/Network.hh"
#include "mem/ruby/system/System.hh"
#include "params/RubyController.hh"
#include "sim/sim_object.hh"

class MessageBuffer;
class Network;

class AbstractController : public SimObject, public Consumer
{
  public:
    typedef RubyControllerParams Params;
    AbstractController(const Params *p);
    const Params *params() const { return (const Params *)_params; }

    // returns the number of controllers created of the specific subtype
    //  virtual int getNumberOfControllers() const = 0;
    virtual MessageBuffer* getMandatoryQueue() const = 0;
    virtual const int & getVersion() const = 0;
    virtual const std::string toString() const = 0;  // returns text version of
                                                     // controller type
    virtual const std::string getName() const = 0;   // return instance name
    virtual const MachineType getMachineType() const = 0;
    virtual void blockOnQueue(Address, MessageBuffer*) = 0;
    virtual void unblock(Address) = 0;
    virtual void initNetworkPtr(Network* net_ptr) = 0;
    virtual AccessPermission getAccessPermission(Address addr) = 0;
    virtual DataBlock& getDataBlock(Address addr) = 0;

    virtual void print(std::ostream & out) const = 0;
    virtual void printStats(std::ostream & out) const = 0;
    virtual void printConfig(std::ostream & out) const = 0;
    virtual void wakeup() = 0;
    //  virtual void dumpStats(std::ostream & out) = 0;
    virtual void clearStats() = 0;
};

#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__