summaryrefslogtreecommitdiff
path: root/src/mem/ruby/system/RubyPort.hh
blob: 20557669a84c72b1565a60bde8ac43d2167bf573 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97

/*
 * Copyright (c) 2009 Advanced Micro Devices, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef RUBYPORT_H
#define RUBYPORT_H

#include "mem/ruby/libruby.hh"
#include <string>
#include <assert.h>

#include "mem/mem_object.hh"
#include "mem/tport.hh"

#include "params/RubyPort.hh"

using namespace std;

class MessageBuffer;
class AbstractController;

class RubyPort : public MemObject {
public:
    typedef RubyPortParams Params;
    RubyPort(const Params *p);
  virtual ~RubyPort() {}

    Port *getPort(const std::string &if_name, int idx);

  virtual int64_t makeRequest(const RubyRequest & request) = 0;

  void registerHitCallback(void (*hit_callback)(int64_t request_id)) {
    assert(m_hit_callback == NULL); // can't assign hit_callback twice
    m_hit_callback = hit_callback;
  }

protected:
  const string m_name;
  void (*m_hit_callback)(int64_t);

  int64_t makeUniqueRequestID() {
    // The request ID is generated by combining the port ID with a request count
    // so that request IDs can be formed concurrently by multiple threads.
    // IDs are formed as follows:
    //
    //
    //   0        PortID                         Request Count
    // +----+---------------+-----------------------------------------------------+
    // | 63 |     62-48     |                         47-0                        |
    // +----+---------------+-----------------------------------------------------+
    //
    //
    //  This limits the system to a maximum of 2^11 == 2048 components
    //  and 2^48 ~= 3x10^14 requests per component

    int64_t id = (static_cast<uint64_t>(m_port_id) << 48) | m_request_cnt;
    m_request_cnt++;
    // assert((m_request_cnt & (1<<48)) == 0);
    return id;
  }

  int m_version;
  AbstractController* m_controller;
  MessageBuffer* m_mandatory_q_ptr;

private:
  static uint16_t m_num_ports;
  uint16_t m_port_id;
  uint64_t m_request_cnt;
};

#endif