path: root/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.412968                       # Number of seconds simulated
sim_ticks                                412968287500                       # Number of ticks simulated
final_tick                               412968287500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                 1000000000000                       # Frequency of simulated ticks
host_inst_rate                                 309752                       # Simulator instruction rate (inst/s)
host_op_rate                                   309752                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                              209049423                       # Simulator tick rate (ticks/s)
host_mem_usage                                 299216                       # Number of bytes of host memory used
host_seconds                                  1975.46                       # Real time elapsed on the host
sim_insts                                   611901617                       # Number of instructions simulated
sim_ops                                     611901617                       # Number of ops (including micro ops) simulated
system.voltage_domain.voltage                       1                       # Voltage in Volts
system.clk_domain.clock                          1000                       # Clock period in ticks
system.physmem.bytes_read::cpu.inst            171008                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data          24125568                       # Number of bytes read from this memory
system.physmem.bytes_read::total             24296576                       # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst       171008                       # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total          171008                       # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks     18781376                       # Number of bytes written to this memory
system.physmem.bytes_written::total          18781376                       # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst               2672                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data             376962                       # Number of read requests responded to by this memory
system.physmem.num_reads::total                379634                       # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks          293459                       # Number of write requests responded to by this memory
system.physmem.num_writes::total               293459                       # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst               414095                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data             58419905                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total                58833999                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst          414095                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total             414095                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks          45478979                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total               45478979                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks          45478979                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst              414095                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data            58419905                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total              104312978                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs                        379634                       # Number of read requests accepted
system.physmem.writeReqs                       293459                       # Number of write requests accepted
system.physmem.readBursts                      379634                       # Number of DRAM read bursts, including those serviced by the write queue
system.physmem.writeBursts                     293459                       # Number of DRAM write bursts, including those merged in the write queue
system.physmem.bytesReadDRAM                 24275200                       # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ                     21376                       # Total number of bytes read from write queue
system.physmem.bytesWritten                  18779968                       # Total number of bytes written to DRAM
system.physmem.bytesReadSys                  24296576                       # Total read bytes from the system interface side
system.physmem.bytesWrittenSys               18781376                       # Total written bytes from the system interface side
system.physmem.servicedByWrQ                      334                       # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts                       0                       # Number of DRAM write bursts merged with an existing one
system.physmem.neitherReadNorWriteReqs              0                       # Number of requests that are neither read nor write
system.physmem.perBankRdBursts::0               23720                       # Per bank write bursts
system.physmem.perBankRdBursts::1               23189                       # Per bank write bursts
system.physmem.perBankRdBursts::2               23443                       # Per bank write bursts
system.physmem.perBankRdBursts::3               24493                       # Per bank write bursts
system.physmem.perBankRdBursts::4               25427                       # Per bank write bursts
system.physmem.perBankRdBursts::5               23582                       # Per bank write bursts
system.physmem.perBankRdBursts::6               23638                       # Per bank write bursts
system.physmem.perBankRdBursts::7               23957                       # Per bank write bursts
system.physmem.perBankRdBursts::8               23144                       # Per bank write bursts
system.physmem.perBankRdBursts::9               23961                       # Per bank write bursts
system.physmem.perBankRdBursts::10              24713                       # Per bank write bursts
system.physmem.perBankRdBursts::11              22767                       # Per bank write bursts
system.physmem.perBankRdBursts::12              23721                       # Per bank write bursts
system.physmem.perBankRdBursts::13              24378                       # Per bank write bursts
system.physmem.perBankRdBursts::14              22727                       # Per bank write bursts
system.physmem.perBankRdBursts::15              22440                       # Per bank write bursts
system.physmem.perBankWrBursts::0               17784                       # Per bank write bursts
system.physmem.perBankWrBursts::1               17460                       # Per bank write bursts
system.physmem.perBankWrBursts::2               17942                       # Per bank write bursts
system.physmem.perBankWrBursts::3               18842                       # Per bank write bursts
system.physmem.perBankWrBursts::4               19508                       # Per bank write bursts
system.physmem.perBankWrBursts::5               18590                       # Per bank write bursts
system.physmem.perBankWrBursts::6               18730                       # Per bank write bursts
system.physmem.perBankWrBursts::7               18662                       # Per bank write bursts
system.physmem.perBankWrBursts::8               18408                       # Per bank write bursts
system.physmem.perBankWrBursts::9               18932                       # Per bank write bursts
system.physmem.perBankWrBursts::10              19251                       # Per bank write bursts
system.physmem.perBankWrBursts::11              18034                       # Per bank write bursts
system.physmem.perBankWrBursts::12              18264                       # Per bank write bursts
system.physmem.perBankWrBursts::13              18730                       # Per bank write bursts
system.physmem.perBankWrBursts::14              17177                       # Per bank write bursts
system.physmem.perBankWrBursts::15              17123                       # Per bank write bursts
system.physmem.numRdRetry                           0                       # Number of times read queue was full causing retry
system.physmem.numWrRetry                           0                       # Number of times write queue was full causing retry
system.physmem.totGap                    412968199500                       # Total gap between requests
system.physmem.readPktSize::0                       0                       # Read request sizes (log2)
system.physmem.readPktSize::1                       0                       # Read request sizes (log2)
system.physmem.readPktSize::2                       0                       # Read request sizes (log2)
system.physmem.readPktSize::3                       0                       # Read request sizes (log2)
system.physmem.readPktSize::4                       0                       # Read request sizes (log2)
system.physmem.readPktSize::5                       0                       # Read request sizes (log2)
system.physmem.readPktSize::6                  379634                       # Read request sizes (log2)
system.physmem.writePktSize::0                      0                       # Write request sizes (log2)
system.physmem.writePktSize::1                      0                       # Write request sizes (log2)
system.physmem.writePktSize::2                      0                       # Write request sizes (log2)
system.physmem.writePktSize::3                      0                       # Write request sizes (log2)
system.physmem.writePktSize::4                      0                       # Write request sizes (log2)
system.physmem.writePktSize::5                      0                       # Write request sizes (log2)
system.physmem.writePktSize::6                 293459                       # Write request sizes (log2)
system.physmem.rdQLenPdf::0                    377911                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1                      1373                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2                        16                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31                        0                       # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15                     6948                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16                     7299                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17                    17007                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18                    17386                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19                    17473                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20                    17478                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21                    17451                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22                    17472                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23                    17456                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24                    17464                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25                    17487                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26                    17459                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27                    17522                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28                    17527                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29                    17491                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30                    17667                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31                    17395                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::32                    17350                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::33                       31                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::34                       16                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::35                       10                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::36                       11                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::37                        4                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::38                        3                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::39                        3                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::40                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::41                        4                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::43                        3                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::44                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::45                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::46                        3                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::47                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::48                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::49                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::50                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::51                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::52                        3                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::53                        2                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::54                        3                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::55                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::56                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::57                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::58                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::59                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::60                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::61                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63                        0                       # What write queue length does an incoming req see
system.physmem.bytesPerActivate::samples       142181                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean      302.814019                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean     179.682339                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev     324.904056                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127          50781     35.72%     35.72% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255        38739     27.25%     62.96% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383        13305      9.36%     72.32% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511         8117      5.71%     78.03% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639         5703      4.01%     82.04% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767         3753      2.64%     84.68% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895         3029      2.13%     86.81% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023         2502      1.76%     88.57% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151        16252     11.43%    100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total         142181                       # Bytes accessed per row activation
system.physmem.rdPerTurnAround::samples         17324                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::mean        21.893847                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::stdev      236.830288                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::0-1023          17315     99.95%     99.95% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::1024-2047            4      0.02%     99.97% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::2048-3071            2      0.01%     99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::3072-4095            1      0.01%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::8192-9215            1      0.01%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::28672-29695            1      0.01%    100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::total           17324                       # Reads before turning the bus around for writes
system.physmem.wrPerTurnAround::samples         17324                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::mean        16.938178                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::gmean       16.866265                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::stdev        3.087562                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::16-23           17274     99.71%     99.71% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::24-31              36      0.21%     99.92% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::32-39               4      0.02%     99.94% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::40-47               3      0.02%     99.96% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::56-63               1      0.01%     99.97% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::72-79               2      0.01%     99.98% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::80-87               1      0.01%     99.98% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::104-111             1      0.01%     99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::152-159             1      0.01%     99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::328-335             1      0.01%    100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::total           17324                       # Writes before turning the bus around for reads
system.physmem.totQLat                     4037980750                       # Total ticks spent queuing
system.physmem.totMemAccLat               11149855750                       # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.totBusLat                   1896500000                       # Total ticks spent in databus transfers
system.physmem.avgQLat                       10645.88                       # Average queueing delay per DRAM burst
system.physmem.avgBusLat                      5000.00                       # Average bus latency per DRAM burst
system.physmem.avgMemAccLat                  29395.88                       # Average memory access latency per DRAM burst
system.physmem.avgRdBW                          58.78                       # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW                          45.48                       # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys                       58.83                       # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys                       45.48                       # Average system write bandwidth in MiByte/s
system.physmem.peakBW                        12800.00                       # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil                           0.81                       # Data bus utilization in percentage
system.physmem.busUtilRead                       0.46                       # Data bus utilization in percentage for reads
system.physmem.busUtilWrite                      0.36                       # Data bus utilization in percentage for writes
system.physmem.avgRdQLen                         1.00                       # Average read queue length when enqueuing
system.physmem.avgWrQLen                        20.84                       # Average write queue length when enqueuing
system.physmem.readRowHits                     314187                       # Number of row buffer hits during reads
system.physmem.writeRowHits                    216366                       # Number of row buffer hits during writes
system.physmem.readRowHitRate                   82.83                       # Row buffer hit rate for reads
system.physmem.writeRowHitRate                  73.73                       # Row buffer hit rate for writes
system.physmem.avgGap                       613538.10                       # Average gap between requests
system.physmem.pageHitRate                      78.86                       # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy                  547268400                       # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy                  298608750                       # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy                1493302200                       # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy                955858320                       # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy            26973005280                       # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy            62129952405                       # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy           193280474250                       # Energy for precharge background per rank (pJ)
system.physmem_0.totalEnergy             285678469605                       # Total energy per rank (pJ)
system.physmem_0.averagePower              691.770048                       # Core power per rank (mW)
system.physmem_0.memoryStateTime::IDLE   320991140250                       # Time in different power states
system.physmem_0.memoryStateTime::REF     13789880000                       # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_0.memoryStateTime::ACT     78186381000                       # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.physmem_1.actEnergy                  527582160                       # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy                  287867250                       # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy                1465152000                       # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy                945535680                       # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy            26973005280                       # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy            59078125665                       # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy           195957550500                       # Energy for precharge background per rank (pJ)
system.physmem_1.totalEnergy             285234818535                       # Total energy per rank (pJ)
system.physmem_1.averagePower              690.695650                       # Core power per rank (mW)
system.physmem_1.memoryStateTime::IDLE   325462585000                       # Time in different power states
system.physmem_1.memoryStateTime::REF     13789880000                       # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_1.memoryStateTime::ACT     73715009750                       # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.cpu.branchPred.lookups               124207922                       # Number of BP lookups
system.cpu.branchPred.condPredicted          87898525                       # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect           6402854                       # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups             71417252                       # Number of BTB lookups
system.cpu.branchPred.BTBHits                67405039                       # Number of BTB hits
system.cpu.branchPred.BTBCorrect                    0                       # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct             94.382012                       # BTB Hit Percentage
system.cpu.branchPred.usedRAS                15056477                       # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect            1126637                       # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock                       500                       # Clock period in ticks
system.cpu.dtb.fetch_hits                           0                       # ITB hits
system.cpu.dtb.fetch_misses                         0                       # ITB misses
system.cpu.dtb.fetch_acv                            0                       # ITB acv
system.cpu.dtb.fetch_accesses                       0                       # ITB accesses
system.cpu.dtb.read_hits                    149440392                       # DTB read hits
system.cpu.dtb.read_misses                     563754                       # DTB read misses
system.cpu.dtb.read_acv                             0                       # DTB read access violations
system.cpu.dtb.read_accesses                150004146                       # DTB read accesses
system.cpu.dtb.write_hits                    57327101                       # DTB write hits
system.cpu.dtb.write_misses                     66835                       # DTB write misses
system.cpu.dtb.write_acv                            0                       # DTB write access violations
system.cpu.dtb.write_accesses                57393936                       # DTB write accesses
system.cpu.dtb.data_hits                    206767493                       # DTB hits
system.cpu.dtb.data_misses                     630589                       # DTB misses
system.cpu.dtb.data_acv                             0                       # DTB access violations
system.cpu.dtb.data_accesses                207398082                       # DTB accesses
system.cpu.itb.fetch_hits                   226564860                       # ITB hits
system.cpu.itb.fetch_misses                        48                       # ITB misses
system.cpu.itb.fetch_acv                            0                       # ITB acv
system.cpu.itb.fetch_accesses               226564908                       # ITB accesses
system.cpu.itb.read_hits                            0                       # DTB read hits
system.cpu.itb.read_misses                          0                       # DTB read misses
system.cpu.itb.read_acv                             0                       # DTB read access violations
system.cpu.itb.read_accesses                        0                       # DTB read accesses
system.cpu.itb.write_hits                           0                       # DTB write hits
system.cpu.itb.write_misses                         0                       # DTB write misses
system.cpu.itb.write_acv                            0                       # DTB write access violations
system.cpu.itb.write_accesses                       0                       # DTB write accesses
system.cpu.itb.data_hits                            0                       # DTB hits
system.cpu.itb.data_misses                          0                       # DTB misses
system.cpu.itb.data_acv                             0                       # DTB access violations
system.cpu.itb.data_accesses                        0                       # DTB accesses
system.cpu.workload.num_syscalls                  485                       # Number of system calls
system.cpu.numCycles                        825936575                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.committedInsts                   611901617                       # Number of instructions committed
system.cpu.committedOps                     611901617                       # Number of ops (including micro ops) committed
system.cpu.discardedOps                      13262650                       # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends                         0                       # Number of times Execute suspended instruction fetching
system.cpu.cpi                               1.349787                       # CPI: cycles per instruction
system.cpu.ipc                               0.740858                       # IPC: instructions per cycle
system.cpu.tickCycles                       740975160                       # Number of cycles that the object actually ticked
system.cpu.idleCycles                        84961415                       # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements           2535462                       # number of replacements
system.cpu.dcache.tags.tagsinuse          4087.659006                       # Cycle average of tags in use
system.cpu.dcache.tags.total_refs           202664910                       # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs           2539558                       # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs             79.803222                       # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle        1636438500                       # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data  4087.659006                       # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data     0.997964                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total     0.997964                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0           48                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1           74                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2          830                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::3         3144                       # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses         414773666                       # Number of tag accesses
system.cpu.dcache.tags.data_accesses        414773666                       # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data    146998717                       # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total       146998717                       # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data     55666193                       # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total       55666193                       # number of WriteReq hits
system.cpu.dcache.demand_hits::cpu.data     202664910                       # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total        202664910                       # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data    202664910                       # number of overall hits
system.cpu.dcache.overall_hits::total       202664910                       # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data      1908303                       # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total       1908303                       # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data      1543841                       # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total      1543841                       # number of WriteReq misses
system.cpu.dcache.demand_misses::cpu.data      3452144                       # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total        3452144                       # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data      3452144                       # number of overall misses
system.cpu.dcache.overall_misses::total       3452144                       # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data  37694000500                       # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total  37694000500                       # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data  47697864000                       # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total  47697864000                       # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data  85391864500                       # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total  85391864500                       # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data  85391864500                       # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total  85391864500                       # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data    148907020                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total    148907020                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data     57210034                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total     57210034                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data    206117054                       # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total    206117054                       # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data    206117054                       # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total    206117054                       # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.012815                       # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total     0.012815                       # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.026985                       # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total     0.026985                       # miss rate for WriteReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data     0.016748                       # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total     0.016748                       # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data     0.016748                       # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total     0.016748                       # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 19752.628644                       # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 19752.628644                       # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 30895.580568                       # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 30895.580568                       # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 24735.892970                       # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 24735.892970                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 24735.892970                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 24735.892970                       # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
system.cpu.dcache.cache_copies                      0                       # number of cache copies performed
system.cpu.dcache.writebacks::writebacks      2339794                       # number of writebacks
system.cpu.dcache.writebacks::total           2339794                       # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data       143529                       # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total       143529                       # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data       769057                       # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total       769057                       # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data       912586                       # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total       912586                       # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data       912586                       # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total       912586                       # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data      1764774                       # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total      1764774                       # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data       774784                       # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total       774784                       # number of WriteReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data      2539558                       # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total      2539558                       # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data      2539558                       # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total      2539558                       # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data  33188844000                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total  33188844000                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data  23330038500                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total  23330038500                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::cpu.data  56518882500                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total  56518882500                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data  56518882500                       # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total  56518882500                       # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.011852                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.011852                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.013543                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.013543                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.012321                       # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total     0.012321                       # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.012321                       # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total     0.012321                       # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 18806.285677                       # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 18806.285677                       # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 30111.667897                       # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 30111.667897                       # average WriteReq mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 22255.401334                       # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 22255.401334                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 22255.401334                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::total 22255.401334                       # average overall mshr miss latency
system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
system.cpu.icache.tags.replacements              3160                       # number of replacements
system.cpu.icache.tags.tagsinuse          1117.196292                       # Cycle average of tags in use
system.cpu.icache.tags.total_refs           226559871                       # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs              4989                       # Sample count of references to valid blocks.
system.cpu.icache.tags.avg_refs          45411.880337                       # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
system.cpu.icache.tags.occ_blocks::cpu.inst  1117.196292                       # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst     0.545506                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total     0.545506                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024         1829                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::0           65                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::1           80                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::2           19                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::3           76                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4         1589                       # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024     0.893066                       # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses         453134709                       # Number of tag accesses
system.cpu.icache.tags.data_accesses        453134709                       # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst    226559871                       # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total       226559871                       # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst     226559871                       # number of demand (read+write) hits
system.cpu.icache.demand_hits::total        226559871                       # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst    226559871                       # number of overall hits
system.cpu.icache.overall_hits::total       226559871                       # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst         4989                       # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total          4989                       # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst         4989                       # number of demand (read+write) misses
system.cpu.icache.demand_misses::total           4989                       # number of demand (read+write) misses
system.cpu.icache.overall_misses::cpu.inst         4989                       # number of overall misses
system.cpu.icache.overall_misses::total          4989                       # number of overall misses
system.cpu.icache.ReadReq_miss_latency::cpu.inst    243357500                       # number of ReadReq miss cycles
system.cpu.icache.ReadReq_miss_latency::total    243357500                       # number of ReadReq miss cycles
system.cpu.icache.demand_miss_latency::cpu.inst    243357500                       # number of demand (read+write) miss cycles
system.cpu.icache.demand_miss_latency::total    243357500                       # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst    243357500                       # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total    243357500                       # number of overall miss cycles
system.cpu.icache.ReadReq_accesses::cpu.inst    226564860                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total    226564860                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst    226564860                       # number of demand (read+write) accesses
system.cpu.icache.demand_accesses::total    226564860                       # number of demand (read+write) accesses
system.cpu.icache.overall_accesses::cpu.inst    226564860                       # number of overall (read+write) accesses
system.cpu.icache.overall_accesses::total    226564860                       # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.000022                       # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total     0.000022                       # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst     0.000022                       # miss rate for demand accesses
system.cpu.icache.demand_miss_rate::total     0.000022                       # miss rate for demand accesses
system.cpu.icache.overall_miss_rate::cpu.inst     0.000022                       # miss rate for overall accesses
system.cpu.icache.overall_miss_rate::total     0.000022                       # miss rate for overall accesses
system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 48778.813389                       # average ReadReq miss latency
system.cpu.icache.ReadReq_avg_miss_latency::total 48778.813389                       # average ReadReq miss latency
system.cpu.icache.demand_avg_miss_latency::cpu.inst 48778.813389                       # average overall miss latency
system.cpu.icache.demand_avg_miss_latency::total 48778.813389                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::cpu.inst 48778.813389                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::total 48778.813389                       # average overall miss latency
system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.icache.fast_writes                       0                       # number of fast writes performed
system.cpu.icache.cache_copies                      0                       # number of cache copies performed
system.cpu.icache.ReadReq_mshr_misses::cpu.inst         4989                       # number of ReadReq MSHR misses
system.cpu.icache.ReadReq_mshr_misses::total         4989                       # number of ReadReq MSHR misses
system.cpu.icache.demand_mshr_misses::cpu.inst         4989                       # number of demand (read+write) MSHR misses
system.cpu.icache.demand_mshr_misses::total         4989                       # number of demand (read+write) MSHR misses
system.cpu.icache.overall_mshr_misses::cpu.inst         4989                       # number of overall MSHR misses
system.cpu.icache.overall_mshr_misses::total         4989                       # number of overall MSHR misses
system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst    238368500                       # number of ReadReq MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_latency::total    238368500                       # number of ReadReq MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::cpu.inst    238368500                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::total    238368500                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::cpu.inst    238368500                       # number of overall MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::total    238368500                       # number of overall MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.000022                       # mshr miss rate for ReadReq accesses
system.cpu.icache.ReadReq_mshr_miss_rate::total     0.000022                       # mshr miss rate for ReadReq accesses
system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.000022                       # mshr miss rate for demand accesses
system.cpu.icache.demand_mshr_miss_rate::total     0.000022                       # mshr miss rate for demand accesses
system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.000022                       # mshr miss rate for overall accesses
system.cpu.icache.overall_mshr_miss_rate::total     0.000022                       # mshr miss rate for overall accesses
system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 47778.813389                       # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 47778.813389                       # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 47778.813389                       # average overall mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::total 47778.813389                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 47778.813389                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 47778.813389                       # average overall mshr miss latency
system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
system.cpu.l2cache.tags.replacements           346924                       # number of replacements
system.cpu.l2cache.tags.tagsinuse        29501.974540                       # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs            3909137                       # Total number of references to valid blocks.
system.cpu.l2cache.tags.sampled_refs           379348                       # Sample count of references to valid blocks.
system.cpu.l2cache.tags.avg_refs            10.304884                       # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle     189597329500                       # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 21308.033203                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.inst   178.119717                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.data  8015.821620                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks     0.650270                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst     0.005436                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data     0.244623                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total     0.900329                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_task_id_blocks::1024        32424                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::0          117                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::1           81                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::2          225                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::3        13174                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4        18827                       # Occupied blocks per task id
system.cpu.l2cache.tags.occ_task_id_percent::1024     0.989502                       # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses         41822837                       # Number of tag accesses
system.cpu.l2cache.tags.data_accesses        41822837                       # Number of data accesses
system.cpu.l2cache.Writeback_hits::writebacks      2339794                       # number of Writeback hits
system.cpu.l2cache.Writeback_hits::total      2339794                       # number of Writeback hits
system.cpu.l2cache.ReadExReq_hits::cpu.data       571874                       # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total       571874                       # number of ReadExReq hits
system.cpu.l2cache.ReadCleanReq_hits::cpu.inst         2317                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadCleanReq_hits::total         2317                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadSharedReq_hits::cpu.data      1590722                       # number of ReadSharedReq hits
system.cpu.l2cache.ReadSharedReq_hits::total      1590722                       # number of ReadSharedReq hits
system.cpu.l2cache.demand_hits::cpu.inst         2317                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.data      2162596                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::total         2164913                       # number of demand (read+write) hits
system.cpu.l2cache.overall_hits::cpu.inst         2317                       # number of overall hits
system.cpu.l2cache.overall_hits::cpu.data      2162596                       # number of overall hits
system.cpu.l2cache.overall_hits::total        2164913                       # number of overall hits
system.cpu.l2cache.ReadExReq_misses::cpu.data       206263                       # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total       206263                       # number of ReadExReq misses
system.cpu.l2cache.ReadCleanReq_misses::cpu.inst         2672                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadCleanReq_misses::total         2672                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadSharedReq_misses::cpu.data       170699                       # number of ReadSharedReq misses
system.cpu.l2cache.ReadSharedReq_misses::total       170699                       # number of ReadSharedReq misses
system.cpu.l2cache.demand_misses::cpu.inst         2672                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.data       376962                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::total        379634                       # number of demand (read+write) misses
system.cpu.l2cache.overall_misses::cpu.inst         2672                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.data       376962                       # number of overall misses
system.cpu.l2cache.overall_misses::total       379634                       # number of overall misses
system.cpu.l2cache.ReadExReq_miss_latency::cpu.data  16205579000                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadExReq_miss_latency::total  16205579000                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst    206542500                       # number of ReadCleanReq miss cycles
system.cpu.l2cache.ReadCleanReq_miss_latency::total    206542500                       # number of ReadCleanReq miss cycles
system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data  13758959500                       # number of ReadSharedReq miss cycles
system.cpu.l2cache.ReadSharedReq_miss_latency::total  13758959500                       # number of ReadSharedReq miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.inst    206542500                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.data  29964538500                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::total  30171081000                       # number of demand (read+write) miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.inst    206542500                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.data  29964538500                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::total  30171081000                       # number of overall miss cycles
system.cpu.l2cache.Writeback_accesses::writebacks      2339794                       # number of Writeback accesses(hits+misses)
system.cpu.l2cache.Writeback_accesses::total      2339794                       # number of Writeback accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data       778137                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::total       778137                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst         4989                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::total         4989                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::cpu.data      1761421                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::total      1761421                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.demand_accesses::cpu.inst         4989                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.data      2539558                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::total      2544547                       # number of demand (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.inst         4989                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.data      2539558                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::total      2544547                       # number of overall (read+write) accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.265073                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total     0.265073                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.535578                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.535578                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.096910                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.096910                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_miss_rate::cpu.inst     0.535578                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.data     0.148436                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::total     0.149195                       # miss rate for demand accesses
system.cpu.l2cache.overall_miss_rate::cpu.inst     0.535578                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data     0.148436                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total     0.149195                       # miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 78567.552106                       # average ReadExReq miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::total 78567.552106                       # average ReadExReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 77298.839820                       # average ReadCleanReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 77298.839820                       # average ReadCleanReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 80603.632710                       # average ReadSharedReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 80603.632710                       # average ReadSharedReq miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 77298.839820                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 79489.546692                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::total 79474.127712                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 77298.839820                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 79489.546692                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::total 79474.127712                       # average overall miss latency
system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
system.cpu.l2cache.cache_copies                     0                       # number of cache copies performed
system.cpu.l2cache.writebacks::writebacks       293459                       # number of writebacks
system.cpu.l2cache.writebacks::total           293459                       # number of writebacks
system.cpu.l2cache.CleanEvict_mshr_misses::writebacks          739                       # number of CleanEvict MSHR misses
system.cpu.l2cache.CleanEvict_mshr_misses::total          739                       # number of CleanEvict MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data       206263                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::total       206263                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst         2672                       # number of ReadCleanReq MSHR misses
system.cpu.l2cache.ReadCleanReq_mshr_misses::total         2672                       # number of ReadCleanReq MSHR misses
system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data       170699                       # number of ReadSharedReq MSHR misses
system.cpu.l2cache.ReadSharedReq_mshr_misses::total       170699                       # number of ReadSharedReq MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.inst         2672                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.data       376962                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::total       379634                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.inst         2672                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.data       376962                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::total       379634                       # number of overall MSHR misses
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data  14142949000                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total  14142949000                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst    179822500                       # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total    179822500                       # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data  12051969500                       # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total  12051969500                       # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst    179822500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data  26194918500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total  26374741000                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst    179822500                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data  26194918500                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total  26374741000                       # number of overall MSHR miss cycles
system.cpu.l2cache.CleanEvict_mshr_miss_rate::writebacks          inf                       # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.CleanEvict_mshr_miss_rate::total          inf                       # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data     0.265073                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total     0.265073                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.535578                       # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.535578                       # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.096910                       # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.096910                       # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.535578                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.148436                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total     0.149195                       # mshr miss rate for demand accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.535578                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.148436                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total     0.149195                       # mshr miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 68567.552106                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 68567.552106                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 67298.839820                       # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 67298.839820                       # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 70603.632710                       # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 70603.632710                       # average ReadSharedReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 67298.839820                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 69489.546692                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 69474.127712                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 67298.839820                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 69489.546692                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 69474.127712                       # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
system.cpu.toL2Bus.trans_dist::ReadResp       1766410                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::Writeback      2633253                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict       252293                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq       778137                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp       778137                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadCleanReq         4989                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadSharedReq      1761421                       # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        13138                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side      7614578                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total           7627716                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side       319296                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side    312278528                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total          312597824                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops                      346924                       # Total snoops (count)
system.cpu.toL2Bus.snoop_fanout::samples      5430093                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean        1.063889                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev       0.244555                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0                  0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1            5083169     93.61%     93.61% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2             346924      6.39%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value            1                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value            2                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total        5430093                       # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy     4881378500                       # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization          1.2                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer0.occupancy       7483500                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy    3809337000                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization          0.9                       # Layer utilization (%)
system.membus.trans_dist::ReadResp             173371                       # Transaction distribution
system.membus.trans_dist::Writeback            293459                       # Transaction distribution
system.membus.trans_dist::CleanEvict            51814                       # Transaction distribution
system.membus.trans_dist::ReadExReq            206263                       # Transaction distribution
system.membus.trans_dist::ReadExResp           206263                       # Transaction distribution
system.membus.trans_dist::ReadSharedReq        173371                       # Transaction distribution
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port      1104541                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total                1104541                       # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port     43077952                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total                43077952                       # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops                                0                       # Total snoops (count)
system.membus.snoop_fanout::samples            724907                       # Request fanout histogram
system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::0                  724907    100.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
system.membus.snoop_fanout::total              724907                       # Request fanout histogram
system.membus.reqLayer0.occupancy          2020096000                       # Layer occupancy (ticks)
system.membus.reqLayer0.utilization               0.5                       # Layer utilization (%)
system.membus.respLayer1.occupancy         2009057000                       # Layer occupancy (ticks)
system.membus.respLayer1.utilization              0.5                       # Layer utilization (%)

---------- End Simulation Statistics   ----------