path: root/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.560940                       # Number of seconds simulated
sim_ticks                                560939659000                       # Number of ticks simulated
final_tick                               560939659000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                 1000000000000                       # Frequency of simulated ticks
host_inst_rate                                 234960                       # Simulator instruction rate (inst/s)
host_op_rate                                   234960                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                              141903449                       # Simulator tick rate (ticks/s)
host_mem_usage                                 300504                       # Number of bytes of host memory used
host_seconds                                  3952.97                       # Real time elapsed on the host
sim_insts                                   928789150                       # Number of instructions simulated
sim_ops                                     928789150                       # Number of ops (including micro ops) simulated
system.voltage_domain.voltage                       1                       # Voltage in Volts
system.clk_domain.clock                          1000                       # Clock period in ticks
system.physmem.bytes_read::cpu.inst            186816                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data          18514112                       # Number of bytes read from this memory
system.physmem.bytes_read::total             18700928                       # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst       186816                       # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total          186816                       # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks      4267712                       # Number of bytes written to this memory
system.physmem.bytes_written::total           4267712                       # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst               2919                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data             289283                       # Number of read requests responded to by this memory
system.physmem.num_reads::total                292202                       # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks           66683                       # Number of write requests responded to by this memory
system.physmem.num_writes::total                66683                       # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst               333041                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data             33005532                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total                33338573                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst          333041                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total             333041                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks           7608148                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total                7608148                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks           7608148                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst              333041                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data            33005532                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total               40946722                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs                        292202                       # Number of read requests accepted
system.physmem.writeReqs                        66683                       # Number of write requests accepted
system.physmem.readBursts                      292202                       # Number of DRAM read bursts, including those serviced by the write queue
system.physmem.writeBursts                      66683                       # Number of DRAM write bursts, including those merged in the write queue
system.physmem.bytesReadDRAM                 18682112                       # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ                     18816                       # Total number of bytes read from write queue
system.physmem.bytesWritten                   4266368                       # Total number of bytes written to DRAM
system.physmem.bytesReadSys                  18700928                       # Total read bytes from the system interface side
system.physmem.bytesWrittenSys                4267712                       # Total written bytes from the system interface side
system.physmem.servicedByWrQ                      294                       # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts                       0                       # Number of DRAM write bursts merged with an existing one
system.physmem.neitherReadNorWriteReqs              0                       # Number of requests that are neither read nor write
system.physmem.perBankRdBursts::0               18035                       # Per bank write bursts
system.physmem.perBankRdBursts::1               18362                       # Per bank write bursts
system.physmem.perBankRdBursts::2               18392                       # Per bank write bursts
system.physmem.perBankRdBursts::3               18337                       # Per bank write bursts
system.physmem.perBankRdBursts::4               18250                       # Per bank write bursts
system.physmem.perBankRdBursts::5               18249                       # Per bank write bursts
system.physmem.perBankRdBursts::6               18316                       # Per bank write bursts
system.physmem.perBankRdBursts::7               18295                       # Per bank write bursts
system.physmem.perBankRdBursts::8               18230                       # Per bank write bursts
system.physmem.perBankRdBursts::9               18228                       # Per bank write bursts
system.physmem.perBankRdBursts::10              18207                       # Per bank write bursts
system.physmem.perBankRdBursts::11              18382                       # Per bank write bursts
system.physmem.perBankRdBursts::12              18252                       # Per bank write bursts
system.physmem.perBankRdBursts::13              18131                       # Per bank write bursts
system.physmem.perBankRdBursts::14              18059                       # Per bank write bursts
system.physmem.perBankRdBursts::15              18183                       # Per bank write bursts
system.physmem.perBankWrBursts::0                4125                       # Per bank write bursts
system.physmem.perBankWrBursts::1                4164                       # Per bank write bursts
system.physmem.perBankWrBursts::2                4223                       # Per bank write bursts
system.physmem.perBankWrBursts::3                4160                       # Per bank write bursts
system.physmem.perBankWrBursts::4                4142                       # Per bank write bursts
system.physmem.perBankWrBursts::5                4099                       # Per bank write bursts
system.physmem.perBankWrBursts::6                4262                       # Per bank write bursts
system.physmem.perBankWrBursts::7                4226                       # Per bank write bursts
system.physmem.perBankWrBursts::8                4233                       # Per bank write bursts
system.physmem.perBankWrBursts::9                4186                       # Per bank write bursts
system.physmem.perBankWrBursts::10               4150                       # Per bank write bursts
system.physmem.perBankWrBursts::11               4241                       # Per bank write bursts
system.physmem.perBankWrBursts::12               4098                       # Per bank write bursts
system.physmem.perBankWrBursts::13               4100                       # Per bank write bursts
system.physmem.perBankWrBursts::14               4096                       # Per bank write bursts
system.physmem.perBankWrBursts::15               4157                       # Per bank write bursts
system.physmem.numRdRetry                           0                       # Number of times read queue was full causing retry
system.physmem.numWrRetry                           0                       # Number of times write queue was full causing retry
system.physmem.totGap                    560939577000                       # Total gap between requests
system.physmem.readPktSize::0                       0                       # Read request sizes (log2)
system.physmem.readPktSize::1                       0                       # Read request sizes (log2)
system.physmem.readPktSize::2                       0                       # Read request sizes (log2)
system.physmem.readPktSize::3                       0                       # Read request sizes (log2)
system.physmem.readPktSize::4                       0                       # Read request sizes (log2)
system.physmem.readPktSize::5                       0                       # Read request sizes (log2)
system.physmem.readPktSize::6                  292202                       # Read request sizes (log2)
system.physmem.writePktSize::0                      0                       # Write request sizes (log2)
system.physmem.writePktSize::1                      0                       # Write request sizes (log2)
system.physmem.writePktSize::2                      0                       # Write request sizes (log2)
system.physmem.writePktSize::3                      0                       # Write request sizes (log2)
system.physmem.writePktSize::4                      0                       # Write request sizes (log2)
system.physmem.writePktSize::5                      0                       # Write request sizes (log2)
system.physmem.writePktSize::6                  66683                       # Write request sizes (log2)
system.physmem.rdQLenPdf::0                    291402                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1                       476                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2                        30                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31                        0                       # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15                      940                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16                      940                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17                     4047                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18                     4050                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19                     4050                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20                     4050                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26                     4050                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28                     4050                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30                     4050                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::32                     4049                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::33                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::34                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::35                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::36                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::37                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::38                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::39                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::40                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::41                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::43                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::44                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::45                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::46                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::47                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::48                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::49                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::50                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::51                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::52                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::53                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::54                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::55                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::56                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::57                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::58                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::59                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::60                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::61                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63                        0                       # What write queue length does an incoming req see
system.physmem.bytesPerActivate::samples       104019                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean      220.607081                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean     142.832345                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev     268.107277                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127          38319     36.84%     36.84% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255        43999     42.30%     79.14% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383         8903      8.56%     87.70% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511          723      0.70%     88.39% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639         1372      1.32%     89.71% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767         1141      1.10%     90.81% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895          666      0.64%     91.45% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023          599      0.58%     92.02% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151         8297      7.98%    100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total         104019                       # Bytes accessed per row activation
system.physmem.rdPerTurnAround::samples          4049                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::mean        70.696468                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::gmean       34.574169                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::stdev      760.359503                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::0-1023           4041     99.80%     99.80% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::1024-2047            1      0.02%     99.83% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::13312-14335            3      0.07%     99.90% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::15360-16383            3      0.07%     99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::30720-31743            1      0.02%    100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::total            4049                       # Reads before turning the bus around for writes
system.physmem.wrPerTurnAround::samples          4049                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::mean        16.463818                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::gmean       16.443063                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::stdev        0.844207                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::16               3110     76.81%     76.81% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::18                939     23.19%    100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::total            4049                       # Writes before turning the bus around for reads
system.physmem.totQLat                     2923147000                       # Total ticks spent queuing
system.physmem.totMemAccLat                8396422000                       # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.totBusLat                   1459540000                       # Total ticks spent in databus transfers
system.physmem.avgQLat                       10013.93                       # Average queueing delay per DRAM burst
system.physmem.avgBusLat                      5000.00                       # Average bus latency per DRAM burst
system.physmem.avgMemAccLat                  28763.93                       # Average memory access latency per DRAM burst
system.physmem.avgRdBW                          33.31                       # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW                           7.61                       # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys                       33.34                       # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys                        7.61                       # Average system write bandwidth in MiByte/s
system.physmem.peakBW                        12800.00                       # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil                           0.32                       # Data bus utilization in percentage
system.physmem.busUtilRead                       0.26                       # Data bus utilization in percentage for reads
system.physmem.busUtilWrite                      0.06                       # Data bus utilization in percentage for writes
system.physmem.avgRdQLen                         1.00                       # Average read queue length when enqueuing
system.physmem.avgWrQLen                        24.30                       # Average write queue length when enqueuing
system.physmem.readRowHits                     202517                       # Number of row buffer hits during reads
system.physmem.writeRowHits                     52027                       # Number of row buffer hits during writes
system.physmem.readRowHitRate                   69.38                       # Row buffer hit rate for reads
system.physmem.writeRowHitRate                  78.02                       # Row buffer hit rate for writes
system.physmem.avgGap                      1563006.47                       # Average gap between requests
system.physmem.pageHitRate                      70.98                       # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy                  392311080                       # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy                  214058625                       # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy                1140422400                       # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy                216438480                       # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy            36637679520                       # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy           109190821365                       # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy           240780947250                       # Energy for precharge background per rank (pJ)
system.physmem_0.totalEnergy             388572678720                       # Total energy per rank (pJ)
system.physmem_0.averagePower              692.720364                       # Core power per rank (mW)
system.physmem_0.memoryStateTime::IDLE   399879041250                       # Time in different power states
system.physmem_0.memoryStateTime::REF     18730920000                       # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_0.memoryStateTime::ACT    142327335000                       # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.physmem_1.actEnergy                  394019640                       # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy                  214990875                       # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy                1136187000                       # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy                215531280                       # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy            36637679520                       # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy           109681250220                       # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy           240350746500                       # Energy for precharge background per rank (pJ)
system.physmem_1.totalEnergy             388630405035                       # Total energy per rank (pJ)
system.physmem_1.averagePower              692.823275                       # Core power per rank (mW)
system.physmem_1.memoryStateTime::IDLE   399158044000                       # Time in different power states
system.physmem_1.memoryStateTime::REF     18730920000                       # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_1.memoryStateTime::ACT    143048821000                       # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.cpu.branchPred.lookups               125747730                       # Number of BP lookups
system.cpu.branchPred.condPredicted          81143399                       # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect          12156451                       # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups            103980487                       # Number of BTB lookups
system.cpu.branchPred.BTBHits                83512673                       # Number of BTB hits
system.cpu.branchPred.BTBCorrect                    0                       # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct             80.315716                       # BTB Hit Percentage
system.cpu.branchPred.usedRAS                18691015                       # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect               9451                       # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock                       500                       # Clock period in ticks
system.cpu.dtb.fetch_hits                           0                       # ITB hits
system.cpu.dtb.fetch_misses                         0                       # ITB misses
system.cpu.dtb.fetch_acv                            0                       # ITB acv
system.cpu.dtb.fetch_accesses                       0                       # ITB accesses
system.cpu.dtb.read_hits                    237537770                       # DTB read hits
system.cpu.dtb.read_misses                     198464                       # DTB read misses
system.cpu.dtb.read_acv                             0                       # DTB read access violations
system.cpu.dtb.read_accesses                237736234                       # DTB read accesses
system.cpu.dtb.write_hits                    98304947                       # DTB write hits
system.cpu.dtb.write_misses                      7177                       # DTB write misses
system.cpu.dtb.write_acv                            0                       # DTB write access violations
system.cpu.dtb.write_accesses                98312124                       # DTB write accesses
system.cpu.dtb.data_hits                    335842717                       # DTB hits
system.cpu.dtb.data_misses                     205641                       # DTB misses
system.cpu.dtb.data_acv                             0                       # DTB access violations
system.cpu.dtb.data_accesses                336048358                       # DTB accesses
system.cpu.itb.fetch_hits                   316984864                       # ITB hits
system.cpu.itb.fetch_misses                       120                       # ITB misses
system.cpu.itb.fetch_acv                            0                       # ITB acv
system.cpu.itb.fetch_accesses               316984984                       # ITB accesses
system.cpu.itb.read_hits                            0                       # DTB read hits
system.cpu.itb.read_misses                          0                       # DTB read misses
system.cpu.itb.read_acv                             0                       # DTB read access violations
system.cpu.itb.read_accesses                        0                       # DTB read accesses
system.cpu.itb.write_hits                           0                       # DTB write hits
system.cpu.itb.write_misses                         0                       # DTB write misses
system.cpu.itb.write_acv                            0                       # DTB write access violations
system.cpu.itb.write_accesses                       0                       # DTB write accesses
system.cpu.itb.data_hits                            0                       # DTB hits
system.cpu.itb.data_misses                          0                       # DTB misses
system.cpu.itb.data_acv                             0                       # DTB access violations
system.cpu.itb.data_accesses                        0                       # DTB accesses
system.cpu.workload.num_syscalls                   37                       # Number of system calls
system.cpu.numCycles                       1121879318                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.committedInsts                   928789150                       # Number of instructions committed
system.cpu.committedOps                     928789150                       # Number of ops (including micro ops) committed
system.cpu.discardedOps                      30861365                       # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends                         0                       # Number of times Execute suspended instruction fetching
system.cpu.cpi                               1.207895                       # CPI: cycles per instruction
system.cpu.ipc                               0.827887                       # IPC: instructions per cycle
system.cpu.tickCycles                      1059707231                       # Number of cycles that the object actually ticked
system.cpu.idleCycles                        62172087                       # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements            776530                       # number of replacements
system.cpu.dcache.tags.tagsinuse          4092.727909                       # Cycle average of tags in use
system.cpu.dcache.tags.total_refs           322866545                       # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs            780626                       # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs            413.599528                       # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle         898816500                       # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data  4092.727909                       # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data     0.999201                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total     0.999201                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0           57                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1          204                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2          951                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::3         1242                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::4         1642                       # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses         648211884                       # Number of tag accesses
system.cpu.dcache.tags.data_accesses        648211884                       # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data    224702500                       # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total       224702500                       # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data     98164045                       # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total       98164045                       # number of WriteReq hits
system.cpu.dcache.demand_hits::cpu.data     322866545                       # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total        322866545                       # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data    322866545                       # number of overall hits
system.cpu.dcache.overall_hits::total       322866545                       # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data       711929                       # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total        711929                       # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data       137155                       # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total       137155                       # number of WriteReq misses
system.cpu.dcache.demand_misses::cpu.data       849084                       # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total         849084                       # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data       849084                       # number of overall misses
system.cpu.dcache.overall_misses::total        849084                       # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data  24888766500                       # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total  24888766500                       # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data   9955853000                       # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total   9955853000                       # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data  34844619500                       # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total  34844619500                       # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data  34844619500                       # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total  34844619500                       # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data    225414429                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total    225414429                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data     98301200                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total     98301200                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data    323715629                       # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total    323715629                       # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data    323715629                       # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total    323715629                       # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.003158                       # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total     0.003158                       # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.001395                       # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total     0.001395                       # miss rate for WriteReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data     0.002623                       # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total     0.002623                       # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data     0.002623                       # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total     0.002623                       # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 34959.618866                       # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 34959.618866                       # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 72588.334366                       # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 72588.334366                       # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 41037.894366                       # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 41037.894366                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 41037.894366                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 41037.894366                       # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
system.cpu.dcache.cache_copies                      0                       # number of cache copies performed
system.cpu.dcache.writebacks::writebacks        88852                       # number of writebacks
system.cpu.dcache.writebacks::total             88852                       # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data          314                       # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total          314                       # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data        68144                       # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total        68144                       # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data        68458                       # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total        68458                       # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data        68458                       # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total        68458                       # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data       711615                       # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total       711615                       # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data        69011                       # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total        69011                       # number of WriteReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data       780626                       # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total       780626                       # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data       780626                       # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total       780626                       # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data  24170053000                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total  24170053000                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data   4993475000                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total   4993475000                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::cpu.data  29163528000                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total  29163528000                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data  29163528000                       # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total  29163528000                       # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.003157                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.003157                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.000702                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.000702                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.002411                       # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total     0.002411                       # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.002411                       # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total     0.002411                       # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 33965.069595                       # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 33965.069595                       # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 72357.667618                       # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 72357.667618                       # average WriteReq mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 37359.155345                       # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 37359.155345                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 37359.155345                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::total 37359.155345                       # average overall mshr miss latency
system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
system.cpu.icache.tags.replacements             10565                       # number of replacements
system.cpu.icache.tags.tagsinuse          1685.376392                       # Cycle average of tags in use
system.cpu.icache.tags.total_refs           316972557                       # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs             12306                       # Sample count of references to valid blocks.
system.cpu.icache.tags.avg_refs          25757.561921                       # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
system.cpu.icache.tags.occ_blocks::cpu.inst  1685.376392                       # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst     0.822938                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total     0.822938                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024         1741                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::0           62                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::1          104                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::2            2                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::3            2                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4         1571                       # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024     0.850098                       # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses         633982034                       # Number of tag accesses
system.cpu.icache.tags.data_accesses        633982034                       # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst    316972557                       # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total       316972557                       # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst     316972557                       # number of demand (read+write) hits
system.cpu.icache.demand_hits::total        316972557                       # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst    316972557                       # number of overall hits
system.cpu.icache.overall_hits::total       316972557                       # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst        12307                       # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total         12307                       # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst        12307                       # number of demand (read+write) misses
system.cpu.icache.demand_misses::total          12307                       # number of demand (read+write) misses
system.cpu.icache.overall_misses::cpu.inst        12307                       # number of overall misses
system.cpu.icache.overall_misses::total         12307                       # number of overall misses
system.cpu.icache.ReadReq_miss_latency::cpu.inst    350414000                       # number of ReadReq miss cycles
system.cpu.icache.ReadReq_miss_latency::total    350414000                       # number of ReadReq miss cycles
system.cpu.icache.demand_miss_latency::cpu.inst    350414000                       # number of demand (read+write) miss cycles
system.cpu.icache.demand_miss_latency::total    350414000                       # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst    350414000                       # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total    350414000                       # number of overall miss cycles
system.cpu.icache.ReadReq_accesses::cpu.inst    316984864                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total    316984864                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst    316984864                       # number of demand (read+write) accesses
system.cpu.icache.demand_accesses::total    316984864                       # number of demand (read+write) accesses
system.cpu.icache.overall_accesses::cpu.inst    316984864                       # number of overall (read+write) accesses
system.cpu.icache.overall_accesses::total    316984864                       # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.000039                       # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total     0.000039                       # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst     0.000039                       # miss rate for demand accesses
system.cpu.icache.demand_miss_rate::total     0.000039                       # miss rate for demand accesses
system.cpu.icache.overall_miss_rate::cpu.inst     0.000039                       # miss rate for overall accesses
system.cpu.icache.overall_miss_rate::total     0.000039                       # miss rate for overall accesses
system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 28472.739092                       # average ReadReq miss latency
system.cpu.icache.ReadReq_avg_miss_latency::total 28472.739092                       # average ReadReq miss latency
system.cpu.icache.demand_avg_miss_latency::cpu.inst 28472.739092                       # average overall miss latency
system.cpu.icache.demand_avg_miss_latency::total 28472.739092                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::cpu.inst 28472.739092                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::total 28472.739092                       # average overall miss latency
system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.icache.fast_writes                       0                       # number of fast writes performed
system.cpu.icache.cache_copies                      0                       # number of cache copies performed
system.cpu.icache.ReadReq_mshr_misses::cpu.inst        12307                       # number of ReadReq MSHR misses
system.cpu.icache.ReadReq_mshr_misses::total        12307                       # number of ReadReq MSHR misses
system.cpu.icache.demand_mshr_misses::cpu.inst        12307                       # number of demand (read+write) MSHR misses
system.cpu.icache.demand_mshr_misses::total        12307                       # number of demand (read+write) MSHR misses
system.cpu.icache.overall_mshr_misses::cpu.inst        12307                       # number of overall MSHR misses
system.cpu.icache.overall_mshr_misses::total        12307                       # number of overall MSHR misses
system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst    338108000                       # number of ReadReq MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_latency::total    338108000                       # number of ReadReq MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::cpu.inst    338108000                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::total    338108000                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::cpu.inst    338108000                       # number of overall MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::total    338108000                       # number of overall MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.000039                       # mshr miss rate for ReadReq accesses
system.cpu.icache.ReadReq_mshr_miss_rate::total     0.000039                       # mshr miss rate for ReadReq accesses
system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.000039                       # mshr miss rate for demand accesses
system.cpu.icache.demand_mshr_miss_rate::total     0.000039                       # mshr miss rate for demand accesses
system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.000039                       # mshr miss rate for overall accesses
system.cpu.icache.overall_mshr_miss_rate::total     0.000039                       # mshr miss rate for overall accesses
system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 27472.820346                       # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 27472.820346                       # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 27472.820346                       # average overall mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::total 27472.820346                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 27472.820346                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 27472.820346                       # average overall mshr miss latency
system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
system.cpu.l2cache.tags.replacements           259423                       # number of replacements
system.cpu.l2cache.tags.tagsinuse        32592.990901                       # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs            1218275                       # Total number of references to valid blocks.
system.cpu.l2cache.tags.sampled_refs           292159                       # Sample count of references to valid blocks.
system.cpu.l2cache.tags.avg_refs             4.169904                       # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle                0                       # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks  2589.705025                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.inst    83.650991                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.data 29919.634886                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks     0.079032                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst     0.002553                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data     0.913075                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total     0.994659                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_task_id_blocks::1024        32736                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::0          119                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::1          213                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::2          272                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::3         2659                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4        29473                       # Occupied blocks per task id
system.cpu.l2cache.tags.occ_task_id_percent::1024     0.999023                       # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses         13001394                       # Number of tag accesses
system.cpu.l2cache.tags.data_accesses        13001394                       # Number of data accesses
system.cpu.l2cache.Writeback_hits::writebacks        88852                       # number of Writeback hits
system.cpu.l2cache.Writeback_hits::total        88852                       # number of Writeback hits
system.cpu.l2cache.ReadExReq_hits::cpu.data         2366                       # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total         2366                       # number of ReadExReq hits
system.cpu.l2cache.ReadCleanReq_hits::cpu.inst         9387                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadCleanReq_hits::total         9387                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadSharedReq_hits::cpu.data       488977                       # number of ReadSharedReq hits
system.cpu.l2cache.ReadSharedReq_hits::total       488977                       # number of ReadSharedReq hits
system.cpu.l2cache.demand_hits::cpu.inst         9387                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.data       491343                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::total          500730                       # number of demand (read+write) hits
system.cpu.l2cache.overall_hits::cpu.inst         9387                       # number of overall hits
system.cpu.l2cache.overall_hits::cpu.data       491343                       # number of overall hits
system.cpu.l2cache.overall_hits::total         500730                       # number of overall hits
system.cpu.l2cache.ReadExReq_misses::cpu.data        66645                       # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total        66645                       # number of ReadExReq misses
system.cpu.l2cache.ReadCleanReq_misses::cpu.inst         2920                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadCleanReq_misses::total         2920                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadSharedReq_misses::cpu.data       222638                       # number of ReadSharedReq misses
system.cpu.l2cache.ReadSharedReq_misses::total       222638                       # number of ReadSharedReq misses
system.cpu.l2cache.demand_misses::cpu.inst         2920                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.data       289283                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::total        292203                       # number of demand (read+write) misses
system.cpu.l2cache.overall_misses::cpu.inst         2920                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.data       289283                       # number of overall misses
system.cpu.l2cache.overall_misses::total       292203                       # number of overall misses
system.cpu.l2cache.ReadExReq_miss_latency::cpu.data   4865088000                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadExReq_miss_latency::total   4865088000                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst    221085500                       # number of ReadCleanReq miss cycles
system.cpu.l2cache.ReadCleanReq_miss_latency::total    221085500                       # number of ReadCleanReq miss cycles
system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data  17968357500                       # number of ReadSharedReq miss cycles
system.cpu.l2cache.ReadSharedReq_miss_latency::total  17968357500                       # number of ReadSharedReq miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.inst    221085500                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.data  22833445500                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::total  23054531000                       # number of demand (read+write) miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.inst    221085500                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.data  22833445500                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::total  23054531000                       # number of overall miss cycles
system.cpu.l2cache.Writeback_accesses::writebacks        88852                       # number of Writeback accesses(hits+misses)
system.cpu.l2cache.Writeback_accesses::total        88852                       # number of Writeback accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data        69011                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::total        69011                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst        12307                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::total        12307                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::cpu.data       711615                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::total       711615                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.demand_accesses::cpu.inst        12307                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.data       780626                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::total       792933                       # number of demand (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.inst        12307                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.data       780626                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::total       792933                       # number of overall (read+write) accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.965716                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total     0.965716                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.237263                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.237263                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.312863                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.312863                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_miss_rate::cpu.inst     0.237263                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.data     0.370578                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::total     0.368509                       # miss rate for demand accesses
system.cpu.l2cache.overall_miss_rate::cpu.inst     0.237263                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data     0.370578                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total     0.368509                       # miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 73000.045015                       # average ReadExReq miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::total 73000.045015                       # average ReadExReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 75714.212329                       # average ReadCleanReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 75714.212329                       # average ReadCleanReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 80706.606689                       # average ReadSharedReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 80706.606689                       # average ReadSharedReq miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 75714.212329                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 78931.169478                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::total 78899.022255                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 75714.212329                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 78931.169478                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::total 78899.022255                       # average overall miss latency
system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
system.cpu.l2cache.cache_copies                     0                       # number of cache copies performed
system.cpu.l2cache.writebacks::writebacks        66683                       # number of writebacks
system.cpu.l2cache.writebacks::total            66683                       # number of writebacks
system.cpu.l2cache.CleanEvict_mshr_misses::writebacks          452                       # number of CleanEvict MSHR misses
system.cpu.l2cache.CleanEvict_mshr_misses::total          452                       # number of CleanEvict MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data        66645                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::total        66645                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst         2920                       # number of ReadCleanReq MSHR misses
system.cpu.l2cache.ReadCleanReq_mshr_misses::total         2920                       # number of ReadCleanReq MSHR misses
system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data       222638                       # number of ReadSharedReq MSHR misses
system.cpu.l2cache.ReadSharedReq_mshr_misses::total       222638                       # number of ReadSharedReq MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.inst         2920                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.data       289283                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::total       292203                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.inst         2920                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.data       289283                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::total       292203                       # number of overall MSHR misses
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data   4198638000                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total   4198638000                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst    191895500                       # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total    191895500                       # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data  15741977500                       # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total  15741977500                       # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst    191895500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data  19940615500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total  20132511000                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst    191895500                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data  19940615500                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total  20132511000                       # number of overall MSHR miss cycles
system.cpu.l2cache.CleanEvict_mshr_miss_rate::writebacks          inf                       # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.CleanEvict_mshr_miss_rate::total          inf                       # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data     0.965716                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total     0.965716                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.237263                       # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.237263                       # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.312863                       # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.312863                       # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.237263                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.370578                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total     0.368509                       # mshr miss rate for demand accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.237263                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.370578                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total     0.368509                       # mshr miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 63000.045015                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 63000.045015                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 65717.636986                       # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 65717.636986                       # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 70706.606689                       # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 70706.606689                       # average ReadSharedReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 65717.636986                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 68931.169478                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 68899.056478                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 65717.636986                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 68931.169478                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 68899.056478                       # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
system.cpu.toL2Bus.trans_dist::ReadResp        723921                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::Writeback       155535                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict       890983                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq        69011                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp        69011                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadCleanReq        12307                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadSharedReq       711615                       # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        35178                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side      2337782                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total           2372960                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side       787584                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side     55646592                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total           56434176                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops                      259423                       # Total snoops (count)
system.cpu.toL2Bus.snoop_fanout::samples      1839451                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean        1.141033                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev       0.348056                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0                  0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1            1580028     85.90%     85.90% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2             259423     14.10%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value            1                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value            2                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total        1839451                       # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy      878866000                       # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization          0.2                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer0.occupancy      18459000                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy    1170939000                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization          0.2                       # Layer utilization (%)
system.membus.trans_dist::ReadResp             225557                       # Transaction distribution
system.membus.trans_dist::Writeback             66683                       # Transaction distribution
system.membus.trans_dist::CleanEvict           191114                       # Transaction distribution
system.membus.trans_dist::ReadExReq             66645                       # Transaction distribution
system.membus.trans_dist::ReadExResp            66645                       # Transaction distribution
system.membus.trans_dist::ReadSharedReq        225557                       # Transaction distribution
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port       842201                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total                 842201                       # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port     22968640                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total                22968640                       # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops                                0                       # Total snoops (count)
system.membus.snoop_fanout::samples            549999                       # Request fanout histogram
system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::0                  549999    100.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
system.membus.snoop_fanout::total              549999                       # Request fanout histogram
system.membus.reqLayer0.occupancy           918564500                       # Layer occupancy (ticks)
system.membus.reqLayer0.utilization               0.2                       # Layer utilization (%)
system.membus.respLayer1.occupancy         1556125250                       # Layer occupancy (ticks)
system.membus.respLayer1.utilization              0.3                       # Layer utilization (%)

---------- End Simulation Statistics   ----------