path: root/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.059447                       # Number of seconds simulated
sim_ticks                                 59447065000                       # Number of ticks simulated
final_tick                                59447065000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                 1000000000000                       # Frequency of simulated ticks
host_inst_rate                                 371878                       # Simulator instruction rate (inst/s)
host_op_rate                                   371878                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                              249972170                       # Simulator tick rate (ticks/s)
host_mem_usage                                 261720                       # Number of bytes of host memory used
host_seconds                                   237.81                       # Real time elapsed on the host
sim_insts                                    88438073                       # Number of instructions simulated
sim_ops                                      88438073                       # Number of ops (including micro ops) simulated
system.voltage_domain.voltage                       1                       # Voltage in Volts
system.clk_domain.clock                          1000                       # Clock period in ticks
system.physmem.bytes_read::cpu.inst            432832                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data          10149568                       # Number of bytes read from this memory
system.physmem.bytes_read::total             10582400                       # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst       432832                       # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total          432832                       # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks      7326016                       # Number of bytes written to this memory
system.physmem.bytes_written::total           7326016                       # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst               6763                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data             158587                       # Number of read requests responded to by this memory
system.physmem.num_reads::total                165350                       # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks          114469                       # Number of write requests responded to by this memory
system.physmem.num_writes::total               114469                       # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst              7280965                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data            170732870                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total               178013835                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst         7280965                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total            7280965                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks         123235958                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total              123235958                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks         123235958                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst             7280965                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data           170732870                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total              301249793                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs                        165350                       # Number of read requests accepted
system.physmem.writeReqs                       114469                       # Number of write requests accepted
system.physmem.readBursts                      165350                       # Number of DRAM read bursts, including those serviced by the write queue
system.physmem.writeBursts                     114469                       # Number of DRAM write bursts, including those merged in the write queue
system.physmem.bytesReadDRAM                 10581952                       # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ                       448                       # Total number of bytes read from write queue
system.physmem.bytesWritten                   7323968                       # Total number of bytes written to DRAM
system.physmem.bytesReadSys                  10582400                       # Total read bytes from the system interface side
system.physmem.bytesWrittenSys                7326016                       # Total written bytes from the system interface side
system.physmem.servicedByWrQ                        7                       # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts                       0                       # Number of DRAM write bursts merged with an existing one
system.physmem.neitherReadNorWriteReqs              0                       # Number of requests that are neither read nor write
system.physmem.perBankRdBursts::0               10315                       # Per bank write bursts
system.physmem.perBankRdBursts::1               10360                       # Per bank write bursts
system.physmem.perBankRdBursts::2               10206                       # Per bank write bursts
system.physmem.perBankRdBursts::3               10057                       # Per bank write bursts
system.physmem.perBankRdBursts::4               10348                       # Per bank write bursts
system.physmem.perBankRdBursts::5               10343                       # Per bank write bursts
system.physmem.perBankRdBursts::6                9775                       # Per bank write bursts
system.physmem.perBankRdBursts::7               10207                       # Per bank write bursts
system.physmem.perBankRdBursts::8               10536                       # Per bank write bursts
system.physmem.perBankRdBursts::9               10606                       # Per bank write bursts
system.physmem.perBankRdBursts::10              10500                       # Per bank write bursts
system.physmem.perBankRdBursts::11              10228                       # Per bank write bursts
system.physmem.perBankRdBursts::12              10273                       # Per bank write bursts
system.physmem.perBankRdBursts::13              10559                       # Per bank write bursts
system.physmem.perBankRdBursts::14              10465                       # Per bank write bursts
system.physmem.perBankRdBursts::15              10565                       # Per bank write bursts
system.physmem.perBankWrBursts::0                7163                       # Per bank write bursts
system.physmem.perBankWrBursts::1                7274                       # Per bank write bursts
system.physmem.perBankWrBursts::2                7296                       # Per bank write bursts
system.physmem.perBankWrBursts::3                7002                       # Per bank write bursts
system.physmem.perBankWrBursts::4                7127                       # Per bank write bursts
system.physmem.perBankWrBursts::5                7186                       # Per bank write bursts
system.physmem.perBankWrBursts::6                6833                       # Per bank write bursts
system.physmem.perBankWrBursts::7                7099                       # Per bank write bursts
system.physmem.perBankWrBursts::8                7226                       # Per bank write bursts
system.physmem.perBankWrBursts::9                6999                       # Per bank write bursts
system.physmem.perBankWrBursts::10               7117                       # Per bank write bursts
system.physmem.perBankWrBursts::11               7034                       # Per bank write bursts
system.physmem.perBankWrBursts::12               6992                       # Per bank write bursts
system.physmem.perBankWrBursts::13               7299                       # Per bank write bursts
system.physmem.perBankWrBursts::14               7307                       # Per bank write bursts
system.physmem.perBankWrBursts::15               7483                       # Per bank write bursts
system.physmem.numRdRetry                           0                       # Number of times read queue was full causing retry
system.physmem.numWrRetry                           0                       # Number of times write queue was full causing retry
system.physmem.totGap                     59447041000                       # Total gap between requests
system.physmem.readPktSize::0                       0                       # Read request sizes (log2)
system.physmem.readPktSize::1                       0                       # Read request sizes (log2)
system.physmem.readPktSize::2                       0                       # Read request sizes (log2)
system.physmem.readPktSize::3                       0                       # Read request sizes (log2)
system.physmem.readPktSize::4                       0                       # Read request sizes (log2)
system.physmem.readPktSize::5                       0                       # Read request sizes (log2)
system.physmem.readPktSize::6                  165350                       # Read request sizes (log2)
system.physmem.writePktSize::0                      0                       # Write request sizes (log2)
system.physmem.writePktSize::1                      0                       # Write request sizes (log2)
system.physmem.writePktSize::2                      0                       # Write request sizes (log2)
system.physmem.writePktSize::3                      0                       # Write request sizes (log2)
system.physmem.writePktSize::4                      0                       # Write request sizes (log2)
system.physmem.writePktSize::5                      0                       # Write request sizes (log2)
system.physmem.writePktSize::6                 114469                       # Write request sizes (log2)
system.physmem.rdQLenPdf::0                    163735                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1                      1580                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2                        28                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31                        0                       # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15                      750                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16                      772                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17                     6187                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18                     7002                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19                     7044                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20                     7073                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21                     7064                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22                     7070                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23                     7073                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24                     7076                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25                     7124                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26                     7113                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27                     7242                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28                     7218                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29                     7141                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30                     7356                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31                     7098                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::32                     7043                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::33                        8                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::34                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::35                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::36                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::37                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::38                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::39                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::40                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::41                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::43                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::44                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::45                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::46                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::47                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::48                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::49                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::50                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::51                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::52                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::53                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::54                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::55                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::56                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::57                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::58                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::59                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::60                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::61                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63                        0                       # What write queue length does an incoming req see
system.physmem.bytesPerActivate::samples        54692                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean      327.365172                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean     194.328231                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev     330.549756                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127          19615     35.86%     35.86% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255        11787     21.55%     57.42% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383         5586     10.21%     67.63% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511         3666      6.70%     74.33% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639         2860      5.23%     79.56% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767         2087      3.82%     83.38% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895         1603      2.93%     86.31% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023         1458      2.67%     88.97% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151         6030     11.03%    100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total          54692                       # Bytes accessed per row activation
system.physmem.rdPerTurnAround::samples          7042                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::mean        23.476853                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::stdev      336.379045                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::0-1023           7039     99.96%     99.96% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::1024-2047            2      0.03%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::27648-28671            1      0.01%    100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::total            7042                       # Reads before turning the bus around for writes
system.physmem.wrPerTurnAround::samples          7042                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::mean        16.250639                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::gmean       16.234557                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::stdev        0.758479                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::16               6275     89.11%     89.11% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::17                 11      0.16%     89.26% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::18                574      8.15%     97.42% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::19                150      2.13%     99.55% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::20                 18      0.26%     99.80% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::21                  9      0.13%     99.93% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::22                  2      0.03%     99.96% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::23                  1      0.01%     99.97% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::25                  1      0.01%     99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::27                  1      0.01%    100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::total            7042                       # Writes before turning the bus around for reads
system.physmem.totQLat                     1988923000                       # Total ticks spent queuing
system.physmem.totMemAccLat                5089104250                       # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.totBusLat                    826715000                       # Total ticks spent in databus transfers
system.physmem.avgQLat                       12029.07                       # Average queueing delay per DRAM burst
system.physmem.avgBusLat                      5000.00                       # Average bus latency per DRAM burst
system.physmem.avgMemAccLat                  30779.07                       # Average memory access latency per DRAM burst
system.physmem.avgRdBW                         178.01                       # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW                         123.20                       # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys                      178.01                       # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys                      123.24                       # Average system write bandwidth in MiByte/s
system.physmem.peakBW                        12800.00                       # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil                           2.35                       # Data bus utilization in percentage
system.physmem.busUtilRead                       1.39                       # Data bus utilization in percentage for reads
system.physmem.busUtilWrite                      0.96                       # Data bus utilization in percentage for writes
system.physmem.avgRdQLen                         1.00                       # Average read queue length when enqueuing
system.physmem.avgWrQLen                        23.77                       # Average write queue length when enqueuing
system.physmem.readRowHits                     143858                       # Number of row buffer hits during reads
system.physmem.writeRowHits                     81218                       # Number of row buffer hits during writes
system.physmem.readRowHitRate                   87.01                       # Row buffer hit rate for reads
system.physmem.writeRowHitRate                  70.95                       # Row buffer hit rate for writes
system.physmem.avgGap                       212448.19                       # Average gap between requests
system.physmem.pageHitRate                      80.44                       # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy                  199274040                       # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy                  108730875                       # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy                 636347400                       # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy                369068400                       # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy             3882347040                       # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy            12411408285                       # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy            24777095250                       # Energy for precharge background per rank (pJ)
system.physmem_0.totalEnergy              42384271290                       # Total energy per rank (pJ)
system.physmem_0.averagePower              713.053838                       # Core power per rank (mW)
system.physmem_0.memoryStateTime::IDLE    41070575000                       # Time in different power states
system.physmem_0.memoryStateTime::REF      1984840000                       # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_0.memoryStateTime::ACT     16385091250                       # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.physmem_1.actEnergy                  213940440                       # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy                  116733375                       # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy                 652860000                       # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy                372152880                       # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy             3882347040                       # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy            13085746785                       # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy            24185582250                       # Energy for precharge background per rank (pJ)
system.physmem_1.totalEnergy              42509362770                       # Total energy per rank (pJ)
system.physmem_1.averagePower              715.158080                       # Core power per rank (mW)
system.physmem_1.memoryStateTime::IDLE    40083292000                       # Time in different power states
system.physmem_1.memoryStateTime::REF      1984840000                       # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_1.memoryStateTime::ACT     17372590500                       # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.cpu.branchPred.lookups                14660042                       # Number of BP lookups
system.cpu.branchPred.condPredicted           9484785                       # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect            381684                       # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups              9866507                       # Number of BTB lookups
system.cpu.branchPred.BTBHits                 6346497                       # Number of BTB hits
system.cpu.branchPred.BTBCorrect                    0                       # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct             64.323646                       # BTB Hit Percentage
system.cpu.branchPred.usedRAS                 1708762                       # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect              84355                       # Number of incorrect RAS predictions.
system.cpu.branchPred.indirectLookups           37443                       # Number of indirect predictor lookups.
system.cpu.branchPred.indirectHits              31778                       # Number of indirect target hits.
system.cpu.branchPred.indirectMisses             5665                       # Number of indirect misses.
system.cpu.branchPredindirectMispredicted         7605                       # Number of mispredicted indirect branches.
system.cpu_clk_domain.clock                       500                       # Clock period in ticks
system.cpu.dtb.fetch_hits                           0                       # ITB hits
system.cpu.dtb.fetch_misses                         0                       # ITB misses
system.cpu.dtb.fetch_acv                            0                       # ITB acv
system.cpu.dtb.fetch_accesses                       0                       # ITB accesses
system.cpu.dtb.read_hits                     20565775                       # DTB read hits
system.cpu.dtb.read_misses                      97355                       # DTB read misses
system.cpu.dtb.read_acv                             8                       # DTB read access violations
system.cpu.dtb.read_accesses                 20663130                       # DTB read accesses
system.cpu.dtb.write_hits                    14665271                       # DTB write hits
system.cpu.dtb.write_misses                      9409                       # DTB write misses
system.cpu.dtb.write_acv                            0                       # DTB write access violations
system.cpu.dtb.write_accesses                14674680                       # DTB write accesses
system.cpu.dtb.data_hits                     35231046                       # DTB hits
system.cpu.dtb.data_misses                     106764                       # DTB misses
system.cpu.dtb.data_acv                             8                       # DTB access violations
system.cpu.dtb.data_accesses                 35337810                       # DTB accesses
system.cpu.itb.fetch_hits                    25585531                       # ITB hits
system.cpu.itb.fetch_misses                      5208                       # ITB misses
system.cpu.itb.fetch_acv                            0                       # ITB acv
system.cpu.itb.fetch_accesses                25590739                       # ITB accesses
system.cpu.itb.read_hits                            0                       # DTB read hits
system.cpu.itb.read_misses                          0                       # DTB read misses
system.cpu.itb.read_acv                             0                       # DTB read access violations
system.cpu.itb.read_accesses                        0                       # DTB read accesses
system.cpu.itb.write_hits                           0                       # DTB write hits
system.cpu.itb.write_misses                         0                       # DTB write misses
system.cpu.itb.write_acv                            0                       # DTB write access violations
system.cpu.itb.write_accesses                       0                       # DTB write accesses
system.cpu.itb.data_hits                            0                       # DTB hits
system.cpu.itb.data_misses                          0                       # DTB misses
system.cpu.itb.data_acv                             0                       # DTB access violations
system.cpu.itb.data_accesses                        0                       # DTB accesses
system.cpu.workload.num_syscalls                 4583                       # Number of system calls
system.cpu.numCycles                        118894130                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.committedInsts                    88438073                       # Number of instructions committed
system.cpu.committedOps                      88438073                       # Number of ops (including micro ops) committed
system.cpu.discardedOps                       1097381                       # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends                         0                       # Number of times Execute suspended instruction fetching
system.cpu.cpi                               1.344377                       # CPI: cycles per instruction
system.cpu.ipc                               0.743839                       # IPC: instructions per cycle
system.cpu.op_class_0::No_OpClass             8748916      9.89%      9.89% # Class of committed instruction
system.cpu.op_class_0::IntAlu                44394799     50.20%     60.09% # Class of committed instruction
system.cpu.op_class_0::IntMult                  41101      0.05%     60.14% # Class of committed instruction
system.cpu.op_class_0::IntDiv                       0      0.00%     60.14% # Class of committed instruction
system.cpu.op_class_0::FloatAdd                114304      0.13%     60.27% # Class of committed instruction
system.cpu.op_class_0::FloatCmp                    84      0.00%     60.27% # Class of committed instruction
system.cpu.op_class_0::FloatCvt                113640      0.13%     60.40% # Class of committed instruction
system.cpu.op_class_0::FloatMult                   50      0.00%     60.40% # Class of committed instruction
system.cpu.op_class_0::FloatDiv                 37764      0.04%     60.44% # Class of committed instruction
system.cpu.op_class_0::FloatSqrt                    0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdAdd                      0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdAddAcc                   0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdAlu                      0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdCmp                      0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdCvt                      0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdMisc                     0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdMult                     0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdMultAcc                  0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdShift                    0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdShiftAcc                 0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdSqrt                     0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatAdd                 0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatAlu                 0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatCmp                 0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatCvt                 0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatDiv                 0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMisc                0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMult                0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMultAcc             0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatSqrt                0      0.00%     60.44% # Class of committed instruction
system.cpu.op_class_0::MemRead               20366786     23.03%     83.47% # Class of committed instruction
system.cpu.op_class_0::MemWrite              14620629     16.53%    100.00% # Class of committed instruction
system.cpu.op_class_0::IprAccess                    0      0.00%    100.00% # Class of committed instruction
system.cpu.op_class_0::InstPrefetch                 0      0.00%    100.00% # Class of committed instruction
system.cpu.op_class_0::total                 88438073                       # Class of committed instruction
system.cpu.tickCycles                        91425505                       # Number of cycles that the object actually ticked
system.cpu.idleCycles                        27468625                       # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements            200766                       # number of replacements
system.cpu.dcache.tags.tagsinuse          4070.673886                       # Cycle average of tags in use
system.cpu.dcache.tags.total_refs            34612040                       # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs            204862                       # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs            168.952954                       # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle         687650500                       # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data  4070.673886                       # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data     0.993817                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total     0.993817                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0           49                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1          687                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2         3360                       # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses          70168000                       # Number of tag accesses
system.cpu.dcache.tags.data_accesses         70168000                       # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data     20278781                       # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total        20278781                       # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data     14333259                       # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total       14333259                       # number of WriteReq hits
system.cpu.dcache.demand_hits::cpu.data      34612040                       # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total         34612040                       # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data     34612040                       # number of overall hits
system.cpu.dcache.overall_hits::total        34612040                       # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data        89411                       # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total         89411                       # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data       280118                       # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total       280118                       # number of WriteReq misses
system.cpu.dcache.demand_misses::cpu.data       369529                       # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total         369529                       # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data       369529                       # number of overall misses
system.cpu.dcache.overall_misses::total        369529                       # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data   4770299000                       # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total   4770299000                       # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data  21700228000                       # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total  21700228000                       # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data  26470527000                       # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total  26470527000                       # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data  26470527000                       # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total  26470527000                       # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data     20368192                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total     20368192                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data     14613377                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total     14613377                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data     34981569                       # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total     34981569                       # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data     34981569                       # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total     34981569                       # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.004390                       # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total     0.004390                       # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.019169                       # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total     0.019169                       # miss rate for WriteReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data     0.010564                       # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total     0.010564                       # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data     0.010564                       # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total     0.010564                       # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 53352.484594                       # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 53352.484594                       # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 77468.166987                       # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 77468.166987                       # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 71633.151931                       # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 71633.151931                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 71633.151931                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 71633.151931                       # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.dcache.writebacks::writebacks       168424                       # number of writebacks
system.cpu.dcache.writebacks::total            168424                       # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data        28112                       # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total        28112                       # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data       136555                       # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total       136555                       # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data       164667                       # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total       164667                       # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data       164667                       # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total       164667                       # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data        61299                       # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total        61299                       # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data       143563                       # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total       143563                       # number of WriteReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data       204862                       # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total       204862                       # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data       204862                       # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total       204862                       # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data   2681247500                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total   2681247500                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data  10975422500                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total  10975422500                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::cpu.data  13656670000                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total  13656670000                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data  13656670000                       # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total  13656670000                       # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.003010                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.003010                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.009824                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.009824                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.005856                       # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total     0.005856                       # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.005856                       # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total     0.005856                       # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 43740.477006                       # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 43740.477006                       # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 76450.216978                       # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 76450.216978                       # average WriteReq mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 66662.777870                       # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 66662.777870                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 66662.777870                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::total 66662.777870                       # average overall mshr miss latency
system.cpu.icache.tags.replacements            152872                       # number of replacements
system.cpu.icache.tags.tagsinuse          1932.382407                       # Cycle average of tags in use
system.cpu.icache.tags.total_refs            25430610                       # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs            154920                       # Sample count of references to valid blocks.
system.cpu.icache.tags.avg_refs            164.153176                       # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle       42235793500                       # Cycle when the warmup percentage was hit.
system.cpu.icache.tags.occ_blocks::cpu.inst  1932.382407                       # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst     0.943546                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total     0.943546                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024         2048                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::0           49                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::1          161                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::2            1                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::3         1039                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4          798                       # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses          51325982                       # Number of tag accesses
system.cpu.icache.tags.data_accesses         51325982                       # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst     25430610                       # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total        25430610                       # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst      25430610                       # number of demand (read+write) hits
system.cpu.icache.demand_hits::total         25430610                       # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst     25430610                       # number of overall hits
system.cpu.icache.overall_hits::total        25430610                       # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst       154921                       # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total        154921                       # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst       154921                       # number of demand (read+write) misses
system.cpu.icache.demand_misses::total         154921                       # number of demand (read+write) misses
system.cpu.icache.overall_misses::cpu.inst       154921                       # number of overall misses
system.cpu.icache.overall_misses::total        154921                       # number of overall misses
system.cpu.icache.ReadReq_miss_latency::cpu.inst   2483739000                       # number of ReadReq miss cycles
system.cpu.icache.ReadReq_miss_latency::total   2483739000                       # number of ReadReq miss cycles
system.cpu.icache.demand_miss_latency::cpu.inst   2483739000                       # number of demand (read+write) miss cycles
system.cpu.icache.demand_miss_latency::total   2483739000                       # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst   2483739000                       # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total   2483739000                       # number of overall miss cycles
system.cpu.icache.ReadReq_accesses::cpu.inst     25585531                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total     25585531                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst     25585531                       # number of demand (read+write) accesses
system.cpu.icache.demand_accesses::total     25585531                       # number of demand (read+write) accesses
system.cpu.icache.overall_accesses::cpu.inst     25585531                       # number of overall (read+write) accesses
system.cpu.icache.overall_accesses::total     25585531                       # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.006055                       # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total     0.006055                       # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst     0.006055                       # miss rate for demand accesses
system.cpu.icache.demand_miss_rate::total     0.006055                       # miss rate for demand accesses
system.cpu.icache.overall_miss_rate::cpu.inst     0.006055                       # miss rate for overall accesses
system.cpu.icache.overall_miss_rate::total     0.006055                       # miss rate for overall accesses
system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 16032.293879                       # average ReadReq miss latency
system.cpu.icache.ReadReq_avg_miss_latency::total 16032.293879                       # average ReadReq miss latency
system.cpu.icache.demand_avg_miss_latency::cpu.inst 16032.293879                       # average overall miss latency
system.cpu.icache.demand_avg_miss_latency::total 16032.293879                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::cpu.inst 16032.293879                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::total 16032.293879                       # average overall miss latency
system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.icache.writebacks::writebacks       152872                       # number of writebacks
system.cpu.icache.writebacks::total            152872                       # number of writebacks
system.cpu.icache.ReadReq_mshr_misses::cpu.inst       154921                       # number of ReadReq MSHR misses
system.cpu.icache.ReadReq_mshr_misses::total       154921                       # number of ReadReq MSHR misses
system.cpu.icache.demand_mshr_misses::cpu.inst       154921                       # number of demand (read+write) MSHR misses
system.cpu.icache.demand_mshr_misses::total       154921                       # number of demand (read+write) MSHR misses
system.cpu.icache.overall_mshr_misses::cpu.inst       154921                       # number of overall MSHR misses
system.cpu.icache.overall_mshr_misses::total       154921                       # number of overall MSHR misses
system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst   2328819000                       # number of ReadReq MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_latency::total   2328819000                       # number of ReadReq MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::cpu.inst   2328819000                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::total   2328819000                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::cpu.inst   2328819000                       # number of overall MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::total   2328819000                       # number of overall MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.006055                       # mshr miss rate for ReadReq accesses
system.cpu.icache.ReadReq_mshr_miss_rate::total     0.006055                       # mshr miss rate for ReadReq accesses
system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.006055                       # mshr miss rate for demand accesses
system.cpu.icache.demand_mshr_miss_rate::total     0.006055                       # mshr miss rate for demand accesses
system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.006055                       # mshr miss rate for overall accesses
system.cpu.icache.overall_mshr_miss_rate::total     0.006055                       # mshr miss rate for overall accesses
system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 15032.300334                       # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 15032.300334                       # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 15032.300334                       # average overall mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::total 15032.300334                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 15032.300334                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 15032.300334                       # average overall mshr miss latency
system.cpu.l2cache.tags.replacements           133382                       # number of replacements
system.cpu.l2cache.tags.tagsinuse        30429.048447                       # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs             403995                       # Total number of references to valid blocks.
system.cpu.l2cache.tags.sampled_refs           165492                       # Sample count of references to valid blocks.
system.cpu.l2cache.tags.avg_refs             2.441175                       # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle                0                       # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 26350.763451                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.inst  2094.967777                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.data  1983.317219                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks     0.804161                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst     0.063933                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data     0.060526                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total     0.928621                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_task_id_blocks::1024        32110                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::0          165                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::1         1093                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::2        11874                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::3        18854                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4          124                       # Occupied blocks per task id
system.cpu.l2cache.tags.occ_task_id_percent::1024     0.979919                       # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses          6016424                       # Number of tag accesses
system.cpu.l2cache.tags.data_accesses         6016424                       # Number of data accesses
system.cpu.l2cache.WritebackDirty_hits::writebacks       168424                       # number of WritebackDirty hits
system.cpu.l2cache.WritebackDirty_hits::total       168424                       # number of WritebackDirty hits
system.cpu.l2cache.WritebackClean_hits::writebacks       152872                       # number of WritebackClean hits
system.cpu.l2cache.WritebackClean_hits::total       152872                       # number of WritebackClean hits
system.cpu.l2cache.ReadExReq_hits::cpu.data        12681                       # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total        12681                       # number of ReadExReq hits
system.cpu.l2cache.ReadCleanReq_hits::cpu.inst       148157                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadCleanReq_hits::total       148157                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadSharedReq_hits::cpu.data        33594                       # number of ReadSharedReq hits
system.cpu.l2cache.ReadSharedReq_hits::total        33594                       # number of ReadSharedReq hits
system.cpu.l2cache.demand_hits::cpu.inst       148157                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.data        46275                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::total          194432                       # number of demand (read+write) hits
system.cpu.l2cache.overall_hits::cpu.inst       148157                       # number of overall hits
system.cpu.l2cache.overall_hits::cpu.data        46275                       # number of overall hits
system.cpu.l2cache.overall_hits::total         194432                       # number of overall hits
system.cpu.l2cache.ReadExReq_misses::cpu.data       130883                       # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total       130883                       # number of ReadExReq misses
system.cpu.l2cache.ReadCleanReq_misses::cpu.inst         6764                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadCleanReq_misses::total         6764                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadSharedReq_misses::cpu.data        27704                       # number of ReadSharedReq misses
system.cpu.l2cache.ReadSharedReq_misses::total        27704                       # number of ReadSharedReq misses
system.cpu.l2cache.demand_misses::cpu.inst         6764                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.data       158587                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::total        165351                       # number of demand (read+write) misses
system.cpu.l2cache.overall_misses::cpu.inst         6764                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.data       158587                       # number of overall misses
system.cpu.l2cache.overall_misses::total       165351                       # number of overall misses
system.cpu.l2cache.ReadExReq_miss_latency::cpu.data  10626878000                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadExReq_miss_latency::total  10626878000                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst    540586000                       # number of ReadCleanReq miss cycles
system.cpu.l2cache.ReadCleanReq_miss_latency::total    540586000                       # number of ReadCleanReq miss cycles
system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data   2236085500                       # number of ReadSharedReq miss cycles
system.cpu.l2cache.ReadSharedReq_miss_latency::total   2236085500                       # number of ReadSharedReq miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.inst    540586000                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.data  12862963500                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::total  13403549500                       # number of demand (read+write) miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.inst    540586000                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.data  12862963500                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::total  13403549500                       # number of overall miss cycles
system.cpu.l2cache.WritebackDirty_accesses::writebacks       168424                       # number of WritebackDirty accesses(hits+misses)
system.cpu.l2cache.WritebackDirty_accesses::total       168424                       # number of WritebackDirty accesses(hits+misses)
system.cpu.l2cache.WritebackClean_accesses::writebacks       152872                       # number of WritebackClean accesses(hits+misses)
system.cpu.l2cache.WritebackClean_accesses::total       152872                       # number of WritebackClean accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data       143564                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::total       143564                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst       154921                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::total       154921                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::cpu.data        61298                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::total        61298                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.demand_accesses::cpu.inst       154921                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.data       204862                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::total       359783                       # number of demand (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.inst       154921                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.data       204862                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::total       359783                       # number of overall (read+write) accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.911670                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total     0.911670                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.043661                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.043661                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.451956                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.451956                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_miss_rate::cpu.inst     0.043661                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.data     0.774116                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::total     0.459585                       # miss rate for demand accesses
system.cpu.l2cache.overall_miss_rate::cpu.inst     0.043661                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data     0.774116                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total     0.459585                       # miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 81193.722638                       # average ReadExReq miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::total 81193.722638                       # average ReadExReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 79921.052632                       # average ReadCleanReq miss latency
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 79921.052632                       # average ReadCleanReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 80713.452931                       # average ReadSharedReq miss latency
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 80713.452931                       # average ReadSharedReq miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 79921.052632                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 81109.822999                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::total 81061.194066                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 79921.052632                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 81109.822999                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::total 81061.194066                       # average overall miss latency
system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.writebacks::writebacks       114469                       # number of writebacks
system.cpu.l2cache.writebacks::total           114469                       # number of writebacks
system.cpu.l2cache.CleanEvict_mshr_misses::writebacks          115                       # number of CleanEvict MSHR misses
system.cpu.l2cache.CleanEvict_mshr_misses::total          115                       # number of CleanEvict MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data       130883                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::total       130883                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst         6764                       # number of ReadCleanReq MSHR misses
system.cpu.l2cache.ReadCleanReq_mshr_misses::total         6764                       # number of ReadCleanReq MSHR misses
system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data        27704                       # number of ReadSharedReq MSHR misses
system.cpu.l2cache.ReadSharedReq_mshr_misses::total        27704                       # number of ReadSharedReq MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.inst         6764                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.data       158587                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::total       165351                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.inst         6764                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.data       158587                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::total       165351                       # number of overall MSHR misses
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data   9318048000                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total   9318048000                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst    472956000                       # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total    472956000                       # number of ReadCleanReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data   1959045500                       # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total   1959045500                       # number of ReadSharedReq MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst    472956000                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data  11277093500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total  11750049500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst    472956000                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data  11277093500                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total  11750049500                       # number of overall MSHR miss cycles
system.cpu.l2cache.CleanEvict_mshr_miss_rate::writebacks          inf                       # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.CleanEvict_mshr_miss_rate::total          inf                       # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data     0.911670                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total     0.911670                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.043661                       # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.043661                       # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.451956                       # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.451956                       # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.043661                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.774116                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total     0.459585                       # mshr miss rate for demand accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.043661                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.774116                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total     0.459585                       # mshr miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 71193.722638                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 71193.722638                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 69922.531047                       # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 69922.531047                       # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 70713.452931                       # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 70713.452931                       # average ReadSharedReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 69922.531047                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 71109.822999                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 71061.254543                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 69922.531047                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 71109.822999                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 71061.254543                       # average overall mshr miss latency
system.cpu.toL2Bus.snoop_filter.tot_requests       713421                       # Total number of requests made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_requests       353638                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.snoop_filter.tot_snoops         4037                       # Total number of snoops made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_snoops         4037                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.trans_dist::ReadResp        216218                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::WritebackDirty       282893                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::WritebackClean       152872                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict        51255                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq       143564                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp       143564                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadCleanReq       154921                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadSharedReq        61298                       # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side       462713                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side       610490                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total           1073203                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side     19698688                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side     23890304                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total           43588992                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops                      133382                       # Total snoops (count)
system.cpu.toL2Bus.snoop_fanout::samples       493165                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean        0.008186                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev       0.090105                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0             489128     99.18%     99.18% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1               4037      0.82%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value            0                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value            1                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total         493165                       # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy      678006500                       # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization          1.1                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer0.occupancy     232381497                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization          0.4                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy     307297491                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization          0.5                       # Layer utilization (%)
system.membus.trans_dist::ReadResp              34467                       # Transaction distribution
system.membus.trans_dist::WritebackDirty       114469                       # Transaction distribution
system.membus.trans_dist::CleanEvict            14990                       # Transaction distribution
system.membus.trans_dist::ReadExReq            130883                       # Transaction distribution
system.membus.trans_dist::ReadExResp           130883                       # Transaction distribution
system.membus.trans_dist::ReadSharedReq         34467                       # Transaction distribution
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port       460159                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total                 460159                       # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port     17908416                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total                17908416                       # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops                                0                       # Total snoops (count)
system.membus.snoop_fanout::samples            294809                       # Request fanout histogram
system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::0                  294809    100.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
system.membus.snoop_fanout::total              294809                       # Request fanout histogram
system.membus.reqLayer0.occupancy           822950500                       # Layer occupancy (ticks)
system.membus.reqLayer0.utilization               1.4                       # Layer utilization (%)
system.membus.respLayer1.occupancy          872961750                       # Layer occupancy (ticks)
system.membus.respLayer1.utilization              1.5                       # Layer utilization (%)

---------- End Simulation Statistics   ----------