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|
---------- Begin Simulation Statistics ----------
sim_seconds 0.985090 # Number of seconds simulated
sim_ticks 985089830500 # Number of ticks simulated
final_tick 985089830500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 87940 # Simulator instruction rate (inst/s)
host_op_rate 87940 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 47603973 # Simulator tick rate (ticks/s)
host_mem_usage 516412 # Number of bytes of host memory used
host_seconds 20693.44 # Real time elapsed on the host
sim_insts 1819780127 # Number of instructions simulated
sim_ops 1819780127 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 54976 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 125364992 # Number of bytes read from this memory
system.physmem.bytes_read::total 125419968 # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst 54976 # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total 54976 # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks 65155520 # Number of bytes written to this memory
system.physmem.bytes_written::total 65155520 # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst 859 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 1958828 # Number of read requests responded to by this memory
system.physmem.num_reads::total 1959687 # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks 1018055 # Number of write requests responded to by this memory
system.physmem.num_writes::total 1018055 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst 55808 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 127262497 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 127318306 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 55808 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 55808 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks 66141704 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total 66141704 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks 66141704 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 55808 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 127262497 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 193460010 # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs 1959687 # Total number of read requests seen
system.physmem.writeReqs 1018055 # Total number of write requests seen
system.physmem.cpureqs 2977742 # Reqs generatd by CPU via cache - shady
system.physmem.bytesRead 125419968 # Total number of bytes read from memory
system.physmem.bytesWritten 65155520 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 125419968 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 65155520 # bytesWritten derated as per pkt->getSize()
system.physmem.servicedByWrQ 582 # Number of read reqs serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 122431 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 123239 # Track reads on a per bank basis
system.physmem.perBankRdReqs::2 122861 # Track reads on a per bank basis
system.physmem.perBankRdReqs::3 121276 # Track reads on a per bank basis
system.physmem.perBankRdReqs::4 122602 # Track reads on a per bank basis
system.physmem.perBankRdReqs::5 122222 # Track reads on a per bank basis
system.physmem.perBankRdReqs::6 124477 # Track reads on a per bank basis
system.physmem.perBankRdReqs::7 123481 # Track reads on a per bank basis
system.physmem.perBankRdReqs::8 121547 # Track reads on a per bank basis
system.physmem.perBankRdReqs::9 122168 # Track reads on a per bank basis
system.physmem.perBankRdReqs::10 122610 # Track reads on a per bank basis
system.physmem.perBankRdReqs::11 120102 # Track reads on a per bank basis
system.physmem.perBankRdReqs::12 120483 # Track reads on a per bank basis
system.physmem.perBankRdReqs::13 121941 # Track reads on a per bank basis
system.physmem.perBankRdReqs::14 124488 # Track reads on a per bank basis
system.physmem.perBankRdReqs::15 123177 # Track reads on a per bank basis
system.physmem.perBankWrReqs::0 63120 # Track writes on a per bank basis
system.physmem.perBankWrReqs::1 63438 # Track writes on a per bank basis
system.physmem.perBankWrReqs::2 63830 # Track writes on a per bank basis
system.physmem.perBankWrReqs::3 63407 # Track writes on a per bank basis
system.physmem.perBankWrReqs::4 63139 # Track writes on a per bank basis
system.physmem.perBankWrReqs::5 62716 # Track writes on a per bank basis
system.physmem.perBankWrReqs::6 63395 # Track writes on a per bank basis
system.physmem.perBankWrReqs::7 63432 # Track writes on a per bank basis
system.physmem.perBankWrReqs::8 62525 # Track writes on a per bank basis
system.physmem.perBankWrReqs::9 63278 # Track writes on a per bank basis
system.physmem.perBankWrReqs::10 63960 # Track writes on a per bank basis
system.physmem.perBankWrReqs::11 63327 # Track writes on a per bank basis
system.physmem.perBankWrReqs::12 63976 # Track writes on a per bank basis
system.physmem.perBankWrReqs::13 64713 # Track writes on a per bank basis
system.physmem.perBankWrReqs::14 65307 # Track writes on a per bank basis
system.physmem.perBankWrReqs::15 64492 # Track writes on a per bank basis
system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry
system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry
system.physmem.totGap 985089778500 # Total gap between requests
system.physmem.readPktSize::0 0 # Categorize read packet sizes
system.physmem.readPktSize::1 0 # Categorize read packet sizes
system.physmem.readPktSize::2 0 # Categorize read packet sizes
system.physmem.readPktSize::3 0 # Categorize read packet sizes
system.physmem.readPktSize::4 0 # Categorize read packet sizes
system.physmem.readPktSize::5 0 # Categorize read packet sizes
system.physmem.readPktSize::6 1959687 # Categorize read packet sizes
system.physmem.readPktSize::7 0 # Categorize read packet sizes
system.physmem.readPktSize::8 0 # Categorize read packet sizes
system.physmem.writePktSize::0 0 # categorize write packet sizes
system.physmem.writePktSize::1 0 # categorize write packet sizes
system.physmem.writePktSize::2 0 # categorize write packet sizes
system.physmem.writePktSize::3 0 # categorize write packet sizes
system.physmem.writePktSize::4 0 # categorize write packet sizes
system.physmem.writePktSize::5 0 # categorize write packet sizes
system.physmem.writePktSize::6 1018055 # categorize write packet sizes
system.physmem.writePktSize::7 0 # categorize write packet sizes
system.physmem.writePktSize::8 0 # categorize write packet sizes
system.physmem.neitherpktsize::0 0 # categorize neither packet sizes
system.physmem.neitherpktsize::1 0 # categorize neither packet sizes
system.physmem.neitherpktsize::2 0 # categorize neither packet sizes
system.physmem.neitherpktsize::3 0 # categorize neither packet sizes
system.physmem.neitherpktsize::4 0 # categorize neither packet sizes
system.physmem.neitherpktsize::5 0 # categorize neither packet sizes
system.physmem.neitherpktsize::6 0 # categorize neither packet sizes
system.physmem.neitherpktsize::7 0 # categorize neither packet sizes
system.physmem.neitherpktsize::8 0 # categorize neither packet sizes
system.physmem.rdQLenPdf::0 1651728 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1 192414 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2 82029 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3 32933 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4 1 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::32 0 # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0 42510 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1 44115 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2 44249 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4 44264 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5 44264 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22 44263 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23 1754 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24 149 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25 15 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::32 0 # What write queue length does an incoming req see
system.physmem.totQLat 19640844571 # Total cycles spent in queuing delays
system.physmem.totMemAccLat 85229742571 # Sum of mem lat for all requests
system.physmem.totBusLat 7836420000 # Total cycles spent in databus access
system.physmem.totBankLat 57752478000 # Total cycles spent in bank access
system.physmem.avgQLat 10025.42 # Average queueing delay per request
system.physmem.avgBankLat 29479.01 # Average bank access latency per request
system.physmem.avgBusLat 4000.00 # Average bus latency per request
system.physmem.avgMemAccLat 43504.43 # Average memory access latency
system.physmem.avgRdBW 127.32 # Average achieved read bandwidth in MB/s
system.physmem.avgWrBW 66.14 # Average achieved write bandwidth in MB/s
system.physmem.avgConsumedRdBW 127.32 # Average consumed read bandwidth in MB/s
system.physmem.avgConsumedWrBW 66.14 # Average consumed write bandwidth in MB/s
system.physmem.peakBW 16000.00 # Theoretical peak bandwidth in MB/s
system.physmem.busUtil 1.21 # Data bus utilization in percentage
system.physmem.avgRdQLen 0.09 # Average read queue length over time
system.physmem.avgWrQLen 10.28 # Average write queue length over time
system.physmem.readRowHits 834572 # Number of row buffer hits during reads
system.physmem.writeRowHits 194113 # Number of row buffer hits during writes
system.physmem.readRowHitRate 42.60 # Row buffer hit rate for reads
system.physmem.writeRowHitRate 19.07 # Row buffer hit rate for writes
system.physmem.avgGap 330817.71 # Average gap between requests
system.cpu.branchPred.lookups 326556831 # Number of BP lookups
system.cpu.branchPred.condPredicted 252596788 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 138232865 # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups 218937552 # Number of BTB lookups
system.cpu.branchPred.BTBHits 135479530 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct 61.880444 # BTB Hit Percentage
system.cpu.branchPred.usedRAS 16767439 # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect 6 # Number of incorrect RAS predictions.
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
system.cpu.dtb.fetch_accesses 0 # ITB accesses
system.cpu.dtb.read_hits 444784566 # DTB read hits
system.cpu.dtb.read_misses 4897078 # DTB read misses
system.cpu.dtb.read_acv 0 # DTB read access violations
system.cpu.dtb.read_accesses 449681644 # DTB read accesses
system.cpu.dtb.write_hits 160833172 # DTB write hits
system.cpu.dtb.write_misses 1701304 # DTB write misses
system.cpu.dtb.write_acv 0 # DTB write access violations
system.cpu.dtb.write_accesses 162534476 # DTB write accesses
system.cpu.dtb.data_hits 605617738 # DTB hits
system.cpu.dtb.data_misses 6598382 # DTB misses
system.cpu.dtb.data_acv 0 # DTB access violations
system.cpu.dtb.data_accesses 612216120 # DTB accesses
system.cpu.itb.fetch_hits 231916745 # ITB hits
system.cpu.itb.fetch_misses 22 # ITB misses
system.cpu.itb.fetch_acv 0 # ITB acv
system.cpu.itb.fetch_accesses 231916767 # ITB accesses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_acv 0 # DTB read access violations
system.cpu.itb.read_accesses 0 # DTB read accesses
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.itb.write_acv 0 # DTB write access violations
system.cpu.itb.write_accesses 0 # DTB write accesses
system.cpu.itb.data_hits 0 # DTB hits
system.cpu.itb.data_misses 0 # DTB misses
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 29 # Number of system calls
system.cpu.numCycles 1970179662 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.branch_predictor.predictedTaken 172296521 # Number of Branches Predicted As Taken (True).
system.cpu.branch_predictor.predictedNotTaken 154260310 # Number of Branches Predicted As Not Taken (False).
system.cpu.regfile_manager.intRegFileReads 1667620352 # Number of Reads from Int. Register File
system.cpu.regfile_manager.intRegFileWrites 1376202617 # Number of Writes to Int. Register File
system.cpu.regfile_manager.intRegFileAccesses 3043822969 # Total Accesses (Read+Write) to the Int. Register File
system.cpu.regfile_manager.floatRegFileReads 232 # Number of Reads from FP Register File
system.cpu.regfile_manager.floatRegFileWrites 345 # Number of Writes to FP Register File
system.cpu.regfile_manager.floatRegFileAccesses 577 # Total Accesses (Read+Write) to the FP Register File
system.cpu.regfile_manager.regForwards 651716748 # Number of Registers Read Through Forwarding Logic
system.cpu.agen_unit.agens 617888959 # Number of Address Generations
system.cpu.execution_unit.predictedTakenIncorrect 120522099 # Number of Branches Incorrectly Predicted As Taken.
system.cpu.execution_unit.predictedNotTakenIncorrect 11112308 # Number of Branches Incorrectly Predicted As Not Taken).
system.cpu.execution_unit.mispredicted 131634407 # Number of Branches Incorrectly Predicted
system.cpu.execution_unit.predicted 83565858 # Number of Branches Incorrectly Predicted
system.cpu.execution_unit.mispredictPct 61.168329 # Percentage of Incorrect Branches Predicts
system.cpu.execution_unit.executions 1139351244 # Number of Instructions Executed.
system.cpu.mult_div_unit.multiplies 75 # Number of Multipy Operations Executed
system.cpu.mult_div_unit.divides 0 # Number of Divide Operations Executed
system.cpu.contextSwitches 1 # Number of context switches
system.cpu.threadCycles 1741570972 # Total Number of Cycles A Thread Was Active in CPU (Per-Thread)
system.cpu.smtCycles 0 # Total number of cycles that the CPU was in SMT-mode
system.cpu.timesIdled 7474606 # Number of times that the entire CPU went into an idle state and unscheduled itself
system.cpu.idleCycles 398498363 # Number of cycles cpu's stages were not processed
system.cpu.runCycles 1571681299 # Number of cycles cpu stages are processed.
system.cpu.activity 79.773501 # Percentage of cycles cpu is active
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system.cpu.comStores 160728502 # Number of Store instructions committed
system.cpu.comBranches 214632552 # Number of Branches instructions committed
system.cpu.comNops 83736345 # Number of Nop instructions committed
system.cpu.comNonSpec 29 # Number of Non-Speculative instructions committed
system.cpu.comInts 916086844 # Number of Integer instructions committed
system.cpu.comFloats 190 # Number of Floating Point instructions committed
system.cpu.committedInsts 1819780127 # Number of Instructions committed (Per-Thread)
system.cpu.committedOps 1819780127 # Number of Ops committed (Per-Thread)
system.cpu.smtCommittedInsts 0 # Number of SMT Instructions committed (Per-Thread)
system.cpu.committedInsts_total 1819780127 # Number of Instructions committed (Total)
system.cpu.cpi 1.082647 # CPI: Cycles Per Instruction (Per-Thread)
system.cpu.smt_cpi nan # CPI: Total SMT-CPI
system.cpu.cpi_total 1.082647 # CPI: Total CPI of All Threads
system.cpu.ipc 0.923662 # IPC: Instructions Per Cycle (Per-Thread)
system.cpu.smt_ipc nan # IPC: Total SMT-IPC
system.cpu.ipc_total 0.923662 # IPC: Total IPC of All Threads
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system.cpu.stage0.runCycles 1186612529 # Number of cycles 1+ instructions are processed.
system.cpu.stage0.utilization 60.228646 # Percentage of cycles stage was utilized (processing insts).
system.cpu.stage1.idleCycles 1036391021 # Number of cycles 0 instructions are processed.
system.cpu.stage1.runCycles 933788641 # Number of cycles 1+ instructions are processed.
system.cpu.stage1.utilization 47.396116 # Percentage of cycles stage was utilized (processing insts).
system.cpu.stage2.idleCycles 997796043 # Number of cycles 0 instructions are processed.
system.cpu.stage2.runCycles 972383619 # Number of cycles 1+ instructions are processed.
system.cpu.stage2.utilization 49.355073 # Percentage of cycles stage was utilized (processing insts).
system.cpu.stage3.idleCycles 1560555740 # Number of cycles 0 instructions are processed.
system.cpu.stage3.runCycles 409623922 # Number of cycles 1+ instructions are processed.
system.cpu.stage3.utilization 20.791196 # Percentage of cycles stage was utilized (processing insts).
system.cpu.stage4.idleCycles 948846788 # Number of cycles 0 instructions are processed.
system.cpu.stage4.runCycles 1021332874 # Number of cycles 1+ instructions are processed.
system.cpu.stage4.utilization 51.839581 # Percentage of cycles stage was utilized (processing insts).
system.cpu.icache.replacements 1 # number of replacements
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system.cpu.icache.occ_percent::total 0.325977 # Average percentage of cache occupancy
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system.cpu.icache.ReadReq_hits::total 231915637 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 231915637 # number of demand (read+write) hits
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system.cpu.icache.overall_hits::total 231915637 # number of overall hits
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system.cpu.icache.ReadReq_misses::total 1108 # number of ReadReq misses
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system.cpu.icache.demand_misses::total 1108 # number of demand (read+write) misses
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system.cpu.icache.overall_misses::total 1108 # number of overall misses
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system.cpu.icache.ReadReq_miss_latency::total 59929000 # number of ReadReq miss cycles
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system.cpu.icache.demand_miss_latency::total 59929000 # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst 59929000 # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total 59929000 # number of overall miss cycles
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system.cpu.icache.ReadReq_accesses::total 231916745 # number of ReadReq accesses(hits+misses)
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system.cpu.icache.demand_accesses::total 231916745 # number of demand (read+write) accesses
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system.cpu.icache.overall_accesses::total 231916745 # number of overall (read+write) accesses
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system.cpu.icache.ReadReq_miss_rate::total 0.000005 # miss rate for ReadReq accesses
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system.cpu.icache.overall_miss_rate::total 0.000005 # miss rate for overall accesses
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system.cpu.icache.ReadReq_avg_miss_latency::total 54087.545126 # average ReadReq miss latency
system.cpu.icache.demand_avg_miss_latency::cpu.inst 54087.545126 # average overall miss latency
system.cpu.icache.demand_avg_miss_latency::total 54087.545126 # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::cpu.inst 54087.545126 # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::total 54087.545126 # average overall miss latency
system.cpu.icache.blocked_cycles::no_mshrs 63 # number of cycles access was blocked
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system.cpu.icache.overall_mshr_hits::total 249 # number of overall MSHR hits
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system.cpu.icache.ReadReq_mshr_miss_latency::total 47313000 # number of ReadReq MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::cpu.inst 47313000 # number of demand (read+write) MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::total 47313000 # number of demand (read+write) MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::cpu.inst 47313000 # number of overall MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::total 47313000 # number of overall MSHR miss cycles
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system.cpu.icache.ReadReq_mshr_miss_rate::total 0.000004 # mshr miss rate for ReadReq accesses
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system.cpu.icache.demand_mshr_miss_rate::total 0.000004 # mshr miss rate for demand accesses
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system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 55079.161816 # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 55079.161816 # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 55079.161816 # average overall mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::total 55079.161816 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 55079.161816 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 55079.161816 # average overall mshr miss latency
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system.cpu.l2cache.Writeback_hits::total 3693296 # number of Writeback hits
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system.cpu.l2cache.Writeback_accesses::total 3693296 # number of Writeback accesses(hits+misses)
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system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 106152485596 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total 106188071017 # number of overall MSHR miss cycles
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system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.214985 # mshr miss rate for overall accesses
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system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 41426.566938 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 54191.835933 # average overall mshr miss latency
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system.cpu.dcache.ReadReq_misses::total 7326911 # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data 4458042 # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total 4458042 # number of WriteReq misses
system.cpu.dcache.demand_misses::cpu.data 11784953 # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total 11784953 # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data 11784953 # number of overall misses
system.cpu.dcache.overall_misses::total 11784953 # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data 160323624500 # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total 160323624500 # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data 195351556000 # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total 195351556000 # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data 355675180500 # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total 355675180500 # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data 355675180500 # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total 355675180500 # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data 444595663 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total 444595663 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data 160728502 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total 160728502 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data 605324165 # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total 605324165 # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data 605324165 # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total 605324165 # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.016480 # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total 0.016480 # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.027736 # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total 0.027736 # miss rate for WriteReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data 0.019469 # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total 0.019469 # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data 0.019469 # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total 0.019469 # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 21881.475631 # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 21881.475631 # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 43820.034894 # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 43820.034894 # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 30180.449638 # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 30180.449638 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 30180.449638 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 30180.449638 # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs 9247830 # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets 4818517 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 358256 # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets 65602 # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs 25.813469 # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets 73.450764 # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
system.cpu.dcache.writebacks::writebacks 3693296 # number of writebacks
system.cpu.dcache.writebacks::total 3693296 # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data 104633 # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total 104633 # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data 2568846 # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total 2568846 # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data 2673479 # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total 2673479 # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data 2673479 # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total 2673479 # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data 7222278 # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total 7222278 # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data 1889196 # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total 1889196 # number of WriteReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data 9111474 # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total 9111474 # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data 9111474 # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total 9111474 # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 144015924000 # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total 144015924000 # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 67975303000 # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total 67975303000 # number of WriteReq MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::cpu.data 211991227000 # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total 211991227000 # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data 211991227000 # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total 211991227000 # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.016245 # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.016245 # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.011754 # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.011754 # mshr miss rate for WriteReq accesses
system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.015052 # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total 0.015052 # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.015052 # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total 0.015052 # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 19940.512398 # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 19940.512398 # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 35981.075018 # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 35981.075018 # average WriteReq mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 23266.403109 # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 23266.403109 # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 23266.403109 # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::total 23266.403109 # average overall mshr miss latency
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
---------- End Simulation Statistics ----------
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