path: root/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  1.211096                       # Number of seconds simulated
sim_ticks                                1211096219500                       # Number of ticks simulated
final_tick                               1211096219500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                 1000000000000                       # Frequency of simulated ticks
host_inst_rate                                 325701                       # Simulator instruction rate (inst/s)
host_op_rate                                   325701                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                              215976885                       # Simulator tick rate (ticks/s)
host_mem_usage                                 296636                       # Number of bytes of host memory used
host_seconds                                  5607.53                       # Real time elapsed on the host
sim_insts                                  1826378509                       # Number of instructions simulated
sim_ops                                    1826378509                       # Number of ops (including micro ops) simulated
system.voltage_domain.voltage                       1                       # Voltage in Volts
system.clk_domain.clock                          1000                       # Clock period in ticks
system.physmem.bytes_read::cpu.inst             61312                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data         125445568                       # Number of bytes read from this memory
system.physmem.bytes_read::total            125506880                       # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst        61312                       # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total           61312                       # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks     65168832                       # Number of bytes written to this memory
system.physmem.bytes_written::total          65168832                       # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst                958                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data            1960087                       # Number of read requests responded to by this memory
system.physmem.num_reads::total               1961045                       # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks         1018263                       # Number of write requests responded to by this memory
system.physmem.num_writes::total              1018263                       # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst                50625                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data            103580183                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total               103630808                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst           50625                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total              50625                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks          53809789                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total               53809789                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks          53809789                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst               50625                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data           103580183                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total              157440597                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs                       1961045                       # Number of read requests accepted
system.physmem.writeReqs                      1018263                       # Number of write requests accepted
system.physmem.readBursts                     1961045                       # Number of DRAM read bursts, including those serviced by the write queue
system.physmem.writeBursts                    1018263                       # Number of DRAM write bursts, including those merged in the write queue
system.physmem.bytesReadDRAM                125425280                       # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ                     81600                       # Total number of bytes read from write queue
system.physmem.bytesWritten                  65167232                       # Total number of bytes written to DRAM
system.physmem.bytesReadSys                 125506880                       # Total read bytes from the system interface side
system.physmem.bytesWrittenSys               65168832                       # Total written bytes from the system interface side
system.physmem.servicedByWrQ                     1275                       # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts                       0                       # Number of DRAM write bursts merged with an existing one
system.physmem.neitherReadNorWriteReqs              0                       # Number of requests that are neither read nor write
system.physmem.perBankRdBursts::0              118758                       # Per bank write bursts
system.physmem.perBankRdBursts::1              114090                       # Per bank write bursts
system.physmem.perBankRdBursts::2              116233                       # Per bank write bursts
system.physmem.perBankRdBursts::3              117775                       # Per bank write bursts
system.physmem.perBankRdBursts::4              117826                       # Per bank write bursts
system.physmem.perBankRdBursts::5              117520                       # Per bank write bursts
system.physmem.perBankRdBursts::6              119879                       # Per bank write bursts
system.physmem.perBankRdBursts::7              124540                       # Per bank write bursts
system.physmem.perBankRdBursts::8              126979                       # Per bank write bursts
system.physmem.perBankRdBursts::9              130098                       # Per bank write bursts
system.physmem.perBankRdBursts::10             128644                       # Per bank write bursts
system.physmem.perBankRdBursts::11             130342                       # Per bank write bursts
system.physmem.perBankRdBursts::12             126070                       # Per bank write bursts
system.physmem.perBankRdBursts::13             125249                       # Per bank write bursts
system.physmem.perBankRdBursts::14             122589                       # Per bank write bursts
system.physmem.perBankRdBursts::15             123178                       # Per bank write bursts
system.physmem.perBankWrBursts::0               61223                       # Per bank write bursts
system.physmem.perBankWrBursts::1               61482                       # Per bank write bursts
system.physmem.perBankWrBursts::2               60569                       # Per bank write bursts
system.physmem.perBankWrBursts::3               61241                       # Per bank write bursts
system.physmem.perBankWrBursts::4               61665                       # Per bank write bursts
system.physmem.perBankWrBursts::5               63100                       # Per bank write bursts
system.physmem.perBankWrBursts::6               64149                       # Per bank write bursts
system.physmem.perBankWrBursts::7               65619                       # Per bank write bursts
system.physmem.perBankWrBursts::8               65334                       # Per bank write bursts
system.physmem.perBankWrBursts::9               65779                       # Per bank write bursts
system.physmem.perBankWrBursts::10              65299                       # Per bank write bursts
system.physmem.perBankWrBursts::11              65645                       # Per bank write bursts
system.physmem.perBankWrBursts::12              64166                       # Per bank write bursts
system.physmem.perBankWrBursts::13              64211                       # Per bank write bursts
system.physmem.perBankWrBursts::14              64570                       # Per bank write bursts
system.physmem.perBankWrBursts::15              64186                       # Per bank write bursts
system.physmem.numRdRetry                           0                       # Number of times read queue was full causing retry
system.physmem.numWrRetry                           0                       # Number of times write queue was full causing retry
system.physmem.totGap                    1211096102000                       # Total gap between requests
system.physmem.readPktSize::0                       0                       # Read request sizes (log2)
system.physmem.readPktSize::1                       0                       # Read request sizes (log2)
system.physmem.readPktSize::2                       0                       # Read request sizes (log2)
system.physmem.readPktSize::3                       0                       # Read request sizes (log2)
system.physmem.readPktSize::4                       0                       # Read request sizes (log2)
system.physmem.readPktSize::5                       0                       # Read request sizes (log2)
system.physmem.readPktSize::6                 1961045                       # Read request sizes (log2)
system.physmem.writePktSize::0                      0                       # Write request sizes (log2)
system.physmem.writePktSize::1                      0                       # Write request sizes (log2)
system.physmem.writePktSize::2                      0                       # Write request sizes (log2)
system.physmem.writePktSize::3                      0                       # Write request sizes (log2)
system.physmem.writePktSize::4                      0                       # Write request sizes (log2)
system.physmem.writePktSize::5                      0                       # Write request sizes (log2)
system.physmem.writePktSize::6                1018263                       # Write request sizes (log2)
system.physmem.rdQLenPdf::0                   1837965                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1                    121788                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2                        17                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9                         0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30                        0                       # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31                        0                       # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9                         1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15                    30162                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16                    31578                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17                    55235                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18                    59406                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19                    59927                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20                    59993                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21                    59990                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22                    59955                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23                    59988                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24                    60013                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25                    59992                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26                    60054                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27                    60794                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28                    60336                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29                    60363                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30                    61179                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31                    59712                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::32                    59449                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::33                      103                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::34                       18                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::35                        1                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::36                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::37                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::38                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::39                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::40                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::41                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::43                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::44                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::45                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::46                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::47                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::48                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::49                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::50                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::51                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::52                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::53                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::54                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::55                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::56                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::57                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::58                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::59                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::60                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::61                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62                        0                       # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63                        0                       # What write queue length does an incoming req see
system.physmem.bytesPerActivate::samples      1839625                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean      103.602019                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean      81.031630                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev     129.543213                       # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127        1461173     79.43%     79.43% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255       261967     14.24%     93.67% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383        48998      2.66%     96.33% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511        20657      1.12%     97.45% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639        13124      0.71%     98.17% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767         7476      0.41%     98.57% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895         5272      0.29%     98.86% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023         4494      0.24%     99.11% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151        16464      0.89%    100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total        1839625                       # Bytes accessed per row activation
system.physmem.rdPerTurnAround::samples         59444                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::mean        32.966456                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::stdev      164.214090                       # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::0-1023          59406     99.94%     99.94% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::1024-2047           13      0.02%     99.96% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::2048-3071            8      0.01%     99.97% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::3072-4095            7      0.01%     99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::4096-5119            3      0.01%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::5120-6143            1      0.00%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::6144-7167            1      0.00%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::10240-11263            1      0.00%     99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::12288-13311            2      0.00%    100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::16384-17407            1      0.00%    100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::19456-20479            1      0.00%    100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::total           59444                       # Reads before turning the bus around for writes
system.physmem.wrPerTurnAround::samples         59444                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::mean        17.129365                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::gmean       17.093444                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::stdev        1.113658                       # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::16              27743     46.67%     46.67% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::17               1259      2.12%     48.79% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::18              26068     43.85%     92.64% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::19               3874      6.52%     99.16% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::20                419      0.70%     99.86% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::21                 52      0.09%     99.95% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::22                 24      0.04%     99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::23                  4      0.01%    100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::25                  1      0.00%    100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::total           59444                       # Writes before turning the bus around for reads
system.physmem.totQLat                    36839321750                       # Total ticks spent queuing
system.physmem.totMemAccLat               73585009250                       # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.totBusLat                   9798850000                       # Total ticks spent in databus transfers
system.physmem.avgQLat                       18797.78                       # Average queueing delay per DRAM burst
system.physmem.avgBusLat                      5000.00                       # Average bus latency per DRAM burst
system.physmem.avgMemAccLat                  37547.78                       # Average memory access latency per DRAM burst
system.physmem.avgRdBW                         103.56                       # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW                          53.81                       # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys                      103.63                       # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys                       53.81                       # Average system write bandwidth in MiByte/s
system.physmem.peakBW                        12800.00                       # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil                           1.23                       # Data bus utilization in percentage
system.physmem.busUtilRead                       0.81                       # Data bus utilization in percentage for reads
system.physmem.busUtilWrite                      0.42                       # Data bus utilization in percentage for writes
system.physmem.avgRdQLen                         1.02                       # Average read queue length when enqueuing
system.physmem.avgWrQLen                        24.96                       # Average write queue length when enqueuing
system.physmem.readRowHits                     725244                       # Number of row buffer hits during reads
system.physmem.writeRowHits                    413130                       # Number of row buffer hits during writes
system.physmem.readRowHitRate                   37.01                       # Row buffer hit rate for reads
system.physmem.writeRowHitRate                  40.57                       # Row buffer hit rate for writes
system.physmem.avgGap                       406502.48                       # Average gap between requests
system.physmem.pageHitRate                      38.23                       # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy                 6747186600                       # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy                 3681500625                       # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy                7383597000                       # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy               3233831040                       # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy            79102439520                       # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy           416789244855                       # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy           361048893750                       # Energy for precharge background per rank (pJ)
system.physmem_0.totalEnergy             877986693390                       # Total energy per rank (pJ)
system.physmem_0.averagePower              724.956282                       # Core power per rank (mW)
system.physmem_0.memoryStateTime::IDLE   597858043000                       # Time in different power states
system.physmem_0.memoryStateTime::REF     40440920000                       # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_0.memoryStateTime::ACT    572793401000                       # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.physmem_1.actEnergy                 7160348160                       # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy                 3906936000                       # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy                7901891400                       # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy               3364351200                       # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy            79102439520                       # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy           428401624860                       # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy           350862595500                       # Energy for precharge background per rank (pJ)
system.physmem_1.totalEnergy             880700186640                       # Total energy per rank (pJ)
system.physmem_1.averagePower              727.196822                       # Core power per rank (mW)
system.physmem_1.memoryStateTime::IDLE   580834507250                       # Time in different power states
system.physmem_1.memoryStateTime::REF     40440920000                       # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
system.physmem_1.memoryStateTime::ACT    589813744000                       # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.cpu.branchPred.lookups               246195404                       # Number of BP lookups
system.cpu.branchPred.condPredicted         186411563                       # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect          15682149                       # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups            167682775                       # Number of BTB lookups
system.cpu.branchPred.BTBHits               165241760                       # Number of BTB hits
system.cpu.branchPred.BTBCorrect                    0                       # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct             98.544266                       # BTB Hit Percentage
system.cpu.branchPred.usedRAS                18427120                       # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect             104306                       # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock                       500                       # Clock period in ticks
system.cpu.dtb.fetch_hits                           0                       # ITB hits
system.cpu.dtb.fetch_misses                         0                       # ITB misses
system.cpu.dtb.fetch_acv                            0                       # ITB acv
system.cpu.dtb.fetch_accesses                       0                       # ITB accesses
system.cpu.dtb.read_hits                    452923392                       # DTB read hits
system.cpu.dtb.read_misses                    4979932                       # DTB read misses
system.cpu.dtb.read_acv                             0                       # DTB read access violations
system.cpu.dtb.read_accesses                457903324                       # DTB read accesses
system.cpu.dtb.write_hits                   161377581                       # DTB write hits
system.cpu.dtb.write_misses                   1710142                       # DTB write misses
system.cpu.dtb.write_acv                            0                       # DTB write access violations
system.cpu.dtb.write_accesses               163087723                       # DTB write accesses
system.cpu.dtb.data_hits                    614300973                       # DTB hits
system.cpu.dtb.data_misses                    6690074                       # DTB misses
system.cpu.dtb.data_acv                             0                       # DTB access violations
system.cpu.dtb.data_accesses                620991047                       # DTB accesses
system.cpu.itb.fetch_hits                   598257344                       # ITB hits
system.cpu.itb.fetch_misses                        19                       # ITB misses
system.cpu.itb.fetch_acv                            0                       # ITB acv
system.cpu.itb.fetch_accesses               598257363                       # ITB accesses
system.cpu.itb.read_hits                            0                       # DTB read hits
system.cpu.itb.read_misses                          0                       # DTB read misses
system.cpu.itb.read_acv                             0                       # DTB read access violations
system.cpu.itb.read_accesses                        0                       # DTB read accesses
system.cpu.itb.write_hits                           0                       # DTB write hits
system.cpu.itb.write_misses                         0                       # DTB write misses
system.cpu.itb.write_acv                            0                       # DTB write access violations
system.cpu.itb.write_accesses                       0                       # DTB write accesses
system.cpu.itb.data_hits                            0                       # DTB hits
system.cpu.itb.data_misses                          0                       # DTB misses
system.cpu.itb.data_acv                             0                       # DTB access violations
system.cpu.itb.data_accesses                        0                       # DTB accesses
system.cpu.workload.num_syscalls                   29                       # Number of system calls
system.cpu.numCycles                       2422192439                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.committedInsts                  1826378509                       # Number of instructions committed
system.cpu.committedOps                    1826378509                       # Number of ops (including micro ops) committed
system.cpu.discardedOps                      52052944                       # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends                         0                       # Number of times Execute suspended instruction fetching
system.cpu.cpi                               1.326227                       # CPI: cycles per instruction
system.cpu.ipc                               0.754019                       # IPC: instructions per cycle
system.cpu.tickCycles                      2076133627                       # Number of cycles that the object actually ticked
system.cpu.idleCycles                       346058812                       # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements           9121955                       # number of replacements
system.cpu.dcache.tags.tagsinuse          4080.744039                       # Cycle average of tags in use
system.cpu.dcache.tags.total_refs           601604629                       # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs           9126051                       # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs             65.921682                       # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle       16824784000                       # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data  4080.744039                       # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data     0.996275                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total     0.996275                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0           64                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1         1544                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2         2417                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::3           71                       # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses        1231402079                       # Number of tag accesses
system.cpu.dcache.tags.data_accesses       1231402079                       # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data    443119981                       # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total       443119981                       # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data    158484648                       # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total      158484648                       # number of WriteReq hits
system.cpu.dcache.demand_hits::cpu.data     601604629                       # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total        601604629                       # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data    601604629                       # number of overall hits
system.cpu.dcache.overall_hits::total       601604629                       # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data      7289531                       # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total       7289531                       # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data      2243854                       # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total      2243854                       # number of WriteReq misses
system.cpu.dcache.demand_misses::cpu.data      9533385                       # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total        9533385                       # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data      9533385                       # number of overall misses
system.cpu.dcache.overall_misses::total       9533385                       # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data 186817706000                       # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total 186817706000                       # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data 108924057250                       # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total 108924057250                       # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data 295741763250                       # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total 295741763250                       # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data 295741763250                       # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total 295741763250                       # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data    450409512                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total    450409512                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data    160728502                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total    160728502                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data    611138014                       # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total    611138014                       # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data    611138014                       # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total    611138014                       # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.016184                       # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total     0.016184                       # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.013961                       # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total     0.013961                       # miss rate for WriteReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data     0.015599                       # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total     0.015599                       # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data     0.015599                       # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total     0.015599                       # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 25628.220252                       # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 25628.220252                       # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 48543.290807                       # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 48543.290807                       # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 31021.695153                       # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 31021.695153                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 31021.695153                       # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 31021.695153                       # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
system.cpu.dcache.cache_copies                      0                       # number of cache copies performed
system.cpu.dcache.writebacks::writebacks      3700563                       # number of writebacks
system.cpu.dcache.writebacks::total           3700563                       # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data        50798                       # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total        50798                       # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data       356536                       # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total       356536                       # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data       407334                       # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total       407334                       # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data       407334                       # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total       407334                       # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data      7238733                       # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total      7238733                       # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data      1887318                       # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total      1887318                       # number of WriteReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data      9126051                       # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total      9126051                       # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data      9126051                       # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total      9126051                       # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 174355280750                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total 174355280750                       # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data  82395435500                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::total  82395435500                       # number of WriteReq MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::cpu.data 256750716250                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.demand_mshr_miss_latency::total 256750716250                       # number of demand (read+write) MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::cpu.data 256750716250                       # number of overall MSHR miss cycles
system.cpu.dcache.overall_mshr_miss_latency::total 256750716250                       # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.016071                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.016071                       # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.011742                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.011742                       # mshr miss rate for WriteReq accesses
system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.014933                       # mshr miss rate for demand accesses
system.cpu.dcache.demand_mshr_miss_rate::total     0.014933                       # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.014933                       # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total     0.014933                       # mshr miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 24086.436224                       # average ReadReq mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 24086.436224                       # average ReadReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 43657.420477                       # average WriteReq mshr miss latency
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 43657.420477                       # average WriteReq mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 28133.824395                       # average overall mshr miss latency
system.cpu.dcache.demand_avg_mshr_miss_latency::total 28133.824395                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 28133.824395                       # average overall mshr miss latency
system.cpu.dcache.overall_avg_mshr_miss_latency::total 28133.824395                       # average overall mshr miss latency
system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
system.cpu.icache.tags.replacements                 3                       # number of replacements
system.cpu.icache.tags.tagsinuse           751.308351                       # Cycle average of tags in use
system.cpu.icache.tags.total_refs           598256386                       # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs               958                       # Sample count of references to valid blocks.
system.cpu.icache.tags.avg_refs          624484.745303                       # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
system.cpu.icache.tags.occ_blocks::cpu.inst   751.308351                       # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst     0.366850                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total     0.366850                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024          955                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::0           80                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::1            1                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4          874                       # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024     0.466309                       # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses        1196515646                       # Number of tag accesses
system.cpu.icache.tags.data_accesses       1196515646                       # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst    598256386                       # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total       598256386                       # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst     598256386                       # number of demand (read+write) hits
system.cpu.icache.demand_hits::total        598256386                       # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst    598256386                       # number of overall hits
system.cpu.icache.overall_hits::total       598256386                       # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst          958                       # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total           958                       # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst          958                       # number of demand (read+write) misses
system.cpu.icache.demand_misses::total            958                       # number of demand (read+write) misses
system.cpu.icache.overall_misses::cpu.inst          958                       # number of overall misses
system.cpu.icache.overall_misses::total           958                       # number of overall misses
system.cpu.icache.ReadReq_miss_latency::cpu.inst     76776500                       # number of ReadReq miss cycles
system.cpu.icache.ReadReq_miss_latency::total     76776500                       # number of ReadReq miss cycles
system.cpu.icache.demand_miss_latency::cpu.inst     76776500                       # number of demand (read+write) miss cycles
system.cpu.icache.demand_miss_latency::total     76776500                       # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst     76776500                       # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total     76776500                       # number of overall miss cycles
system.cpu.icache.ReadReq_accesses::cpu.inst    598257344                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total    598257344                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst    598257344                       # number of demand (read+write) accesses
system.cpu.icache.demand_accesses::total    598257344                       # number of demand (read+write) accesses
system.cpu.icache.overall_accesses::cpu.inst    598257344                       # number of overall (read+write) accesses
system.cpu.icache.overall_accesses::total    598257344                       # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.000002                       # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total     0.000002                       # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst     0.000002                       # miss rate for demand accesses
system.cpu.icache.demand_miss_rate::total     0.000002                       # miss rate for demand accesses
system.cpu.icache.overall_miss_rate::cpu.inst     0.000002                       # miss rate for overall accesses
system.cpu.icache.overall_miss_rate::total     0.000002                       # miss rate for overall accesses
system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 80142.484342                       # average ReadReq miss latency
system.cpu.icache.ReadReq_avg_miss_latency::total 80142.484342                       # average ReadReq miss latency
system.cpu.icache.demand_avg_miss_latency::cpu.inst 80142.484342                       # average overall miss latency
system.cpu.icache.demand_avg_miss_latency::total 80142.484342                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::cpu.inst 80142.484342                       # average overall miss latency
system.cpu.icache.overall_avg_miss_latency::total 80142.484342                       # average overall miss latency
system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.icache.fast_writes                       0                       # number of fast writes performed
system.cpu.icache.cache_copies                      0                       # number of cache copies performed
system.cpu.icache.ReadReq_mshr_misses::cpu.inst          958                       # number of ReadReq MSHR misses
system.cpu.icache.ReadReq_mshr_misses::total          958                       # number of ReadReq MSHR misses
system.cpu.icache.demand_mshr_misses::cpu.inst          958                       # number of demand (read+write) MSHR misses
system.cpu.icache.demand_mshr_misses::total          958                       # number of demand (read+write) MSHR misses
system.cpu.icache.overall_mshr_misses::cpu.inst          958                       # number of overall MSHR misses
system.cpu.icache.overall_mshr_misses::total          958                       # number of overall MSHR misses
system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst     74938500                       # number of ReadReq MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_latency::total     74938500                       # number of ReadReq MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::cpu.inst     74938500                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.demand_mshr_miss_latency::total     74938500                       # number of demand (read+write) MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::cpu.inst     74938500                       # number of overall MSHR miss cycles
system.cpu.icache.overall_mshr_miss_latency::total     74938500                       # number of overall MSHR miss cycles
system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.000002                       # mshr miss rate for ReadReq accesses
system.cpu.icache.ReadReq_mshr_miss_rate::total     0.000002                       # mshr miss rate for ReadReq accesses
system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.000002                       # mshr miss rate for demand accesses
system.cpu.icache.demand_mshr_miss_rate::total     0.000002                       # mshr miss rate for demand accesses
system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.000002                       # mshr miss rate for overall accesses
system.cpu.icache.overall_mshr_miss_rate::total     0.000002                       # mshr miss rate for overall accesses
system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 78223.903967                       # average ReadReq mshr miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 78223.903967                       # average ReadReq mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 78223.903967                       # average overall mshr miss latency
system.cpu.icache.demand_avg_mshr_miss_latency::total 78223.903967                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 78223.903967                       # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 78223.903967                       # average overall mshr miss latency
system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
system.cpu.l2cache.tags.replacements          1928309                       # number of replacements
system.cpu.l2cache.tags.tagsinuse        30768.375630                       # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs            8981612                       # Total number of references to valid blocks.
system.cpu.l2cache.tags.sampled_refs          1958114                       # Sample count of references to valid blocks.
system.cpu.l2cache.tags.avg_refs             4.586869                       # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle      89228502750                       # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 14924.007835                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.inst    42.865396                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.data 15801.502399                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks     0.455445                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst     0.001308                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data     0.482224                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total     0.938976                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_task_id_blocks::1024        29805                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::0          159                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::1           29                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::2         1212                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::3        12868                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4        15537                       # Occupied blocks per task id
system.cpu.l2cache.tags.occ_task_id_percent::1024     0.909576                       # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses        106466008                       # Number of tag accesses
system.cpu.l2cache.tags.data_accesses       106466008                       # Number of data accesses
system.cpu.l2cache.ReadReq_hits::cpu.data      6058085                       # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total        6058085                       # number of ReadReq hits
system.cpu.l2cache.Writeback_hits::writebacks      3700563                       # number of Writeback hits
system.cpu.l2cache.Writeback_hits::total      3700563                       # number of Writeback hits
system.cpu.l2cache.ReadExReq_hits::cpu.data      1107879                       # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total      1107879                       # number of ReadExReq hits
system.cpu.l2cache.demand_hits::cpu.data      7165964                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::total         7165964                       # number of demand (read+write) hits
system.cpu.l2cache.overall_hits::cpu.data      7165964                       # number of overall hits
system.cpu.l2cache.overall_hits::total        7165964                       # number of overall hits
system.cpu.l2cache.ReadReq_misses::cpu.inst          958                       # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::cpu.data      1180648                       # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::total      1181606                       # number of ReadReq misses
system.cpu.l2cache.ReadExReq_misses::cpu.data       779439                       # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total       779439                       # number of ReadExReq misses
system.cpu.l2cache.demand_misses::cpu.inst          958                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.data      1960087                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::total       1961045                       # number of demand (read+write) misses
system.cpu.l2cache.overall_misses::cpu.inst          958                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.data      1960087                       # number of overall misses
system.cpu.l2cache.overall_misses::total      1961045                       # number of overall misses
system.cpu.l2cache.ReadReq_miss_latency::cpu.inst     73980000                       # number of ReadReq miss cycles
system.cpu.l2cache.ReadReq_miss_latency::cpu.data 103488917250                       # number of ReadReq miss cycles
system.cpu.l2cache.ReadReq_miss_latency::total 103562897250                       # number of ReadReq miss cycles
system.cpu.l2cache.ReadExReq_miss_latency::cpu.data  68810693750                       # number of ReadExReq miss cycles
system.cpu.l2cache.ReadExReq_miss_latency::total  68810693750                       # number of ReadExReq miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.inst     73980000                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::cpu.data 172299611000                       # number of demand (read+write) miss cycles
system.cpu.l2cache.demand_miss_latency::total 172373591000                       # number of demand (read+write) miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.inst     73980000                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::cpu.data 172299611000                       # number of overall miss cycles
system.cpu.l2cache.overall_miss_latency::total 172373591000                       # number of overall miss cycles
system.cpu.l2cache.ReadReq_accesses::cpu.inst          958                       # number of ReadReq accesses(hits+misses)
system.cpu.l2cache.ReadReq_accesses::cpu.data      7238733                       # number of ReadReq accesses(hits+misses)
system.cpu.l2cache.ReadReq_accesses::total      7239691                       # number of ReadReq accesses(hits+misses)
system.cpu.l2cache.Writeback_accesses::writebacks      3700563                       # number of Writeback accesses(hits+misses)
system.cpu.l2cache.Writeback_accesses::total      3700563                       # number of Writeback accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data      1887318                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::total      1887318                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.demand_accesses::cpu.inst          958                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.data      9126051                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::total      9127009                       # number of demand (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.inst          958                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.data      9126051                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::total      9127009                       # number of overall (read+write) accesses
system.cpu.l2cache.ReadReq_miss_rate::cpu.inst            1                       # miss rate for ReadReq accesses
system.cpu.l2cache.ReadReq_miss_rate::cpu.data     0.163101                       # miss rate for ReadReq accesses
system.cpu.l2cache.ReadReq_miss_rate::total     0.163212                       # miss rate for ReadReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.412988                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total     0.412988                       # miss rate for ReadExReq accesses
system.cpu.l2cache.demand_miss_rate::cpu.inst            1                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.data     0.214779                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::total     0.214862                       # miss rate for demand accesses
system.cpu.l2cache.overall_miss_rate::cpu.inst            1                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data     0.214779                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total     0.214862                       # miss rate for overall accesses
system.cpu.l2cache.ReadReq_avg_miss_latency::cpu.inst 77223.382046                       # average ReadReq miss latency
system.cpu.l2cache.ReadReq_avg_miss_latency::cpu.data 87654.336644                       # average ReadReq miss latency
system.cpu.l2cache.ReadReq_avg_miss_latency::total 87645.879633                       # average ReadReq miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 88282.333512                       # average ReadExReq miss latency
system.cpu.l2cache.ReadExReq_avg_miss_latency::total 88282.333512                       # average ReadExReq miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 77223.382046                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 87904.062932                       # average overall miss latency
system.cpu.l2cache.demand_avg_miss_latency::total 87898.845259                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 77223.382046                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 87904.062932                       # average overall miss latency
system.cpu.l2cache.overall_avg_miss_latency::total 87898.845259                       # average overall miss latency
system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
system.cpu.l2cache.cache_copies                     0                       # number of cache copies performed
system.cpu.l2cache.writebacks::writebacks      1018263                       # number of writebacks
system.cpu.l2cache.writebacks::total          1018263                       # number of writebacks
system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst          958                       # number of ReadReq MSHR misses
system.cpu.l2cache.ReadReq_mshr_misses::cpu.data      1180648                       # number of ReadReq MSHR misses
system.cpu.l2cache.ReadReq_mshr_misses::total      1181606                       # number of ReadReq MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data       779439                       # number of ReadExReq MSHR misses
system.cpu.l2cache.ReadExReq_mshr_misses::total       779439                       # number of ReadExReq MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.inst          958                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::cpu.data      1960087                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.demand_mshr_misses::total      1961045                       # number of demand (read+write) MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.inst          958                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.data      1960087                       # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::total      1961045                       # number of overall MSHR misses
system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.inst     61981000                       # number of ReadReq MSHR miss cycles
system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.data  88565561250                       # number of ReadReq MSHR miss cycles
system.cpu.l2cache.ReadReq_mshr_miss_latency::total  88627542250                       # number of ReadReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data  58963288250                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total  58963288250                       # number of ReadExReq MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     61981000                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 147528849500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total 147590830500                       # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     61981000                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 147528849500                       # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total 147590830500                       # number of overall MSHR miss cycles
system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.inst            1                       # mshr miss rate for ReadReq accesses
system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.data     0.163101                       # mshr miss rate for ReadReq accesses
system.cpu.l2cache.ReadReq_mshr_miss_rate::total     0.163212                       # mshr miss rate for ReadReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data     0.412988                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total     0.412988                       # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst            1                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.214779                       # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total     0.214862                       # mshr miss rate for demand accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst            1                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.214779                       # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total     0.214862                       # mshr miss rate for overall accesses
system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.inst 64698.329854                       # average ReadReq mshr miss latency
system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.data 75014.366052                       # average ReadReq mshr miss latency
system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 75006.002212                       # average ReadReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 75648.367929                       # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 75648.367929                       # average ReadExReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 64698.329854                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 75266.480263                       # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 75261.317563                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64698.329854                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 75266.480263                       # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 75261.317563                       # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
system.cpu.toL2Bus.trans_dist::ReadReq        7239691                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadResp       7239691                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::Writeback      3700563                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq      1887318                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp      1887318                       # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side         1916                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side     21952665                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total          21954581                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        61312                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side    820903296                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total          820964608                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops                           0                       # Total snoops (count)
system.cpu.toL2Bus.snoop_fanout::samples     12827572                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean               1                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev              0                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0                  0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1           12827572    100.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value            1                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value            1                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total       12827572                       # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy    10114349000                       # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization          0.8                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer0.occupancy       1637500                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy   14015266250                       # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization          1.2                       # Layer utilization (%)
system.membus.trans_dist::ReadReq             1181606                       # Transaction distribution
system.membus.trans_dist::ReadResp            1181606                       # Transaction distribution
system.membus.trans_dist::Writeback           1018263                       # Transaction distribution
system.membus.trans_dist::ReadExReq            779439                       # Transaction distribution
system.membus.trans_dist::ReadExResp           779439                       # Transaction distribution
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port      4940353                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total                4940353                       # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port    190675712                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total               190675712                       # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops                                0                       # Total snoops (count)
system.membus.snoop_fanout::samples           2979308                       # Request fanout histogram
system.membus.snoop_fanout::mean                    0                       # Request fanout histogram
system.membus.snoop_fanout::stdev                   0                       # Request fanout histogram
system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::0                 2979308    100.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::1                       0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value               0                       # Request fanout histogram
system.membus.snoop_fanout::max_value               0                       # Request fanout histogram
system.membus.snoop_fanout::total             2979308                       # Request fanout histogram
system.membus.reqLayer0.occupancy          7754390500                       # Layer occupancy (ticks)
system.membus.reqLayer0.utilization               0.6                       # Layer utilization (%)
system.membus.respLayer1.occupancy        10727987500                       # Layer occupancy (ticks)
system.membus.respLayer1.utilization              0.9                       # Layer utilization (%)

---------- End Simulation Statistics   ----------