summaryrefslogtreecommitdiff
path: root/tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini
blob: ab79b8ccee532f353c8c520a2bf03118b406a89e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
[root]
type=Root
children=system
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000

[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1

[system.cpu]
type=TimingSimpleCPU
children=dcache dtb icache itb l2cache toL2Bus tracer workload
checker=Null
clock=500
cpu_id=0
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu.dtb
function_trace=false
function_trace_start=0
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu.tracer
workload=system.cpu.workload
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side

[system.cpu.dcache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
mshrs=10
num_cpus=1
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=10000
prefetch_on_access=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=262144
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]

[system.cpu.dtb]
type=X86TLB
size=64

[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
mshrs=10
num_cpus=1
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=10000
prefetch_on_access=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=131072
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]

[system.cpu.itb]
type=X86TLB
size=64

[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
hash_delay=1
latency=10000
max_miss_count=0
mshrs=10
num_cpus=1
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=100000
prefetch_on_access=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=2097152
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
mem_side=system.membus.port[1]

[system.cpu.toL2Bus]
type=Bus
block_size=64
bus_id=0
clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side

[system.cpu.tracer]
type=ExeTracer

[system.cpu.workload]
type=LiveProcess
cmd=hello
cwd=
egid=100
env=
errout=cerr
euid=100
executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
gid=100
input=cin
max_stack_size=67108864
output=cout
pid=100
ppid=99
simpoint=0
system=system
uid=100

[system.membus]
type=Bus
block_size=64
bus_id=0
clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.physmem.port[0] system.cpu.l2cache.mem_side

[system.physmem]
type=PhysicalMemory
file=
latency=30000
latency_var=0
null=false
range=0:134217727
zero=false
port=system.membus.port[0]