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Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic/simout
Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Nov 30 2016 14:33:35
gem5 started Nov 30 2016 16:18:29
gem5 executing on zizzer, pid 34062
command line: /z/powerjg/gem5-upstream/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64a/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
lr.w/sc.w: PASS
sc.w, no preceding lr.d: PASS
amoswap.w: PASS
amoswap.w, sign extend: PASS
amoswap.w, truncate: PASS
amoadd.w: PASS
amoadd.w, truncate/overflow: PASS
amoadd.w, sign extend: PASS
amoxor.w, truncate: PASS
amoxor.w, sign extend: PASS
amoand.w, truncate: PASS
amoand.w, sign extend: PASS
amoor.w, truncate: PASS
amoor.w, sign extend: PASS
amomin.w, truncate: PASS
amomin.w, sign extend: PASS
amomax.w, truncate: PASS
amomax.w, sign extend: PASS
amominu.w, truncate: PASS
amominu.w, sign extend: PASS
amomaxu.w, truncate: PASS
amomaxu.w, sign extend: PASS
lr.d/sc.d: PASS
sc.d, no preceding lr.d: PASS
amoswap.d: PASS
amoadd.d: PASS
amoadd.d, overflow: PASS
amoxor.d (1): PASS
amoxor.d (0): PASS
amoand.d: PASS
amoor.d: PASS
amomin.d: PASS
amomax.d: PASS
amominu.d: PASS
amomaxu.d: PASS
Exiting @ tick 57010500 because target called exit()
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