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|
---------- Begin Simulation Statistics ----------
sim_seconds 0.000014 # Number of seconds simulated
sim_ticks 14181 # Number of ticks simulated
final_tick 14181 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 238683 # Simulator tick rate (ticks/s)
host_mem_usage 530468 # Number of bytes of host memory used
host_seconds 0.06 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.mem_ctrls.bytes_read::dir_cntrl0 16576 # Number of bytes read from this memory
system.mem_ctrls.bytes_read::total 16576 # Number of bytes read from this memory
system.mem_ctrls.bytes_written::dir_cntrl0 576 # Number of bytes written to this memory
system.mem_ctrls.bytes_written::total 576 # Number of bytes written to this memory
system.mem_ctrls.num_reads::dir_cntrl0 259 # Number of read requests responded to by this memory
system.mem_ctrls.num_reads::total 259 # Number of read requests responded to by this memory
system.mem_ctrls.num_writes::dir_cntrl0 9 # Number of write requests responded to by this memory
system.mem_ctrls.num_writes::total 9 # Number of write requests responded to by this memory
system.mem_ctrls.bw_read::dir_cntrl0 1168887949 # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_read::total 1168887949 # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::dir_cntrl0 40617728 # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::total 40617728 # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_total::dir_cntrl0 1209505677 # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.bw_total::total 1209505677 # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.readReqs 259 # Number of read requests accepted
system.mem_ctrls.writeReqs 9 # Number of write requests accepted
system.mem_ctrls.readBursts 259 # Number of DRAM read bursts, including those serviced by the write queue
system.mem_ctrls.writeBursts 9 # Number of DRAM write bursts, including those merged in the write queue
system.mem_ctrls.bytesReadDRAM 15936 # Total number of bytes read from DRAM
system.mem_ctrls.bytesReadWrQ 640 # Total number of bytes read from write queue
system.mem_ctrls.bytesWritten 0 # Total number of bytes written to DRAM
system.mem_ctrls.bytesReadSys 16576 # Total read bytes from the system interface side
system.mem_ctrls.bytesWrittenSys 576 # Total written bytes from the system interface side
system.mem_ctrls.servicedByWrQ 10 # Number of DRAM read bursts serviced by the write queue
system.mem_ctrls.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
system.mem_ctrls.perBankRdBursts::0 100 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::1 71 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::2 66 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::3 12 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::5 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::6 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::7 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::9 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::10 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::11 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::12 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::13 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::14 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::15 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts
system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
system.mem_ctrls.totGap 13941 # Total gap between requests
system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::6 259 # Read request sizes (log2)
system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::6 9 # Write request sizes (log2)
system.mem_ctrls.rdQLenPdf::0 214 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::1 27 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::2 7 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::3 1 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
system.mem_ctrls.bytesPerActivate::samples 15 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::mean 913.066667 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::gmean 883.543279 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::stdev 210.139908 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::512-639 3 20.00% 20.00% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::896-1023 1 6.67% 26.67% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::1024-1151 11 73.33% 100.00% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::total 15 # Bytes accessed per row activation
system.mem_ctrls.totQLat 973 # Total ticks spent queuing
system.mem_ctrls.totMemAccLat 5704 # Total ticks spent from burst creation until serviced by the DRAM
system.mem_ctrls.totBusLat 1245 # Total ticks spent in databus transfers
system.mem_ctrls.avgQLat 3.91 # Average queueing delay per DRAM burst
system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
system.mem_ctrls.avgMemAccLat 22.91 # Average memory access latency per DRAM burst
system.mem_ctrls.avgRdBW 1123.76 # Average DRAM read bandwidth in MiByte/s
system.mem_ctrls.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
system.mem_ctrls.avgRdBWSys 1168.89 # Average system read bandwidth in MiByte/s
system.mem_ctrls.avgWrBWSys 40.62 # Average system write bandwidth in MiByte/s
system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.mem_ctrls.busUtil 8.78 # Data bus utilization in percentage
system.mem_ctrls.busUtilRead 8.78 # Data bus utilization in percentage for reads
system.mem_ctrls.busUtilWrite 0.00 # Data bus utilization in percentage for writes
system.mem_ctrls.avgRdQLen 1.17 # Average read queue length when enqueuing
system.mem_ctrls.avgWrQLen 2.63 # Average write queue length when enqueuing
system.mem_ctrls.readRowHits 230 # Number of row buffer hits during reads
system.mem_ctrls.writeRowHits 0 # Number of row buffer hits during writes
system.mem_ctrls.readRowHitRate 92.37 # Row buffer hit rate for reads
system.mem_ctrls.writeRowHitRate 0.00 # Row buffer hit rate for writes
system.mem_ctrls.avgGap 52.02 # Average gap between requests
system.mem_ctrls.pageHitRate 89.15 # Row buffer hit rate, read and write combined
system.mem_ctrls_0.actEnergy 83160 # Energy for activate commands per rank (pJ)
system.mem_ctrls_0.preEnergy 46200 # Energy for precharge commands per rank (pJ)
system.mem_ctrls_0.readEnergy 1872000 # Energy for read commands per rank (pJ)
system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ)
system.mem_ctrls_0.refreshEnergy 508560 # Energy for refresh commands per rank (pJ)
system.mem_ctrls_0.actBackEnergy 5437116 # Energy for active background per rank (pJ)
system.mem_ctrls_0.preBackEnergy 58200 # Energy for precharge background per rank (pJ)
system.mem_ctrls_0.totalEnergy 8005236 # Total energy per rank (pJ)
system.mem_ctrls_0.averagePower 994.933632 # Core power per rank (mW)
system.mem_ctrls_0.memoryStateTime::IDLE 83 # Time in different power states
system.mem_ctrls_0.memoryStateTime::REF 260 # Time in different power states
system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
system.mem_ctrls_0.memoryStateTime::ACT 7717 # Time in different power states
system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
system.mem_ctrls_1.actEnergy 0 # Energy for activate commands per rank (pJ)
system.mem_ctrls_1.preEnergy 0 # Energy for precharge commands per rank (pJ)
system.mem_ctrls_1.readEnergy 0 # Energy for read commands per rank (pJ)
system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ)
system.mem_ctrls_1.refreshEnergy 508560 # Energy for refresh commands per rank (pJ)
system.mem_ctrls_1.actBackEnergy 168264 # Energy for active background per rank (pJ)
system.mem_ctrls_1.preBackEnergy 4671600 # Energy for precharge background per rank (pJ)
system.mem_ctrls_1.totalEnergy 5348424 # Total energy per rank (pJ)
system.mem_ctrls_1.averagePower 665.889442 # Core power per rank (mW)
system.mem_ctrls_1.memoryStateTime::IDLE 7786 # Time in different power states
system.mem_ctrls_1.memoryStateTime::REF 260 # Time in different power states
system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.mem_ctrls_1.memoryStateTime::ACT 0 # Time in different power states
system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
system.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.clk_domain.clock 1 # Clock period in ticks
system.ruby.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.outstanding_req_hist_seqr::bucket_size 2
system.ruby.outstanding_req_hist_seqr::max_bucket 19
system.ruby.outstanding_req_hist_seqr::samples 63
system.ruby.outstanding_req_hist_seqr::mean 12.920635
system.ruby.outstanding_req_hist_seqr::gmean 11.694862
system.ruby.outstanding_req_hist_seqr::stdev 4.228557
system.ruby.outstanding_req_hist_seqr | 1 1.59% 1.59% | 2 3.17% 4.76% | 2 3.17% 7.94% | 5 7.94% 15.87% | 4 6.35% 22.22% | 3 4.76% 26.98% | 5 7.94% 34.92% | 14 22.22% 57.14% | 27 42.86% 100.00% | 0 0.00% 100.00%
system.ruby.outstanding_req_hist_seqr::total 63
system.ruby.outstanding_req_hist_coalsr::bucket_size 2
system.ruby.outstanding_req_hist_coalsr::max_bucket 19
system.ruby.outstanding_req_hist_coalsr::samples 885
system.ruby.outstanding_req_hist_coalsr::mean 2.610169
system.ruby.outstanding_req_hist_coalsr::gmean 2.223354
system.ruby.outstanding_req_hist_coalsr::stdev 1.538535
system.ruby.outstanding_req_hist_coalsr | 219 24.75% 24.75% | 478 54.01% 78.76% | 135 15.25% 94.01% | 43 4.86% 98.87% | 9 1.02% 99.89% | 1 0.11% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.outstanding_req_hist_coalsr::total 885
system.ruby.latency_hist_seqr::bucket_size 1024
system.ruby.latency_hist_seqr::max_bucket 10239
system.ruby.latency_hist_seqr::samples 48
system.ruby.latency_hist_seqr::mean 3351.354167
system.ruby.latency_hist_seqr::gmean 1865.352879
system.ruby.latency_hist_seqr::stdev 1934.275107
system.ruby.latency_hist_seqr | 11 22.92% 22.92% | 3 6.25% 29.17% | 3 6.25% 35.42% | 7 14.58% 50.00% | 18 37.50% 87.50% | 6 12.50% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.latency_hist_seqr::total 48
system.ruby.latency_hist_coalsr::bucket_size 128
system.ruby.latency_hist_coalsr::max_bucket 1279
system.ruby.latency_hist_coalsr::samples 872
system.ruby.latency_hist_coalsr::mean 222.089450
system.ruby.latency_hist_coalsr::gmean 114.436171
system.ruby.latency_hist_coalsr::stdev 241.512900
system.ruby.latency_hist_coalsr | 580 66.51% 66.51% | 30 3.44% 69.95% | 110 12.61% 82.57% | 39 4.47% 87.04% | 33 3.78% 90.83% | 20 2.29% 93.12% | 33 3.78% 96.90% | 23 2.64% 99.54% | 4 0.46% 100.00% | 0 0.00% 100.00%
system.ruby.latency_hist_coalsr::total 872
system.ruby.hit_latency_hist_seqr::bucket_size 1024
system.ruby.hit_latency_hist_seqr::max_bucket 10239
system.ruby.hit_latency_hist_seqr::samples 42
system.ruby.hit_latency_hist_seqr::mean 3684.428571
system.ruby.hit_latency_hist_seqr::gmean 2778.454716
system.ruby.hit_latency_hist_seqr::stdev 1783.107224
system.ruby.hit_latency_hist_seqr | 7 16.67% 16.67% | 3 7.14% 23.81% | 1 2.38% 26.19% | 7 16.67% 42.86% | 18 42.86% 85.71% | 6 14.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.hit_latency_hist_seqr::total 42
system.ruby.miss_latency_hist_seqr::bucket_size 512
system.ruby.miss_latency_hist_seqr::max_bucket 5119
system.ruby.miss_latency_hist_seqr::samples 6
system.ruby.miss_latency_hist_seqr::mean 1019.833333
system.ruby.miss_latency_hist_seqr::gmean 114.673945
system.ruby.miss_latency_hist_seqr::stdev 1281.644790
system.ruby.miss_latency_hist_seqr | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.miss_latency_hist_seqr::total 6
system.ruby.miss_latency_hist_coalsr::bucket_size 128
system.ruby.miss_latency_hist_coalsr::max_bucket 1279
system.ruby.miss_latency_hist_coalsr::samples 872
system.ruby.miss_latency_hist_coalsr::mean 222.089450
system.ruby.miss_latency_hist_coalsr::gmean 114.436171
system.ruby.miss_latency_hist_coalsr::stdev 241.512900
system.ruby.miss_latency_hist_coalsr | 580 66.51% 66.51% | 30 3.44% 69.95% | 110 12.61% 82.57% | 39 4.47% 87.04% | 33 3.78% 90.83% | 20 2.29% 93.12% | 33 3.78% 96.90% | 23 2.64% 99.54% | 4 0.46% 100.00% | 0 0.00% 100.00%
system.ruby.miss_latency_hist_coalsr::total 872
system.ruby.L1Cache.incomplete_times_seqr 6
system.cp_cntrl0.L1D0cache.demand_hits 0 # Number of cache demand hits
system.cp_cntrl0.L1D0cache.demand_misses 45 # Number of cache demand misses
system.cp_cntrl0.L1D0cache.demand_accesses 45 # Number of cache demand accesses
system.cp_cntrl0.L1D0cache.num_data_array_writes 43 # number of data array writes
system.cp_cntrl0.L1D0cache.num_tag_array_reads 154 # number of tag array reads
system.cp_cntrl0.L1D0cache.num_tag_array_writes 41 # number of tag array writes
system.cp_cntrl0.L1D1cache.demand_hits 0 # Number of cache demand hits
system.cp_cntrl0.L1D1cache.demand_misses 43 # Number of cache demand misses
system.cp_cntrl0.L1D1cache.demand_accesses 43 # Number of cache demand accesses
system.cp_cntrl0.L1D1cache.num_data_array_writes 41 # number of data array writes
system.cp_cntrl0.L1D1cache.num_tag_array_reads 73 # number of tag array reads
system.cp_cntrl0.L1D1cache.num_tag_array_writes 41 # number of tag array writes
system.cp_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits
system.cp_cntrl0.L1Icache.demand_misses 3 # Number of cache demand misses
system.cp_cntrl0.L1Icache.demand_accesses 3 # Number of cache demand accesses
system.cp_cntrl0.L1Icache.num_tag_array_reads 3 # number of tag array reads
system.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits
system.cp_cntrl0.L2cache.demand_misses 91 # Number of cache demand misses
system.cp_cntrl0.L2cache.demand_accesses 91 # Number of cache demand accesses
system.cp_cntrl0.L2cache.num_data_array_reads 81 # number of data array reads
system.cp_cntrl0.L2cache.num_data_array_writes 84 # number of data array writes
system.cp_cntrl0.L2cache.num_tag_array_reads 380 # number of tag array reads
system.cp_cntrl0.L2cache.num_tag_array_writes 371 # number of tag array writes
system.cp_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.cp_cntrl0.sequencer.store_waiting_on_load 2 # Number of times a store aliased with a pending load
system.cp_cntrl0.sequencer.store_waiting_on_store 3 # Number of times a store aliased with a pending store
system.cp_cntrl0.sequencer1.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.cp_cntrl0.sequencer1.store_waiting_on_load 1 # Number of times a store aliased with a pending load
system.cp_cntrl0.sequencer1.store_waiting_on_store 4 # Number of times a store aliased with a pending store
system.cp_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.cp_cntrl0.fully_busy_cycles 2 # cycles for which number of transistions == max transitions
system.cpu.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits
system.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses
system.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses
system.dir_cntrl0.L3CacheMemory.num_data_array_writes 374 # number of data array writes
system.dir_cntrl0.L3CacheMemory.num_tag_array_reads 378 # number of tag array reads
system.dir_cntrl0.L3CacheMemory.num_tag_array_writes 378 # number of tag array writes
system.dir_cntrl0.L3CacheMemory.num_tag_array_stalls 10169 # number of stalls caused by tag array
system.dir_cntrl0.L3CacheMemory.num_data_array_stalls 5502 # number of stalls caused by data array
system.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.ext_links00.int_node.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.ext_links00.int_node.percent_links_utilized 0.199210
system.ruby.network.ext_links00.int_node.msg_count.Control::0 308
system.ruby.network.ext_links00.int_node.msg_count.Request_Control::0 385
system.ruby.network.ext_links00.int_node.msg_count.Response_Data::2 393
system.ruby.network.ext_links00.int_node.msg_count.Response_Control::2 227
system.ruby.network.ext_links00.int_node.msg_count.Writeback_Data::2 66
system.ruby.network.ext_links00.int_node.msg_count.Writeback_Control::2 70
system.ruby.network.ext_links00.int_node.msg_count.Unblock_Control::4 303
system.ruby.network.ext_links00.int_node.msg_bytes.Control::0 2464
system.ruby.network.ext_links00.int_node.msg_bytes.Request_Control::0 3080
system.ruby.network.ext_links00.int_node.msg_bytes.Response_Data::2 28296
system.ruby.network.ext_links00.int_node.msg_bytes.Response_Control::2 1816
system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Data::2 4752
system.ruby.network.ext_links00.int_node.msg_bytes.Writeback_Control::2 560
system.ruby.network.ext_links00.int_node.msg_bytes.Unblock_Control::4 2424
system.ruby.network.ext_links01.int_node.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.ext_links01.int_node.percent_links_utilized 0.120981
system.ruby.network.ext_links01.int_node.msg_count.Control::0 227
system.ruby.network.ext_links01.int_node.msg_count.Request_Control::0 153
system.ruby.network.ext_links01.int_node.msg_count.Response_Data::2 95
system.ruby.network.ext_links01.int_node.msg_count.Response_Control::2 217
system.ruby.network.ext_links01.int_node.msg_count.Writeback_Data::2 66
system.ruby.network.ext_links01.int_node.msg_count.Writeback_Control::2 70
system.ruby.network.ext_links01.int_node.msg_count.Unblock_Control::4 80
system.ruby.network.ext_links01.int_node.msg_bytes.Control::0 1816
system.ruby.network.ext_links01.int_node.msg_bytes.Request_Control::0 1224
system.ruby.network.ext_links01.int_node.msg_bytes.Response_Data::2 6840
system.ruby.network.ext_links01.int_node.msg_bytes.Response_Control::2 1736
system.ruby.network.ext_links01.int_node.msg_bytes.Writeback_Data::2 4752
system.ruby.network.ext_links01.int_node.msg_bytes.Writeback_Control::2 560
system.ruby.network.ext_links01.int_node.msg_bytes.Unblock_Control::4 640
system.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl0.L1cache.num_data_array_reads 14 # number of data array reads
system.tcp_cntrl0.L1cache.num_data_array_writes 116 # number of data array writes
system.tcp_cntrl0.L1cache.num_tag_array_reads 314 # number of tag array reads
system.tcp_cntrl0.L1cache.num_tag_array_writes 305 # number of tag array writes
system.tcp_cntrl0.L1cache.num_tag_array_stalls 38 # number of stalls caused by tag array
system.tcp_cntrl0.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 5 # TCP to TCP load transfers
system.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl0.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl0.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP
system.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 79 # TCP to TCP store transfers
system.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl0.coalescer.gpu_st_misses 21 # stores that miss in the GPU
system.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.ext_links02.int_node.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.ext_links02.int_node.percent_links_utilized 0.173894
system.ruby.network.ext_links02.int_node.msg_count.Control::0 81
system.ruby.network.ext_links02.int_node.msg_count.Control::1 814
system.ruby.network.ext_links02.int_node.msg_count.Request_Control::0 232
system.ruby.network.ext_links02.int_node.msg_count.Request_Control::1 846
system.ruby.network.ext_links02.int_node.msg_count.Response_Data::2 298
system.ruby.network.ext_links02.int_node.msg_count.Response_Data::3 1644
system.ruby.network.ext_links02.int_node.msg_count.Response_Control::2 10
system.ruby.network.ext_links02.int_node.msg_count.Response_Control::3 2
system.ruby.network.ext_links02.int_node.msg_count.Unblock_Control::4 223
system.ruby.network.ext_links02.int_node.msg_count.Unblock_Control::5 831
system.ruby.network.ext_links02.int_node.msg_bytes.Control::0 648
system.ruby.network.ext_links02.int_node.msg_bytes.Control::1 6512
system.ruby.network.ext_links02.int_node.msg_bytes.Request_Control::0 1856
system.ruby.network.ext_links02.int_node.msg_bytes.Request_Control::1 6768
system.ruby.network.ext_links02.int_node.msg_bytes.Response_Data::2 21456
system.ruby.network.ext_links02.int_node.msg_bytes.Response_Data::3 118368
system.ruby.network.ext_links02.int_node.msg_bytes.Response_Control::2 80
system.ruby.network.ext_links02.int_node.msg_bytes.Response_Control::3 16
system.ruby.network.ext_links02.int_node.msg_bytes.Unblock_Control::4 1784
system.ruby.network.ext_links02.int_node.msg_bytes.Unblock_Control::5 6648
system.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl1.L1cache.num_data_array_reads 10 # number of data array reads
system.tcp_cntrl1.L1cache.num_data_array_writes 108 # number of data array writes
system.tcp_cntrl1.L1cache.num_tag_array_reads 300 # number of tag array reads
system.tcp_cntrl1.L1cache.num_tag_array_writes 289 # number of tag array writes
system.tcp_cntrl1.L1cache.num_tag_array_stalls 44 # number of stalls caused by tag array
system.tcp_cntrl1.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP
system.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers
system.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl1.coalescer.gpu_ld_misses 1 # loads that miss in the GPU
system.tcp_cntrl1.coalescer.gpu_tcp_st_hits 9 # stores that hit in the TCP
system.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 74 # TCP to TCP store transfers
system.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl1.coalescer.gpu_st_misses 20 # stores that miss in the GPU
system.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl1.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl1.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl2.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl2.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl2.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl2.L1cache.num_data_array_reads 19 # number of data array reads
system.tcp_cntrl2.L1cache.num_data_array_writes 108 # number of data array writes
system.tcp_cntrl2.L1cache.num_tag_array_reads 302 # number of tag array reads
system.tcp_cntrl2.L1cache.num_tag_array_writes 292 # number of tag array writes
system.tcp_cntrl2.L1cache.num_tag_array_stalls 36 # number of stalls caused by tag array
system.tcp_cntrl2.L1cache.num_data_array_stalls 3 # number of stalls caused by data array
system.tcp_cntrl2.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl2.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP
system.tcp_cntrl2.coalescer.gpu_tcp_ld_transfers 9 # TCP to TCP load transfers
system.tcp_cntrl2.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl2.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl2.coalescer.gpu_tcp_st_hits 7 # stores that hit in the TCP
system.tcp_cntrl2.coalescer.gpu_tcp_st_transfers 72 # TCP to TCP store transfers
system.tcp_cntrl2.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl2.coalescer.gpu_st_misses 18 # stores that miss in the GPU
system.tcp_cntrl2.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl2.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl2.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl2.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl2.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl2.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl2.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl2.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl2.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl2.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl3.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl3.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl3.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl3.L1cache.num_data_array_reads 7 # number of data array reads
system.tcp_cntrl3.L1cache.num_data_array_writes 104 # number of data array writes
system.tcp_cntrl3.L1cache.num_tag_array_reads 272 # number of tag array reads
system.tcp_cntrl3.L1cache.num_tag_array_writes 262 # number of tag array writes
system.tcp_cntrl3.L1cache.num_tag_array_stalls 16 # number of stalls caused by tag array
system.tcp_cntrl3.L1cache.num_data_array_stalls 3 # number of stalls caused by data array
system.tcp_cntrl3.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl3.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl3.coalescer.gpu_tcp_ld_transfers 13 # TCP to TCP load transfers
system.tcp_cntrl3.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl3.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl3.coalescer.gpu_tcp_st_hits 10 # stores that hit in the TCP
system.tcp_cntrl3.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers
system.tcp_cntrl3.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl3.coalescer.gpu_st_misses 18 # stores that miss in the GPU
system.tcp_cntrl3.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl3.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl3.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl3.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl3.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl3.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl3.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl3.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl3.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl3.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl4.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl4.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl4.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl4.L1cache.num_data_array_reads 14 # number of data array reads
system.tcp_cntrl4.L1cache.num_data_array_writes 115 # number of data array writes
system.tcp_cntrl4.L1cache.num_tag_array_reads 317 # number of tag array reads
system.tcp_cntrl4.L1cache.num_tag_array_writes 309 # number of tag array writes
system.tcp_cntrl4.L1cache.num_tag_array_stalls 29 # number of stalls caused by tag array
system.tcp_cntrl4.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl4.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl4.coalescer.gpu_tcp_ld_transfers 4 # TCP to TCP load transfers
system.tcp_cntrl4.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl4.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl4.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP
system.tcp_cntrl4.coalescer.gpu_tcp_st_transfers 76 # TCP to TCP store transfers
system.tcp_cntrl4.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl4.coalescer.gpu_st_misses 26 # stores that miss in the GPU
system.tcp_cntrl4.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl4.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl4.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl4.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl4.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl4.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl4.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl4.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl4.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl4.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl5.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl5.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl5.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl5.L1cache.num_data_array_reads 10 # number of data array reads
system.tcp_cntrl5.L1cache.num_data_array_writes 107 # number of data array writes
system.tcp_cntrl5.L1cache.num_tag_array_reads 295 # number of tag array reads
system.tcp_cntrl5.L1cache.num_tag_array_writes 287 # number of tag array writes
system.tcp_cntrl5.L1cache.num_tag_array_stalls 31 # number of stalls caused by tag array
system.tcp_cntrl5.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl5.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl5.coalescer.gpu_tcp_ld_transfers 6 # TCP to TCP load transfers
system.tcp_cntrl5.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl5.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl5.coalescer.gpu_tcp_st_hits 8 # stores that hit in the TCP
system.tcp_cntrl5.coalescer.gpu_tcp_st_transfers 69 # TCP to TCP store transfers
system.tcp_cntrl5.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl5.coalescer.gpu_st_misses 23 # stores that miss in the GPU
system.tcp_cntrl5.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl5.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl5.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl5.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl5.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl5.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl5.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl5.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl5.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl5.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl6.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl6.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl6.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl6.L1cache.num_data_array_reads 13 # number of data array reads
system.tcp_cntrl6.L1cache.num_data_array_writes 123 # number of data array writes
system.tcp_cntrl6.L1cache.num_tag_array_reads 342 # number of tag array reads
system.tcp_cntrl6.L1cache.num_tag_array_writes 335 # number of tag array writes
system.tcp_cntrl6.L1cache.num_tag_array_stalls 49 # number of stalls caused by tag array
system.tcp_cntrl6.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl6.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP
system.tcp_cntrl6.coalescer.gpu_tcp_ld_transfers 11 # TCP to TCP load transfers
system.tcp_cntrl6.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl6.coalescer.gpu_ld_misses 1 # loads that miss in the GPU
system.tcp_cntrl6.coalescer.gpu_tcp_st_hits 5 # stores that hit in the TCP
system.tcp_cntrl6.coalescer.gpu_tcp_st_transfers 86 # TCP to TCP store transfers
system.tcp_cntrl6.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl6.coalescer.gpu_st_misses 19 # stores that miss in the GPU
system.tcp_cntrl6.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl6.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl6.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl6.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl6.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl6.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl6.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl6.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl6.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl6.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl7.L1cache.demand_hits 0 # Number of cache demand hits
system.tcp_cntrl7.L1cache.demand_misses 0 # Number of cache demand misses
system.tcp_cntrl7.L1cache.demand_accesses 0 # Number of cache demand accesses
system.tcp_cntrl7.L1cache.num_data_array_reads 10 # number of data array reads
system.tcp_cntrl7.L1cache.num_data_array_writes 97 # number of data array writes
system.tcp_cntrl7.L1cache.num_tag_array_reads 263 # number of tag array reads
system.tcp_cntrl7.L1cache.num_tag_array_writes 256 # number of tag array writes
system.tcp_cntrl7.L1cache.num_tag_array_stalls 11 # number of stalls caused by tag array
system.tcp_cntrl7.coalescer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl7.coalescer.gpu_tcp_ld_hits 1 # loads that hit in the TCP
system.tcp_cntrl7.coalescer.gpu_tcp_ld_transfers 10 # TCP to TCP load transfers
system.tcp_cntrl7.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl7.coalescer.gpu_ld_misses 1 # loads that miss in the GPU
system.tcp_cntrl7.coalescer.gpu_tcp_st_hits 6 # stores that hit in the TCP
system.tcp_cntrl7.coalescer.gpu_tcp_st_transfers 63 # TCP to TCP store transfers
system.tcp_cntrl7.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl7.coalescer.gpu_st_misses 16 # stores that miss in the GPU
system.tcp_cntrl7.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
system.tcp_cntrl7.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
system.tcp_cntrl7.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
system.tcp_cntrl7.coalescer.cp_ld_misses 0 # loads that miss in the GPU
system.tcp_cntrl7.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
system.tcp_cntrl7.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
system.tcp_cntrl7.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
system.tcp_cntrl7.coalescer.cp_st_misses 0 # stores that miss in the GPU
system.tcp_cntrl7.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcp_cntrl7.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits
system.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses
system.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses
system.sqc_cntrl0.L1cache.num_data_array_reads 12 # number of data array reads
system.sqc_cntrl0.L1cache.num_data_array_writes 12 # number of data array writes
system.sqc_cntrl0.L1cache.num_tag_array_reads 22 # number of tag array reads
system.sqc_cntrl0.L1cache.num_tag_array_writes 22 # number of tag array writes
system.sqc_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.sqc_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.sqc_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits
system.sqc_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses
system.sqc_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses
system.sqc_cntrl1.L1cache.num_data_array_reads 15 # number of data array reads
system.sqc_cntrl1.L1cache.num_data_array_writes 15 # number of data array writes
system.sqc_cntrl1.L1cache.num_tag_array_reads 29 # number of tag array reads
system.sqc_cntrl1.L1cache.num_tag_array_writes 29 # number of tag array writes
system.sqc_cntrl1.sequencer.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.sqc_cntrl1.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits
system.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses
system.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses
system.tcc_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.tccdir_cntrl0.directory.demand_hits 0 # Number of cache demand hits
system.tccdir_cntrl0.directory.demand_misses 0 # Number of cache demand misses
system.tccdir_cntrl0.directory.demand_accesses 0 # Number of cache demand accesses
system.tccdir_cntrl0.directory.num_tag_array_reads 917 # number of tag array reads
system.tccdir_cntrl0.directory.num_tag_array_writes 902 # number of tag array writes
system.tccdir_cntrl0.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.msg_count.Control 1430
system.ruby.network.msg_count.Request_Control 1616
system.ruby.network.msg_count.Response_Data 2430
system.ruby.network.msg_count.Response_Control 456
system.ruby.network.msg_count.Writeback_Data 132
system.ruby.network.msg_count.Writeback_Control 140
system.ruby.network.msg_count.Unblock_Control 1437
system.ruby.network.msg_byte.Control 11440
system.ruby.network.msg_byte.Request_Control 12928
system.ruby.network.msg_byte.Response_Data 174960
system.ruby.network.msg_byte.Response_Control 3648
system.ruby.network.msg_byte.Writeback_Data 9504
system.ruby.network.msg_byte.Writeback_Control 1120
system.ruby.network.msg_byte.Unblock_Control 11496
system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 14181 # Cumulative time (in ticks) in various power states
system.ruby.network.ext_links00.int_node.throttle0.link_utilization 0.250555
system.ruby.network.ext_links00.int_node.throttle0.msg_count.Request_Control::0 385
system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Data::2 85
system.ruby.network.ext_links00.int_node.throttle0.msg_count.Response_Control::2 227
system.ruby.network.ext_links00.int_node.throttle0.msg_count.Writeback_Data::2 66
system.ruby.network.ext_links00.int_node.throttle0.msg_count.Unblock_Control::4 303
system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Request_Control::0 3080
system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Response_Data::2 6120
system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Response_Control::2 1816
system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Writeback_Data::2 4752
system.ruby.network.ext_links00.int_node.throttle0.msg_bytes.Unblock_Control::4 2424
system.ruby.network.ext_links00.int_node.throttle1.link_utilization 0.113047
system.ruby.network.ext_links00.int_node.throttle1.msg_count.Control::0 227
system.ruby.network.ext_links00.int_node.throttle1.msg_count.Response_Data::2 81
system.ruby.network.ext_links00.int_node.throttle1.msg_count.Writeback_Control::2 70
system.ruby.network.ext_links00.int_node.throttle1.msg_bytes.Control::0 1816
system.ruby.network.ext_links00.int_node.throttle1.msg_bytes.Response_Data::2 5832
system.ruby.network.ext_links00.int_node.throttle1.msg_bytes.Writeback_Control::2 560
system.ruby.network.ext_links00.int_node.throttle2.link_utilization 0.234028
system.ruby.network.ext_links00.int_node.throttle2.msg_count.Control::0 81
system.ruby.network.ext_links00.int_node.throttle2.msg_count.Response_Data::2 227
system.ruby.network.ext_links00.int_node.throttle2.msg_bytes.Control::0 648
system.ruby.network.ext_links00.int_node.throttle2.msg_bytes.Response_Data::2 16344
system.ruby.network.ext_links01.int_node.throttle0.link_utilization 0.113047
system.ruby.network.ext_links01.int_node.throttle0.msg_count.Control::0 227
system.ruby.network.ext_links01.int_node.throttle0.msg_count.Response_Data::2 81
system.ruby.network.ext_links01.int_node.throttle0.msg_count.Writeback_Control::2 70
system.ruby.network.ext_links01.int_node.throttle0.msg_bytes.Control::0 1816
system.ruby.network.ext_links01.int_node.throttle0.msg_bytes.Response_Data::2 5832
system.ruby.network.ext_links01.int_node.throttle0.msg_bytes.Writeback_Control::2 560
system.ruby.network.ext_links01.int_node.throttle1.link_utilization 0.128914
system.ruby.network.ext_links01.int_node.throttle1.msg_count.Request_Control::0 153
system.ruby.network.ext_links01.int_node.throttle1.msg_count.Response_Data::2 14
system.ruby.network.ext_links01.int_node.throttle1.msg_count.Response_Control::2 217
system.ruby.network.ext_links01.int_node.throttle1.msg_count.Writeback_Data::2 66
system.ruby.network.ext_links01.int_node.throttle1.msg_count.Unblock_Control::4 80
system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Request_Control::0 1224
system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Response_Data::2 1008
system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Response_Control::2 1736
system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Writeback_Data::2 4752
system.ruby.network.ext_links01.int_node.throttle1.msg_bytes.Unblock_Control::4 640
system.ruby.network.ext_links02.int_node.throttle0.link_utilization 0.115361
system.ruby.network.ext_links02.int_node.throttle0.msg_count.Control::1 102
system.ruby.network.ext_links02.int_node.throttle0.msg_count.Response_Data::3 105
system.ruby.network.ext_links02.int_node.throttle0.msg_bytes.Control::1 816
system.ruby.network.ext_links02.int_node.throttle0.msg_bytes.Response_Data::3 7560
system.ruby.network.ext_links02.int_node.throttle1.link_utilization 0.108750
system.ruby.network.ext_links02.int_node.throttle1.msg_count.Control::1 96
system.ruby.network.ext_links02.int_node.throttle1.msg_count.Response_Data::3 99
system.ruby.network.ext_links02.int_node.throttle1.msg_bytes.Control::1 768
system.ruby.network.ext_links02.int_node.throttle1.msg_bytes.Response_Data::3 7128
system.ruby.network.ext_links02.int_node.throttle2.link_utilization 0.109742
system.ruby.network.ext_links02.int_node.throttle2.msg_count.Control::1 105
system.ruby.network.ext_links02.int_node.throttle2.msg_count.Response_Data::3 99
system.ruby.network.ext_links02.int_node.throttle2.msg_bytes.Control::1 840
system.ruby.network.ext_links02.int_node.throttle2.msg_bytes.Response_Data::3 7128
system.ruby.network.ext_links02.int_node.throttle3.link_utilization 0.102690
system.ruby.network.ext_links02.int_node.throttle3.msg_count.Control::1 86
system.ruby.network.ext_links02.int_node.throttle3.msg_count.Response_Data::3 94
system.ruby.network.ext_links02.int_node.throttle3.msg_bytes.Control::1 688
system.ruby.network.ext_links02.int_node.throttle3.msg_bytes.Response_Data::3 6768
system.ruby.network.ext_links02.int_node.throttle4.link_utilization 0.116573
system.ruby.network.ext_links02.int_node.throttle4.msg_count.Control::1 104
system.ruby.network.ext_links02.int_node.throttle4.msg_count.Response_Data::3 106
system.ruby.network.ext_links02.int_node.throttle4.msg_bytes.Control::1 832
system.ruby.network.ext_links02.int_node.throttle4.msg_bytes.Response_Data::3 7632
system.ruby.network.ext_links02.int_node.throttle5.link_utilization 0.107759
system.ruby.network.ext_links02.int_node.throttle5.msg_count.Control::1 96
system.ruby.network.ext_links02.int_node.throttle5.msg_count.Response_Data::3 98
system.ruby.network.ext_links02.int_node.throttle5.msg_bytes.Control::1 768
system.ruby.network.ext_links02.int_node.throttle5.msg_bytes.Response_Data::3 7056
system.ruby.network.ext_links02.int_node.throttle6.link_utilization 0.128473
system.ruby.network.ext_links02.int_node.throttle6.msg_count.Control::1 113
system.ruby.network.ext_links02.int_node.throttle6.msg_count.Response_Data::3 117
system.ruby.network.ext_links02.int_node.throttle6.msg_bytes.Control::1 904
system.ruby.network.ext_links02.int_node.throttle6.msg_bytes.Response_Data::3 8424
system.ruby.network.ext_links02.int_node.throttle7.link_utilization 0.098944
system.ruby.network.ext_links02.int_node.throttle7.msg_count.Control::1 88
system.ruby.network.ext_links02.int_node.throttle7.msg_count.Response_Data::3 90
system.ruby.network.ext_links02.int_node.throttle7.msg_bytes.Control::1 704
system.ruby.network.ext_links02.int_node.throttle7.msg_bytes.Response_Data::3 6480
system.ruby.network.ext_links02.int_node.throttle8.link_utilization 0
system.ruby.network.ext_links02.int_node.throttle9.link_utilization 1.221264
system.ruby.network.ext_links02.int_node.throttle9.msg_count.Control::0 81
system.ruby.network.ext_links02.int_node.throttle9.msg_count.Request_Control::1 846
system.ruby.network.ext_links02.int_node.throttle9.msg_count.Response_Data::2 227
system.ruby.network.ext_links02.int_node.throttle9.msg_count.Response_Data::3 809
system.ruby.network.ext_links02.int_node.throttle9.msg_count.Response_Control::3 2
system.ruby.network.ext_links02.int_node.throttle9.msg_count.Unblock_Control::5 831
system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Control::0 648
system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Request_Control::1 6768
system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Response_Data::2 16344
system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Response_Data::3 58248
system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Response_Control::3 16
system.ruby.network.ext_links02.int_node.throttle9.msg_bytes.Unblock_Control::5 6648
system.ruby.network.ext_links02.int_node.throttle10.link_utilization 0.013002
system.ruby.network.ext_links02.int_node.throttle10.msg_count.Control::1 10
system.ruby.network.ext_links02.int_node.throttle10.msg_count.Response_Data::3 12
system.ruby.network.ext_links02.int_node.throttle10.msg_bytes.Control::1 80
system.ruby.network.ext_links02.int_node.throttle10.msg_bytes.Response_Data::3 864
system.ruby.network.ext_links02.int_node.throttle11.link_utilization 0.016417
system.ruby.network.ext_links02.int_node.throttle11.msg_count.Control::1 14
system.ruby.network.ext_links02.int_node.throttle11.msg_count.Response_Data::3 15
system.ruby.network.ext_links02.int_node.throttle11.msg_bytes.Control::1 112
system.ruby.network.ext_links02.int_node.throttle11.msg_bytes.Response_Data::3 1080
system.ruby.network.ext_links02.int_node.throttle12.link_utilization 0.121642
system.ruby.network.ext_links02.int_node.throttle12.msg_count.Request_Control::0 232
system.ruby.network.ext_links02.int_node.throttle12.msg_count.Response_Data::2 71
system.ruby.network.ext_links02.int_node.throttle12.msg_count.Response_Control::2 10
system.ruby.network.ext_links02.int_node.throttle12.msg_count.Unblock_Control::4 223
system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Request_Control::0 1856
system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Response_Data::2 5112
system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Response_Control::2 80
system.ruby.network.ext_links02.int_node.throttle12.msg_bytes.Unblock_Control::4 1784
system.ruby.CorePair_Controller.C0_Load_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.C1_Load_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.Ifetch0_L1miss 2 0.00% 0.00%
system.ruby.CorePair_Controller.Ifetch1_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.C0_Store_L1miss 45 0.00% 0.00%
system.ruby.CorePair_Controller.C0_Store_L1hit 2 0.00% 0.00%
system.ruby.CorePair_Controller.C1_Store_L1miss 73 0.00% 0.00%
system.ruby.CorePair_Controller.NB_AckS 4 0.00% 0.00%
system.ruby.CorePair_Controller.NB_AckM 77 0.00% 0.00%
system.ruby.CorePair_Controller.NB_AckWB 70 0.00% 0.00%
system.ruby.CorePair_Controller.L1D0_Repl 19 0.00% 0.00%
system.ruby.CorePair_Controller.L2_Repl 36624 0.00% 0.00%
system.ruby.CorePair_Controller.PrbInvData 223 0.00% 0.00%
system.ruby.CorePair_Controller.PrbShrData 4 0.00% 0.00%
system.ruby.CorePair_Controller.I.C0_Load_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.I.C1_Load_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.I.Ifetch0_L1miss 2 0.00% 0.00%
system.ruby.CorePair_Controller.I.Ifetch1_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.I.C0_Store_L1miss 41 0.00% 0.00%
system.ruby.CorePair_Controller.I.C1_Store_L1miss 37 0.00% 0.00%
system.ruby.CorePair_Controller.I.PrbInvData 209 0.00% 0.00%
system.ruby.CorePair_Controller.I.PrbShrData 3 0.00% 0.00%
system.ruby.CorePair_Controller.S.L2_Repl 3 0.00% 0.00%
system.ruby.CorePair_Controller.S.PrbInvData 1 0.00% 0.00%
system.ruby.CorePair_Controller.O.PrbInvData 1 0.00% 0.00%
system.ruby.CorePair_Controller.M0.C0_Store_L1hit 2 0.00% 0.00%
system.ruby.CorePair_Controller.M0.L2_Repl 33 0.00% 0.00%
system.ruby.CorePair_Controller.M0.PrbInvData 5 0.00% 0.00%
system.ruby.CorePair_Controller.M0.PrbShrData 1 0.00% 0.00%
system.ruby.CorePair_Controller.M1.C0_Store_L1miss 1 0.00% 0.00%
system.ruby.CorePair_Controller.M1.L2_Repl 36 0.00% 0.00%
system.ruby.CorePair_Controller.M1.PrbInvData 2 0.00% 0.00%
system.ruby.CorePair_Controller.I_M0.C1_Store_L1miss 5 0.00% 0.00%
system.ruby.CorePair_Controller.I_M0.NB_AckM 35 0.00% 0.00%
system.ruby.CorePair_Controller.I_M0.L1D0_Repl 11 0.00% 0.00%
system.ruby.CorePair_Controller.I_M0.L2_Repl 16208 0.00% 0.00%
system.ruby.CorePair_Controller.I_M1.C0_Store_L1miss 3 0.00% 0.00%
system.ruby.CorePair_Controller.I_M1.NB_AckM 34 0.00% 0.00%
system.ruby.CorePair_Controller.I_M1.L2_Repl 14782 0.00% 0.00%
system.ruby.CorePair_Controller.I_M0M1.NB_AckM 5 0.00% 0.00%
system.ruby.CorePair_Controller.I_M0M1.L2_Repl 3020 0.00% 0.00%
system.ruby.CorePair_Controller.I_M1M0.NB_AckM 3 0.00% 0.00%
system.ruby.CorePair_Controller.I_M1M0.L2_Repl 1059 0.00% 0.00%
system.ruby.CorePair_Controller.I_E0S.NB_AckS 1 0.00% 0.00%
system.ruby.CorePair_Controller.I_E0S.L1D0_Repl 8 0.00% 0.00%
system.ruby.CorePair_Controller.I_E0S.L2_Repl 493 0.00% 0.00%
system.ruby.CorePair_Controller.I_E1S.NB_AckS 1 0.00% 0.00%
system.ruby.CorePair_Controller.I_E1S.L2_Repl 638 0.00% 0.00%
system.ruby.CorePair_Controller.ES_I.NB_AckWB 2 0.00% 0.00%
system.ruby.CorePair_Controller.MO_I.NB_AckWB 64 0.00% 0.00%
system.ruby.CorePair_Controller.MO_I.PrbInvData 5 0.00% 0.00%
system.ruby.CorePair_Controller.S0.C1_Store_L1miss 31 0.00% 0.00%
system.ruby.CorePair_Controller.S0.NB_AckS 1 0.00% 0.00%
system.ruby.CorePair_Controller.S0.L2_Repl 352 0.00% 0.00%
system.ruby.CorePair_Controller.S1.NB_AckS 1 0.00% 0.00%
system.ruby.CorePair_Controller.I_C.NB_AckWB 4 0.00% 0.00%
system.ruby.Directory_Controller.RdBlkS 3 0.00% 0.00%
system.ruby.Directory_Controller.RdBlkM 309 0.00% 0.00%
system.ruby.Directory_Controller.RdBlk 6 0.00% 0.00%
system.ruby.Directory_Controller.VicDirty 68 0.00% 0.00%
system.ruby.Directory_Controller.VicClean 2 0.00% 0.00%
system.ruby.Directory_Controller.CPUData 66 0.00% 0.00%
system.ruby.Directory_Controller.StaleWB 4 0.00% 0.00%
system.ruby.Directory_Controller.CPUPrbResp 308 0.00% 0.00%
system.ruby.Directory_Controller.ProbeAcksComplete 308 0.00% 0.00%
system.ruby.Directory_Controller.L3Hit 49 0.00% 0.00%
system.ruby.Directory_Controller.MemData 259 0.00% 0.00%
system.ruby.Directory_Controller.WBAck 9 0.00% 0.00%
system.ruby.Directory_Controller.CoreUnblock 303 0.00% 0.00%
system.ruby.Directory_Controller.U.RdBlkS 3 0.00% 0.00%
system.ruby.Directory_Controller.U.RdBlkM 300 0.00% 0.00%
system.ruby.Directory_Controller.U.RdBlk 5 0.00% 0.00%
system.ruby.Directory_Controller.U.VicDirty 68 0.00% 0.00%
system.ruby.Directory_Controller.U.VicClean 2 0.00% 0.00%
system.ruby.Directory_Controller.U.WBAck 9 0.00% 0.00%
system.ruby.Directory_Controller.BL.RdBlkM 1 0.00% 0.00%
system.ruby.Directory_Controller.BL.CPUData 66 0.00% 0.00%
system.ruby.Directory_Controller.BL.StaleWB 4 0.00% 0.00%
system.ruby.Directory_Controller.BM_M.MemData 8 0.00% 0.00%
system.ruby.Directory_Controller.BS_PM.L3Hit 1 0.00% 0.00%
system.ruby.Directory_Controller.BS_PM.MemData 2 0.00% 0.00%
system.ruby.Directory_Controller.BM_PM.RdBlkM 1 0.00% 0.00%
system.ruby.Directory_Controller.BM_PM.CPUPrbResp 12 0.00% 0.00%
system.ruby.Directory_Controller.BM_PM.ProbeAcksComplete 8 0.00% 0.00%
system.ruby.Directory_Controller.BM_PM.L3Hit 46 0.00% 0.00%
system.ruby.Directory_Controller.BM_PM.MemData 246 0.00% 0.00%
system.ruby.Directory_Controller.B_PM.L3Hit 2 0.00% 0.00%
system.ruby.Directory_Controller.B_PM.MemData 3 0.00% 0.00%
system.ruby.Directory_Controller.BS_Pm.CPUPrbResp 3 0.00% 0.00%
system.ruby.Directory_Controller.BS_Pm.ProbeAcksComplete 3 0.00% 0.00%
system.ruby.Directory_Controller.BM_Pm.RdBlkM 3 0.00% 0.00%
system.ruby.Directory_Controller.BM_Pm.CPUPrbResp 288 0.00% 0.00%
system.ruby.Directory_Controller.BM_Pm.ProbeAcksComplete 292 0.00% 0.00%
system.ruby.Directory_Controller.B_Pm.CPUPrbResp 5 0.00% 0.00%
system.ruby.Directory_Controller.B_Pm.ProbeAcksComplete 5 0.00% 0.00%
system.ruby.Directory_Controller.B.RdBlkM 4 0.00% 0.00%
system.ruby.Directory_Controller.B.RdBlk 1 0.00% 0.00%
system.ruby.Directory_Controller.B.CoreUnblock 303 0.00% 0.00%
system.ruby.LD.latency_hist_seqr::bucket_size 1024
system.ruby.LD.latency_hist_seqr::max_bucket 10239
system.ruby.LD.latency_hist_seqr::samples 1
system.ruby.LD.latency_hist_seqr::mean 5324
system.ruby.LD.latency_hist_seqr::gmean 5324.000000
system.ruby.LD.latency_hist_seqr::stdev nan
system.ruby.LD.latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.latency_hist_seqr::total 1
system.ruby.LD.latency_hist_coalsr::bucket_size 128
system.ruby.LD.latency_hist_coalsr::max_bucket 1279
system.ruby.LD.latency_hist_coalsr::samples 69
system.ruby.LD.latency_hist_coalsr::mean 111.289855
system.ruby.LD.latency_hist_coalsr::gmean 81.460116
system.ruby.LD.latency_hist_coalsr::stdev 88.701101
system.ruby.LD.latency_hist_coalsr | 63 91.30% 91.30% | 2 2.90% 94.20% | 2 2.90% 97.10% | 1 1.45% 98.55% | 0 0.00% 98.55% | 1 1.45% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.latency_hist_coalsr::total 69
system.ruby.LD.hit_latency_hist_seqr::bucket_size 1024
system.ruby.LD.hit_latency_hist_seqr::max_bucket 10239
system.ruby.LD.hit_latency_hist_seqr::samples 1
system.ruby.LD.hit_latency_hist_seqr::mean 5324
system.ruby.LD.hit_latency_hist_seqr::gmean 5324.000000
system.ruby.LD.hit_latency_hist_seqr::stdev nan
system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.hit_latency_hist_seqr::total 1
system.ruby.LD.miss_latency_hist_coalsr::bucket_size 128
system.ruby.LD.miss_latency_hist_coalsr::max_bucket 1279
system.ruby.LD.miss_latency_hist_coalsr::samples 69
system.ruby.LD.miss_latency_hist_coalsr::mean 111.289855
system.ruby.LD.miss_latency_hist_coalsr::gmean 81.460116
system.ruby.LD.miss_latency_hist_coalsr::stdev 88.701101
system.ruby.LD.miss_latency_hist_coalsr | 63 91.30% 91.30% | 2 2.90% 94.20% | 2 2.90% 97.10% | 1 1.45% 98.55% | 0 0.00% 98.55% | 1 1.45% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.miss_latency_hist_coalsr::total 69
system.ruby.ST.latency_hist_seqr::bucket_size 1024
system.ruby.ST.latency_hist_seqr::max_bucket 10239
system.ruby.ST.latency_hist_seqr::samples 46
system.ruby.ST.latency_hist_seqr::mean 3269.239130
system.ruby.ST.latency_hist_seqr::gmean 1783.447677
system.ruby.ST.latency_hist_seqr::stdev 1934.416354
system.ruby.ST.latency_hist_seqr | 11 23.91% 23.91% | 3 6.52% 30.43% | 3 6.52% 36.96% | 7 15.22% 52.17% | 18 39.13% 91.30% | 4 8.70% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.latency_hist_seqr::total 46
system.ruby.ST.latency_hist_coalsr::bucket_size 128
system.ruby.ST.latency_hist_coalsr::max_bucket 1279
system.ruby.ST.latency_hist_coalsr::samples 803
system.ruby.ST.latency_hist_coalsr::mean 231.610212
system.ruby.ST.latency_hist_coalsr::gmean 117.827816
system.ruby.ST.latency_hist_coalsr::stdev 248.057845
system.ruby.ST.latency_hist_coalsr | 517 64.38% 64.38% | 28 3.49% 67.87% | 108 13.45% 81.32% | 38 4.73% 86.05% | 33 4.11% 90.16% | 19 2.37% 92.53% | 33 4.11% 96.64% | 23 2.86% 99.50% | 4 0.50% 100.00% | 0 0.00% 100.00%
system.ruby.ST.latency_hist_coalsr::total 803
system.ruby.ST.hit_latency_hist_seqr::bucket_size 1024
system.ruby.ST.hit_latency_hist_seqr::max_bucket 10239
system.ruby.ST.hit_latency_hist_seqr::samples 40
system.ruby.ST.hit_latency_hist_seqr::mean 3606.650000
system.ruby.ST.hit_latency_hist_seqr::gmean 2691.718970
system.ruby.ST.hit_latency_hist_seqr::stdev 1792.166924
system.ruby.ST.hit_latency_hist_seqr | 7 17.50% 17.50% | 3 7.50% 25.00% | 1 2.50% 27.50% | 7 17.50% 45.00% | 18 45.00% 90.00% | 4 10.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.hit_latency_hist_seqr::total 40
system.ruby.ST.miss_latency_hist_seqr::bucket_size 512
system.ruby.ST.miss_latency_hist_seqr::max_bucket 5119
system.ruby.ST.miss_latency_hist_seqr::samples 6
system.ruby.ST.miss_latency_hist_seqr::mean 1019.833333
system.ruby.ST.miss_latency_hist_seqr::gmean 114.673945
system.ruby.ST.miss_latency_hist_seqr::stdev 1281.644790
system.ruby.ST.miss_latency_hist_seqr | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.miss_latency_hist_seqr::total 6
system.ruby.ST.miss_latency_hist_coalsr::bucket_size 128
system.ruby.ST.miss_latency_hist_coalsr::max_bucket 1279
system.ruby.ST.miss_latency_hist_coalsr::samples 803
system.ruby.ST.miss_latency_hist_coalsr::mean 231.610212
system.ruby.ST.miss_latency_hist_coalsr::gmean 117.827816
system.ruby.ST.miss_latency_hist_coalsr::stdev 248.057845
system.ruby.ST.miss_latency_hist_coalsr | 517 64.38% 64.38% | 28 3.49% 67.87% | 108 13.45% 81.32% | 38 4.73% 86.05% | 33 4.11% 90.16% | 19 2.37% 92.53% | 33 4.11% 96.64% | 23 2.86% 99.50% | 4 0.50% 100.00% | 0 0.00% 100.00%
system.ruby.ST.miss_latency_hist_coalsr::total 803
system.ruby.IFETCH.latency_hist_seqr::bucket_size 1024
system.ruby.IFETCH.latency_hist_seqr::max_bucket 10239
system.ruby.IFETCH.latency_hist_seqr::samples 1
system.ruby.IFETCH.latency_hist_seqr::mean 5156
system.ruby.IFETCH.latency_hist_seqr::gmean 5156.000000
system.ruby.IFETCH.latency_hist_seqr::stdev nan
system.ruby.IFETCH.latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.IFETCH.latency_hist_seqr::total 1
system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1024
system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 10239
system.ruby.IFETCH.hit_latency_hist_seqr::samples 1
system.ruby.IFETCH.hit_latency_hist_seqr::mean 5156
system.ruby.IFETCH.hit_latency_hist_seqr::gmean 5156.000000
system.ruby.IFETCH.hit_latency_hist_seqr::stdev nan
system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.IFETCH.hit_latency_hist_seqr::total 1
system.ruby.L1Cache.miss_mach_latency_hist_seqr::bucket_size 512
system.ruby.L1Cache.miss_mach_latency_hist_seqr::max_bucket 5119
system.ruby.L1Cache.miss_mach_latency_hist_seqr::samples 6
system.ruby.L1Cache.miss_mach_latency_hist_seqr::mean 1019.833333
system.ruby.L1Cache.miss_mach_latency_hist_seqr::gmean 114.673945
system.ruby.L1Cache.miss_mach_latency_hist_seqr::stdev 1281.644790
system.ruby.L1Cache.miss_mach_latency_hist_seqr | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.L1Cache.miss_mach_latency_hist_seqr::total 6
system.ruby.Directory.hit_mach_latency_hist_seqr::bucket_size 1024
system.ruby.Directory.hit_mach_latency_hist_seqr::max_bucket 10239
system.ruby.Directory.hit_mach_latency_hist_seqr::samples 42
system.ruby.Directory.hit_mach_latency_hist_seqr::mean 3684.428571
system.ruby.Directory.hit_mach_latency_hist_seqr::gmean 2778.454716
system.ruby.Directory.hit_mach_latency_hist_seqr::stdev 1783.107224
system.ruby.Directory.hit_mach_latency_hist_seqr | 7 16.67% 16.67% | 3 7.14% 23.81% | 1 2.38% 26.19% | 7 16.67% 42.86% | 18 42.86% 85.71% | 6 14.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.hit_mach_latency_hist_seqr::total 42
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::bucket_size 128
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::max_bucket 1279
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::samples 644
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::mean 154.992236
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::gmean 124.686138
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::stdev 142.628867
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr | 516 80.12% 80.12% | 30 4.66% 84.78% | 42 6.52% 91.30% | 26 4.04% 95.34% | 17 2.64% 97.98% | 7 1.09% 99.07% | 4 0.62% 99.69% | 1 0.16% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00%
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::total 644
system.ruby.TCP.miss_mach_latency_hist_coalsr::bucket_size 1
system.ruby.TCP.miss_mach_latency_hist_coalsr::max_bucket 9
system.ruby.TCP.miss_mach_latency_hist_coalsr::samples 64
system.ruby.TCP.miss_mach_latency_hist_coalsr::mean 1.109375
system.ruby.TCP.miss_mach_latency_hist_coalsr::gmean 1.055645
system.ruby.TCP.miss_mach_latency_hist_coalsr::stdev 0.537991
system.ruby.TCP.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 61 95.31% 95.31% | 1 1.56% 96.88% | 0 0.00% 96.88% | 2 3.12% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.TCP.miss_mach_latency_hist_coalsr::total 64
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::bucket_size 128
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::max_bucket 1279
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::samples 164
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::mean 571.804878
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::gmean 508.667381
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::stdev 267.247131
system.ruby.TCCdir.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 68 41.46% 41.46% | 13 7.93% 49.39% | 16 9.76% 59.15% | 13 7.93% 67.07% | 29 17.68% 84.76% | 22 13.41% 98.17% | 3 1.83% 100.00% | 0 0.00% 100.00%
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::total 164
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::bucket_size 1024
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::max_bucket 10239
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::samples 1
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::mean 5324
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::gmean 5324.000000
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::stdev nan
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::total 1
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::bucket_size 128
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::max_bucket 1279
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::samples 62
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::mean 107.322581
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::gmean 101.146340
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::stdev 70.212972
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr | 59 95.16% 95.16% | 2 3.23% 98.39% | 0 0.00% 98.39% | 0 0.00% 98.39% | 0 0.00% 98.39% | 1 1.61% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::total 62
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::bucket_size 1
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::max_bucket 9
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::samples 4
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::mean 1
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::gmean 1
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 4 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::total 4
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 64
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 639
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::samples 3
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::mean 340.333333
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 328.169813
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::stdev 116.791838
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 2 66.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 1 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::total 3
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 512
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 5119
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::samples 6
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::mean 1019.833333
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::gmean 114.673945
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::stdev 1281.644790
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr | 3 50.00% 50.00% | 1 16.67% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::total 6
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::bucket_size 1024
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::max_bucket 10239
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::samples 40
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::mean 3606.650000
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::gmean 2691.718970
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::stdev 1792.166924
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr | 7 17.50% 17.50% | 3 7.50% 25.00% | 1 2.50% 27.50% | 7 17.50% 45.00% | 18 45.00% 90.00% | 4 10.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::total 40
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::bucket_size 128
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::max_bucket 1279
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::samples 582
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::mean 160.070447
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::gmean 127.496503
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::stdev 147.403962
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr | 457 78.52% 78.52% | 28 4.81% 83.33% | 42 7.22% 90.55% | 26 4.47% 95.02% | 17 2.92% 97.94% | 6 1.03% 98.97% | 4 0.69% 99.66% | 1 0.17% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00%
system.ruby.ST.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::total 582
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::bucket_size 1
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::max_bucket 9
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::samples 60
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::mean 1.116667
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::gmean 1.059463
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::stdev 0.555151
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 57 95.00% 95.00% | 1 1.67% 96.67% | 0 0.00% 96.67% | 2 3.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::total 60
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 128
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 1279
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::samples 161
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::mean 576.118012
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 512.838367
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::stdev 267.518863
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 66 40.99% 40.99% | 12 7.45% 48.45% | 16 9.94% 58.39% | 13 8.07% 66.46% | 29 18.01% 84.47% | 22 13.66% 98.14% | 3 1.86% 100.00% | 0 0.00% 100.00%
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::total 161
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::bucket_size 1024
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::max_bucket 10239
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::samples 1
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::mean 5156
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::gmean 5156.000000
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::stdev nan
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::total 1
system.ruby.SQC_Controller.Fetch | 12 44.44% 44.44% | 15 55.56% 100.00%
system.ruby.SQC_Controller.Fetch::total 27
system.ruby.SQC_Controller.TCC_AckS | 12 44.44% 44.44% | 15 55.56% 100.00%
system.ruby.SQC_Controller.TCC_AckS::total 27
system.ruby.SQC_Controller.PrbInvData | 10 41.67% 41.67% | 14 58.33% 100.00%
system.ruby.SQC_Controller.PrbInvData::total 24
system.ruby.SQC_Controller.I.Fetch | 12 44.44% 44.44% | 15 55.56% 100.00%
system.ruby.SQC_Controller.I.Fetch::total 27
system.ruby.SQC_Controller.S.PrbInvData | 10 41.67% 41.67% | 14 58.33% 100.00%
system.ruby.SQC_Controller.S.PrbInvData::total 24
system.ruby.SQC_Controller.I_S.TCC_AckS | 12 44.44% 44.44% | 15 55.56% 100.00%
system.ruby.SQC_Controller.I_S.TCC_AckS::total 27
system.ruby.TCCdir_Controller.RdBlk 174 0.00% 0.00%
system.ruby.TCCdir_Controller.RdBlkM 2638 0.00% 0.00%
system.ruby.TCCdir_Controller.RdBlkS 195 0.00% 0.00%
system.ruby.TCCdir_Controller.CPUPrbResp 811 0.00% 0.00%
system.ruby.TCCdir_Controller.ProbeAcksComplete 751 0.00% 0.00%
system.ruby.TCCdir_Controller.CoreUnblock 829 0.00% 0.00%
system.ruby.TCCdir_Controller.LastCoreUnblock 2 0.00% 0.00%
system.ruby.TCCdir_Controller.NB_AckS 2 0.00% 0.00%
system.ruby.TCCdir_Controller.NB_AckE 2 0.00% 0.00%
system.ruby.TCCdir_Controller.NB_AckM 223 0.00% 0.00%
system.ruby.TCCdir_Controller.PrbInvData 112 0.00% 0.00%
system.ruby.TCCdir_Controller.PrbShrData 4 0.00% 0.00%
system.ruby.TCCdir_Controller.I.RdBlk 3 0.00% 0.00%
system.ruby.TCCdir_Controller.I.RdBlkM 156 0.00% 0.00%
system.ruby.TCCdir_Controller.I.RdBlkS 1 0.00% 0.00%
system.ruby.TCCdir_Controller.I.PrbInvData 9 0.00% 0.00%
system.ruby.TCCdir_Controller.S.RdBlkM 2 0.00% 0.00%
system.ruby.TCCdir_Controller.S.RdBlkS 1 0.00% 0.00%
system.ruby.TCCdir_Controller.E.RdBlkM 1 0.00% 0.00%
system.ruby.TCCdir_Controller.O.RdBlk 1 0.00% 0.00%
system.ruby.TCCdir_Controller.O.RdBlkM 70 0.00% 0.00%
system.ruby.TCCdir_Controller.O.PrbInvData 6 0.00% 0.00%
system.ruby.TCCdir_Controller.M.RdBlk 61 0.00% 0.00%
system.ruby.TCCdir_Controller.M.RdBlkM 521 0.00% 0.00%
system.ruby.TCCdir_Controller.M.RdBlkS 25 0.00% 0.00%
system.ruby.TCCdir_Controller.M.PrbInvData 59 0.00% 0.00%
system.ruby.TCCdir_Controller.M.PrbShrData 4 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_I.RdBlk 9 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_I.RdBlkM 15 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_I.RdBlkS 7 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_I.CPUPrbResp 71 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_I.ProbeAcksComplete 65 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_O.RdBlkM 4 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_O.CPUPrbResp 4 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_O.ProbeAcksComplete 4 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_IOM.RdBlkM 5 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_IOM.CPUPrbResp 2 0.00% 0.00%
system.ruby.TCCdir_Controller.CP_IOM.ProbeAcksComplete 2 0.00% 0.00%
system.ruby.TCCdir_Controller.I_M.RdBlkM 897 0.00% 0.00%
system.ruby.TCCdir_Controller.I_M.RdBlkS 30 0.00% 0.00%
system.ruby.TCCdir_Controller.I_M.NB_AckM 156 0.00% 0.00%
system.ruby.TCCdir_Controller.I_M.PrbInvData 1 0.00% 0.00%
system.ruby.TCCdir_Controller.I_ES.RdBlkM 24 0.00% 0.00%
system.ruby.TCCdir_Controller.I_ES.RdBlkS 34 0.00% 0.00%
system.ruby.TCCdir_Controller.I_ES.NB_AckS 1 0.00% 0.00%
system.ruby.TCCdir_Controller.I_ES.NB_AckE 2 0.00% 0.00%
system.ruby.TCCdir_Controller.I_S.RdBlkM 11 0.00% 0.00%
system.ruby.TCCdir_Controller.I_S.NB_AckS 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_S.RdBlkM 5 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_S.CPUPrbResp 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_S.ProbeAcksComplete 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BBO_O.CPUPrbResp 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BBO_O.ProbeAcksComplete 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_M.RdBlk 11 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_M.RdBlkM 104 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_M.RdBlkS 12 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_M.CPUPrbResp 520 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_M.ProbeAcksComplete 520 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_M.PrbInvData 14 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_O.RdBlkM 13 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_O.CPUPrbResp 86 0.00% 0.00%
system.ruby.TCCdir_Controller.BBM_O.ProbeAcksComplete 86 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_M.RdBlk 20 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_M.RdBlkM 181 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_M.RdBlkS 15 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_M.CoreUnblock 518 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_M.PrbInvData 19 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_O.RdBlkM 35 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_O.CoreUnblock 84 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_O.PrbInvData 2 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_OO.LastCoreUnblock 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_S.RdBlkM 9 0.00% 0.00%
system.ruby.TCCdir_Controller.BB_S.LastCoreUnblock 1 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_M.RdBlk 9 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_M.RdBlkM 18 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_M.CPUPrbResp 4 0.00% 0.00%
system.ruby.TCCdir_Controller.BBS_M.ProbeAcksComplete 3 0.00% 0.00%
system.ruby.TCCdir_Controller.BBO_M.RdBlkM 20 0.00% 0.00%
system.ruby.TCCdir_Controller.BBO_M.CPUPrbResp 122 0.00% 0.00%
system.ruby.TCCdir_Controller.BBO_M.ProbeAcksComplete 69 0.00% 0.00%
system.ruby.TCCdir_Controller.S_M.RdBlk 28 0.00% 0.00%
system.ruby.TCCdir_Controller.S_M.RdBlkM 69 0.00% 0.00%
system.ruby.TCCdir_Controller.S_M.NB_AckM 3 0.00% 0.00%
system.ruby.TCCdir_Controller.O_M.RdBlk 20 0.00% 0.00%
system.ruby.TCCdir_Controller.O_M.RdBlkM 249 0.00% 0.00%
system.ruby.TCCdir_Controller.O_M.RdBlkS 51 0.00% 0.00%
system.ruby.TCCdir_Controller.O_M.NB_AckM 64 0.00% 0.00%
system.ruby.TCCdir_Controller.O_M.PrbInvData 2 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_S.RdBlk 3 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_S.RdBlkM 23 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_S.RdBlkS 5 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_S.CoreUnblock 2 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_M.RdBlk 9 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_M.RdBlkM 206 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_M.RdBlkS 14 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_M.CoreUnblock 223 0.00% 0.00%
system.ruby.TCCdir_Controller.BBB_E.CoreUnblock 2 0.00% 0.00%
system.ruby.TCP_Controller.Load | 5 7.04% 7.04% | 6 8.45% 15.49% | 10 14.08% 29.58% | 13 18.31% 47.89% | 6 8.45% 56.34% | 6 8.45% 64.79% | 13 18.31% 83.10% | 12 16.90% 100.00%
system.ruby.TCP_Controller.Load::total 71
system.ruby.TCP_Controller.Store | 109 13.39% 13.39% | 104 12.78% 26.17% | 98 12.04% 38.21% | 93 11.43% 49.63% | 109 13.39% 63.02% | 102 12.53% 75.55% | 113 13.88% 89.43% | 86 10.57% 100.00%
system.ruby.TCP_Controller.Store::total 814
system.ruby.TCP_Controller.TCC_AckS | 5 7.94% 7.94% | 5 7.94% 15.87% | 9 14.29% 30.16% | 13 20.63% 50.79% | 4 6.35% 57.14% | 6 9.52% 66.67% | 11 17.46% 84.13% | 10 15.87% 100.00%
system.ruby.TCP_Controller.TCC_AckS::total 63
system.ruby.TCP_Controller.TCC_AckE | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00%
system.ruby.TCP_Controller.TCC_AckE::total 2
system.ruby.TCP_Controller.TCC_AckM | 100 13.46% 13.46% | 94 12.65% 26.11% | 90 12.11% 38.22% | 81 10.90% 49.13% | 102 13.73% 62.85% | 92 12.38% 75.24% | 105 14.13% 89.37% | 79 10.63% 100.00%
system.ruby.TCP_Controller.TCC_AckM::total 743
system.ruby.TCP_Controller.PrbInvData | 88 12.61% 12.61% | 87 12.46% 25.07% | 88 12.61% 37.68% | 79 11.32% 49.00% | 90 12.89% 61.89% | 86 12.32% 74.21% | 101 14.47% 88.68% | 79 11.32% 100.00%
system.ruby.TCP_Controller.PrbInvData::total 698
system.ruby.TCP_Controller.PrbShrData | 14 15.22% 15.22% | 9 9.78% 25.00% | 17 18.48% 43.48% | 7 7.61% 51.09% | 14 15.22% 66.30% | 10 10.87% 77.17% | 12 13.04% 90.22% | 9 9.78% 100.00%
system.ruby.TCP_Controller.PrbShrData::total 92
system.ruby.TCP_Controller.I.Load | 5 7.46% 7.46% | 5 7.46% 14.93% | 9 13.43% 28.36% | 13 19.40% 47.76% | 6 8.96% 56.72% | 6 8.96% 65.67% | 12 17.91% 83.58% | 11 16.42% 100.00%
system.ruby.TCP_Controller.I.Load::total 67
system.ruby.TCP_Controller.I.Store | 98 13.26% 13.26% | 95 12.86% 26.12% | 89 12.04% 38.16% | 82 11.10% 49.26% | 99 13.40% 62.65% | 93 12.58% 75.24% | 105 14.21% 89.45% | 78 10.55% 100.00%
system.ruby.TCP_Controller.I.Store::total 739
system.ruby.TCP_Controller.I.PrbInvData | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.TCP_Controller.I.PrbInvData::total 2
system.ruby.TCP_Controller.S.Store | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 20.00% 20.00% | 1 20.00% 40.00% | 0 0.00% 40.00% | 2 40.00% 80.00% | 1 20.00% 100.00%
system.ruby.TCP_Controller.S.Store::total 5
system.ruby.TCP_Controller.S.PrbInvData | 4 8.33% 8.33% | 4 8.33% 16.67% | 8 16.67% 33.33% | 9 18.75% 52.08% | 3 6.25% 58.33% | 4 8.33% 66.67% | 8 16.67% 83.33% | 8 16.67% 100.00%
system.ruby.TCP_Controller.S.PrbInvData::total 48
system.ruby.TCP_Controller.S.PrbShrData | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.TCP_Controller.S.PrbShrData::total 1
system.ruby.TCP_Controller.E.PrbInvData | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
system.ruby.TCP_Controller.E.PrbInvData::total 1
system.ruby.TCP_Controller.O.Store | 2 20.00% 20.00% | 0 0.00% 20.00% | 2 20.00% 40.00% | 0 0.00% 40.00% | 3 30.00% 70.00% | 1 10.00% 80.00% | 1 10.00% 90.00% | 1 10.00% 100.00%
system.ruby.TCP_Controller.O.Store::total 10
system.ruby.TCP_Controller.O.PrbInvData | 9 13.64% 13.64% | 7 10.61% 24.24% | 12 18.18% 42.42% | 7 10.61% 53.03% | 10 15.15% 68.18% | 5 7.58% 75.76% | 10 15.15% 90.91% | 6 9.09% 100.00%
system.ruby.TCP_Controller.O.PrbInvData::total 66
system.ruby.TCP_Controller.O.PrbShrData | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.TCP_Controller.O.PrbShrData::total 1
system.ruby.TCP_Controller.M.Load | 0 0.00% 0.00% | 1 25.00% 25.00% | 1 25.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 1 25.00% 75.00% | 1 25.00% 100.00%
system.ruby.TCP_Controller.M.Load::total 4
system.ruby.TCP_Controller.M.Store | 9 15.00% 15.00% | 9 15.00% 30.00% | 7 11.67% 41.67% | 10 16.67% 58.33% | 6 10.00% 68.33% | 8 13.33% 81.67% | 5 8.33% 90.00% | 6 10.00% 100.00%
system.ruby.TCP_Controller.M.Store::total 60
system.ruby.TCP_Controller.M.PrbInvData | 75 12.93% 12.93% | 76 13.10% 26.03% | 67 11.55% 37.59% | 62 10.69% 48.28% | 76 13.10% 61.38% | 77 13.28% 74.66% | 82 14.14% 88.79% | 65 11.21% 100.00%
system.ruby.TCP_Controller.M.PrbInvData::total 580
system.ruby.TCP_Controller.M.PrbShrData | 14 15.56% 15.56% | 8 8.89% 24.44% | 16 17.78% 42.22% | 7 7.78% 50.00% | 14 15.56% 65.56% | 10 11.11% 76.67% | 12 13.33% 90.00% | 9 10.00% 100.00%
system.ruby.TCP_Controller.M.PrbShrData::total 90
system.ruby.TCP_Controller.I_M.TCC_AckM | 98 13.42% 13.42% | 94 12.88% 26.30% | 89 12.19% 38.49% | 80 10.96% 49.45% | 98 13.42% 62.88% | 91 12.47% 75.34% | 103 14.11% 89.45% | 77 10.55% 100.00%
system.ruby.TCP_Controller.I_M.TCC_AckM::total 730
system.ruby.TCP_Controller.I_ES.TCC_AckS | 5 7.94% 7.94% | 5 7.94% 15.87% | 9 14.29% 30.16% | 13 20.63% 50.79% | 4 6.35% 57.14% | 6 9.52% 66.67% | 11 17.46% 84.13% | 10 15.87% 100.00%
system.ruby.TCP_Controller.I_ES.TCC_AckS::total 63
system.ruby.TCP_Controller.I_ES.TCC_AckE | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00%
system.ruby.TCP_Controller.I_ES.TCC_AckE::total 2
system.ruby.TCP_Controller.S_M.TCC_AckM | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 25.00% 25.00% | 1 25.00% 50.00% | 0 0.00% 50.00% | 1 25.00% 75.00% | 1 25.00% 100.00%
system.ruby.TCP_Controller.S_M.TCC_AckM::total 4
system.ruby.TCP_Controller.O_M.TCC_AckM | 2 22.22% 22.22% | 0 0.00% 22.22% | 1 11.11% 33.33% | 0 0.00% 33.33% | 3 33.33% 66.67% | 1 11.11% 77.78% | 1 11.11% 88.89% | 1 11.11% 100.00%
system.ruby.TCP_Controller.O_M.TCC_AckM::total 9
system.ruby.TCP_Controller.O_M.PrbInvData | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.TCP_Controller.O_M.PrbInvData::total 1
---------- End Simulation Statistics ----------
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