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---------- Begin Simulation Statistics ----------
sim_seconds 0.099596
sim_ticks 99596491500
final_tick 99596491500
sim_freq 1000000000000
host_inst_rate 936229
host_op_rate 986937
host_tick_rate 541124372
host_mem_usage 274820
host_seconds 184.05
sim_insts 172317410
sim_ops 181650342
system.voltage_domain.voltage 1
system.clk_domain.clock 1000
system.physmem.pwrStateResidencyTicks::UNDEFINED 99596491500
system.physmem.bytes_read::cpu.inst 759440208
system.physmem.bytes_read::cpu.data 110533661
system.physmem.bytes_read::total 869973869
system.physmem.bytes_inst_read::cpu.inst 759440208
system.physmem.bytes_inst_read::total 759440208
system.physmem.bytes_written::cpu.data 45252940
system.physmem.bytes_written::total 45252940
system.physmem.num_reads::cpu.inst 189860052
system.physmem.num_reads::cpu.data 27777721
system.physmem.num_reads::total 217637773
system.physmem.num_writes::cpu.data 12386694
system.physmem.num_writes::total 12386694
system.physmem.bw_read::cpu.inst 7625170290
system.physmem.bw_read::cpu.data 1109814807
system.physmem.bw_read::total 8734985097
system.physmem.bw_inst_read::cpu.inst 7625170290
system.physmem.bw_inst_read::total 7625170290
system.physmem.bw_write::cpu.data 454362792
system.physmem.bw_write::total 454362792
system.physmem.bw_total::cpu.inst 7625170290
system.physmem.bw_total::cpu.data 1564177600
system.physmem.bw_total::total 9189347890
system.pwrStateResidencyTicks::UNDEFINED 99596491500
system.cpu_clk_domain.clock 500
system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 99596491500
system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0
system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0
system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0
system.cpu.dstage2_mmu.stage2_tlb.read_hits 0
system.cpu.dstage2_mmu.stage2_tlb.read_misses 0
system.cpu.dstage2_mmu.stage2_tlb.write_hits 0
system.cpu.dstage2_mmu.stage2_tlb.write_misses 0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0
system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0
system.cpu.dstage2_mmu.stage2_tlb.align_faults 0
system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0
system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0
system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0
system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0
system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0
system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0
system.cpu.dstage2_mmu.stage2_tlb.hits 0
system.cpu.dstage2_mmu.stage2_tlb.misses 0
system.cpu.dstage2_mmu.stage2_tlb.accesses 0
system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 99596491500
system.cpu.dtb.walker.walks 0
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0
system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0
system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0
system.cpu.dtb.walker.walkRequestOrigin::total 0
system.cpu.dtb.inst_hits 0
system.cpu.dtb.inst_misses 0
system.cpu.dtb.read_hits 0
system.cpu.dtb.read_misses 0
system.cpu.dtb.write_hits 0
system.cpu.dtb.write_misses 0
system.cpu.dtb.flush_tlb 0
system.cpu.dtb.flush_tlb_mva 0
system.cpu.dtb.flush_tlb_mva_asid 0
system.cpu.dtb.flush_tlb_asid 0
system.cpu.dtb.flush_entries 0
system.cpu.dtb.align_faults 0
system.cpu.dtb.prefetch_faults 0
system.cpu.dtb.domain_faults 0
system.cpu.dtb.perms_faults 0
system.cpu.dtb.read_accesses 0
system.cpu.dtb.write_accesses 0
system.cpu.dtb.inst_accesses 0
system.cpu.dtb.hits 0
system.cpu.dtb.misses 0
system.cpu.dtb.accesses 0
system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 99596491500
system.cpu.istage2_mmu.stage2_tlb.walker.walks 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0
system.cpu.istage2_mmu.stage2_tlb.inst_hits 0
system.cpu.istage2_mmu.stage2_tlb.inst_misses 0
system.cpu.istage2_mmu.stage2_tlb.read_hits 0
system.cpu.istage2_mmu.stage2_tlb.read_misses 0
system.cpu.istage2_mmu.stage2_tlb.write_hits 0
system.cpu.istage2_mmu.stage2_tlb.write_misses 0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0
system.cpu.istage2_mmu.stage2_tlb.flush_entries 0
system.cpu.istage2_mmu.stage2_tlb.align_faults 0
system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0
system.cpu.istage2_mmu.stage2_tlb.domain_faults 0
system.cpu.istage2_mmu.stage2_tlb.perms_faults 0
system.cpu.istage2_mmu.stage2_tlb.read_accesses 0
system.cpu.istage2_mmu.stage2_tlb.write_accesses 0
system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0
system.cpu.istage2_mmu.stage2_tlb.hits 0
system.cpu.istage2_mmu.stage2_tlb.misses 0
system.cpu.istage2_mmu.stage2_tlb.accesses 0
system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 99596491500
system.cpu.itb.walker.walks 0
system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0
system.cpu.itb.walker.walkRequestOrigin_Requested::total 0
system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0
system.cpu.itb.walker.walkRequestOrigin_Completed::total 0
system.cpu.itb.walker.walkRequestOrigin::total 0
system.cpu.itb.inst_hits 0
system.cpu.itb.inst_misses 0
system.cpu.itb.read_hits 0
system.cpu.itb.read_misses 0
system.cpu.itb.write_hits 0
system.cpu.itb.write_misses 0
system.cpu.itb.flush_tlb 0
system.cpu.itb.flush_tlb_mva 0
system.cpu.itb.flush_tlb_mva_asid 0
system.cpu.itb.flush_tlb_asid 0
system.cpu.itb.flush_entries 0
system.cpu.itb.align_faults 0
system.cpu.itb.prefetch_faults 0
system.cpu.itb.domain_faults 0
system.cpu.itb.perms_faults 0
system.cpu.itb.read_accesses 0
system.cpu.itb.write_accesses 0
system.cpu.itb.inst_accesses 0
system.cpu.itb.hits 0
system.cpu.itb.misses 0
system.cpu.itb.accesses 0
system.cpu.workload.numSyscalls 400
system.cpu.pwrStateResidencyTicks::ON 99596491500
system.cpu.numCycles 199192984
system.cpu.numWorkItemsStarted 0
system.cpu.numWorkItemsCompleted 0
system.cpu.committedInsts 172317410
system.cpu.committedOps 181650342
system.cpu.num_int_alu_accesses 143085668
system.cpu.num_fp_alu_accesses 1752310
system.cpu.num_func_calls 3545028
system.cpu.num_conditional_control_insts 32201008
system.cpu.num_int_insts 143085668
system.cpu.num_fp_insts 1752310
system.cpu.num_int_register_reads 238310719
system.cpu.num_int_register_writes 98192342
system.cpu.num_fp_register_reads 2822225
system.cpu.num_fp_register_writes 2378039
system.cpu.num_cc_register_reads 543309970
system.cpu.num_cc_register_writes 190815535
system.cpu.num_mem_refs 40540779
system.cpu.num_load_insts 27896144
system.cpu.num_store_insts 12644635
system.cpu.num_idle_cycles 0
system.cpu.num_busy_cycles 199192984
system.cpu.not_idle_fraction 1
system.cpu.idle_fraction 0
system.cpu.Branches 40300312
system.cpu.op_class::No_OpClass 0 0.00% 0.00%
system.cpu.op_class::IntAlu 138988213 76.51% 76.51%
system.cpu.op_class::IntMult 908940 0.50% 77.01%
system.cpu.op_class::IntDiv 0 0.00% 77.01%
system.cpu.op_class::FloatAdd 0 0.00% 77.01%
system.cpu.op_class::FloatCmp 0 0.00% 77.01%
system.cpu.op_class::FloatCvt 0 0.00% 77.01%
system.cpu.op_class::FloatMult 0 0.00% 77.01%
system.cpu.op_class::FloatMultAcc 0 0.00% 77.01%
system.cpu.op_class::FloatDiv 0 0.00% 77.01%
system.cpu.op_class::FloatMisc 0 0.00% 77.01%
system.cpu.op_class::FloatSqrt 0 0.00% 77.01%
system.cpu.op_class::SimdAdd 0 0.00% 77.01%
system.cpu.op_class::SimdAddAcc 0 0.00% 77.01%
system.cpu.op_class::SimdAlu 0 0.00% 77.01%
system.cpu.op_class::SimdCmp 0 0.00% 77.01%
system.cpu.op_class::SimdCvt 0 0.00% 77.01%
system.cpu.op_class::SimdMisc 0 0.00% 77.01%
system.cpu.op_class::SimdMult 0 0.00% 77.01%
system.cpu.op_class::SimdMultAcc 0 0.00% 77.01%
system.cpu.op_class::SimdShift 0 0.00% 77.01%
system.cpu.op_class::SimdShiftAcc 0 0.00% 77.01%
system.cpu.op_class::SimdSqrt 0 0.00% 77.01%
system.cpu.op_class::SimdFloatAdd 32754 0.02% 77.03%
system.cpu.op_class::SimdFloatAlu 0 0.00% 77.03%
system.cpu.op_class::SimdFloatCmp 154829 0.09% 77.12%
system.cpu.op_class::SimdFloatCvt 238880 0.13% 77.25%
system.cpu.op_class::SimdFloatDiv 76016 0.04% 77.29%
system.cpu.op_class::SimdFloatMisc 437591 0.24% 77.53%
system.cpu.op_class::SimdFloatMult 200806 0.11% 77.64%
system.cpu.op_class::SimdFloatMultAcc 71617 0.04% 77.68%
system.cpu.op_class::SimdFloatSqrt 318 0.00% 77.68%
system.cpu.op_class::MemRead 27348059 15.06% 92.74%
system.cpu.op_class::MemWrite 12498389 6.88% 99.62%
system.cpu.op_class::FloatMemRead 548085 0.30% 99.92%
system.cpu.op_class::FloatMemWrite 146246 0.08% 100.00%
system.cpu.op_class::IprAccess 0 0.00% 100.00%
system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
system.cpu.op_class::total 181650743
system.membus.snoop_filter.tot_requests 0
system.membus.snoop_filter.hit_single_requests 0
system.membus.snoop_filter.hit_multi_requests 0
system.membus.snoop_filter.tot_snoops 0
system.membus.snoop_filter.hit_single_snoops 0
system.membus.snoop_filter.hit_multi_snoops 0
system.membus.pwrStateResidencyTicks::UNDEFINED 99596491500
system.membus.trans_dist::ReadReq 217614903
system.membus.trans_dist::ReadResp 217637310
system.membus.trans_dist::WriteReq 12364287
system.membus.trans_dist::WriteResp 12364287
system.membus.trans_dist::SoftPFReq 463
system.membus.trans_dist::SoftPFResp 463
system.membus.trans_dist::LoadLockedReq 22407
system.membus.trans_dist::StoreCondReq 22407
system.membus.trans_dist::StoreCondResp 22407
system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 379720104
system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 80328830
system.membus.pkt_count::total 460048934
system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 759440208
system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 155786601
system.membus.pkt_size::total 915226809
system.membus.snoops 0
system.membus.snoopTraffic 0
system.membus.snoop_fanout::samples 230024467
system.membus.snoop_fanout::mean 0
system.membus.snoop_fanout::stdev 0
system.membus.snoop_fanout::underflows 0 0.00% 0.00%
system.membus.snoop_fanout::0 230024467 100.00% 100.00%
system.membus.snoop_fanout::1 0 0.00% 100.00%
system.membus.snoop_fanout::overflows 0 0.00% 100.00%
system.membus.snoop_fanout::min_value 0
system.membus.snoop_fanout::max_value 0
system.membus.snoop_fanout::total 230024467
---------- End Simulation Statistics ----------
|
