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#!python
# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Christian Menard
Import('env')
env = env.Clone()
gem5_root = env['GEM5_ROOT']
systemc_src = []
systemc_src += Install('.', gem5_root + '/util/systemc/sc_gem5_control.cc'),
systemc_src += Install('.', gem5_root + '/util/systemc/sc_logger.cc'),
systemc_src += Install('.', gem5_root + '/util/systemc/sc_module.cc'),
systemc_src += Install('.', gem5_root + '/util/systemc/stats.cc'),
tlm_src = []
tlm_src += [File('master_transactor.cc')]
tlm_src += [File('sc_ext.cc')]
tlm_src += [File('sc_master_port.cc')]
tlm_src += [File('sc_mm.cc')]
tlm_src += [File('sc_slave_port.cc')]
tlm_src += [File('sim_control.cc')]
tlm_src += [File('slave_transactor.cc')]
tlm = env.Library('gem5_tlm', tlm_src + systemc_src)
Return('tlm')
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