diff options
| author | John Hubbard <jhubbard@nvidia.com> | 2019-04-21 17:09:24 -0700 |
|---|---|---|
| committer | John Hubbard <jhubbard@nvidia.com> | 2019-04-24 11:13:31 -0700 |
| commit | 60b67c31fcad6d0dc9603a034994a12efe3d5202 (patch) | |
| tree | c71d32e4b2a0d2a9770ac6b9add6ed49b0320e51 /MemoryClockTable | |
| parent | d1be635fac4adad238916d28dde406c81ba564a8 (diff) | |
| download | open-gpu-doc-60b67c31fcad6d0dc9603a034994a12efe3d5202.tar.xz | |
Open doc files, version 1 of everything
This copies over files from:
http://download.nvidia.com/open-gpu-doc/
with a few overrides from local, as-yet-to-be-published
files (generally just a file suffix and licensing tweak).
Here's the script that was used to create this commit:
wget -r http://download.nvidia.com/open-gpu-doc/
mv download.nvidia.com/open-gpu-doc/* .
rm -rf download.nvidia.com/
find . -name index.html | xargs rm -f
find . -name Thumbs.db | xargs rm -f
find . -type f | grep -v \.git | xargs file | grep CRLF | cut -f1 -d: | xargs dos2unix
for f in `find . -name 1 | cut -f2 -d "/"`; do pushd $f; mv 1/* .; popd; done
find . -name 1 | xargs rmdir
rm -rf Host-Fifo/volta/gv100
mkdir -p Host-Fifo/volta/gv100
cp $sw/docs/Public_Devel_Docs/release/Host-Fifo/volta/gv100/* Host-Fifo/volta/gv100/
rm Display-Ref-Manuals/gv100/dev_display.ref
cp $sw/docs/Public_Devel_Docs/release/Display-Ref-Manuals/1/gv100/dev_display.ref \
Display-Ref-Manuals/gv100/dev_display.ref.txt
git add .
git mv DCB/DCB-4.0-Specification.html DCB/DCB-4.x-Specification.html
git reset HEAD Display-Class-Methods/2
git reset HEAD DCB/2
git commit
Reviewed-by: Andy Ritger
Diffstat (limited to 'MemoryClockTable')
| -rw-r--r-- | MemoryClockTable/MemoryClockTable.html | 711 |
1 files changed, 711 insertions, 0 deletions
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+<body>
+<div id="header">
+<h1>NVIDIA Memory Clock Table Specifications</h1>
+</div>
+<div id="preamble">
+<div class="sectionbody">
+</div>
+</div>
+<h2 id="_purpose">Purpose</h2>
+<div class="sectionbody">
+<div class="paragraph"><p>This document describes the VBIOS Memory clock table entries.
+The Memory Clock Table starts with a header, followed immediately by an array of entries.</p></div>
+<h3 id="_memory_clock_table_header">Memory Clock Table Header</h3><div style="clear:left"></div>
+<div class="tableblock">
+<table rules="all"
+width="100%"
+frame="border"
+cellspacing="0" cellpadding="4">
+<col width="22%" />
+<col width="11%" />
+<col width="66%" />
+<thead>
+<tr>
+<th align="left" valign="top"> FieldName </th>
+<th align="center" valign="top"> Size (in bits) </th>
+<th align="left" valign="top"> Description</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+<td align="left" valign="top"><p class="table">Version</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+Memory Clock Table Version (0x11)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Header Size</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+Size of Memory Clock Table Header in bytes (26)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Base Entry Size</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+Size of Memory Clock Table Base Entry in bytes (20)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Strap Entry Size</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+Size of Memory Clock Table Strap Entry in bytes (26)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Strap Entry Count</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+Number of Memory Clock Table Strap Entries per Memory Clock Table Entry
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Entry Count</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+Number of Memory Clock Table Entries (combined Base Entry plus Strap Entry Count of Strap Entries)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Reserved</p></td>
+<td align="center" valign="top"><p class="table">160</p></td>
+<td align="left" valign="top"><div></div></td>
+</tr>
+</tbody>
+</table>
+</div>
+<h3 id="_memory_clock_table_base_entry">Memory Clock Table Base Entry</h3><div style="clear:left"></div>
+<div class="paragraph"><p>Each entry is made up of a single Base Entry and multiple Strap Entries. The entire size of an entry is given by ( MemoryClockTableHeader.BaseEntrySize + MemoryClockTableHeader.StrapEntrySize × MemoryClockTableHeader.StrapEntryCount ). Each entry provides information needed for operating the memory at a frequency between MemoryClockTableBaseEntry.Minimum.Frequency and MemoryClockTableBaseEntry.Maximum.Frequency, inclusively.</p></div>
+<div class="tableblock">
+<table rules="all"
+width="100%"
+frame="border"
+cellspacing="0" cellpadding="4">
+<col width="22%" />
+<col width="11%" />
+<col width="66%" />
+<thead>
+<tr>
+<th align="left" valign="top"> FieldName </th>
+<th align="center" valign="top"> Size (in bits) </th>
+<th align="left" valign="top"> Description</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+<td align="left" valign="top"><p class="table">Min Frequency</p></td>
+<td align="center" valign="top"><p class="table">16</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[15:14] = Reserved
+</dt>
+<dt class="hdlist1">
+[13:0] = Frequency (MHz)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Max Frequency</p></td>
+<td align="center" valign="top"><p class="table">16</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[15:14] = Reserved
+</dt>
+<dt class="hdlist1">
+[13:0] = Frequency(MHz)
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Reserved</p></td>
+<td align="center" valign="top"><p class="table">40</p></td>
+<td align="left" valign="top"><div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Read/Write Config0</p></td>
+<td align="center" valign="top"><p class="table">32</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[8:0] = Read Setting0
+</dt>
+<dt class="hdlist1">
+[17:9] = Write Settings0
+</dt>
+<dt class="hdlist1">
+[19:18] = Reserved
+</dt>
+<dt class="hdlist1">
+[24:20] = ReadSettings1
+</dt>
+<dt class="hdlist1">
+[31:25] = Reserved
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Read/Write Config1</p></td>
+<td align="center" valign="top"><p class="table">32</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[3:0] = Read Settings0
+</dt>
+<dt class="hdlist1">
+[7:4] = Write Settings0
+</dt>
+<dt class="hdlist1">
+[11:8] = Read Settings1
+</dt>
+<dt class="hdlist1">
+[15:12] = Write Settings1
+</dt>
+<dt class="hdlist1">
+[19:16] = Read Settings2
+</dt>
+<dt class="hdlist1">
+[23:20] = Write Settings2
+</dt>
+<dt class="hdlist1">
+[31:24] = Timing Settings0
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Reserved</p></td>
+<td align="center" valign="top"><p class="table">24</p></td>
+<td align="left" valign="top"><div></div></td>
+</tr>
+</tbody>
+</table>
+</div>
+<h3 id="_memory_clock_table_strap_entry">Memory Clock Table Strap Entry</h3><div style="clear:left"></div>
+<div class="tableblock">
+<table rules="all"
+width="100%"
+frame="border"
+cellspacing="0" cellpadding="4">
+<col width="22%" />
+<col width="11%" />
+<col width="66%" />
+<thead>
+<tr>
+<th align="left" valign="top"> FieldName </th>
+<th align="center" valign="top"> Size (in bits) </th>
+<th align="left" valign="top"> Description</th>
+</tr>
+</thead>
+<tbody>
+<tr>
+<td align="left" valign="top"><p class="table">MemTweak Index</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[7:0] MemTweak Index
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Flags0</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[6:0] = Reserved
+</dt>
+<dt class="hdlist1">
+[7:7] = Alignment Mode
+</dt>
+<dd>
+<p>
+ 0x0 = Phase detector (Default)<br />
+ 0x1 = Pin
+</p>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Reserved</p></td>
+<td align="center" valign="top"><p class="table">48</p></td>
+<td align="left" valign="top"><div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Flags4</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[6:0] = Reserved
+</dt>
+<dt class="hdlist1">
+[7:7] = MRS7 GDDR5
+</dt>
+<dd>
+<p>
+ 0x0 = Disable (Default)<br />
+ 0x1 = Enable
+</p>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Reserved</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Flags5</p></td>
+<td align="center" valign="top"><p class="table">8</p></td>
+<td align="left" valign="top"><div><div class="dlist"><dl>
+<dt class="hdlist1">
+[5:0] = Reserved
+</dt>
+<dt class="hdlist1">
+[6:6] = GDDR5x Internal VrefC
+</dt>
+<dd>
+<p>
+ 0x0 = Disable (Default) (70% VrefC)<br />
+ 0x1 = Enable (50% VrefC)
+</p>
+</dd>
+<dt class="hdlist1">
+[7:7] = Reserved
+</dt>
+<dd>
+</dd>
+</dl></div></div></td>
+</tr>
+<tr>
+<td align="left" valign="top"><p class="table">Reserved</p></td>
+<td align="center" valign="top"><p class="table">120</p></td>
+<td align="left" valign="top"><div></div></td>
+</tr>
+</tbody>
+</table>
+</div>
+</div>
+<div id="footer">
+<div id="footer-text">
+Last updated 2018-01-26 11:44:35 PDT
+</div>
+</div>
+</body>
+</html>
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