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authorIru Cai <mytbk920423@gmail.com>2019-10-30 15:42:15 +0800
committerIru Cai <mytbk920423@gmail.com>2019-10-30 15:42:15 +0800
commit1a691f101632955a994a0198fc5498b108e97fbc (patch)
tree04903c08c0d9f60460451188d026cf50bee1651b /include/configs/aspenite.h
parent08dd4564b1f5c3258caf6bfc4bdc77ead1b042d6 (diff)
downloaduext4-1a691f101632955a994a0198fc5498b108e97fbc.tar.xz
rm include/configs
Diffstat (limited to 'include/configs/aspenite.h')
-rw-r--r--include/configs/aspenite.h40
1 files changed, 0 insertions, 40 deletions
diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
deleted file mode 100644
index 79bf8f2..0000000
--- a/include/configs/aspenite.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2010
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- * Contributor: Mahavir Jain <mjain@marvell.com>
- */
-
-#ifndef __CONFIG_ASPENITE_H
-#define __CONFIG_ASPENITE_H
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */
-#define CONFIG_ARMADA100 1 /* SOC Family Name */
-#define CONFIG_ARMADA168 1 /* SOC Used on this Board */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
-/*
- * There is no internal RAM in ARMADA100, using DRAM
- * TBD: dcache to be used for this
- */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000)
-
-/*
- * Commands configuration
- */
-/*
- * mv-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
-#include "mv-common.h"
-
-/*
- * Environment variables configurations
- */
-#define CONFIG_ENV_SIZE 0x20000 /* 64k */
-
-#endif /* __CONFIG_ASPENITE_H */