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Diffstat (limited to 'include/configs/ls1046afrwy.h')
-rw-r--r--include/configs/ls1046afrwy.h139
1 files changed, 0 insertions, 139 deletions
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
deleted file mode 100644
index 8609ebf..0000000
--- a/include/configs/ls1046afrwy.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2019 NXP
- */
-
-#ifndef __LS1046AFRWY_H__
-#define __LS1046AFRWY_H__
-
-#include "ls1046a_common.h"
-
-#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
-
-#define CONFIG_LAYERSCAPE_NS_ACCESS
-
-#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-
-#define CONFIG_SYS_UBOOT_BASE 0x40100000
-
-/* IFC */
-#define CONFIG_FSL_IFC
-/*
- * NAND Flash Definitions
- */
-#define CONFIG_NAND_FSL_IFC
-
-#define CONFIG_SYS_NAND_BASE 0x7e800000
-#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
-
-#define CONFIG_SYS_NAND_CSPR_EXT (0x0)
-#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
- | CSPR_PORT_SIZE_8 \
- | CSPR_MSEL_NAND \
- | CSPR_V)
-#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024)
-#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
- | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
- | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
- | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \
- | CSOR_NAND_PGS_2K /* Page Size = 2K */ \
- | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \
- | CSOR_NAND_PB(64)) /* 64 Pages Per Block */
-
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-
-#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \
- FTIM0_NAND_TWP(0x18) | \
- FTIM0_NAND_TWCHT(0x7) | \
- FTIM0_NAND_TWH(0xa))
-#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \
- FTIM1_NAND_TWBE(0x39) | \
- FTIM1_NAND_TRR(0xe) | \
- FTIM1_NAND_TRP(0x18))
-#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \
- FTIM2_NAND_TREH(0xa) | \
- FTIM2_NAND_TWHRE(0x1e))
-#define CONFIG_SYS_NAND_FTIM3 0x0
-
-#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-
-/* IFC Timing Params */
-#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
-#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
-#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
-#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR
-#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0
-#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1
-#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2
-#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
-
-/* EEPROM */
-#define CONFIG_ID_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#define I2C_RETIMER_ADDR 0x18
-
-/* I2C bus multiplexer */
-#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
-#define I2C_MUX_CH_DEFAULT 0x1 /* Channel 0*/
-#define I2C_MUX_CH_RTC 0x1 /* Channel 0*/
-
-/* RTC */
-#define RTC
-#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 0 I2C bus 0*/
-#define CONFIG_SYS_RTC_BUS_NUM 0
-
-/*
- * Environment
- */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_SYS_MMC_ENV_DEV 0
-
-#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
-#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
-#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FSL_QSPI_BASE + \
- CONFIG_ENV_OFFSET)
-
-/* FMan */
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
-
-#define QSGMII_PORT1_PHY_ADDR 0x1c
-#define QSGMII_PORT2_PHY_ADDR 0x1d
-#define QSGMII_PORT3_PHY_ADDR 0x1e
-#define QSGMII_PORT4_PHY_ADDR 0x1f
-
-#define FDT_SEQ_MACADDR_FROM_ENV
-
-#define CONFIG_ETHPRIME "FM1@DTSEC3"
-
-#endif
-
-/* QSPI device */
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE SZ_64M
-#define FSL_QSPI_FLASH_NUM 1
-#endif
-
-#undef CONFIG_BOOTCOMMAND
-#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
- "env exists secureboot && esbc_halt;;"
-#define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \
- "env exists secureboot && esbc_halt;"
-
-#include <asm/fsl_secure_boot.h>
-
-#endif /* __LS1046AFRWY_H__ */