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Diffstat (limited to 'include/dt-bindings/clock/r8a7792-cpg-mssr.h')
-rw-r--r--include/dt-bindings/clock/r8a7792-cpg-mssr.h39
1 files changed, 0 insertions, 39 deletions
diff --git a/include/dt-bindings/clock/r8a7792-cpg-mssr.h b/include/dt-bindings/clock/r8a7792-cpg-mssr.h
deleted file mode 100644
index 829c44d..0000000
--- a/include/dt-bindings/clock/r8a7792-cpg-mssr.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+
- *
- * Copyright (C) 2015 Renesas Electronics Corp.
- */
-
-#ifndef __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__
-#define __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__
-
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
-
-/* r8a7792 CPG Core Clocks */
-#define R8A7792_CLK_Z 0
-#define R8A7792_CLK_ZG 1
-#define R8A7792_CLK_ZTR 2
-#define R8A7792_CLK_ZTRD2 3
-#define R8A7792_CLK_ZT 4
-#define R8A7792_CLK_ZX 5
-#define R8A7792_CLK_ZS 6
-#define R8A7792_CLK_HP 7
-#define R8A7792_CLK_I 8
-#define R8A7792_CLK_B 9
-#define R8A7792_CLK_LB 10
-#define R8A7792_CLK_P 11
-#define R8A7792_CLK_CL 12
-#define R8A7792_CLK_M2 13
-#define R8A7792_CLK_IMP 14
-#define R8A7792_CLK_ZB3 15
-#define R8A7792_CLK_ZB3D2 16
-#define R8A7792_CLK_DDR 17
-#define R8A7792_CLK_SD 18
-#define R8A7792_CLK_MP 19
-#define R8A7792_CLK_QSPI 20
-#define R8A7792_CLK_CP 21
-#define R8A7792_CLK_CPEX 22
-#define R8A7792_CLK_RCAN 23
-#define R8A7792_CLK_R 24
-#define R8A7792_CLK_OSC 25
-
-#endif /* __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__ */