diff options
author | raywu <raywu@aaeon.com> | 2018-06-15 10:48:05 +0800 |
---|---|---|
committer | raywu <raywu@aaeon.com> | 2018-06-15 10:48:05 +0800 |
commit | a2303a031a4a69b505a704b6e716a81c8e70cb21 (patch) | |
tree | 0c972eb763d109968cba6e4e5c88d16bb4347640 /Board/IO/F81216 | |
parent | 72754fac5c1d3154722de813afe19015d21fa34a (diff) | |
download | zprj-a2303a031a4a69b505a704b6e716a81c8e70cb21.tar.xz |
Add Modules
1 > 4.6.3.5_SIO_F81866_A5
2 > 4.6.3_SIO_F81216_Sec_A9
Diffstat (limited to 'Board/IO/F81216')
-rw-r--r-- | Board/IO/F81216/ACPI/DeviceASL.cif | 11 | ||||
-rw-r--r-- | Board/IO/F81216/ACPI/Uart1.ASL | 123 | ||||
-rw-r--r-- | Board/IO/F81216/ACPI/Uart2.ASL | 117 | ||||
-rw-r--r-- | Board/IO/F81216/ACPI/Uart3.ASL | 101 | ||||
-rw-r--r-- | Board/IO/F81216/ACPI/Uart4.ASL | 101 | ||||
-rw-r--r-- | Board/IO/F81216/BSP/BSP.cif | 10 | ||||
-rw-r--r-- | Board/IO/F81216/BSP/DxeIoTable.h | 122 | ||||
-rw-r--r-- | Board/IO/F81216/BSP/OemIoDecode.c | 186 | ||||
-rw-r--r-- | Board/IO/F81216/BSP/PeiIoTable.h | 219 | ||||
-rw-r--r-- | Board/IO/F81216/F81216.ASL | 505 | ||||
-rw-r--r-- | Board/IO/F81216/F81216.CIF | 20 | ||||
-rw-r--r-- | Board/IO/F81216/F81216.MAK | 92 | ||||
-rw-r--r-- | Board/IO/F81216/F81216.SD | 388 | ||||
-rw-r--r-- | Board/IO/F81216/F81216.UNI | bin | 0 -> 12638 bytes | |||
-rw-r--r-- | Board/IO/F81216/F81216DXE.C | 546 | ||||
-rw-r--r-- | Board/IO/F81216/F81216PEI.C | 200 | ||||
-rw-r--r-- | Board/IO/F81216/F81216SEC.chm | bin | 0 -> 177458 bytes | |||
-rw-r--r-- | Board/IO/F81216/F81216Setup.H | 173 | ||||
-rw-r--r-- | Board/IO/F81216/History.txt | 76 | ||||
-rw-r--r-- | Board/IO/F81216/IO_F81216.SDL | 479 |
20 files changed, 3469 insertions, 0 deletions
diff --git a/Board/IO/F81216/ACPI/DeviceASL.cif b/Board/IO/F81216/ACPI/DeviceASL.cif new file mode 100644 index 0000000..3d68f5f --- /dev/null +++ b/Board/IO/F81216/ACPI/DeviceASL.cif @@ -0,0 +1,11 @@ +<component> + name = "F81216 Device ASL Files" + category = ModulePart + LocalRoot = "Board\IO\F81216\ACPI\" + RefName = "F81216ASLFiles" +[files] +"Uart3.ASL" +"Uart4.ASL" +"Uart2.ASL" +"Uart1.ASL" +<endComponent> diff --git a/Board/IO/F81216/ACPI/Uart1.ASL b/Board/IO/F81216/ACPI/Uart1.ASL new file mode 100644 index 0000000..375847e --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart1.ASL @@ -0,0 +1,123 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart1.ASL 3 7/18/12 9:29p Elviscai $ +// +// $Revision: 3 $ +// +// $Date: 7/18/12 9:29p $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart1.ASL $ +// +// 3 7/18/12 9:29p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Change _HID judgement if IR mode +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 1 10/28/10 2:32a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART1 // +// Category # :0x11 +Device(UR11) { +// Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x11) //Generic ID for COMC + + Method(_HID, 0) {Return(^^SIO2.UHID(0x11))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x11))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x11, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x11, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x11)} //Set UART recources +//----------------------------------------------------------------------- +// UART1 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + + +/* +//---------Power Resources for UART1 ------------------------- + PowerResource(URP1, 0, 0) { //SystemLevel Parameter=0, + //which means UART can be turned off + //in any sleep state + Method(_STA, 0) { + Return(URAP) //Get Power Status + } //end of _STA + Method(_ON) { + Store(1, URAP) //Power on + } //end of _ON + Method(_OFF){ + Store(0, URAP) //Power off + } //end of _OFF + } + Name(_PR0, Package(){URP1}) //Reference to PowerResources +*/ +} // End Of UAR1 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/ACPI/Uart2.ASL b/Board/IO/F81216/ACPI/Uart2.ASL new file mode 100644 index 0000000..64118d3 --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart2.ASL @@ -0,0 +1,117 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart2.ASL 2 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 2 $ +// +// $Date: 7/04/11 3:23a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart2.ASL $ +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 1 10/28/10 2:32a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART2 // +// Category # :0x12 +Device(UR12) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x12) + //Generic ID for COMD +// Method(_HID, 0) {Return(^^SIO2.UHID(0x12))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x12))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x12, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x12, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x12)} //Set UART recources + +//----------------------------------------------------------------------- +// UART2 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) +/* +//---------Power Resources for UART2 ------------------------- + PowerResource(URP2, 0, 0) { //SystemLevel Parameter=0, + //which means UART can be turned off + //in any sleep state + Method(_STA, 0) { + Return(URBP) //Get Power Status + } //end of _STA + Method(_ON) { + Store(1, URBP) //Power on + } //end of _ON + Method(_OFF){ + Store(0, URBP) //Power off + } //end of _OFF + } + Name(_PR0, Package(){URP2}) //Reference to PowerResources +*/ +} // End Of UAR2 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/ACPI/Uart3.ASL b/Board/IO/F81216/ACPI/Uart3.ASL new file mode 100644 index 0000000..aca730c --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart3.ASL @@ -0,0 +1,101 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart3.ASL 3 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:23a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart3.ASL $ +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 2 10/28/10 2:33a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART3 // +// Category # :0x13 +Device(UR13) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x13) + +// Method(_HID, 0) {Return(^^SIO2.UHID(0x13))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x13))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x13, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x13, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x13)} //Set UART recources + +//----------------------------------------------------------------------- +// UART3 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR3 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/ACPI/Uart4.ASL b/Board/IO/F81216/ACPI/Uart4.ASL new file mode 100644 index 0000000..3d3d34a --- /dev/null +++ b/Board/IO/F81216/ACPI/Uart4.ASL @@ -0,0 +1,101 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart4.ASL 3 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:23a $ +//**********************************************************************; +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Device ASL Files/Uart4.ASL $ +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] Uart3.ASL +// Uart4.ASL +// Uart2.ASL +// Uart1.ASL +// DeviceASL.cif +// +// 2 10/28/10 2:33a Mikes +// Implement new name rule +// +// 1 3/31/10 5:56a Fantasylai +//**********************************************************************; +// UART4 // +// Category # :0x14 +Device(UR14) { + Name(_HID, EISAID("PNP0501")) //PnP Device ID 16550 Type + Name(_UID, 0x14) //Generic ID for COMD + +// Method(_HID, 0) {Return(^^SIO2.UHID(0x14))} //PnP Device ID + Method(_STA, 0) {Return(^^SIO2.DSTA(0x14))} //Get UART status + Method(_DIS, 0) {^^SIO2.DCNT(0x14, 0)} //Disable UART + //Default is share mode + Method(_CRS, 0) {Return(^^SIO2.DCR3(0x14, 0))} //Get UART current resources + Method(_SRS, 1) {^^SIO2.DSR3(Arg0, 0x14)} //Set UART recources + +//----------------------------------------------------------------------- +// UART4 Possible Resources +//----------------------------------------------------------------------- +//NOTE: _PRS MUST be the NAME not a METHOD object +//to have GENERICSIO.C working right! +//----------------------------------------------------------------------- + Name(_PRS, ResourceTemplate() { + StartDependentFn(0, 0) { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {11} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x260, 0x260, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x268, 0x268, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x270, 0x270, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + StartDependentFnNoPri() { + IO(Decode16, 0x278, 0x278, 1, 8) + IRQ(Level,ActiveLow,Shared) {10,11,12} + DMA(Compatibility, NotBusMaster, Transfer8) {} + } + EndDependentFn() + }) + +} // End Of UAR4 +//----------------------------------------------------------------------- + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/BSP/BSP.cif b/Board/IO/F81216/BSP/BSP.cif new file mode 100644 index 0000000..b21d947 --- /dev/null +++ b/Board/IO/F81216/BSP/BSP.cif @@ -0,0 +1,10 @@ +<component> + name = "F81216 Board" + category = ModulePart + LocalRoot = "Board\IO\F81216\BSP\" + RefName = "F81216Board" +[files] +"OemIoDecode.c" +"PeiIoTable.h" +"DxeIoTable.h" +<endComponent> diff --git a/Board/IO/F81216/BSP/DxeIoTable.h b/Board/IO/F81216/BSP/DxeIoTable.h new file mode 100644 index 0000000..abc4c8b --- /dev/null +++ b/Board/IO/F81216/BSP/DxeIoTable.h @@ -0,0 +1,122 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/DxeIoTable.h 2 7/04/11 3:23a Kasalinyi $ +// +// $Revision: 2 $ +// +// $Date: 7/04/11 3:23a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/DxeIoTable.h $ +// +// 2 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// BSP.cif +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO + +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: DxeIoTable.H +// +// Description: +// SIO init table in DXE phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// In all tables, only fill with necessary setting. Don't fill with default +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _DXEIoTable_H +#define _DXEIoTable_H +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _DXE_DEVICE_INIT_DATA{ + UINT16 Reg16; + UINT8 AndData8; // 0xFF means register don't need AndMask + // only write OrData8 to regisrer. + UINT8 OrData8; +} DXE_DEVICE_INIT_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( +// IN void *LpcPciIo, + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: DXE_XXX_Init_Table +// +// Description: +// Table filled with SIO GPIO,PME,HWM, etc. logical devices' setting +// For example: +// 1. GPIO will define the GPIO pin useage +// 2. PME will power management control +// 3. HWM will set temperature, fan, voltage and start control. +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_DXEIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + + + + diff --git a/Board/IO/F81216/BSP/OemIoDecode.c b/Board/IO/F81216/BSP/OemIoDecode.c new file mode 100644 index 0000000..25e008e --- /dev/null +++ b/Board/IO/F81216/BSP/OemIoDecode.c @@ -0,0 +1,186 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/OemIoDecode.c 1 3/31/10 5:56a Fantasylai $ +// +// $Revision: 1 $ +// +// $Date: 3/31/10 5:56a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/OemIoDecode.c $ +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <OemIoDecode.C> +// +// Description: If can't decode IO usually. Change other IoDecode mode in file. +// +// Note: +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// This sample is not for any chipset, it bases on a chipset. For any indivadual +// projects, should re-program the IO decode policy. +// !!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!!Attention!!!!!!!!!!! +// +//<AMI_FHDR_END> +//************************************************************************* +#include <Efi.h> +#include <Token.h> +#include <Protocol\PciIo.h> +#include <Protocol\AmiSio.h> + +#if(IODECODETYPE) +//<AMI_PHDR_START> +//---------------------------------------------------------------------- +// Procedure: OEM_F81216_LPCDeviceDecoding +// +// Description: This function goes through the elinked list of identify +// functions giving control when the token "IODECODETYPE == 1". +// +// Input: Base - I/O base address, Base=0 means disable the decode of the device +// DevUid - The device Unique ID +// If type is 0xFF, DevUid contain the IO length +// +// Output: EFI_STATUS +// EFI_SUCCESS - Set successfully. +// EFI_INVALID_PARAMETER - the Input parameter is invalid. +// +// Note: +// Input paramete is a multi-paramete. If type is 0xFF, DevUid contain the IO length +// +//---------------------------------------------------------------------- +//<AMI_PHDR_END> +EFI_STATUS OEM_F81216_LPCDeviceDecoding( + IN EFI_PCI_IO_PROTOCOL *LpcPciIo, + IN UINT16 Base, + IN UINT8 DevUid +) +{//Chipset porting should provide the Io Ranage decode function. + //If chipset porting provide this function, set IODECODETYPE = 0. + //If chipset porting doesn't provide this function, you can use a eLink to replace OEM_F81216_LPCDeviceDecoding() + //In file of IoDecodeSample.c, there is a example code to decode IO Range. You can eLink your code with CORE_DXEBin object. + //------------------------------------- + EFI_STATUS Status=EFI_SUCCESS; + +/* + EFI_STATUS Status; + ICH_LPC_IO_DECODE_REG dr; //IchDecode Register + BOOLEAN a; +//--------------------------------------------------------- + //Read what currently have there... + Status = LpcPciIo->Pci.Read(LpcPciIo, EfiPciIoWidthUint16, + ICH_LPC_IO_DECODE_OFFSET, 1, &dr.IO_DECODE_REG); + if (EFI_ERROR(Status)) return Status; + a = TRUE; + //Check all possible BAse Addresses + switch(Base){ + //LPT Address range + case 0x378 : + dr.LptDecode = 0; + break; + case 0x278 : + dr.LptDecode=1; + break; + case 0x3bc : + dr.LptDecode=2; + break; + //FDC Address range + case 0x3f0 : + dr.FdcDecode = 0; + break; + case 0x370 : + dr.FdcDecode = 1; + break; + //COM Port Address range + case 0x3f8 : + if (DevUid) + dr.ComBDecode=0; + else + dr.ComADecode=0; + break; + case 0x2f8 : + if (DevUid) + dr.ComBDecode=1; + else + dr.ComADecode=1; + break; + case 0x220 : + if (DevUid) + dr.ComBDecode=2; + else + dr.ComADecode=2; + break; + case 0x228 : + if (DevUid) + dr.ComBDecode=3; + else + dr.ComADecode=3; + break; + case 0x238 : + if (DevUid) + dr.ComBDecode=4; + else + dr.ComADecode=4; + break; + + case 0x2E8 : + if (DevUid) + dr.ComBDecode=5; + else + dr.ComADecode=5; + break; + case 0x338 : + if (DevUid) + dr.ComBDecode=6; + else + dr.ComADecode=6; + break; + case 0x3e8 : + if (DevUid) + dr.ComBDecode=7; + else + dr.ComADecode=7; + break; + + default : + a = FALSE; + } + //Use Provided LPC Bridge PCI IO to write data back + if (a) Status=LpcPciIo->Pci.Write(LpcPciIo, EfiPciIoWidthUint16, + ICH_LPC_IO_DECODE_OFFSET, 1, &dr.IO_DECODE_REG); +*/ + + return Status; +} +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Board/IO/F81216/BSP/PeiIoTable.h b/Board/IO/F81216/BSP/PeiIoTable.h new file mode 100644 index 0000000..6ff6e85 --- /dev/null +++ b/Board/IO/F81216/BSP/PeiIoTable.h @@ -0,0 +1,219 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/PeiIoTable.h 4 1/19/12 3:07a Elviscai $ +// +// $Revision: 4 $ +// +// $Date: 1/19/12 3:07a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216 Board/PeiIoTable.h $ +// +// 4 1/19/12 3:07a Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Severity] Important +// [Symptom] Base 0x200 generic IO decode fail +// [RootCause] 1ST IO OemIoDecode will take 0x200 as GamePort +// [Solution] Change Com port IoDecodeBase from 0x200 to 0x240. +// +// 3 7/04/11 3:23a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] OemIoDecode.c +// PeiIoTable.h +// DxeIoTable.h +// BSP.cif +// +// 2 10/28/10 2:34a Mikes +// Change configure key with a token +// +// 1 3/31/10 5:56a Fantasylai +// Initial release to F81216 just as a second IO + +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: PeiIoTable.H +// +// Description: +// SIO init table in PEI phase. Any customers have to review below tables +// for themselves platform and make sure each initialization is necessary. +// +// Notes: +// +//<AMI_FHDR_END> +//************************************************************************* +#ifndef _PEIIoTable_H +#define _PEIIoTable_H +#ifdef __cplusplus +extern "C" { +#endif + +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +typedef struct _IO_DECODE_DATA{ + UINT16 BaseAdd; + //!!!Attention!!!If type is 0xFF, UID is a IO legth + UINT8 UID; + SIO_DEV_TYPE Type; +} IO_DECODE_DATA; + +typedef struct _SIO_DATA{ + UINT16 Addr; + //AND mask value, 0xFF means register don't need AndMask and + //only write OrData8 to regisrer. + UINT8 DataMask; + //OR mask value. + UINT8 DataValue; +} SIO_DATA; + +// SIO DECODE list creation code must be in this order +typedef EFI_STATUS (IO_RANGE_DECODE)( + IN void *LpcPciIo, + IN UINT16 DevBase, + IN UINT8 UID, + IN SIO_DEV_TYPE Type +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_Decode_Table +// +// Description: +// Table filled with SIO IO resource to decode. It is used +// for PEI IO Decode function. For example: +// 1. Decode Index/data port +// 2. Decode KBC,FDC IO for recovery +// 3. Decode COM port for debug +// 4. Decode total IO base for runtime, pme, acpi, etc... +// 5. Decode more com ports wirh "generic IO range decode" +// +// Notes: +// Attention! Cann't open 3F6(it was used by IDE controller.) +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +IO_DECODE_DATA F81216SEC_Decode_Table[]={ + // ----------------------------- + //| BaseAdd | UID | Type | + // ----------------------------- + {F81216SEC_CONFIG_INDEX, 2, 0xFF}, + + // !!!!Attention!!!!This is necessary + //OEM_TODO//OEM_TODO//OEM_TODO//OEM_TODO + {0x240, 0x40, 0xFF}, // 0x200~0x27f , open a IODecode section for UART1,2,3,4 + // Add more OEM IO decode below. +}; + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_PEI_Init_Table +// +// Description: Table filled with SIO logical devices' register value. +// Only do the necessary initialization. For example: +// 1. Program clock and multi-pin setting in global registers +// 2. Program KBC,FDC IO for recovery +// 3. Program COM port for debug +// +// Notes: +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +SIO_DATA F81216SEC_PEI_Init_Table[] = { + // ----------------------------- + //| Addr | DataMask | DataValue | + // ----------------------------- + + //--------------------------------------------------------------------- + // Enter Configuration Mode. + //--------------------------------------------------------------------- + //AMI_TODO: + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_CONFIG_MODE_ENTER_VALUE}, + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_CONFIG_MODE_ENTER_VALUE}, + //--------------------------------------------------------------------- + // Before init all logical devices, program Global register if needed. + //--------------------------------------------------------------------- + // Program clock setting in global registers + // Bit0: 0/1 for CLKIN is 48Mhz/24MHz . + {F81216SEC_CONFIG_INDEX, 0xFF, 0x25}, + {F81216SEC_CONFIG_DATA, 0xFE, 0x00 | F81216SEC_CLOCK}, + + //--------------------------------------------------------------------- + // Initialize the Serial Port for debug useage. Default is COMA + //--------------------------------------------------------------------- + //if first io have no comport debug,open it +/* + #if defined(EFI_DEBUG) || (defined(Recovery_SUPPORT) && (SERIAL_RECOVERY_SUPPORT)) + #if (F81216SEC_SERIAL_PORT0_PRESENT) + // Select device + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_LDN_SEL_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, F81216SEC_LDN_UART0}, + // Program Base Addr + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_BASE1_LO_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF ,0x60}, + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_BASE1_HI_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, 0x02}, + // Activate Device + {F81216SEC_CONFIG_INDEX, 0xFF, F81216SEC_ACTIVATE_REGISTER}, + {F81216SEC_CONFIG_DATA, 0xFF, F81216SEC_ACTIVATE_VALUE}, + #endif // F81216SEC_SERIAL_PORT1_PRESENT + #endif // #ifdef EFI_DEBUG +*/ + //--------------------------------------------------------------------- + // Disable non-used devices + //--------------------------------------------------------------------- + +//-------------------------------------------------------------------------- +// After init all logical devices, program Global register if needed. +//-------------------------------------------------------------------------- +//-------------------------------------------------------------------------- +// After init all logical devices, Exit Configuration Mode. +//-------------------------------------------------------------------------- + {F81216SEC_CONFIG_INDEX, 0xFF, 0xAA}, + +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif //_PEIIoTable_H +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216.ASL b/Board/IO/F81216/F81216.ASL new file mode 100644 index 0000000..ebc950f --- /dev/null +++ b/Board/IO/F81216/F81216.ASL @@ -0,0 +1,505 @@ +// THIS FILE IS INCLUDED to South Bridge device scope +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.ASL 6 4/01/13 3:15a Elviscai $ +// +// $Revision: 6 $ +// +// $Date: 4/01/13 3:15a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.ASL $ +// +// 6 4/01/13 3:15a Elviscai +// [TAG] EIP115780 +// [Category] Bug Fix +// [Symptom] Burn in test faile while dual IO using same idex/data port +// [RootCause] Method DSTA retrned before exit config mode. +// +// 5 7/18/12 9:31p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Change UHID judgement if IR mode +// +// 4 2/01/12 10:46p Elviscai +// [TAG] EIP76584 +// [Category] Bug Fix +// [Severity] Important +// [Symptom] BIT test fail under OS +// [Solution] Update DSR3 Method +// +// 3 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 2 10/28/10 2:25a Mikes +// Clean code and implement new name rule +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* + +//<AMI_FHDR_START> +// +// Name: <F81216.ASL> +// +// Description: Define ACPI method or namespce For Super IO +// +//<AMI_FHDR_END> +//************************************************************************* +//Scope(\_SB.PCI0.SBRG) { +//----------------------------------------------------------------------- +// SET OF COMMON DATA/CONTROL METHODS USED FOR ALL LDN BASED SIO DEVICES +//----------------------------------------------------------------------- +// LIST of objects defined in this file: +// SIO specific: SIOR - Device node (_HID=0c02, UID=SPIO), SIO index/DAta IO access & SIO GPIO address space if available +// SIO specific: DCAT - Table correspondence the LDNs to Device order in Routing Table. +// SIO specific: ENFG & EXFG - Control methods to Enter and Exit configuration mode. ENFG & EXFG correspondingly +// SIO specific: LPTM - current parralel port mode +// SIO specific: UHID - PnP ID for given Serial port +// SIO specific: SIOS - SIO Chipset specific code called from _PTS +// SIO specific: SIOW - SIO Chipset specific code called from _WAK +// SIO specific: SIOH - SIO event handler, to be called from correspondent _Lxx method +// SIO specific: PowerResources & _PR0 object to control Power management for FDC, LPT, UART1,2. +// +// Generic :OpRegion & common Fields to access SIO configuration space +// Generic :CGLD - Convert Device category to LDN +// Generic :DSTA - Get device status according to ACTR register in LD IO space +// Generic :DCNT - Enable/Disable Decoding of Device resources, Route/Release resources to LPC bus +// Generic :DCRS - Returns Byte stream of device's Current resources +// Generic :DSRS - Configures new Resources to be decoded by a Device +// Device node:Motherboard resources +// SIO index/DAta IO access & SIO GPIO address space if available +Device(SIO2) { + Name(_HID, EISAID("PNP0C02")) // System board resources device node ID + Name(_UID,0x222) // Unique ID. First IO use 0x111, Second IO use 0x222 ... + + Name(CRS, ResourceTemplate(){ + IO(Decode16, 0, 0, 0, 0, IOI) // Index/Data Io address + }) // end CRS + + Method (_CRS, 0){ + // Reserve Super I/O Configuration Port + // 0x0 to 0xF0 already reserved + // 0x3F0 - 0x3F1 are reserved in FDC + If(LAnd(LLess(SP2O, 0x3F0), LGreater(SP2O, 0x0F0))){ + CreateWordField(CRS, ^IOI._MIN, GPI0) + CreateWordField(CRS, ^IOI._MAX, GPI1) + CreateByteField(CRS, ^IOI._LEN, GPIL) + Store(SP2O, GPI0) //Index/Data Base address + Store(SP2O, GPI1) + Store(0x02, GPIL) //IO range + } + Return(CRS) + } //End _CRS + + //--------------------------------------------------------------------- + // Table correspondence the LDNs to Device order in Routing Table + // Device type selection is achieved by picking the value from DCAT Package by Offset = LDN + //---------------------------------------------------------------------- + // Elements in the package contain LDN numbers for each category of devices. + // Default value 0xFF -> no device present. + // Make sure number of elements not less or equal to largest LDN + Name (DCAT, Package(0x15){ + // AMI_TODO: fill the table with the present LDN + // LDN number, 0xFF if device not present + // We keep category 0x00~0x0F as SIO_DEV_STATUS layout in GenericSio.h to Update IOST + 0xFF, // 0x00 - Serial A (SP1) + 0xFF, // 01 - Serial B (SP2) + 0xFF, // 02 - LPT + 0xFF, // 03 - FDD + 0xFF, // 04 - SB16 Audio + 0xFF, // 05 - MIDI + 0xFF, // 06 - MSS Audio + 0xFF, // 07 - AdLib sound (FM synth) + 0xFF, // 08 - Game port #1 + 0xFF, // 09 - Game port #2 + 0xFF, // 0A - KBC 60 & 64 + 0xFF, // 0B - EC 62 & 66 + 0xFF, // 0C - Reserved + 0xFF, // 0D - Reserved + 0xFF, // 0E - PS/2 Mouse + 0xFF, // 0F - Reserved +//----add your other device below,if no,please cut and modify Package number----------// + 0xFF, // 10 - CIR + 0x00, // 11 - Serial A2 + 0x01, // 12 - Serial B2 + 0x02, // 13 - Serial C2 + 0x03, // 14 - Serial D2 + }) + + //--------------------------------------------------------------------- + // Mutex object to sincronize the access to Logical devices + //--------------------------------------------------------------------- + Mutex(MUT0, 0) + + //--------------------------------------------------------------------- + // Enter Config Mode, Select LDN + // Arg0 : Logical Device number + //--------------------------------------------------------------------- + Method(ENFG, 1) { + Acquire(MUT0, 0xFFF) + Store(ENT2, INDX) + Store(ENT2, INDX) + Store(Arg0, LDN) //Select LDN + } + + //--------------------------------------------------------------------- + // Exit Config Mode + //--------------------------------------------------------------------- + Method(EXFG, 0) { + //AMI_TODO: exit config mode + Store(0xAA, INDX) + Release(MUT0) + } + //--------------------------------------------------------------------- + // Return current UART mode PnP ID : 0-plain Serial port, non Zero-IrDa mode + // Arg0 : Device Category # + //--------------------------------------------------------------------- + Method(UHID, 1){ + //AMI_TODO: Return the correct HID base on UART mode (UART/IR) + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + And(OPT1, 0x10, Local0) //Ir mode is active + EXFG() //Exit Config Mode + If (Local0) { //Get Uart mode : 0-Serial port, non-zero - IrDa + Return(EISAID("PNP0510")) //PnP Device ID IrDa + } + Else { + Return(EISAID("PNP0501")) //PnP Device ID 16550 Type + } + } + +//------------------------------------------------------------------------- +// !!! BELOW ARE GENERIC SIO CONTROL METHODS. DO NOT REQUIRE MODIFICATIONS +//------------------------------------------------------------------------- + +//<AMI_THDR_START> +//------------------------------------------------------------------------ +// Name: IOID +// +// Type: OperationRegion +// +// Description: Operation Region to point to SuperIO configuration space +// +// Notes: OpeRegion address is defined by 'SP2O' global name. +// 'SPIO' is a field isnside AML_Exchange data area defined in SDL file. +// +// Referrals: BIOS, AMLDATA +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> + //--------------------------------------------------------------------- + // Set of Field names to be used to access SIO configuration space. + //--------------------------------------------------------------------- + OperationRegion(IOID, // Name of Operation Region for SuperIO device + SystemIO, // Type of address space + SP2O, // Offset to start of region + 2) // Size of region in bytes + // End of Operation Region + Field(IOID, ByteAcc, NoLock,Preserve){ + INDX, 8, // Field named INDX is 8 bit wide + DATA, 8 // Field DATA is 8 bit wide + } + + //--------------------------------------------------------------------- + // Set of Field names to be used to access SIO configuration space. + //--------------------------------------------------------------------- + IndexField(INDX, DATA, ByteAcc, NoLock, Preserve){ + Offset(0x07), + LDN, 8, //Logical Device Number + + Offset(0x25), + SCF5, 8, //Set SCF5 + + Offset(0x30), + ACTR, 8, //Activate register + Offset(0x60), + IOAH, 8, //Base I/O High addr + IOAL, 8, //Base I/O Low addr + IOH2, 8, //Base2 I/O High addr + IOL2, 8, //Base2 I/O Low addr + Offset(0x70), + INTR, 4, //IRQ + INTT, 4, //IRQ type + Offset(0x74), + DMCH, 8, //DMA channel + Offset(0xE0), + RGE0, 8, //Option Register E0 + RGE1, 8, //Option Register E1 + RGE2, 8, //Option Register E2 + RGE3, 8, //Option Register E3 + RGE4, 8, //Option Register E4 + RGE5, 8, //Option Register E5 + RGE6, 8, //Option Register E6 + RGE7, 8, //Option Register E7 + RGE8, 8, //Option Register E8 + RGE9, 8, //Option Register E9 + Offset(0xF0), + OPT0, 8, //Option register 0xF0 + OPT1, 8, //Option register 0xF1 + OPT2, 8, //Option register 0xF2 + OPT3, 8, //Option register 0xF3 + OPT4, 8, //Option register 0xF4 + OPT5, 8, //Option register 0xF5 + OPT6, 8, //Option register 0xF6 + OPT7, 8, //Option register 0xF7 + OPT8, 8, //Option register 0xF8 + OPT9, 8, //Option register 0xF9 + } //End of indexed field + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: CGLD +// Description: Convert Device Category to Device's LDN +// Input: Arg0 : Device category # +// Output: LDN +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(CGLD, 1) { + Return(DeRefOf(Index(DCAT, Arg0))) // Return LDN + } + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSTA +// Description: GET SIO DEVICE STATUS according to ACTR/IOST(category0x00~0x0F) return values +// GET SIO DEVICE STATUS according to ACTR/IOAH+IOAL/IOH2+IOL2(category>0x0F) +// Input: Arg0 : Device category # +// Output: Device Status +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSTA, 1) { + // IO Device presence status is determined during first _STA invocation. + // If "Activate" bit is set during first _STA invocation, IO device + // present status is stored into IOST global variable. + // IOST global variable contains the bit mask of all enabled Io devices. + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + Store(ACTR, Local0) + Or(ShiftLeft(IOAH, 8),IOAL,Local1) + EXFG() //Exit Config Mode + + // LDN's not decoded, Device not present. + If(LEqual(Local0, 0xFF)) {Return(0x0)} + + //Assume register(ACTR) bit0 is "Active" bit. + //AMI_TODO: If register(ACTR) non-bit0 is "Active" bit, change below code. + And(Local0, 1, Local0) //Leave only "Activate" bit + + // Update IO device status in IOST according to the category# + // Note. Once device is detected its status bit cannot be removed + If(Local0){ + Return(0x0F) // Device present & Active + } + Else{ + If(Local1) { Return(0x0D)} // Device Detected & Not Active +// Or(ShiftLeft(IOH2, 8),IOL2,Local0) +// If(Local0) { Return(0x0D)} // Device Detected & Not Active + Return(0x00) // Device not present + } + } // End Of DSTA + + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCNT +// Description: Enable/Disable Decoding of Device resources, Route/Release +// I/O & DMA Resources From, To EIO/LPC Bus +// Input: Arg0 : Device catagory # +// Arg1 : 0/1 Disable/Enable resource decoding +// Output:Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCNT, 2) { + + ENFG(CGLD(Arg0)) //Enter Config Mode, Select LDN + + // Route/Release DMA channel from/to being ISA/PCI mode + // Note. DMA channel 0 is currently not decoded, although it can be + // used on some of SIO chipsets. + If(LAnd(LLess(DMCH,4), LNotEqual(And(DMCH, 3, Local1),0))){ + rDMA(Arg0, Arg1, Increment(Local1)) + } + + Store(Arg1, ACTR) // Update Activate Register + ShiftLeft(IOAH, 8, local1) // Get IO Base address + Or(IOAL, Local1, Local1) + + // Route/Release I/O resources from/to EIO/LPC Bus + // Arg0 Device Category + // Arg1 0/1 Disable/Enable resource decoding + // Arg2 Port to Route/Release + // Arg3 Port SIZE to Route + RRIO(Arg0, Arg1, Local1, 0x08) + + EXFG() // Exit Config Mode + } // End DCNT + +//<AMI_THDR_START> +//------------------------------------------------------------------------ +// Name: CRS1,CRS2,CRS3 +// +// Type: ResourceTemplate +// +// Description: Current Resources Buffer for Generic SIO devices +// +// Notes: Note. DMA channel 0 is currently decoded as reserved, +// although, it can be used on some of SIO chipsets. +// Add DMA0 to _PRS if it is used +// Generic Resourse template for FDC, COMx, LPT and ECP Current Resource Settings +// (to be initialized and returned by _CRS) +//------------------------------------------------------------------------- +//<AMI_THDR_END> + + // CRS buffer without DMA resource + Name(CRS3, ResourceTemplate(){ + IO(Decode16, 0, 0, 1, 0, IO04) + IRQ(Level,ActiveLow,Shared,IRQ3){} + DMA(Compatibility, NotBusMaster, Transfer8, DMA3) {} + }) + CreateWordField(CRS3, IRQ3._INT, IRQT) //IRQ mask 0x9 + CreateByteField(CRS3, 0x0B,IRQS) //IRQ Shared/Active-Low/Edge-Triggered/=0x19 0xB + CreateByteField(CRS3, DMA3._DMA, DMAT) //DMA 0x4 + CreateWordField(CRS3, IO04._MIN, IO41) //Range 1 Min Base Word 0x2 + CreateWordField(CRS3, IO04._MAX, IO42) //Range 1 Max Base Word 0x4 + CreateByteField(CRS3, IO04._LEN, LEN4) //Length 1 0x7 + +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DCR3 +// Description: Get FDC, LPT, ECP, UART, IRDA resources (_CRS) +// Returns Byte stream of Current resources. May contain Resources such: +// 1 IRQ resource +// 1 IO Port +// Input: Arg0 : Device catagory # +// Output: _CRS Resource Buffer +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DCR3, 2) { + + ENFG(CGLD(Arg0)) // Enter Config Mode, Select LDN + + // Write Current Settings into Buffer for 1st IO Descriptor + ShiftLeft(IOAH, 8, IO41) //Get IO Base MSB + Or(IOAL, IO41, IO41) //Get IO Base LSB + Store(IO41, IO42) //Get Max Base Word + Store(0x08, LEN4) + + // Write Current Settings into IRQ descriptor + If(INTR){ + ShiftLeft(1, INTR, IRQT) + // Set IRQ Type:porting according INTT + //AMI_TODO: + If(And(INTT,0x01)){ + Store(0x18, IRQS) // IRQ Type: Active-Low-Level-Triggered,Shared. + } Else { + Store(1, IRQS) // IRQ Type: Active-High-Edge-Triggered,No-Shared(default) + } + }Else{ + Store(0, IRQT) // No IRQ used + } + // Write Current Settings into DMA descriptor + // Note. DMA channel 0 is currently decoded as reserved, + // although, it can be used on some of SIO chipsets. + //If(Or(LGreater(DMCH,3), LEqual(And(DMCH, 3, Local1),0))){ + If(LOr(LGreater(DMCH,3), LEqual(Arg1, 0))){ + Store(0, DMAT) // No DMA + } Else { + And(DMCH, 3, Local1) + ShiftLeft(1, Local1, DMAT) + } + + EXFG() // Exit Config Mode + Return(CRS3) //Return Current Resources + } +//<AMI_PHDR_START> +//------------------------------------------------------------------------ +// Procedure: DSR3 +// Description: Set FDC, LPT, ECP, UART, IRDA resources (_SRS) +// Control method can be used for configuring devices with following resource order: +// 1 IRQ resource +// 1 IO Port +// Input: Arg0 : PnP Resource String to set +// Arg1 : Device catagory # +// Output: Nothing +//------------------------------------------------------------------------- +//<AMI_PHDR_END> + Method(DSR3, 2) { + CreateWordField(Arg0, ^IO04._MIN, IO41) //Range 1 Min Base Word 0x8 + CreateWordField(Arg0, ^IRQ3._INT, IRQT) //IRQ mask 0x1 + CreateByteField(Arg0, 0x0B, IRQS) //IRQ Flag + CreateByteField(Arg0, ^DMA3._DMA, DMAT) //DMA + + ENFG(CGLD(Arg1)) // Enter Config Mode, Select LDN + + // Set Base IO Address + And(IO41,0xff, IOAL) //Set IO Base LSB + ShiftRight(IO41, 0x8, IOAH) //Set IO Base MSB + + // Set IRQ + If(IRQT){ + FindSetRightBit(IRQT, Local0) + Subtract(Local0, 1, INTR) + //Set IRQ flag,AMI_TODO: bit4:_SHR,bit3:_LL,bit0:_HE + Store(0x01, INTT) //some relative share,active-low/high registers + }Else{ + Store(0, INTR) //No IRQ used + } + // Set DMA + If(DMAT){ + FindSetRightBit(DMAT, Local0) + Subtract(Local0, 1, DMCH) + }Else{ + Store(4, DMCH) //No DMA + } + + EXFG() // Exit Config Mode + // Enable ACTR + DCNT(Arg1, 1) // Enable Device (Routing) + Store(Arg1, Local2) + If (LGreater(Local2, 0)){Subtract(Local2, 1, Local2)} + } + +} // End of SIO2 + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + + + + diff --git a/Board/IO/F81216/F81216.CIF b/Board/IO/F81216/F81216.CIF new file mode 100644 index 0000000..c5b6a0d --- /dev/null +++ b/Board/IO/F81216/F81216.CIF @@ -0,0 +1,20 @@ +<component> + name = "Second SuperI/O - F81216" + category = IO + LocalRoot = "Board\IO\F81216" + RefName = "F81216" +[files] +"IO_F81216.SDL" +"F81216.ASL" +"F81216.MAK" +"F81216.SD" +"F81216.UNI" +"F81216DXE.C" +"F81216PEI.C" +"F81216Setup.H" +"History.txt" +"F81216SEC.chm" +[parts] +"F81216ASLFiles" +"F81216Board" +<endComponent> diff --git a/Board/IO/F81216/F81216.MAK b/Board/IO/F81216/F81216.MAK new file mode 100644 index 0000000..d7d2399 --- /dev/null +++ b/Board/IO/F81216/F81216.MAK @@ -0,0 +1,92 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* +# +#************************************************************************* +# $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.MAK 3 7/04/11 3:22a Kasalinyi $ +# +# $Revision: 3 $ +# +# $Date: 7/04/11 3:22a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.MAK $ +# +# 3 7/04/11 3:22a Kasalinyi +# [Category] Improvement +# [Description] Update to new template +# [Files] IO_F81216.SDL +# F81216.ASL +# F81216.MAK +# F81216.SD +# F81216.UNI +# F81216DXE.C +# F81216PEI.C +# F81216Setup.H +# F81216.CIF +# +# 2 10/28/10 2:26a Mikes +# Clean code +# +# 1 3/31/10 5:55a Fantasylai +# Initial release to F81216 just as a second IO +# +#************************************************************************* +#<AMI_FHDR_START> +# +# Name: <F81216.MAK> +# +# Description: Make file to include SIO module in project +# +# +#<AMI_FHDR_END> +#************************************************************************* +{$(F81216_DIR)}.C{$(BUILD_DIR)}.OBJ:: + $(CC) $(CFLAGS) /Fo$(BUILD_DIR)\\ $< + +F81216PEI_OBJ= $(BUILD_DIR)\F81216PEI.OBJ +F81216DXE_OBJ= $(BUILD_DIR)\F81216DXE.OBJ + +$(F81216PEI_OBJ) : $(F81216_DIR)\F81216.MAK $(F81216_DIR)\BSP\PeiIoTable.h +$(F81216DXE_OBJ) : $(F81216_DIR)\F81216.MAK $(F81216_DIR)\BSP\DxeIoTable.h + +CORE_PEIBin : $(F81216PEI_OBJ) $(AMICSPLib) +CORE_DXEBin : $(F81216DXE_OBJ) $(AMICSPLib) + +#--------------------------------------------------------------------------- +# Create SIO Setup Screen +#--------------------------------------------------------------------------- +SetupSdbs : $(BUILD_DIR)\F81216.MAK F81216SDB + +$(BUILD_DIR)\F81216.MAK : $(F81216_DIR)\$(@B).CIF $(F81216_DIR)\$(@B).MAK $(BUILD_RULES) + $(CIF2MAK) $(F81216_DIR)\$(@B).CIF $(CIF2MAK_DEFAULTS) + +F81216SDB : $(BUILD_DIR)\F81216.mak + $(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\ + /f $(BUILD_DIR)\F81216.MAK all\ + TYPE=SDB NAME=F81216 STRING_CONSUMERS=$(F81216_DIR)\F81216.SD + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/Board/IO/F81216/F81216.SD b/Board/IO/F81216/F81216.SD new file mode 100644 index 0000000..1cdeee7 --- /dev/null +++ b/Board/IO/F81216/F81216.SD @@ -0,0 +1,388 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.SD 5 7/04/11 3:22a Kasalinyi $ +// +// $Revision: 5 $ +// +// $Date: 7/04/11 3:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216.SD $ +// +// 5 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 4 10/28/10 2:27a Mikes +// Implement new name rule +// +// 3 9/06/10 3:47a Mikes +// Add MANUFACTURING flag to support manufacture mode +// +// 2 6/02/10 9:42p Fantasylai +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216.SD> +// +// Description: SIO Form Template, Setup screen definition file +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifdef SETUP_DATA_DEFINITION +/***********************************************************/ +/* Put NVRAM data definitions here. +/* For example: UINT8 Data1; +/* These definitions will be converted by the build process +/* to a definitions of SETUP_DATA fields. +/***********************************************************/ +#endif //SETUP_DATA_DEFINITION + +//------------------------------------------------------------------------- +//Select Top level menu itmem (forset) for you pages +//------------------------------------------------------------------------- +#ifdef ADVANCED_FORM_SET + +//------------------------------------------------------------------------- +//If you need any additional type definitions add them here +//------------------------------------------------------------------------- +#ifdef FORM_SET_TYPEDEF + #include "F81216Setup.H" + #include "Token.h" +#endif + +//------------------------------------------------------------------------- +//If you need custom varstore's define them here +//------------------------------------------------------------------------- +#ifdef FORM_SET_VARSTORE + + //Callback varstore control in first io + + #ifdef SETUP_DATA_DEFINITION + AUTO_ID(COMA2_V_DATA_KEY) + AUTO_ID(COMA2_NV_DATA_KEY) + AUTO_ID(COMB2_V_DATA_KEY) + AUTO_ID(COMB2_NV_DATA_KEY) + AUTO_ID(COMC2_V_DATA_KEY) + AUTO_ID(COMC2_NV_DATA_KEY) + AUTO_ID(COMD2_V_DATA_KEY) + AUTO_ID(COMD2_NV_DATA_KEY) + #endif + + #if F81216SEC_SERIAL_PORT0_PRESENT + AMI_SIO_VARSTORE(COMA2, PNP0501_10) + #endif + + #if F81216SEC_SERIAL_PORT1_PRESENT + AMI_SIO_VARSTORE(COMB2, PNP0501_11) + #endif + + #if F81216SEC_SERIAL_PORT2_PRESENT + AMI_SIO_VARSTORE(COMC2, PNP0501_12) + #endif + + #if F81216SEC_SERIAL_PORT3_PRESENT + AMI_SIO_VARSTORE(COMD2, PNP0501_13) + #endif + +#endif + +//------------------------------------------------------------------------- +//Define controls to be added to the top level page of the formset +//------------------------------------------------------------------------- +#ifdef FORM_SET_ITEM +#endif + +//------------------------------------------------------------------------- +//Define goto commands for the forms defined in this file +//------------------------------------------------------------------------- +#ifdef FORM_SET_GOTO + goto F81216SEC_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SIO_FORM), + help = STRING_TOKEN(STR_F81216SEC_SIO_FORM_HELP); + +#endif + +//------------------------------------------------------------------------- +// Define forms +//------------------------------------------------------------------------- +#ifdef FORM_SET_FORM + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SIO formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + form formid = AUTO_ID(F81216SEC_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SIO_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SIO_FORM)) + + SEPARATOR + + text + help = STRING_TOKEN(STR_F81216SEC_SIO_FORM_HELP), + text = STRING_TOKEN(STR_F81216SEC_SIO_PROMPT), + text = STRING_TOKEN(STR_F81216SEC), + flags = 0, + key = 0; + + //Goto Serial 0 Form + #if F81216SEC_SERIAL_PORT0_PRESENT + suppressif ideqval COMA2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL1_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM_HELP); + endif; + #endif + + //Goto Serial 1 Form + #if F81216SEC_SERIAL_PORT1_PRESENT + suppressif ideqval COMB2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL2_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM_HELP); + endif; + #endif + + //Goto Serial 2 Form + #if F81216SEC_SERIAL_PORT2_PRESENT + suppressif ideqval COMC2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL3_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM_HELP); + endif; + #endif + + //Goto Serial 3 Form + #if F81216SEC_SERIAL_PORT3_PRESENT + suppressif ideqval COMD2_V_DATA.DevImplemented == 0x00; + goto F81216SEC_SERIAL4_FORM_ID, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM), + help = STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM_HELP); + endif; + #endif + +endform;//SIO Form + + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP0 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT0_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL1_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL0_FORM)) + + SEPARATOR + + checkbox varid = COMA2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMA2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL0_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMA2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMA2_NV_DATA.DevEnable == 0x00; + oneof varid = COMA2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL0_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMA2Enable == 0x00; + + suppressif ideqval COMA2_NV_DATA.DevEnable == 0x00; + oneof varid = COMA2_NV_DATA.DevMode, + prompt = STRING_TOKEN(STR_SELECT_MODE), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE_HELP), + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE1), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE2), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE3), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE4), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_MODE5), value = 4, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMA2Enable == 0x00; + endform; //Serial 0 Form + #endif + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP1 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT1_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL2_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL1_FORM)) + + SEPARATOR + + checkbox varid = COMB2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMB2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL1_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMB2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMB2_NV_DATA.DevEnable == 0x00; + oneof varid = COMB2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL1_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMB2Enable == 0x00; + + endform; // Serial 1 Form + #endif + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP2 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT2_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL3_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL2_FORM)) + + SEPARATOR + + checkbox varid = COMC2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMC2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL2_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMC2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMC2_NV_DATA.DevEnable == 0x00; + oneof varid = COMC2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL2_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMC2Enable == 0x00; + + endform; // Serial 2 Form + #endif + //////////////////////////////////////////////////////////////////////////////////////////////////////// + /////////////////////////////////////////Define SP3 formset form//////////////////////////////////////// + //////////////////////////////////////////////////////////////////////////////////////////////////////// + #if F81216SEC_SERIAL_PORT3_PRESENT + form formid = AUTO_ID(F81216SEC_SERIAL4_FORM_ID), + title = STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM); + SUBTITLE(STRING_TOKEN(STR_F81216SEC_SERIAL3_FORM)) + + SEPARATOR + + checkbox varid = COMD2_NV_DATA.DevEnable, + prompt = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT), + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + flags = 1 | RESET_REQUIRED, + endcheckbox; + + suppressif ideqval COMD2_NV_DATA.DevEnable == 0x00; + text + help = STRING_TOKEN(STR_F81216SEC_SERIAL_PROMPT_HELP), + text = STRING_TOKEN(STR_CURRENT_CONFIG), + text = STRING_TOKEN(STR_F81216SEC_SERIAL3_CONFIG_VALUE), + flags = 0, + key = 0; + endif; // suppressif SIO_SETUP_VAR.COMD2Enable == 0x00; + + SEPARATOR + + suppressif ideqval COMD2_NV_DATA.DevEnable == 0x00; + oneof varid = COMD2_NV_DATA.DevPrsId, + prompt = STRING_TOKEN(STR_CHANGE_CONFIG), + help = STRING_TOKEN(STR_SETTINGS_HELP), + option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL3_SETTINGS1), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS2), value = 2, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS3), value = 3, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS4), value = 4, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_F81216SEC_SERIAL_SETTINGS5), value = 5, flags = RESET_REQUIRED; + endoneof; + endif; // suppressif SIO_SETUP_VAR.COMD2Enable == 0x00; + + endform; // Serial 3 Form + #endif + +#endif //FORM_SET_FORM + +#endif//ADVANCED_FORM_SET + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216.UNI b/Board/IO/F81216/F81216.UNI Binary files differnew file mode 100644 index 0000000..2df933c --- /dev/null +++ b/Board/IO/F81216/F81216.UNI diff --git a/Board/IO/F81216/F81216DXE.C b/Board/IO/F81216/F81216DXE.C new file mode 100644 index 0000000..e68bb69 --- /dev/null +++ b/Board/IO/F81216/F81216DXE.C @@ -0,0 +1,546 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216DXE.C 5 7/18/12 9:32p Elviscai $ +// +// $Revision: 5 $ +// +// $Date: 7/18/12 9:32p $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216DXE.C $ +// +// 5 7/18/12 9:32p Elviscai +// [TAG] EIPNONE +// [Category] Bug Fix +// [Solution] Correct IR mode register setting in COM_INIT +// +// 4 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 3 10/28/10 2:30a Mikes +// Implement new name rule +// +// 2 9/06/10 3:50a Mikes +// Fix compile issue with first IO module +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216DXE.C> +// +// Description: 1. Port SIO DXE initial table and routine for genericsio.c +// 2. Define enter/exit config mode scrip table +// 3. Define SIO bootscriptable table +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Efi.h> +#include <Token.h> +#include <GenericSIO.h> +#include <Setup.h> +#include <Protocol\AmiSio.h> +#include <Protocol\PciIo.h> +#include <AmiCspLib.h> +#include "BSP\DxeIoTable.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- +#define INITIAL_ROUTINE(name) \ +static EFI_STATUS name(\ + IN AMI_SIO_PROTOCOL *AmiSio,\ + IN EFI_PCI_IO_PROTOCOL *PciIo,\ + IN SIO_INIT_STEP InitStep\ +); + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +extern VOID SioCfgMode(GSPIO *Sio, BOOLEAN Enter); +extern VOID DevSelect(SPIO_DEV *Dev); +extern VOID SioRegister(SPIO_DEV *Dev, BOOLEAN Write, UINT8 Reg, UINT8 *Val); + +extern EFI_STATUS LoopCspIoDecodeListInit( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN AMI_SIO_PROTOCOL *AmiSio ); + +static VOID ClearDevResource( + IN SPIO_DEV* dev +); + +//Declare initial routines for your SPIO_DEV_LST list. +INITIAL_ROUTINE(COM_Init) + +//<AMI_THDR_START> +//------------------------------------------------------------------------- +// +// Name: F81216SEC_DevLst +// +// Description: Table filled with SIO porting information +// +//------------+-------+-------+--------+---------+---------+-------------+------------+------------+-----------+------------+------------+-------------| +//SIO_DEV_TYP | UINT8 | UINT8 | UINT16 | BOOLEAN | BOOLEAN | UINT8 | UINT8 | UINT16 | UINT16 | UINT16 | UINT8 | SIO_INIT | +//Type | LDN | UID | PnpId | Impleme | HasSetu | Flags | AslName[5] | ResBase[2] | ResLen[2] | IrqMask[2] | DmaMask[2] | InitRoutine | +//------------+-------+-------+--------+---------+---------+-------------+------------+------------+-----------+------------+------------+-------------| +// Field "Falgs" is needed to indicate that SIO Logical Device represented +// by this table entry shares all or some resources with previous entry. +// Such situation is sutable for FDC - and PS2 controller +// This field must be filled properely in order to have driver working right. +// Here possible Flags Settings +// #define SIO_SHR_NONE 0x00 +// #define SIO_SHR_IO1 0x01 //device shares resources programmed in SIO_1_BASE_REG +// #define SIO_SHR_IO2 0x02 //device shares resources programmed in SIO_2_BASE_REG +// #define SIO_SHR_IO 0x03 //device shares resources programmed in all SIO_BASE_REG +// #define SIO_SHR_IRQ1 0x04 +// #define SIO_SHR_IRQ2 0x08 +// #define SIO_SHR_IRQ 0x0C +// #define SIO_SHR_DMA1 0x10 +// #define SIO_SHR_DMA2 0x20 +// #define SIO_SHR_DMA 0x30 +// #define SIO_SHR_ALL 0x3F +// #define SIO_NO_RES 0x80 //this bit will be set if GCD call to allocate resource succeed +// //at least one call must return SUCCESS if this flag +// +//------------------------------------------------------------------------- +//<AMI_THDR_END> +//AMI_TODO: Please check below notes. +//1. if device has no ASL code and has IO base register to be initialized, fill it in below table +//2. If device has no IO base register to be initialized, set flag to SIO_NO_RES +//3. if more device PnpId is 0x0C08, please check the UID of these devices. +static SPIO_DEV_LST F81216SEC_DevLst[]={ +//If device Implemented=FALSE the rest of the table will be ignored, just to avoid compilation ERROR +//Type LDN UID PnpId Implement HasSetu Share RES AslName[5] Base Length IrqMask DmaMask InitRoutine +//=============================================================================== +{dsUART, F81216SEC_LDN_UART0, 0x10, 0x0501, F81216SEC_SERIAL_PORT0_PRESENT, TRUE, SIO_SHR_NONE, {"UR11"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x00 +{dsUART, F81216SEC_LDN_UART1, 0x11, 0x0501, F81216SEC_SERIAL_PORT1_PRESENT, TRUE, SIO_SHR_IRQ1, {"UR12"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x01 +{dsUART, F81216SEC_LDN_UART2, 0x12, 0x0501, F81216SEC_SERIAL_PORT2_PRESENT, TRUE, SIO_SHR_IRQ1, {"UR13"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x02 +{dsUART, F81216SEC_LDN_UART3, 0x13, 0x0501, F81216SEC_SERIAL_PORT3_PRESENT, TRUE, SIO_SHR_IRQ1, {"UR14"}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, COM_Init},//LDN 0x03 +//=============================================================================== +};//SPIO_DEV_LST mSpioDeviceList[] END of structure Buffer +#define F81216SEC_DEV_CNT (sizeof(F81216SEC_DevLst)/sizeof(SPIO_DEV_LST)) + +// Note: below bootscript table->more registers, more post time +//------------------------------------------------------------------------- +// Define the registers to save/restore in BootScriptSave table when SIO sleep +//------------------------------------------------------------------------- +static UINT8 F81216SEC_GLOBAL_REGS[] = { + //AMI_TODO: + //Global registers. For example: + //LDN Register, Multi-fun registers and Device Specific registers + //0x07, + 0x25 +}; +#define F81216SEC_G_REG_CNT (sizeof(F81216SEC_GLOBAL_REGS)/sizeof(UINT8)) + +//------------------------------------------------------------------------- +// Define the local registers for configure SIO +//------------------------------------------------------------------------- +static UINT8 F81216SEC_LOCAL_REGS[] = { +//AMI_TODO: + F81216SEC_ACTIVATE_REGISTER, //Activate Reg + F81216SEC_BASE1_HI_REGISTER, //IO Base Registers + F81216SEC_BASE1_LO_REGISTER, //IO Base Registers + F81216SEC_BASE2_HI_REGISTER, //IO Base Registers + F81216SEC_BASE2_LO_REGISTER, //IO Base Registers + F81216SEC_IRQ1_REGISTER, //IRQ & DMA Select Regs + F81216SEC_IRQ2_REGISTER, //IRQ & DMA Select Regs + F81216SEC_DMA1_REGISTER, //IRQ & DMA Select Regs + F81216SEC_DMA2_REGISTER, //IRQ & DMA Select Regs + //Logical Device Configuration Registers(Dwevice Specific) + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE, + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE, +}; +#define F81216SEC_L_REG_CNT (sizeof(F81216SEC_LOCAL_REGS)/sizeof(UINT8)) + +//------------------------------------------------------------------------- +// Define script variable for enter config mode +//------------------------------------------------------------------------- +static SPIO_SCRIPT F81216SEC_OPEN_CONFIG[]={ + //AMI_TODO: + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81216SEC_CONFIG_MODE_ENTER_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + }, + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + F81216SEC_CONFIG_MODE_ENTER_VALUE //UINT8 Value; //if WrRd=0 wait for this data to come + } +}; + +//------------------------------------------------------------------------- +// Define script variable for exit config mode +//------------------------------------------------------------------------- +static SPIO_SCRIPT F81216SEC_CLOSE_CONFIG[]={ + //AMI_TODO: + { + 1, //BOOLEAN IdxDat; //1=IDX 0=DAT + 1, //BOOLEAN WrRd; //1=Write 0=Read + 0xAA //UINT8 Value; //if WrRd=0 wait for this data to come + } +}; + +//------------------------------------------------------------------------- +// Here comes the table telling how to enter "SIO Config Mode" +//------------------------------------------------------------------------- +static SPIO_SCRIPT_LST F81216SEC_ENTER_CONFIG={ + cfgByteSeq, //Operation Type + (sizeof(F81216SEC_OPEN_CONFIG))/(sizeof(SPIO_SCRIPT)), + &F81216SEC_OPEN_CONFIG //Instruction +}; + +//------------------------------------------------------------------------- +// Here comes the table telling how to exit "SIO Config Mode" +//------------------------------------------------------------------------- +static SPIO_SCRIPT_LST F81216SEC_EXIT_CONFIG={ + cfgByteSeq, //Operation Type + (sizeof(F81216SEC_CLOSE_CONFIG))/(sizeof(SPIO_SCRIPT)), + &F81216SEC_CLOSE_CONFIG //Instruction +}; + +//------------------------------------------------------------------------- +// If Spio uses complicated way to enter and exit config mode +// use cfgRoutine as Operation Type instead +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +// Here goes SPIO_LIST_ITEM structure for F81216SEC +//------------------------------------------------------------------------- +// value of -1 (0xF..F) means Do not check this parameter +#ifndef SB_BUS_NUM +#define SB_BUS_NUM SIO_SB_BUS_NUM +#endif +#ifndef SB_DEV_NUM +#define SB_DEV_NUM SIO_SB_DEV_NUM +#endif +#ifndef SB_FUNC_NUM +#define SB_FUNC_NUM SIO_SB_FUNC_NUM +#endif + +SPIO_LIST_ITEM F81216SEC={ + //This Information is needed to identify right LPC bridge for the SIO + -1, //UINT32 IsaVenDevId; + -1, //UINT32 IsaSubVenId; + SB_BUS_NUM, //UINT8 IsaBusNo; + SB_DEV_NUM, //UINT8 IsaDevNo; + SB_FUNC_NUM, //UINT8 IsaFuncNo; + //This is the information Needed to access SIO Generic Registers + //for the second SIO in the system change F81216SEC name to to SIO2_.... + //and so on + F81216SEC_CONFIG_INDEX, //UINT16 SioIndex; + F81216SEC_CONFIG_DATA, //UINT16 SioData; + // Dev Select and Activate + F81216SEC_LDN_SEL_REGISTER, //UINT8 DevSel; + F81216SEC_ACTIVATE_REGISTER, //UINT8 Activate; + F81216SEC_ACTIVATE_VALUE, //UINT8 ActivVal; + F81216SEC_DEACTIVATE_VALUE, //UINT8 DeactVal; + //Generic registers location + F81216SEC_BASE1_HI_REGISTER, //UINT8 Base1Hi; + F81216SEC_BASE1_LO_REGISTER, //UINT8 Base1Lo; + F81216SEC_BASE2_HI_REGISTER, //UINT8 Base2Hi; + F81216SEC_BASE2_LO_REGISTER, //UINT8 Base2Lo; + F81216SEC_IRQ1_REGISTER, //UINT8 Irq1; + F81216SEC_IRQ2_REGISTER, //UINT8 Irq2; + F81216SEC_DMA1_REGISTER, //UINT8 Dma1; + F81216SEC_DMA2_REGISTER, //UINT8 Dma2; + //List of devices inside this SIO + F81216SEC_DEV_CNT, //UINTN DevCount; + &F81216SEC_DevLst[0], //SPIO_DEV_LST *SioDevList; + //List of valid registers inside SIO to check if they has to be saved + //in BOOT_SCRIPT_SAVE for S3 state Resume + //This is for global registers which are the same for all devices in SIO + F81216SEC_G_REG_CNT, //UINTN GlobalInclRegCount; + &F81216SEC_GLOBAL_REGS[0], //UINT8 *GlobalIncludeReg; + //This is for Local registers they are unique for each device in SIO + F81216SEC_L_REG_CNT, //UINTN LocalInclRegCount; + &F81216SEC_LOCAL_REGS[0], //UINT8 *LocalIncludeReg; + //How To enter/exit Configuration mode if any + &F81216SEC_ENTER_CONFIG, //SPIO_SCRIPT_LST *EnterCfgMode; + &F81216SEC_EXIT_CONFIG, //SPIO_SCRIPT_LST *ExitCfgMode; +}; + +//------------------------------------------------------------------------- +//!!!!!!!!!!! PORTING REQUIRED !!!!!!!!!!! PORTING REQUIRED !!!!!!!!!!!* +//!!!!!!!!!!!!!!!! must be maintained for SIO devices!!!!!!!!!!!!!!!!!!* +//------------------------------------------------------------------------- +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: XXXX_Init +// +// Description: +// Each of INIT functions will be called twice by GenericSIO after standart +// initialization(Assigning and Programming IO/IRQ/DMA resources), +// First time it will be called before Activating the device, +// If device requires some additional initialization like +// - programming SIO device registers except IO1, IO2, IRQ1, IRQ2, DMA1 DMA2 +// Second time After Installing AmiSioProtocol, and DevicePath Protocol of SIO Device. +// If device requires some additional initialization like +// - if programming of some runtime registers like SIO_GPIO, SIO_PM SIO_HHM is needed +// - implementation of some additional setup questions +// do it here +// NOTE#1 Once SIO_INIT function invoced SIO Logical device allready selected +// NOTE#2 If Device Does not require any additional initialization just set +// InitRoutine field to NULL in SioDevLst[] Table. +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: None +// EFI_STATUS +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +// It is recommended to have a separate Initialization Routine for each SIO Device. +// it will save you some code needed to detect which device is currently selected. +// case isGetSetupData: +// SIO implementation uses separate set of NVRAM variables +// associated with each LogicalDevice who has +// SPIO_DEV.DeviceInfo->HasSetup property set to true. +// Current Setup Settings are stored in SPIO_DEV.NvData. +// If due to different look and fill we need to overwrite standard +// Setup settings, we can do it here..... +// ===================================================== +// if(SetupData==NULL){ +// Status=GetSetupData(); +// if(EFI_ERROR(Status)) return Status; +// } +// dev->NvData.DevEnable = SetupData->FdcEnable; +// dev->NvData.DevPrsId = 0;//SetupData->FdcPrsId; +// dev->NvData.DevMode = 0;//SetupData->FdcMode; +// break; +// +// case isPrsSelect: +// If LDN uses non-standard way to determine possible resources(_PRS), +// or _PRS may wary based on LD mode. Then here we can get LD mode using +// SPIO_DEV.NvData.Mode field and get corresponded to the mode _PRS Buffer +// using GetPrsFromAml() function if ACPISUPPORT is ON. Or set of functions +// EFI_STATUS SetUartPrs(SPIO_DEV *Dev); +// EFI_STATUS SetLptPrs(SPIO_DEV *Dev, BOOLEAN UseDma); +// EFI_STATUS SetFdcPrs(SPIO_DEV *Dev); +// EFI_STATUS SetPs2kPrs(SPIO_DEV *Dev); +// EFI_STATUS SetPs2mPrs(SPIO_DEV *Dev); +// EFI_STATUS SetGamePrs(SPIO_DEV *Dev); +// EFI_STATUS SetMpu401Prs(SPIO_DEV *Dev); +// Defined in GenericSio.h +// +// case isBeforeActivate: +// //If any register needs to be initialized, whle enumerating all SIO devices. +// //Use NEW SbLib_SetLpcDeviceDecoding() function to set Device Decoding Range for +// //Legacy devices. Implementation in SbGeneric.c, definition in SbCspLib.h +// //===================================================== +// +// case isAfterActivate: +// //Ttis Initialization step is used to programm any runtime registers rsiding in +// //Decvice's decoded io space like SIO_GPIOs, SIO_PM, HHM registers. +// //This Programming is needed if device doesnot have or don't need driver to do so. +// //If there are a spetial driver like could be for HHM which could get THIS device handle +// //and programm like Terminal Driver for COM ports and Floppy Driver for FDC +// //nothing needs to be done here +// +// case isAfterBootScript: +// //This initialization step is needed to +// //Use NEW SbLib_SetLpcDeviceDecoding() function to set Device Decoding Range for Legacy devices +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: COM_Init +// +// Description: +// This function provide each initial routine in genericsio.c +// +// Input: +// IN AMI_SIO_PROTOCOL *AmiSio - Logical Device's information +// IN EFI_PCI_IO_PROTOCOL *PciIo - Read/Write PCI config space +// IN SIO_INIT_STEP InitStep - Initial routine step +// +// Output: +// EFI_SUCCESS - Initial step sucessfully +// EFI_INVALID_PARAMETER - not find the initial step +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static EFI_STATUS COM_Init( + IN AMI_SIO_PROTOCOL *AmiSio, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SIO_INIT_STEP InitStep +) +{ + EFI_STATUS Status=EFI_SUCCESS; + SPIO_DEV *dev=(SPIO_DEV*)AmiSio; + UINT8 rv; +//----------------------------- + switch (InitStep) + { + case isGetSetupData: + // Disable IODecode? + if((!dev->DeviceInfo->Implemented) || (!dev->NvData.DevEnable)) { + LoopCspIoDecodeListInit(NULL,AmiSio); + ClearDevResource(dev); + } + break; + + case isPrsSelect: + break; + + case isBeforeActivate: + + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + //make serial port 0 as IR port funtion only + if(dev->DeviceInfo->UID == 0x10) + { + //Programm Device Mode register here(if NEEDED)use AmiSioProtocol + Status=AmiSio->Access(AmiSio,FALSE,FALSE,0xF1,&rv); + ASSERT_EFI_ERROR(Status); + if(EFI_ERROR(Status)) return Status; + + rv &= 0xE3; + + switch (dev->NvData.DevMode) + { + case 0: //Bit4 = 0, Serial Port Function Mode + break; + case 1: + rv|=0x10; //Bit4 = 1 Bit3,Bit2 = 00 , IR Mode,Pusle 1.6us,Full Duplex + break; + case 2: + rv|=0x14; //Bit4 = 1 Bit3,Bit2 = 01 , IR Mode,Pusle 1.6us,Half Duplex + break; + case 3: + rv|=0x18; //Bit4 = 1 Bit3,Bit2 = 10 , IR Mode,Pusle 3/16 Bit Time,Full Duplex + break; + case 4: + rv|=0x1C; //Bit4 = 1 Bit3,Bit2 = 11 , IR Mode,Pusle 3/16 Bit Time,Half Duplex + break; + default: return EFI_INVALID_PARAMETER; + } + Status=AmiSio->Access(AmiSio,TRUE,FALSE,0xF1,&rv); + ASSERT_EFI_ERROR(Status); + } + //Programm Serial_X IRQ Share register. + if((dev->DeviceInfo->Flags & SIO_SHR_IRQ1) && dev->ResOwner) { + //enter cfgmode + SioCfgMode(dev->Owner, TRUE); + //set device resource owner share register + DevSelect(dev->ResOwner); + SioRegister(dev->ResOwner, FALSE, 0x70, &rv);//read reg0x70 value + rv |= 0x10; //Bit4:share or normal + SioRegister(dev->ResOwner, TRUE, 0x70, &rv);//write reg0x70 value + //set device share register + DevSelect(dev); + SioRegister(dev, TRUE, 0x70, &rv);//read reg0x70 value + //exit cfgmode + SioCfgMode(dev->Owner, FALSE); + dev->VlData.DevIrq1=dev->ResOwner->VlData.DevIrq1; + } + break; + + case isAfterActivate: + break; + + #if(CORE_AFTER_4634) + case isAfterBootScript: + break; + #endif + + default: Status=EFI_INVALID_PARAMETER; + }//switch + return Status; +} +//------------------------------------------------------------------------- +//!!!!!!!!!!! Porting End !!!!!!!!!!! +//------------------------------------------------------------------------- +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: ClearDevResource +// +// Description: +// This function will Clear SIO resource +// +// Input: +// SPIO_DEV* dev +// Output: +// NONE +// +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +static VOID ClearDevResource( + IN SPIO_DEV* dev +) +{ + UINT8 Value8; + Value8=0x00; + SioCfgMode(dev->Owner, TRUE); + DevSelect(dev); + SioRegister(dev, TRUE,F81216SEC_BASE1_HI_REGISTER,&Value8); + SioRegister(dev, TRUE,F81216SEC_BASE1_LO_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_BASE2_HI_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_BASE2_LO_REGISTER,&Value8); + SioRegister(dev, TRUE,F81216SEC_IRQ1_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_IRQ2_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_DMA1_REGISTER,&Value8); +// SioRegister(dev, TRUE,F81216SEC_DMA2_REGISTER,&Value8); + SioCfgMode(dev->Owner, FALSE); + return; +} +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216PEI.C b/Board/IO/F81216/F81216PEI.C new file mode 100644 index 0000000..8e0d564 --- /dev/null +++ b/Board/IO/F81216/F81216PEI.C @@ -0,0 +1,200 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216PEI.C 3 7/04/11 3:22a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216PEI.C $ +// +// 3 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 2 9/06/10 3:50a Mikes +// Fix compile issue with first IO module +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216PEI.C> +// +// Description: Porting for PEI phase.Just for necessary devices porting. +// +// +//<AMI_FHDR_END> +//************************************************************************* +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include <Pei.h> +#include <Setup.h> +#include <Token.h> +#include <AmiLib.h> +#include <Protocol\AmiSio.h> +#include <AmiCspLib.h> +#include "BSP\PeiIoTable.h" + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//------------------------------------------------------------------------- +//Variable, Prototype, and External Declarations +//------------------------------------------------------------------------- +extern EFI_STATUS PeiLoopCspIoDecodeListInit ( + IN VOID *Fun, + IN UINT16 Base, + IN UINT8 DevUid, + IN SIO_DEV_TYPE Type); + +static VOID PeiSetLpcDeviceDecoding(VOID); // + +VOID F81216SEC_INIT(VOID); // + +VOID PeiF81216SECInit ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices +); + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: PeiF81216SECInit +// +// Description: +// This function provide PEI phase SIO initialization +// +// Input: +// IN EFI_FFS_FILE_HEADER *FfsHeader - Logical Device's information +// IN EFI_PEI_SERVICES **PeiServices - Read/Write PCI config space +// +// Output: None +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID PeiF81216SECInit ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices +) +{ + F81216SEC_INIT(); +} + +// <AMI_PHDR_START> +//------------------------------------------------------------------------- +// +// Procedure: F81216SEC_INIT +// +// Description: +// +// This function Step through table and initialize the Logic Device +// +// Input: None +// +// Output: EFI_STATUS +// +// Modified: Nothing +// +// Referrals: None +// +// Note: +//------------------------------------------------------------------------- +// <AMI_PHDR_END> +VOID F81216SEC_INIT(VOID) +{ + UINTN i; + + // Decode neccessary IO resource in PEI phase + PeiSetLpcDeviceDecoding(); + + // Step through table and initialize the Serial Port + for(i=0; i<(sizeof(F81216SEC_PEI_Init_Table))/(sizeof(SIO_DATA));i++) { + // If Mask=0xFF,only write register. + if(F81216SEC_PEI_Init_Table[i].DataMask == 0xFF) { + IoWrite8(F81216SEC_PEI_Init_Table[i].Addr, F81216SEC_PEI_Init_Table[i].DataValue); + } + // Read and writer register + else { + IoWrite8(F81216SEC_PEI_Init_Table[i].Addr, \ + IoRead8(F81216SEC_PEI_Init_Table[i].Addr) \ + & F81216SEC_PEI_Init_Table[i].DataMask \ + | F81216SEC_PEI_Init_Table[i].DataValue); + } + } +} + +//<AMI_PHDR_START> +//------------------------------------------------------------------------- +// Procedure: PeiSetLpcDeviceDecoding +// +// Description: +// This function is used to open IoDecode for logic devices initialized in PEI +// +// Input: +// +// Output: EFI_STATUS +// +// Notes: PORTING REQUIRED +//------------------------------------------------------------------------- +//<AMI_PHDR_END> +static VOID PeiSetLpcDeviceDecoding(VOID) +{ + EFI_STATUS Status=EFI_SUCCESS; + UINT8 i; + + for(i=0;i<(sizeof(F81216SEC_Decode_Table))/(sizeof(IO_DECODE_DATA));i++) + { + Status = PeiLoopCspIoDecodeListInit( NULL,\ + F81216SEC_Decode_Table[i].BaseAdd,\ + F81216SEC_Decode_Table[i].UID,\ + F81216SEC_Decode_Table[i].Type); + } +} + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/F81216SEC.chm b/Board/IO/F81216/F81216SEC.chm Binary files differnew file mode 100644 index 0000000..b98befc --- /dev/null +++ b/Board/IO/F81216/F81216SEC.chm diff --git a/Board/IO/F81216/F81216Setup.H b/Board/IO/F81216/F81216Setup.H new file mode 100644 index 0000000..d8b2b20 --- /dev/null +++ b/Board/IO/F81216/F81216Setup.H @@ -0,0 +1,173 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// +//************************************************************************* +// $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216Setup.H 3 7/04/11 3:22a Kasalinyi $ +// +// $Revision: 3 $ +// +// $Date: 7/04/11 3:22a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/F81216Setup.H $ +// +// 3 7/04/11 3:22a Kasalinyi +// [Category] Improvement +// [Description] Update to new template +// [Files] IO_F81216.SDL +// F81216.ASL +// F81216.MAK +// F81216.SD +// F81216.UNI +// F81216DXE.C +// F81216PEI.C +// F81216Setup.H +// F81216.CIF +// +// 2 10/28/10 2:30a Mikes +// Make code readable +// +// 1 3/31/10 5:55a Fantasylai +// Initial release to F81216 just as a second IO +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: <F81216Setup.H> +// +// Description: GUID or structure Of Setup related Routines. +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifndef _F81216SETUP_H_ +#define _F81216SETUP_H_ +#ifdef __cplusplus +extern "C" { +#endif +//------------------------------------------------------------------------- +// Include Files +//------------------------------------------------------------------------- +#include "token.h" +#include <Setup.h> +#include <SetupStrTokens.h> + +//------------------------------------------------------------------------- +// Constants, Macros and Type Definitions +//------------------------------------------------------------------------- + +//**********************************************************************// +// Belos is for SD files // +//**********************************************************************// +#define SIO_VAR_GUID \ + {0x560bf58a, 0x1e0d, 0x4d7e, 0x95, 0x3f, 0x29, 0x80, 0xa2, 0x61, 0xe0, 0x31} + +#define AMI_SIO_VARSTORE(ldxn, PNPxxxx_n) \ +varstore ldxn##_V_DATA,\ + key = ldxn##_V_DATA_KEY,\ + name = PNPxxxx_n##_VV,\ + guid = SIO_VAR_GUID;\ +varstore ldxn##_NV_DATA,\ + key = ldxn##_NV_DATA_KEY,\ + name = PNPxxxx_n##_NV,\ + guid = SIO_VAR_GUID; + +#define LDX_XV_DATA(ldxn) \ +typedef struct {\ + UINT8 DevImplemented;\ + UINT16 DevBase1;\ + UINT16 DevBase2;\ + UINT8 DevIrq1;\ + UINT8 DevIrq2;\ + UINT8 DevDma1;\ + UINT8 DevDma2;\ +} ldxn##_V_DATA;\ +typedef struct {\ + UINT8 DevEnable;\ + UINT8 DevPrsId;\ + UINT8 DevMode;\ +} ldxn##_NV_DATA; + + +#pragma pack(1) + +#if F81216SEC_SERIAL_PORT0_PRESENT +LDX_XV_DATA(COMA2) +#endif + +#if F81216SEC_SERIAL_PORT1_PRESENT +LDX_XV_DATA(COMB2) +#endif + +#if F81216SEC_SERIAL_PORT2_PRESENT +LDX_XV_DATA(COMC2) +#endif + +#if F81216SEC_SERIAL_PORT3_PRESENT +LDX_XV_DATA(COMD2) +#endif + +#pragma pack() + +//**********************************************************************// +// Below is for "xxSetup.c" // +//**********************************************************************// +#define STR_BUFFER_LENGTH 0x10 +//Defination of function +#define VOLTAGE 0x01 +#define TEMPERATURE 0x02 +#define FAN_SPEED 0x03 + +#define LEFT_JUSTIFY 0x01 +#define PREFIX_SIGN 0x02 +#define PREFIX_BLANK 0x04 +#define COMMA_TYPE 0x08 +#define LONG_TYPE 0x10 +#define PREFIX_ZERO 0x20 + +#define CHARACTER_NUMBER_FOR_VALUE 30 + +#pragma pack(1) + +/* +typedef struct { + UINT16 Token; // String token value + UINT8 Type; // For what? Temperature, Fan, Voltage... + UINT16 Value; // Monitor value + UINT8 OddPos; // Value precision +} HWM_DATA; +*/ + +#pragma pack() + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Board/IO/F81216/History.txt b/Board/IO/F81216/History.txt new file mode 100644 index 0000000..18fd55a --- /dev/null +++ b/Board/IO/F81216/History.txt @@ -0,0 +1,76 @@ + +-----------------------------------------------------------+ + | Super I/O Release History | + | | + | IO Vendor : Fintek | + | Part Number : F81216 | + | Datasheet Version : F81216_V032P | + | Template Version : | + | | + +-----------------------------------------------------------+ + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A9 +;---------------------------------------------------------------------------; +[TAG] EIP115780 +[Category] Bug Fix +[Symptom] Burn in test faile while dual IO using same idex/data port +[RootCause] Method DSTA retrned before exit config mode. +[Files] F81216.ASL +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2013-04-01 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A8 +;---------------------------------------------------------------------------; +[TAG] EIPNONE +[Category] Bug Fix +[Solution] Change UHID judgement if IR mode + Correct IR mode register setting in COM_INIT + Change _HID judgement if IR mode +[Files] F81216.ASL +Uart1.ASL +F81216DXE.C +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2011-07-19 +;---------------------------------------------------------------------------; + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A7 +;---------------------------------------------------------------------------; +[TAG] EIPNONE +[Category] Bug Fix +[Severity] Important +[Symptom] Base 0x200 generic IO decode fail +[RootCause] 1ST IO OemIoDecode will take 0x200 as GamePort +[Solution] Change Com port IoDecodeBase from 0x200 to 0x240. +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2011-06-18 +;---------------------------------------------------------------------------; + + +;---------------------------------------------------------------------------; +Module Label :4.6.3_SIO_F81216_Sec_A6 +;---------------------------------------------------------------------------; +[CATEGORY] Improvement +[REASON] Update to new template +[SEVERITY] Medium +[FILE] +Board\IO\*.* +[TAG] +;---------------------------------------------------------------------------; +AMI China +Engineer : Elviscai +Release Date : 2011-05-19 +;---------------------------------------------------------------------------; + + + + + diff --git a/Board/IO/F81216/IO_F81216.SDL b/Board/IO/F81216/IO_F81216.SDL new file mode 100644 index 0000000..fb57386 --- /dev/null +++ b/Board/IO/F81216/IO_F81216.SDL @@ -0,0 +1,479 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* +# +#************************************************************************* +# $Header: /Alaska/BIN/IO/Fintek/F81216_Sec/IO_F81216.SDL 6 6/18/12 3:12a Elviscai $ +# +# $Revision: 6 $ +# +# $Date: 6/18/12 3:12a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/IO/Fintek/F81216_Sec/IO_F81216.SDL $ +# +# 6 6/18/12 3:12a Elviscai +# Specific Tokentype Integer to ENT2 +# +# 5 7/04/11 3:22a Kasalinyi +# [Category] Improvement +# [Description] Update to new template +# [Files] IO_F81216.SDL +# F81216.ASL +# F81216.MAK +# F81216.SD +# F81216.UNI +# F81216DXE.C +# F81216PEI.C +# F81216Setup.H +# F81216.CIF +# +# 4 11/17/10 5:01a Mikes +# [Category] Improvement +# [Description] Add TargetMAK for master token +# [Files] IO_F81216.SDL +# +# 3 10/28/10 2:23a Mikes +# Add enter configure key token +# Clean code and implement new name rule +# +# 2 6/02/10 9:42p Fantasylai +# Redefine the TOKEN "CORE_AFTER_4634" +# +# 1 3/31/10 5:55a Fantasylai +# Initial release to F81216 just as a second IO +# +#************************************************************************* +#<AMI_FHDR_START> +# +# Name: <IO_F81216.SDL> +# +# Description: SDL file to define SIO functions +# +# +#<AMI_FHDR_END> +#************************************************************************* +IODEVICE + Name = "F81216 SIO Implementation" + ASLfile = "F81216.ASL" +End + +IODEVICE + Name = "F81216 Serial Port A2" + ASLfile = "Board\IO\F81216\ACPI\UART1.ASL" + ASLdeviceName = "UR11" + Token = "F81216SEC_SERIAL_PORT0_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81216 Serial Port B2" + ASLfile = "Board\IO\F81216\ACPI\UART2.ASL" + ASLdeviceName = "UR12" + Token = "F81216SEC_SERIAL_PORT1_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81216 Serial Port C2" + ASLfile = "Board\IO\F81216\ACPI\UART3.ASL" + ASLdeviceName = "UR13" + Token = "F81216SEC_SERIAL_PORT2_PRESENT" "=" "1" +End + +IODEVICE + Name = "F81216 Serial Port D2" + ASLfile = "Board\IO\F81216\ACPI\UART4.ASL" + ASLdeviceName = "UR14" + Token = "F81216SEC_SERIAL_PORT3_PRESENT" "=" "1" +End + +TOKEN + Name = "====== SIO Global Control Tokens ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy global control tokens." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_SUPPORT" + Value = "1" + Help = "Main switch to enable F81216SEC support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetH = Yes + Master = Yes +End + +TOKEN + Name = "F81216SEC_CONFIG_INDEX" + Value = "0x2E" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_CONFIG_DATA" + Value = "0x2F" + TokenType = Integer + TargetEQU = Yes + TargetH = Yes +End + +TOKEN + Name = "SP2O" + Value = "$(F81216SEC_CONFIG_INDEX)" + Help = "Super IO Index/Data configuration port for ASL." + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "====== SIO Logical Devices Numbers ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Devices Logical Number." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_LDN_UART0" + Value = "0x00" + Help = "LDN for Serial1 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_UART1" + Value = "0x01" + Help = "LDN for Serial2 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_UART2" + Value = "0x02" + Help = "LDN for Serial3 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_UART3" + Value = "0x03" + Help = "LDN for Serial4 Port Controller" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_LDN_WDT" + Value = "0x08" + Help = "LDN for Watch Dog Timer" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Global Registers Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO Global Registers Setting" + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_CLOCK" + Value = "0" + Help = "1/0 for 48Mhz/24MHz" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "====== SIO Registers Layout ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Specfy Register address inside SIO Chip." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_LDN_SEL_REGISTER" + Value = "0x07" + Help = "Logical Device Select Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DEV_ID_REGISTER" + Value = "0x20" + Help = "Device Identification Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_ACTIVATE_REGISTER" + Value = "0x30" + Help = "Device Identification Register Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE1_HI_REGISTER" + Value = "0x60" + Help = "Device BaseAddres Register#1 MSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE1_LO_REGISTER" + Value = "0x61" + Help = "Device BaseAddres Register#1 LSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE2_HI_REGISTER" + Value = "0x62" + Help = "Device BaseAddres Register#2 MSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_BASE2_LO_REGISTER" + Value = "0x63" + Help = "Device BaseAddres Register#2 LSB Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_IRQ1_REGISTER" + Value = "0x70" + Help = "Device IRQ Register#1 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_IRQ2_REGISTER" + Value = "0x72" + Help = "Device IRQ Register#2 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DMA1_REGISTER" + Value = "0x74" + Help = "Device DMA Register#1 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DMA2_REGISTER" + Value = "0x75" + Help = "Device DMA Register#2 Address" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Activation Values ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "Logical Device Activation Value." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_CONFIG_MODE_ENTER_VALUE" + Value = "0x77" + Help = "Value to enter Configuration Mode.Please check your hardware\Default is 0x77.\others are 0xA0, 0x87, 0x67" + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "ENT2" + Value = "$(F81216SEC_CONFIG_MODE_ENTER_VALUE)" + Help = "Value to enter Configuration Mode.Please check your hardware\Default is 0x77.\others are 0xA0, 0x87, 0x67" + TokenType = Integer + TargetASL = Yes +End + +TOKEN + Name = "F81216SEC_ACTIVATE_VALUE" + Value = "0x01" + Help = "Value to activate Device." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_DEACTIVATE_VALUE" + Value = "0x00" + Help = "Value to deactivate Device." + TokenType = Integer + TargetH = Yes +End + +TOKEN + Name = "=== SIO Logic Device Present Settings ==========" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "All Logic Device Present / Not Present." + TokenType = Expression +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT0_PRESENT" + Value = "1" + Help = "Serial Port 0 (COMA / UART0) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT1_PRESENT" + Value = "1" + Help = "Serial Port 1 (COMB / UART1) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT2_PRESENT" + Value = "1" + Help = "Serial Port 2 (COMC / UART2) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_SERIAL_PORT3_PRESENT" + Value = "1" + Help = "Serial Port 3 (COMD / UART3) Present / Not Present." + TokenType = Boolean + TargetH = Yes +End + +TOKEN + Name = "F81216SEC_WDT_PORT_PRESENT" + Value = "1" + Help = "WDT Port Present / Not Present." + TokenType = Boolean + TargetH = Yes + TargetMAK = Yes +End + +TOKEN + Name = "===== SIO Module Setting ======" + Value = "!!!DO NOT CHANGE NAMES JUST VALUES!!!" + Help = "SIO Module Setting" + TokenType = Expression +End + +PATH + Name = "F81216_DIR" +End + +MODULE + Help = "Includes F81216.MAK to Project" + File = "F81216.MAK" +End + +ELINK + Name = "$(BUILD_DIR)\F81216.SDB" + Parent = "SETUP_SDBS" + Priority = 40 + InvokeOrder = AfterParent +End + +ELINK + Name = "$(F81216_DIR)\F81216.SD" + Parent = "SETUP_DEFINITIONS" + Priority = 40 + InvokeOrder = AfterParent +End + +ELINK + Name = "PeiF81216SECInit," + Parent = "PeiCoreInitialize" + InvokeOrder = AfterParent + Priority = 2 + Help = "if SecondIO, Priority must be 2." +End + +ELINK + Name = "F81216SEC," + Parent = "DxeSioList" + InvokeOrder = AfterParent + Priority = 2 + Help = "if SecondIO, Priority must be 2." +End + +ELINK + Name = "-i $(F81216_DIR)" + Parent = "SETUP_VFR_INCLUDES" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x10, STRING_TOKEN(STR_F81216SEC_SERIAL0_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT0_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x11, STRING_TOKEN(STR_F81216SEC_SERIAL1_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT1_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x12, STRING_TOKEN(STR_F81216SEC_SERIAL2_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT2_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +ELINK + Name = "{dsUART,0x13, STRING_TOKEN(STR_F81216SEC_SERIAL3_CONFIG_VALUE)}," + Parent = "SetupStrTableList" + Token = "F81216SEC_SERIAL_PORT3_PRESENT" "=" "1" + InvokeOrder = AfterParent +End + +#************************************************************************* +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + |