init. 1AQQW051HEADmaster

41 files changed, 10566 insertions, 0 deletions

diff --git a/Core/EM/CmosManager/CmosAccess.asl b/Core/EM/CmosManager/CmosAccess.asl
new file mode 100644
index 0000000..aeff9ee
--- /dev/null
+++ b/Core/EM/CmosManager/CmosAccess.asl
@@ -0,0 +1,131 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2010, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosAccess.asl 4     1/25/12 2:36p Michaela $
+//
+// $Revision: 4 $
+//
+// $Date: 1/25/12 2:36p $
+//*************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosAccess.asl $
+// 
+// 4     1/25/12 2:36p Michaela
+// 
+// 3     12/11/11 8:52p Michaela
+// 
+// 2     11/30/11 11:49p Michaela
+// [TAG]         EIP56197
+// [Category]    New Feature
+// [Severity]    Normal
+// [Description] CMOS Manager Support in Runtime Code
+// [Files]       CmosManager.sdl
+//               CmosSetup.uni
+//               CmosMessages.uni
+//               CmosManagerSmm.cif
+//               CmosAccess.h
+//               CmosManagerSmm.c
+//               CmosAccess.asl
+// 
+// 1     3/16/11 2:44p Michaela
+//
+//*************************************************************************
+//<AMI_FHDR_START>
+//
+// Name:    CmosAccess.asl
+//
+// Description:
+//      This file contains an ASL method for accessing CMOS from
+//      ASL code.
+//
+//<AMI_FHDR_END>
+//*************************************************************************
+
+Device(CMOS)
+{
+	Name(_HID, EISAID("PNP0C02"))	// System board resources
+	Name(_UID, 0x18)				// Unique ID. 
+	
+	OperationRegion (SRB0, SystemIO, SRSI, 1)		
+	Field (SRB0, ByteAcc, NoLock, Preserve) 
+	{
+		SRSM,	8 // SW-SMI ctrl port
+	}
+
+	// Define a location in root scope to be updated during
+	// boot to specify the location of a communication buffer.
+	// Search CMOS_SMM_CONTEXT for data size/type info
+	// for this operation region (communication buffer).
+	// Search gAslContext for additional information regarding
+	// initialization and implemenataion details.
+
+	Name(\CCOM, 0x0123456789ABCDEF)
+
+	OperationRegion (CMOP, SystemMemory, CCOM, 40)
+	Field (CMOP, AnyAcc, NoLock, Preserve)
+	{
+		CODE,   8,   // 1 byte Opcode
+		TOKN,   16,  // 2 byte CMOS Token
+		BYTE,   8,   // 1 byte Data value
+		STAT,   8    // 1 byte status value
+	}
+
+	//--------------------------------------------------------------------
+	// ACCE: access CMOS 
+	//      Arg0 - Opcode (0 = Write, 1 = Read)
+	//      Arg1 - CmosToken
+	//      Arg2 - CmosByte
+	//
+	//      return - 0/FALSE = unsuccessful
+	//               1/TRUE = successful
+	//--------------------------------------------------------------------
+	Method(ACCE, 3, Serialized){
+
+		// if \CCOM is not updated, there was an error allocating the
+		// communication buffer.
+
+		if (LEqual(\CCOM, 0x0123456789ABCDEF)) {
+			Return(0)
+		}
+
+		// Write code & value to the communication buffer
+		Store(Arg0, CODE)
+		Store(Arg1, TOKN)
+		Store(Arg2, BYTE)
+		
+		// Generate SMI type = CSMI
+		Store(CSMI, SRSM)
+        Store(BYTE, Arg2)
+        
+		// Arg2 (BTYE) contains the CMOS value on read
+		// The method return value is Boolean
+		Return(STAT)
+	}
+}
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2010, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosAccess.c b/Core/EM/CmosManager/CmosAccess.c
new file mode 100644
index 0000000..d3dea31
--- /dev/null
+++ b/Core/EM/CmosManager/CmosAccess.c
@@ -0,0 +1,2252 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosAccess.c 25    6/15/10 2:24p Michaela $
+// 
+// $Revision: 25 $
+//
+// $Date: 6/15/10 2:24p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosAccess.c $
+// 
+// 25    6/15/10 2:24p Michaela
+// 
+// 24    3/10/10 4:39p Michaela
+// 
+// 23    3/08/10 5:39p Michaela
+// 
+// 22    3/08/10 1:31p Michaela
+// 
+// 21    3/08/10 1:09p Michaela
+// 
+// 20    3/05/10 4:55p Michaela
+// 
+// 19    12/04/09 7:32p Michaela
+// 
+// 18    12/03/09 6:42p Michaela
+// 1. Updated CmosReadWrite() to use physical access to 
+//    non-checksummed locations within the Managed Region
+//    only if CMOS_RECOVER_ONLY_CHECKSUMMED is TRUE.
+//    (controlled via CMOS_MGR_RECOVER_ONLY_CHECKUMMED
+//    SDL token)
+//    
+// 2. Added CanClearLegacyStatusBits() to determine
+//    whether or not the legacy status bits can be
+//    clear to a non-failure status.
+//    
+// 3. SynchronizeLegacyStatusRegisters() is updated to
+//    only clear the bad checksum failure status in
+//    the legacy status registers in the DXE phase
+//    or on the first boot after flashing the firmware.
+// 
+// 17    11/10/09 9:14p Michaela
+// 
+// 16    7/29/09 9:59a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 15    7/23/09 1:30p Michaela
+// Rename ReadRtcIndex and WriteRtcIndex
+// 
+// 14    6/15/09 5:11p Michaela
+// 
+// 13    6/02/09 3:27p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 12    2/23/09 6:03p Michaela
+// --code clean-up in CmosBankReadWrite()
+// --added test code to support test module it it is present
+// 
+// 11    11/25/08 3:20p Michaela
+// Updates for Label 4.6.3_CMOSMGR_08
+// - Assembly macro fixes
+// - Added assembly macros
+// - Moved loading defaults into DXE phase
+// - Updated help file example
+// 
+// 10    11/17/08 4:40p Michaela
+// --Removed Token Name strings in debug development code
+// 
+// 9     11/17/08 3:39p Michaela
+// --Removed debug development code
+// --CMOS Buffer feature is depreciated
+// --ReadCmosStatusBytes and UpdateBatteryStatus now directly 
+//   calls CmosPhysicalReadWrite to avoid error when the 
+//   Optimal Defaults table is being used for reads & writes
+// 
+// 8     11/14/08 9:12a Michaela
+// **CMOS register variables changed from UINT8 to UINT16
+// **added global CMOS_PORT_MAP array (gCmosBank) for
+//   supporting board-specific access functions.  The array is defined
+//   using the CMOS_PORT_MAPPING Elink.  The array starts at
+//   index 1.
+// **Added CmosBankReadWrite() for calling the board-specific
+//   access functions.
+// **Modified CmosPhysicalReadWrite() to call CmosBankReadWrite()
+//   for physical CMOS access
+// 
+// 7     11/07/08 5:13p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 6     3/25/08 3:04p Michaela
+// --deleted UpdateLegacyChecksumStatus
+// --Modified SynchronizeLegacyStatusRegisters to 
+//   update both battery and checksum status bits
+// 
+// 5     3/07/08 4:07p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 4     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 3     2/26/08 12:49p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 2     2/22/08 3:20p Olegi
+// Renamed some of the equates to avoid the naming collisions.
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosAccess.c
+//
+// Description: Contains the routines that constitute the CMOS access
+//              implementation.  This file contains source code that is used
+//              for both PEI and DXE phases.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Efi.h>
+#ifdef PEI_COMPILE
+    #include <Pei.h>
+    #include <AmiPeiLib.h>
+#else
+    #include <AmiDxeLib.h>
+#endif
+#include <CmosAccess.h>
+#include <SspTokens.h>
+#include "CmosManager.h"
+#include "CmosManagerHob.h"
+#include "CmosBoard.h"
+
+//---------------------------------------------------------------------------
+// CmosBank is initialized using the CMOS_PORT_MAPPING SDL Elink.
+// This array is used to determine which index/data port pair to use or
+// which board-specific access function to call for a specific CMOS register 
+// address. The first element is not used and contains all zeros.
+//---------------------------------------------------------------------------
+
+CMOS_PORT_MAP gCmosBank[] = { {0,0,0,0,0}, CMOS_PORT_MAPPING  };
+UINT16 gCmosBankCount = \
+    sizeof(gCmosBank) / sizeof(CMOS_PORT_MAP);
+
+EFI_CMOS_BATTERY_TEST gCmosBatteryIsGood = CMOS_BATTERY_TEST_MAPPING;
+
+//---------------------------------------------------------------------------
+// Function(s) originally defined in CmosManager.c
+//---------------------------------------------------------------------------
+extern EFI_CMOS_MANAGER_INTERFACE *GetCmosMangerInterface(
+    IN EFI_CMOS_ACCESS_INTERFACE   *Cmos );
+
+
+//---------------------------------------------------------------------------
+// Function(s) originally defined in CmosBuffer.c or CmosPhysical.c
+// depending on the sdl token BUFFERED_CMOS_SUPPORT
+//---------------------------------------------------------------------------
+    
+
+//---------------------------------------------------------------------------
+// Function declarations for this file
+//---------------------------------------------------------------------------
+EFI_STATUS CalculateUpdatedCheckSum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN  UINT16                      CmosAddress,
+    IN  UINT8                       OldCmosValue,
+    IN  UINT8                       NewCmosValue,
+    OUT UINT16                      *NewChecksum );
+
+EFI_STATUS CalculateChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      *ChecksumValue );
+
+EFI_STATUS WriteChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      ChecksumValue );
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: EncodeParameter 
+//
+// Description:
+//      Value is shifted left by the bit field size specified in Token.
+//
+// Input:
+//      OUT UINT8 *Value
+//                  -- Address of value to be encoded 
+//      IN CMOS_TOKEN *Token
+//                  -- Token describing the bit field size
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID EncodeParameter(
+    OUT UINT8       *Value,
+    IN  CMOS_TOKEN  *Token )
+{
+    *Value <<= Token->Value.Field.BitOffset;
+    
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: DecodeParameter
+//
+// Description:
+//      Value is shifted right and masked by the bit field's size and offset
+//      as specified in Token.
+//
+// Input:
+//      OUT UINT8 *Value
+//                  -- Address of value to be decoded
+//      IN CMOS_TOKEN *Token
+//                  -- Token describing the bit field's size and offset
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID DecodeParameter(
+    OUT UINT8        *Value,
+    IN CMOS_TOKEN   *Token )
+{
+    *Value >>= Token->Value.Field.BitOffset;
+    *Value &=  (0xff >> (8 - Token->Value.Field.Size));
+    
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: BitFieldOverflow
+//
+// Description:
+//      For testing whether or not a Value overflows the field size
+//      as specified in Token. 
+//
+// Input:
+//      IN UINT8 *Value
+//                  -- Value to be tested 
+//      IN CMOS_TOKEN *Token
+//                  -- Token describing the bit field's size
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN BitFieldOverflow(
+    IN UINT8        *Value, 
+    IN CMOS_TOKEN   *Token )
+{
+    if ( *Value & ~(0xff >> (8 - Token->Value.Field.Size)) )
+        return TRUE;
+    else
+        return FALSE;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: SetClobberBits
+//
+// Description:
+//      Creates a mask with bits set corresponding to the size and offset
+//      of the bit field as specified by Token.
+//
+// Input:
+//      OUT UINT8 *Mask
+//                  -- Mask to be created
+//      IN CMOS_TOKEN *Token
+//                  -- Token describing the bit field's size and offset
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID SetClobberBits(
+    OUT UINT8        *Mask, 
+    IN CMOS_TOKEN   *Token )
+{
+    *Mask = 0xff >> (8 - Token->Value.Field.Size);
+    *Mask <<= Token->Value.Field.BitOffset;
+}
+
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosFindToken
+//
+// Description:
+//      Returns index of CMOS token in token table or 0 if not found.
+//
+// Input:
+//      IN  EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- This is the CMOS Manager interface pointer.
+//      IN  UINT16 CmosToken 
+//                  -- Encoded CMOS token for which to locate an index into
+//                     the CMOS token table
+//
+// Output:
+//      UINT16 (Return Value)
+//                  = Index of the CmosToken in the token table, or
+//                  = 0, if the CmosToken was not found
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+UINT16 CmosFindToken(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN  UINT16                      CmosToken )
+{
+    UINT16   i = 0;   // First valid token table index is 1
+    
+    while (++i < Manager->TokenCount) {
+        if (Manager->TokenTable[i].Value.AllBits == CmosToken) {
+            break;
+        }
+    }
+    
+    if (i < Manager->TokenCount)
+        return i;
+
+    return 0;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosGetTokenFromRegister
+//
+// Description:
+//      Returns encoded token for the specified register.
+//
+// Input:
+//      IN  EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- This is the CMOS Manager interface pointer.
+//      IN  UINT8 CmosRegister 
+//                  -- CMOS register to for which to search
+//
+// Output:
+//      UINT16 (Return Value)
+//                  = Token found in the token table, or
+//                  = 0, if the Register was not found
+//
+// Notes:
+//
+//      Caller must ensure the register has been reserved properly
+//      in SSP.
+//
+//      This should be considered a risky function call and extra care
+//      should be taken to ensure the proper CmosRegister is specified.
+//
+//      This function has the potential for problems, as it is possible that 
+//      a specified CmosRegister has not been defined in SSP and/or may
+//      be used by another CmosToken.
+//
+//      All verification of parameters must be done by the caller.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+UINT16 CmosGetTokenFromRegister(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  UINT16                      CmosRegister )
+{
+    UINT16                      i = 0;
+    EFI_CMOS_MANAGER_INTERFACE  *Manager = GetCmosMangerInterface(Cmos);
+    
+    // Manager->TokenCount is the total number of entries in 
+    // Manager->TokenTable where the first entry is zero.
+    
+    while (++i < Manager->TokenCount) {
+        if (Manager->TokenTable[i].Value.Field.CmosAddress == CmosRegister){
+            break;
+        }
+    }
+    
+    // Minimal error checking is to ensure it is an 8-bit CMOS Token
+    if (i < Manager->TokenCount ){
+        if (Manager->TokenTable[i].Value.Field.Size == 8)
+            return Manager->TokenTable[i].Value.AllBits;
+    }
+
+    // a valid token is greater than 0x1000
+    return 0;  
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosBankReadWrite
+//
+// Description:
+//      This function determines which structure in the global CMOS_PORT_MAP
+//      array corresponds to the provided CmosAddress and either calls the
+//      associated function or uses the associated IO ports to read/write the 
+//      CMOS register value to/from the CmosParameterValue.
+//      
+// Input:
+//      IN      EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  --  Pointer to the CMOS Manager internal interface
+//      IN      CMOS_ACCESS_TYPE AccessType
+//                  --  WriteType or ReadType
+//      IN      UINT16 CmosAddress
+//                  --  CMOS register to for which the access is to be made
+//      IN/OUT  UINT8 *CmosParameterValue
+//                  --  This is the value to write for write access or the 
+//                      value that was read for read access.
+//              
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      N/A
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosBankReadWrite(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN  CMOS_ACCESS_TYPE            AccessType,
+    IN  UINT16                      CmosAddress,
+    IN OUT UINT8                    *CmosParameterValue )
+{
+    UINT8       i = 1;
+    EFI_STATUS  Status = EFI_NOT_FOUND;
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices); // defines NULL if DXE
+
+    // scan the CMOS_PORT_MAP array to determine how to access this address
+    for (; i < gCmosBankCount; i++)
+    {
+      if (     (CmosAddress >= gCmosBank[i].Low) 
+            && (CmosAddress <= gCmosBank[i].High) )
+      {
+      
+        // First, attempt to call the board-specific function if available
+        if (gCmosBank[i].BoardReadWrite != NULL){
+            Status = gCmosBank[i].BoardReadWrite( PeiServices,
+                                              AccessType,
+                                              CmosAddress,
+                                              CmosParameterValue );
+            break;
+        }
+        
+        // Otherwise, attempt to use the provided index/data ports 
+        // if available (assuming 8 bit port access)
+        else if ( (gCmosBank[i].Index > 0) && (gCmosBank[i].Data > 0) ){
+            IoWrite8( gCmosBank[i].Index, (UINT8)CmosAddress );
+            if (AccessType == ReadType){
+                *CmosParameterValue = IoRead8( gCmosBank[i].Data );
+            }
+            else {
+                IoWrite8( gCmosBank[i].Data, *CmosParameterValue );
+            }
+            Status = EFI_SUCCESS;
+            break;
+        }
+        
+      }
+    }
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosPhysicalReadWrite
+//
+// Description:
+//      This function provides support for performing the actual
+//      read or write from/to a physical CMOS location.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manager interface pointer
+//      IN CMOS_ACCESS_TYPE AccessType
+//                  -- Specifies whether to perform a read or a write
+//      IN UINT8 CmosAddress
+//                  -- Actual CMOS address/offset
+//      IN UINT8 BitsToWrite
+//                  -- Mask specifying the bits to be written (these
+//                      bits will be cleared first)
+//      IN OUT  UINT8 *CmosParameterValue
+//                  -- CMOS value to be written or, on successful exit, will
+//                      contain the value that was read
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosPhysicalReadWrite(
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN      CMOS_ACCESS_TYPE            AccessType,
+    IN      UINT16                      CmosAddress,
+    IN      UINT8                       BitsToWrite,  
+    IN OUT  UINT8                       *CmosParameterValue )
+{
+    UINT8       CmosRegisterValue;
+    UINT8       NewValue;
+    UINT16      NewChecksum = 0;
+    EFI_STATUS  Status = EFI_SUCCESS;
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+
+    // Always read the value
+    CmosBankReadWrite( Manager,
+                       ReadType,
+                       CmosAddress,
+                       &CmosRegisterValue );
+    
+    // If read access, simply return the unmodified data
+    if ( AccessType == ReadType ) {
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "    Physical Read: Register 0x%02X = 0x%02X\n",
+            CmosAddress, CmosRegisterValue));
+        *CmosParameterValue = CmosRegisterValue;
+    }
+    
+    // If writing, then don't clobber unused bits
+    else {
+        NewValue = (CmosRegisterValue & ~BitsToWrite) | *CmosParameterValue;
+
+        // get the new checksum before writing
+        if (!Manager->CheckStatus(Manager, CMOS_FORCE_NO_CHECKSUM))
+            Status = CalculateUpdatedCheckSum( Manager, CmosAddress,
+                CmosRegisterValue, NewValue, &NewChecksum);
+
+        // write the value
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "    Physical Write: Register 0x%02X = 0x%02X\n",
+            CmosAddress, NewValue));
+        CmosBankReadWrite( Manager,
+                           WriteType,
+                           CmosAddress,
+                           &NewValue );
+        
+        // write the checksum, if necessary 
+        // (this write will cause an infinite loop without a flag)
+        if (!Manager->CheckStatus(Manager, CMOS_FORCE_NO_CHECKSUM)){
+            if (Manager->CheckStatus(Manager, CMOS_ADDRESS_IS_CHECKSUMMED)){
+                Manager->SetStatus(Manager, CMOS_FORCE_NO_CHECKSUM);
+                WriteChecksum( Manager, NewChecksum );
+                Manager->ClearStatus(Manager, CMOS_FORCE_NO_CHECKSUM);
+            }
+        }
+    }
+
+    return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: NotChecksummed
+//
+// Description:
+//      This function returns TRUE if the CmosAddress is NOT included in the
+//      checksum and returns FALSE otherwise.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE  *Manager
+//                  -- Manager interface pointer
+//      IN UINT8 CmosAddress
+//                  -- Actual CMOS address/offset
+//
+// Output:
+//      BOOLEAN (Return Value)
+//                  = TRUE if CmosAddress is NOT included in the checksum
+//                  = FALSE if CmosAddress IS included in the checksum
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN NotChecksummed(
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Mgr,
+    IN      UINT16                      CmosAddress )
+{
+    UINT16  NoChecksumIndex = 1;    // NoChecksumTable starts at 1
+
+    while ( (NoChecksumIndex < Mgr->NoChecksumCount)
+         && (CmosAddress > Mgr->NoChecksumTable[NoChecksumIndex].Index) )
+    {
+        ++NoChecksumIndex;
+    }
+
+    if ( CmosAddress == Mgr->NoChecksumTable[NoChecksumIndex].Index )
+        return TRUE;
+    else
+        return FALSE;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosBufferReadWrite
+//
+// Description:
+//      This function provides support for performing the actual
+//      read or write from/to a CMOS buffer location (using the 
+//      Optimal Defaults Table Buffer).
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE  *Manager
+//                  -- Manager interface pointer
+//      IN CMOS_ACCESS_TYPE AccessType
+//                  -- Specifies whether to perform a read or a write
+//      IN UINT8 CmosAddress
+//                  -- Actual CMOS address/offset
+//      IN UINT8 BitsToWrite
+//                  -- Mask specifying the bits to be written (these
+//                     bits will be cleared first)
+//      IN OUT UINT8 *CmosParameterValue
+//                  -- CMOS value to be written or, on successful exit, will
+//                     contain the value that was read
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//
+//      Control comes here because of one of two reasons:
+//
+//      1) The checksum is bad
+//
+//                  All writes/read are to/from the 
+//                  Manager->OptimalDefaultTable only for locations not found 
+//                  in the Manager->NoChecksumTable until DXE phase.
+//
+//      2) The battery is bad
+//
+//                  All writes/read are to/from the 
+//                  Manager->OptimalDefaultTable for all locations.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosBufferReadWrite(
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN      CMOS_ACCESS_TYPE            AccessType,
+    IN      UINT16                      CmosAddress,
+    IN      UINT8                       BitsToWrite,  
+    IN OUT  UINT8                       *CmosParameterValue )
+{
+    EFI_STATUS  Status = EFI_SUCCESS;
+    UINT8       NewValue;
+    UINT16      NewChecksum = 0;
+    UINT8       CmosRegisterValue;
+    // First CMOS register @ buffer index 1
+    UINT16      BufferIndex = CmosAddress - FIRST_CMOS_REGISTER + 1; 
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+
+    if (CmosAddress < FIRST_CMOS_REGISTER || CmosAddress > LAST_CMOS_REGISTER){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+            "    CmosBufferReadWrite: Invalid CmosAddress (0x%X)\n", 
+            CmosAddress ));
+        return EFI_INVALID_PARAMETER;
+    }
+
+    // get the default value from the table
+    CmosRegisterValue = Manager->OptimalDefaultTable[BufferIndex].Value;
+                            
+    // If read access, simply return the unmodified data
+    if ( AccessType == ReadType ) {
+        *CmosParameterValue = CmosRegisterValue;
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "    Buffer Read: 0x%X = OptimalDefaultTable[%d].Value \n",
+            CmosRegisterValue, BufferIndex  ));
+    }
+    
+    // If writing, mark the location as dirty and don't clobber unused bits 
+    else {
+        NewValue = (CmosRegisterValue & ~BitsToWrite) | *CmosParameterValue;
+
+        // get the new checksum before writing (this sets or clears
+        // the CMOS_ADDRESS_IS_CHECKSUMMED Manager->ManagerStatus flag)
+        if (!Manager->CheckStatus(Manager, CMOS_FORCE_NO_CHECKSUM)) {
+            Status = CalculateUpdatedCheckSum( Manager, CmosAddress,
+                CmosRegisterValue, NewValue, &NewChecksum);
+        }
+
+        // Optimal default table writes take precedence
+        Manager->OptimalDefaultTable[BufferIndex].Value = NewValue;
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "    Buffer Write: OptimalDefaultTable[%d].Value = 0x%X\n",
+            BufferIndex, NewValue ));
+
+        // write the checksum, if necessary
+        // (this write will cause an infinite loop without a flag)
+        if (!Manager->CheckStatus(Manager, CMOS_FORCE_NO_CHECKSUM)){
+            if (Manager->CheckStatus(Manager, CMOS_ADDRESS_IS_CHECKSUMMED)){
+                Manager->SetStatus(Manager, CMOS_FORCE_NO_CHECKSUM);
+                WriteChecksum( Manager, NewChecksum );
+                Manager->ClearStatus(Manager, CMOS_FORCE_NO_CHECKSUM);
+                CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                    "    NewChecksum = 0x%X\n",
+                    NewChecksum ));
+            }
+        }
+    }
+
+    return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosReadWrite
+//
+// Description:
+//      Decides which version of xxxReadWrite to call based upon the
+//      current Access Routing Logic.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manager interface pointer
+//      IN CMOS_ACCESS_TYPE AccessType
+//                  -- Specifies whether to perform a read or a write
+//      IN UINT8 CmosAddress
+//                  -- Actual CMOS address/offset
+//      IN UINT8 BitsToWrite
+//                  -- Mask specifying the bits to be written (these
+//                      bits will be cleared first)
+//      IN OUT  UINT8 *CmosParameter
+//                  -- CMOS value to be written or, on successful exit, will
+//                      contain the value that was read
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosReadWrite(
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Mgr,
+    IN      CMOS_ACCESS_TYPE            AccessType,
+    IN      UINT16                      CmosAddress,
+    IN      UINT8                       BitsToWrite,  
+    IN OUT  UINT8                       *CmosParameter )
+{
+    BOOLEAN UseBufferAccess = FALSE;
+    
+    // If the checksum is bad or the battery is bad, accesses will be
+    // routed to the optimal default table by default.
+
+    if ( Mgr->CheckStatus( Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED )){
+        UseBufferAccess = TRUE;
+        
+        // Force physical access if these conditions are applicable:
+        //
+        //      1. the CMOS is usable,
+        //      2. recovery is limited to only checksummed locations
+        //      3. the current location is not checksummed
+
+        if (    Mgr->CheckStatus( Mgr, CMOS_IS_USABLE ) 
+            &&  Mgr->CheckStatus( Mgr, CMOS_RECOVER_ONLY_CHECKSUMMED )
+            &&  NotChecksummed( Mgr, CmosAddress ) )
+        {
+           UseBufferAccess = FALSE;
+        }
+    }
+
+    if (UseBufferAccess)        
+        return CmosBufferReadWrite( Mgr,
+                                    AccessType, 
+                                    CmosAddress,  
+                                    BitsToWrite,
+                                    CmosParameter);
+    else
+        return CmosPhysicalReadWrite(   Mgr,
+                                        AccessType, 
+                                        CmosAddress,  
+                                        BitsToWrite,
+                                        CmosParameter);
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosReadWriteEncodedToken
+//
+// Description:
+//      This is the main worker function which verifies and either  
+//      reads/writes a value from/to the CMOS location as specified by the  
+//      encoded token.
+//
+// Input:
+//      IN      EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- This is the CMOS Manager interface pointer.
+//      IN      CMOS_ACCESS_TYPE AccessType
+//                  -- Specifies whether to perform a read or a write
+//      IN      UINT16 TokenTableIndex
+//                  -- Index into the token table
+//      IN OUT  UINT8 *CmosParameter
+//                  -- CMOS value to be written or, on successful exit, will
+//                      contain the value that was read
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = EFI_INVALID_PARAMETER, if the CmosParameter does
+//                      not comply with the expected size
+//                  = or other valid EFI error code
+//
+// Notes:
+//                  1) Gets the CMOS token from the global table
+//                  2) If writing, the value is error-checked for size and 
+//                      up-shifted to the correct bit position. Also, the
+//                      BitsToWrite mask is used to specify
+//                      which bits to clear in the destination before
+//                      writing.
+//                  3) This token is decoded to get the CMOS index, 
+//                  4) The read/write is performed
+//                  5) If reading, the value is down-shifted and masked to 
+//                      return the expected value.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosReadWriteEncodedToken(
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN      CMOS_ACCESS_TYPE            AccessType,
+    IN      UINT16                      TokenTableIndex,
+    IN OUT  UINT8                       *CmosParameter )
+{
+    CMOS_TOKEN  *CmosToken = &Manager->TokenTable[TokenTableIndex];
+    UINT8       BitsToWrite = 0;
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+    
+    // If writing, encode the CmosParameter
+
+    if (AccessType == WriteType) {
+    
+        // Check to make sure the data is the correct size for the bit field
+
+        if ( BitFieldOverflow(CmosParameter, CmosToken) ){
+            return EFI_INVALID_PARAMETER;
+        }
+
+        // Shift up to the correct offset within the byte
+
+        EncodeParameter(CmosParameter, CmosToken);
+        
+        // Set the bits in BitsToWrite mask that are 
+        // consumed by this token
+
+        SetClobberBits(&BitsToWrite, CmosToken);
+    }
+    
+    // Read (or write) the CmosParameter to actual (or CMOS buffer) location
+
+    CmosReadWrite(Manager,
+                AccessType, 
+                (UINT16)CmosToken->Value.Field.CmosAddress,  // byte address
+                BitsToWrite,
+                CmosParameter);
+    
+    // If reading, shift down to bit-position zero and mask off upper bits
+
+    if (AccessType == ReadType) 
+        DecodeParameter(CmosParameter, CmosToken);
+    
+    return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosRead
+//
+// Description:
+//      Reads to CmosValue from the CMOS location specified by CmosToken.
+//
+// Input:
+//      IN  EFI_CMOS_ACCESS_INTERFACE *Cmos
+//                  -- This is the access interface pointer.
+//      IN  UINT16 CmosToken 
+//                  -- This is the encoded CMOS location.
+//      OUT UINT8 *CmosValue
+//                  -- On success, this will contain the value at
+//                      the specified CMOS location.
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = EFI_NOT_FOUND, if the token is not in the token table
+//                  = or other valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosRead(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  UINT16                      CmosToken,
+    OUT UINT8                       *CmosValue )
+{
+    EFI_STATUS                      Status = EFI_NOT_FOUND;
+    UINT16                          TokenTableIndex = 0;
+    EFI_CMOS_MANAGER_INTERFACE      *Mgr = GetCmosMangerInterface(Cmos);
+    DEFINE_PEI_SERVICES(Cmos->PeiServices);
+
+    // if CmosToken <= 0xe, then always read the register.  These registers
+    // will be readable regardless of the state of the battery.
+
+    if (CmosToken <= 0xe){
+        Status = CmosBankReadWrite( Mgr, ReadType, CmosToken, CmosValue );
+    }
+
+    // Otherwise, if CmosToken < MIN_TOKEN_VALUE and the battery is good, 
+    // then directly  read the register. (For a bad battery, return 
+    // EFI_DEVICE_ERROR.)
+
+    else if (CmosToken < MIN_TOKEN_VALUE) {
+        if ( !Mgr->CheckStatus( Mgr, CMOS_IS_USABLE ) ) {
+            Status = EFI_DEVICE_ERROR;
+        }
+        else {
+            Status = CmosBankReadWrite( Mgr, ReadType, CmosToken, CmosValue );
+        }
+    }
+
+    // Otherwise, after validating the CmosToken, decode it to read the  
+    // associated register bit(s).
+
+    else {
+        TokenTableIndex = CmosFindToken(Mgr, CmosToken);
+        if (TokenTableIndex > 0) {
+            Status = CmosReadWriteEncodedToken( Mgr, ReadType, 
+                                                TokenTableIndex, CmosValue);
+        }
+        else
+            Status = EFI_INVALID_PARAMETER;
+    }
+    
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: ReadCmosBytes
+//
+// Description:
+//      Reads Bytes from the specified CMOS register(s).
+//
+// Input:
+//      IN  EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manger interface pointer.
+//      IN UINT8 Count
+//                  -- Count of CMOS_BYTEs to read
+//      OUT CMOS_BYTE *Bytes
+//                  -- An array of CMOS_BYTE structures
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS ReadCmosBytes(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN  UINT16                      Count,
+    OUT CMOS_BYTE                   *CmosBytes )
+{
+    EFI_STATUS                      Status = EFI_SUCCESS;
+    UINT16                          i = 0;
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+
+
+    for (; i < Count; i++){
+        Status = CmosReadWrite(Manager, ReadType, CmosBytes[i].Register, 0, 
+                                         &CmosBytes[i].Value);
+    }
+
+    return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: ReadCmosStatusBytes
+//
+// Description:
+//      Initializes a CMOS_STATUS_BYTES structure and reads the associated
+//      CMOS registers.
+//
+// Input:
+//      IN  EFI_CMOS_ACCESS_INTERFACE *Cmos
+//                  --  Manger interface pointer.
+//      OUT CMOS_STATUS_BYTES *StatusBytes
+//                  --  Address of a valid, uninitialized, CMOS_STATUS_BYTES 
+//                      structure.
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS ReadCmosStatusBytes(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    OUT CMOS_STATUS_BYTES           *StatusBytes )
+{
+    EFI_STATUS                  Status = EFI_SUCCESS;
+    EFI_CMOS_MANAGER_INTERFACE  *Mgr = GetCmosMangerInterface(Cmos);
+    UINT8                       CmosValue;
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    if (StatusBytes == NULL)
+        return Status = EFI_INVALID_PARAMETER;
+    
+    StatusBytes->DiagnosticStatusRegister = CMOS_DIAGNOSTIC_STATUS_REGISTER;
+    StatusBytes->BatteryStatusRegister = CMOS_RTC_STATUS_REGISTER;
+    
+    CmosPhysicalReadWrite(  Mgr, 
+                            ReadType, 
+                            StatusBytes->BatteryStatusRegister,
+                            0, 
+                            &StatusBytes->Battery.AllBits );
+                                    
+    CmosPhysicalReadWrite(  Mgr, 
+                            ReadType, 
+                            StatusBytes->DiagnosticStatusRegister,
+                            0, 
+                            &StatusBytes->Diagnostic.AllBits );
+                            
+    if ( Mgr->CheckStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED) )
+        StatusBytes->ConfigurationStatus.IsVirtualized = TRUE;
+    else
+        StatusBytes->ConfigurationStatus.IsVirtualized = FALSE;
+
+    // If the CMOS hardware is usable, update from cmos-based
+    // status bits, which are more reliable.  Otherwise, use the 
+    // the memory-based status.
+    //
+    // Note, some information could be lost on reset in DXE 
+    // when using the memory-based status.
+    //
+    // Also, register 0xe is cleared in DXE, if the CMOS
+    // is usable and the checksum has been recalculated.
+
+    StatusBytes->ConfigurationStatus.BadBattery = FALSE;
+    StatusBytes->ConfigurationStatus.DefaultsLoaded = FALSE;
+    StatusBytes->ConfigurationStatus.IsFirstBoot = FALSE;
+    StatusBytes->ConfigurationStatus.BadChecksum = FALSE;
+
+    if ( Mgr->CheckStatus(Mgr, CMOS_IS_USABLE) ) {
+        StatusBytes->ConfigurationStatus.NotUsable = FALSE;
+
+        Cmos->Read( Cmos, CMOS_MGR_BATTERY_BAD, &CmosValue ); 
+        StatusBytes->ConfigurationStatus.BadBattery |= CmosValue;
+
+        Cmos->Read( Cmos, CMOS_MGR_DEFAULTS_LOADED, &CmosValue ); 
+        StatusBytes->ConfigurationStatus.DefaultsLoaded |= CmosValue;
+
+        Cmos->Read( Cmos, CMOS_MGR_FIRST_BOOT_DETECTED, &CmosValue ); 
+        StatusBytes->ConfigurationStatus.IsFirstBoot |= CmosValue;
+
+        Cmos->Read( Cmos, CMOS_MGR_CHECKSUM_BAD,&CmosValue ); 
+        StatusBytes->ConfigurationStatus.BadChecksum |= CmosValue;
+    }
+    else {
+        StatusBytes->ConfigurationStatus.NotUsable = TRUE;
+        if ( Mgr->CheckStatus(Mgr, CMOS_BAD_BATTERY) )
+            StatusBytes->ConfigurationStatus.BadBattery = TRUE;
+        if ( Mgr->CheckStatus(Mgr, CMOS_DEFAULTS_LOADED) )
+            StatusBytes->ConfigurationStatus.DefaultsLoaded = TRUE;
+        if ( Mgr->CheckStatus(Mgr, CMOS_FIRST_BOOT_DETECTED) )
+            StatusBytes->ConfigurationStatus.IsFirstBoot = TRUE;
+        if ( Mgr->CheckStatus(Mgr, CMOS_BAD_CHECKSUM) )
+            StatusBytes->ConfigurationStatus.BadChecksum = TRUE;
+    }
+
+
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: ReadChecksum
+//
+// Description:
+//      Reads the checksum from the CMOS register(s).
+//
+// Input:
+//      IN  EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manger interface pointer.
+//      OUT UINT16 *ChecksumValue
+//                  -- The returned checksum value
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS ReadChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      *ChecksumValue )
+{
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+
+    Manager->Access.Read( &Manager->Access, CMOS_CHECKSUM_HIGH, 
+        (UINT8*)ChecksumValue );
+    *ChecksumValue <<= 8;
+    Manager->Access.Read( &Manager->Access, CMOS_CHECKSUM_LOW, 
+        (UINT8*)ChecksumValue );
+
+    return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: WriteChecksum
+//
+// Description:
+//      Write the checksum to the CMOS register(s).
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manger interface pointer.
+//      IN UINT16 ChecksumValue
+//                  -- Value to write to the checksum location.
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS WriteChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN  UINT16                      ChecksumValue )
+{
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+
+    // update the HOB if available
+
+    if (Manager->ManagerHob != NULL)
+        Manager->ManagerHob->Checksum = ChecksumValue;
+
+        
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "WriteChecksum: Value = 0x%X\n",
+        ChecksumValue ));
+
+    // update the CMOS checksum
+
+    Manager->SetStatus(Manager, CMOS_FORCE_NO_CHECKSUM);
+    Manager->Access.Write( &Manager->Access, CMOS_CHECKSUM_LOW, 
+        (UINT8)ChecksumValue );
+    ChecksumValue >>= 8;
+    Manager->Access.Write( &Manager->Access, CMOS_CHECKSUM_HIGH, 
+        (UINT8)ChecksumValue );
+    Manager->ClearStatus(Manager, CMOS_FORCE_NO_CHECKSUM);
+
+    
+    return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: UpdateBatteryStatus
+//
+// Description:
+//      This function is used to update the CMOS battery status.  It is up
+//      to the user of the Manager interface to determine whether or ot
+//      the platform supports this feature.  (If the platform does not 
+//      support this feature, the battery status is indeterminate.)
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+
+EFI_STATUS UpdateBatteryStatus (
+    IN EFI_CMOS_MANAGER_INTERFACE   *Mgr )
+{
+    EFI_STATUS          Status = EFI_SUCCESS;
+    BOOLEAN             IsGood;
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, "\n\nUpdateBatteryStatus Entry\n"));
+    
+    // Update the battery status bit in the Manager's CMOS_MANAGER_STATUS
+    // field and update the legacy CMOS status register if legacy register
+    // updates are enabled.
+
+#ifdef PEI_COMPILE
+    IsGood = gCmosBatteryIsGood( PeiServices );
+#else
+    IsGood = gCmosBatteryIsGood( NULL );
+#endif
+
+    if ( IsGood ) {
+        Mgr->ClearStatus(Mgr, CMOS_BAD_BATTERY); 
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, "    ...Battery is good.\n" ));
+    }
+    else {
+        Mgr->SetStatus(Mgr, CMOS_BAD_BATTERY); 
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, "    ...Battery is BAD!!\n" ));
+    }
+
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CanClearLegacyStatusBits
+//
+// Description:
+//      Determines whether or not the legacy status bits in 
+//      CMOS_DIAGNOSTIC_STATUS_REGISTER can be cleared to a non-failure
+//      status.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Mgr
+//                  -- Manger interface pointer
+//
+// Output:
+//      BOOLEAN (Return Value)
+//                  = TRUE - bits can be cleared
+//                  = FALSE - bits can be cleared
+//
+// Notes:
+//
+//  EFI_CMOS_ACCESS_INTERFACE.PeiServices == NULL in DXE phase.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CanClearLegacyStatusBits (
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Mgr )
+{
+    BOOLEAN  IsDxePhase = (Mgr->Access.PeiServices == NULL) ? TRUE : FALSE;
+    BOOLEAN  IsFirstBoot = Mgr->CheckStatus(Mgr, CMOS_FIRST_BOOT_DETECTED);
+
+    if ( IsDxePhase  ){
+        return TRUE;
+    } 
+    else {
+        return FALSE;
+    }
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: SynchronizeLegacyStatusRegisters
+//
+// Description:
+//      Synchronizes legacy CMOS status registers with status changes.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manger interface pointer
+//      IN CMOS_MANAGER_STATUS BitMap
+//                  -- The status bits to be modified
+//      IN CMOS_BIT_ACCESS_TYPE AccessType
+//                  -- Specifies whether to set or clear the bits
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      The BitMap contains all the bits to be modified in the legacy
+//      status registers.
+//
+//      If CMOS_LEGACY_STATUS_ENABLED is off, or is being turned off, this 
+//      function will not modify CMOS registers.
+//
+//      Failure status bits in CMOS_DIAGNOSTIC_STATUS_REGISTER can only be 
+//      cleared if this is the first boot or if executing in the DXE phase.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS SynchronizeLegacyStatusRegisters(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Mgr,
+    IN CMOS_MANAGER_STATUS          BitMap,
+    IN CMOS_BIT_ACCESS_TYPE         AccessType )
+{
+    DIAGNOSTIC_STATUS_BYTE  StatusByte;
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "\n\nSynchronizeLegacyStatusRegisters: Entry\n" ));
+
+    // If the checksum status is being modified, 
+    // then update the ChecksumIsBad bit
+    
+    if ( (BitMap & CMOS_BAD_CHECKSUM) != 0 )
+    {
+        // Read the legacy diagnostic status register
+
+        CmosBankReadWrite(  Mgr, ReadType, CMOS_DIAGNOSTIC_STATUS_REGISTER, 
+                            &StatusByte.AllBits );
+
+        if (AccessType == SetType){
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "  StatusByte.Field.ChecksumIsBad = 1\n" ));
+            StatusByte.Field.ChecksumIsBad = 1;
+        } 
+        else if ( CanClearLegacyStatusBits(Mgr) ) {
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "  StatusByte.Field.ChecksumIsBad = 0\n" ));
+            StatusByte.Field.ChecksumIsBad = 0;
+        }
+        else {
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "  StatusByte.Field.ChecksumIsBad = No Change\n" ));
+        }
+
+        // write back the changes
+
+        CmosBankReadWrite(  Mgr, WriteType, CMOS_DIAGNOSTIC_STATUS_REGISTER, 
+                            &StatusByte.AllBits );
+    }   
+    else {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "  StatusByte.Field.ChecksumIsBad = No Change\n" ));
+    }         
+    
+    
+
+    // If the battery status is being modified, 
+    // then update the RtcPowerIsBad bit
+    
+    if (  (BitMap & CMOS_BAD_BATTERY) != 0 )
+    {
+        // Read the legacy diagnostic status register
+
+        CmosBankReadWrite(  Mgr, ReadType, CMOS_DIAGNOSTIC_STATUS_REGISTER, 
+                            &StatusByte.AllBits );
+
+        if (AccessType == SetType){
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "  StatusByte.Field.RtcPowerIsBad = 1\n" ));
+            StatusByte.Field.RtcPowerIsBad = 1;
+        } 
+        else if ( CanClearLegacyStatusBits(Mgr) ) {
+            StatusByte.Field.RtcPowerIsBad = 0;
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "  StatusByte.Field.RtcPowerIsBad = 0\n" ));
+        }
+
+        // Write the legacy diagnostic status register
+
+        CmosBankReadWrite(  Mgr, WriteType, CMOS_DIAGNOSTIC_STATUS_REGISTER, 
+                            &StatusByte.AllBits );
+    }
+    else {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "  StatusByte.Field.RtcPowerIsBad = No Change\n" ));
+    }
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "SynchronizeLegacyStatusRegisters: Exit\n\n" ));
+                  
+    return EFI_SUCCESS;
+                  
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CalculateUpdatedCheckSum
+//
+// Description:
+//      Computes a new "updated" CMOS checksum based on the change of value
+//      at a single address.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE  *Manager
+//                  -- The Manger interface pointer.
+//      IN UINT16 CmosAddress
+//                  -- CMOS location to be changed
+//      IN UINT8 OldCmosValue
+//                  -- Current value at the CMOS location
+//      IN UINT8 NewCmosValue
+//                  -- New value to be written to the CMOS location
+//      OUT UINT16 *NewChecksum 
+//                  -- Updated checksum
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or a valid EFI error code
+//
+// Notes:
+//      After this call, Manager->CheckStatus(Manager, 
+//      CMOS_ADDRESS_IS_CHECKSUMMED) returns TRUE if the address "is" 
+//      included in the checksum.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CalculateUpdatedCheckSum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Mgr,
+    IN  UINT16                      CmosAddress,
+    IN  UINT8                       OldCmosValue,
+    IN  UINT8                       NewCmosValue,
+    OUT UINT16                      *NewChecksum )
+{
+    UINT16  UnmanagedIndex = 1;  // UnmanagedTable starts at 1
+    UINT16  NoChecksumIndex = 1; // NoChecksumTable starts at 1
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    // Check if the address is included in the NoChecksumTable 
+    // or the UnmanagedTable
+
+    while ( NoChecksumIndex < Mgr->NoChecksumCount )
+    {
+        if ( CmosAddress <= Mgr->NoChecksumTable[NoChecksumIndex].Index )
+            break;
+        ++NoChecksumIndex;
+    }
+
+    while ( UnmanagedIndex < Mgr->UnmanagedTableCount )
+    {
+        if ( CmosAddress <= Mgr->UnmanagedTable[UnmanagedIndex].Index )
+            break;
+        ++UnmanagedIndex;
+    }
+
+    
+    // Set ManagerStatus and compute NewChecksum if necessary 
+
+    if (    CmosAddress == Mgr->NoChecksumTable[NoChecksumIndex].Index 
+         || CmosAddress == Mgr->UnmanagedTable[UnmanagedIndex].Index     )
+    {
+#if (FULL_CMOS_MANAGER_DEBUG)
+        if ( CmosAddress == Mgr->NoChecksumTable[NoChecksumIndex].Index ) {
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "    ->Not Checksummed (0x%X)\n", CmosAddress ));
+        }
+        else {
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "    ->Not Managed (0x%X)\n", CmosAddress ));
+        }
+#endif
+        Mgr->ClearStatus(Mgr, CMOS_ADDRESS_IS_CHECKSUMMED);
+    }
+    else {
+        ReadChecksum( Mgr, NewChecksum );
+        *NewChecksum = *NewChecksum - OldCmosValue + NewCmosValue;
+        Mgr->SetStatus(Mgr, CMOS_ADDRESS_IS_CHECKSUMMED);
+    }
+    
+    return EFI_SUCCESS;
+}
+
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CalculateChecksum
+//
+// Description:
+//      Calculate the checksum over the entire range of managed CMOS
+//      (standard and/or extended CMOS).
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- The Manger interface pointer.
+//      OUT UINT16 *ChecksumValue 
+//                  -- The calculated checksum.
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Modified:
+//      Manager->ManagerStatus
+//                  CMOS_BAD_CHECKSUM - set/clear after comparing with
+//                                      the current checksum in CMOS.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CalculateChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Mgr,
+    OUT UINT16                      *ChecksumValue )
+{
+    //-----------------------------------------------------------------------
+    // Algorithm Notes:
+    //
+    //  The NoChecksumTable is in numeric order and contains all CMOS
+    //  registers starting at FIRST_CMOS_REGISTER and ending with
+    //  LAST_CMOS_REGISTER unless the register has been explicitly specified
+    //  with Checksum = YES in the NvramField declaration.
+    //
+    //  ...the NoChecksumTable need traversed only once.
+    //-----------------------------------------------------------------------
+
+    UINT16  CurRegister;
+    UINT8   CurValue;
+    UINT16  UnmanagedIndex = 1;  // UnmanagedTable starts at 1
+    UINT16  NoChecksumIndex = 1; // NoChecksumTable starts at 1
+    UINT16  CurrentChecksum;
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    *ChecksumValue = 0; // ...just in case
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "\n\nCalculateChecksum: Entry\n" ));
+    
+    // Calculate it
+    for ( CurRegister = Mgr->FirstManagedRegister; 
+          CurRegister <= Mgr->LastManagedRegister;   // inclusive
+          ++CurRegister ) 
+    {
+        //---------------------------------------------
+        // Skip the location if the location is not managed
+        //
+        // Note: the UnmanagedTable is in numeric order, 
+        //       so it only needs traversed one time.
+        //---------------------------------------------
+        
+        while ( (UnmanagedIndex < Mgr->UnmanagedTableCount)
+                && (CurRegister 
+                    > Mgr->UnmanagedTable[UnmanagedIndex].Index) )
+        {
+            ++UnmanagedIndex;
+        }
+        if ( CurRegister == Mgr->UnmanagedTable[UnmanagedIndex].Index ){
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "    -->0x%X (un-managed)\n", CurRegister));
+            continue;
+        }
+
+
+        while ( (NoChecksumIndex < Mgr->NoChecksumCount)
+                && (CurRegister 
+                        > Mgr->NoChecksumTable[NoChecksumIndex].Index) )
+        {
+            ++NoChecksumIndex;
+        }
+            
+
+        if ( (CurRegister != 
+                Mgr->NoChecksumTable[NoChecksumIndex].Index ) )
+        {
+            CmosReadWrite(Mgr, ReadType, CurRegister, 0, 
+                &CurValue);
+            *ChecksumValue += CurValue; // update the output parameter
+        }
+    }
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "\n         --------------------------------\n"));
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS,   
+        "         Computed *ChecksumValue = 0x%04X\n\n",
+        *ChecksumValue ));
+    
+    // Compare with physical CMOS checksum value and set/clear status bit 
+
+    ReadChecksum( Mgr, &CurrentChecksum);
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "\n         -----------------------\n"));
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS,   
+        "         Saved Checksum = 0x%04X\n\n",
+        CurrentChecksum ));
+        
+    if (*ChecksumValue != CurrentChecksum) {
+        Mgr->SetStatus(Mgr, CMOS_BAD_CHECKSUM);
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, "    ...CMOS_BAD_CHECKSUM\n"));
+    }
+    else {
+        Mgr->ClearStatus(Mgr, CMOS_BAD_CHECKSUM);
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "    ...Checksum is OK\n" ));
+    }
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CalculateChecksum: Done\n" ));
+    
+    return EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosWrite
+//
+// Description: 
+//      Writes from CmosValue to CMOS location encoded into CmosToken.
+//
+// Input:
+//      IN  EFI_CMOS_ACCESS_INTERFACE *Cmos
+//                  -- This is the access interface pointer.
+//      IN  UINT16 CmosToken 
+//                  -- This is the encoded CMOS location.
+//      IN  UINT8 CmosValue
+//                  -- On success, this value will be written to
+//                      the specified CMOS location.
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = EFI_NOT_FOUND, if the token is not in the token table
+//                  = or other valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosWrite(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  UINT16                      CmosToken,
+    IN  UINT8                       CmosValue )
+{
+    EFI_STATUS                      Status = EFI_SUCCESS;
+    UINT16                          TokenTableIndex = 0;
+    EFI_CMOS_MANAGER_INTERFACE      *Mgr = GetCmosMangerInterface(Cmos);
+    DEFINE_PEI_SERVICES(Cmos->PeiServices);
+
+
+    // if CmosToken <= 0xe, then always write the register.  These registers
+    // will be writable regardless of the state of the battery.
+
+    if (CmosToken <= 0xe){
+        Status = CmosBankReadWrite( Mgr, WriteType, CmosToken, &CmosValue );
+    }
+
+    // Otherwise, if CmosToken is less than MIN_TOKEN_VALUE and the battery 
+    // is good, then an additional test is made to disallow writing of actual 
+    // registers if they are within the managed region.  Otherwise, the 
+    // actual physical register is written. (For a bad battery, return 
+    // EFI_DEVICE_ERROR when trying to write the physical register.)
+    
+    else if ( CmosToken < MIN_TOKEN_VALUE ){
+        if ( !Mgr->CheckStatus( Mgr, CMOS_IS_USABLE ) ) {
+            Status = EFI_DEVICE_ERROR;
+        }
+        else if ( (CmosToken >= FIRST_MANAGED_CMOS_ADDRESS)
+             && (CmosToken < MAX_MANAGED_CMOS_ADDRESS) )
+            Status = EFI_INVALID_PARAMETER;
+        else
+            Status = CmosBankReadWrite( Mgr, WriteType,
+                                        CmosToken, &CmosValue );
+    }
+
+    // Otherwise, after validating the CmosToken, decode it to write the  
+    // associated register bit(s).
+
+    else if ((TokenTableIndex = CmosFindToken( Mgr, CmosToken )) > 0) {
+        Status = CmosReadWriteEncodedToken( Mgr, WriteType, TokenTableIndex,
+                                            &CmosValue );
+    }
+    else
+        Status = EFI_INVALID_PARAMETER;
+
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: LoadOptimalDefaults
+//
+// Description:
+//      Initialize all physical CMOS registers with the default values 
+//      specified in NvramField's Default value.
+//
+// Input:
+//      IN  EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- The Manger interface pointer.
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Modified:
+//      Manager->ManagerStatus bits:
+//                         CMOS_BAD_CHECKSUM - cleared on success
+//               CMOS_ERROR_LOADING_DEFAULTS - set on error
+//
+// Notes:
+//      LoadOptimalDefaults will be called for one of two reasons:
+//
+//      1) On the first boot after flashing the ROM, the default
+//         values will be written to all CMOS registers, regardless
+//         of whether or not they are listed in the NoChecksumTable.
+//
+//      2) If a bad checksum is reported in PEI, the 
+//         OptimalDefaultTable will be used as a read/write buffer
+//         until DXE, where (by default) the CMOS_BAD_CHECKSUM status bit will
+//         signal to write the buffer to physical CMOS.
+//
+//      * The optimal defaults buffer may be modified from the original
+//        version if CMOS_OPTIMAL_DEFAULTS_ENABLED status bit is set. 
+//
+//      * If the CMOS_BAD_CHECKSUM status is set, then only those values
+//        included in the checksum are written to physical CMOS.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS LoadOptimalDefaults(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Mgr )
+{
+    EFI_STATUS  Status = EFI_SUCCESS;
+    UINT16      CurRegister;
+    UINT8       CurValue;
+    UINT16      NewChecksum = 0;
+    UINT16      UnmanagedIndex = 1;     // UnmanagedTable starts at 1
+    UINT16      DefaultIndex = 1;       // OptimalDefaultTable starts at 1
+    UINT16      NoChecksumIndex = 1;    // NoChecksumTable starts at 1
+    CMOS_MANAGER_STATUS  SavedStatus = Mgr->ManagerStatus & 
+                                    (CMOS_OPTIMAL_DEFAULTS_ENABLED );
+    EFI_CMOS_ACCESS_INTERFACE   *Cmos = Mgr->GetAccessInterface(Mgr);
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "LoadOptimalDefaults Entry\n"));
+
+    // Calculate it
+    //-----------------------------------------------------------------------
+    // Configure to ensure reads/writes are to physical registers.
+    //-----------------------------------------------------------------------
+
+    Mgr->ClearStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED );
+        
+    // temporarily disallow checksum updating
+
+    Mgr->SetStatus(Mgr, CMOS_FORCE_NO_CHECKSUM);
+
+
+    //---------------------------------------------
+    // For the first boot, ignore the bad checksum
+    // so that defaults are loaded for all 
+    // registers.
+    //---------------------------------------------
+
+    if ( Mgr->CheckStatus( Mgr, CMOS_FIRST_BOOT_DETECTED ) ){
+        Mgr->ClearStatus(Mgr, CMOS_BAD_CHECKSUM);
+    }
+
+    //-----------------------------------------------------------------------
+    // Write the physical registers:
+    //
+    // There "should" be exactly one default entry for each register in the  
+    // managed region. (This is not assumed to be true.)
+    //-----------------------------------------------------------------------
+
+    for ( CurRegister = Mgr->FirstManagedRegister; 
+          CurRegister <= Mgr->LastManagedRegister;   // inclusive
+          ++CurRegister, ++DefaultIndex ) 
+    {
+        if ( DefaultIndex >= Mgr->OptimalDefaultCount){ // bad news!
+            Mgr->SetStatus(Mgr, CMOS_ERROR_LOADING_DEFAULTS);
+            break;  
+        }
+
+        //---------------------------------------------
+        // Skip the location if the location is not managed
+        //
+        // Note: the UnmanagedTable is in numeric order, 
+        //       so it only needs traversed one time.
+        //---------------------------------------------
+        
+        while ( (UnmanagedIndex < Mgr->UnmanagedTableCount)
+                && (CurRegister 
+                    > Mgr->UnmanagedTable[UnmanagedIndex].Index) )
+        {
+            ++UnmanagedIndex;
+        }
+        if ( CurRegister == Mgr->UnmanagedTable[UnmanagedIndex].Index ){
+
+            // Ensure DefaultIndex is not incremented at the top of the 
+            // loop, as un-managed locations do not have a default value.
+
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "    -->Skip 0x%X (un-managed)\n", 
+                CurRegister));
+            --DefaultIndex;
+            continue;
+        }
+
+
+        //---------------------------------------------
+        // Skip location if:
+        //
+        //    1. there is a bad checksum,
+        //    2. recovery is enabled only for checksummed locations
+        //
+        // (Note, the NoChecksumTable is in numeric order)
+        //---------------------------------------------
+        
+        if ( Mgr->CheckStatus( Mgr, 
+                CMOS_BAD_CHECKSUM + CMOS_RECOVER_ONLY_CHECKSUMMED ) )
+        {
+            while ( (NoChecksumIndex < Mgr->NoChecksumCount)
+                && (CurRegister 
+                    > Mgr->NoChecksumTable[NoChecksumIndex].Index) )
+            {
+                ++NoChecksumIndex;
+            } 
+            if ( (CurRegister 
+                    == Mgr->NoChecksumTable[NoChecksumIndex].Index ) ){
+                CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                    "    -->Skip 0x%X (not checksummed)\n",
+                    CurRegister));
+                continue;
+            }
+        }
+        
+        // Update the physical register
+
+        CurValue = Mgr->OptimalDefaultTable[DefaultIndex].Value;
+        Status = CmosReadWrite(Mgr, WriteType, CurRegister, ALL_BITS, 
+                                &CurValue);
+
+        if (EFI_ERROR(Status)){
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+                "    Unable to load default for register: 0x%X\n",
+                CurRegister ));
+             break;
+        } 
+      
+
+    }
+
+    // if no error, calculate checksum and reset the 
+    // CMOS_BAD_CHECKSUM status bit.
+
+    if (   EFI_ERROR(Status) 
+        || Mgr->CheckStatus(Mgr, CMOS_ERROR_LOADING_DEFAULTS))
+    {
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+            "    Error: Could not load Optimal Defaults\n"));
+        Status = EFI_UNSUPPORTED;
+    }
+    else
+    {
+        CalculateChecksum(Mgr, &NewChecksum);
+        WriteChecksum(Mgr, NewChecksum); 
+        Mgr->ClearStatus(Mgr, CMOS_BAD_CHECKSUM);
+    }
+
+    //-----------------------------------------------------------------------
+    // Restore previous access routing settings. 
+    //-----------------------------------------------------------------------
+
+    Mgr->ManagerStatus = Mgr->ManagerStatus | SavedStatus;
+    
+    // Allow checksums to be computed now
+
+    Mgr->ClearStatus(Mgr, CMOS_FORCE_NO_CHECKSUM);
+    
+    // Set status bit to indicate that defaults have been loaded
+
+    Mgr->SetStatus(Mgr, CMOS_DEFAULTS_LOADED);
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "LoadOptimalDefaults Exit\n"));
+
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   StopTime
+//
+// Description: Stops the time on RTC clock.
+//
+// Input:       
+//      IN EFI_CMOS_MANAGER_INTERFACE *Mgr
+//                  -- The Manger interface pointer.
+//
+// Output:      None
+//
+// Notes:       Here is the control flow of this function:
+//              1. Stop the time by setting bit 7 on RTC register 0xb.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID StopTime(
+    IN EFI_CMOS_MANAGER_INTERFACE  *Mgr ) 
+{
+    UINT8  Value;
+
+    CmosBankReadWrite( Mgr, ReadType, 0xb, &Value );
+    Value |= 0x80;
+    CmosBankReadWrite( Mgr, WriteType, 0xb, &Value );
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   StartTime
+//
+// Description: Start the time on RTC clock. This is used when changing the
+//              Date and Time
+//
+// Input:       
+//      IN EFI_CMOS_MANAGER_INTERFACE *Mgr
+//                  -- The Manger interface pointer.
+//
+// Output:      None
+//
+// Notes:       Here is the control flow of this function:
+//              1. Start the time by clearing bit 7 on RTC register 0xb.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID StartTime(
+    IN EFI_CMOS_MANAGER_INTERFACE  *Mgr ) 
+{
+    UINT8  Value;
+
+    CmosBankReadWrite( Mgr, ReadType, 0xb, &Value );
+    Value &= 0x7f;
+    CmosBankReadWrite( Mgr, WriteType, 0xb, &Value );
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   BCDToDec
+//
+// Description: Converts a Decimal value to a BCD value.
+//
+// Input:       
+//      IN UINT8 Dec - Decimal value
+//
+// Output:      
+//      UINT8 (return value) - BCD value
+//
+// Notes:       
+//      Only for 2 digit decimal.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+UINT8 DecToBCD(IN UINT8 Dec)
+{
+    UINT8 FirstDigit = Dec % 10;
+    UINT8 SecondDigit = Dec / 10;
+
+    return (SecondDigit << 4) + FirstDigit;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   BCDToDec
+//
+// Description: Converts a BCD value to a Decimal value.
+//
+// Input:       
+//      IN UINT8 BCD -- BCD value
+//
+// Output:      
+//      UINT8 - decimal value
+//
+// Notes:       
+//      Only for 2 digit BCD.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+UINT8 BCDToDec(IN UINT8 BCD)
+{
+    UINT8 FirstDigit = BCD & 0xf;
+    UINT8 SecondDigit = BCD >> 4;;
+
+    return SecondDigit * 10  + FirstDigit;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   CmosMgrReadRtcIndex
+//
+// Description: Read the RTC value at the given Index.
+//
+// Input:       
+//      IN EFI_CMOS_MANAGER_INTERFACE *Mgr
+//                  -- The Manger interface pointer.
+//      IN UINT8 Index
+//
+// Output:      
+//      UINT8 (return value) --
+//                  = RTC Value read from the provided Index
+//
+// Notes:       
+//      Here is the control flow of this function:
+//               1. Read port 0x70 (RTC Index Register) to get bit 7.
+//                  Bit 7 is the NMI bit-it should not be changed.
+//               2. Output 0x70 with the Index and NMI bit setting.
+//               3. Read 0x71 for Data. Getting Dec when appropriate.
+//               4. Return the Data.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+static UINT8 CmosMgrReadRtcIndex(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Mgr,
+    IN UINT8                        Index )
+{
+    UINT8   Value;
+
+    CmosBankReadWrite( Mgr, ReadType, Index, &Value );
+    Value = BCDToDec(Value);
+    
+    return Value;
+}
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   CmosMgrWriteRtcIndex
+//
+// Description: Write the RTC value at the given Index.
+//
+// Input:       
+//      IN EFI_CMOS_MANAGER_INTERFACE *Mgr
+//                  -- The Manger interface pointer.
+//      IN UINT8 Index
+//                  -- Index to write
+//      IN UINT8 Value
+//                  -- Value to write
+//
+// Output:      None
+//
+// Notes:       Here is the control flow of this function:
+//              1. Read port 0x70 (RTC Index Register) to get bit 7.
+//                 Bit 7 is the NMI bit-it should not be changed.
+//              2. Output 0x70 with the Index. Switch to BCD when needed.
+//              3. Write the data to 0x71.
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+static void CmosMgrWriteRtcIndex(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Mgr,
+    IN UINT8                        Index, 
+    IN UINT8                        Value )
+{
+    Value = DecToBCD(Value);
+    CmosBankReadWrite( Mgr, WriteType, Index, &Value );
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   CmosSetDateTime
+//
+// Description: 
+//      This routine simply writes the CMOS RTC registers from information
+//      provided by the EFI_TIME structure, assuming the information is 
+//      correct.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- The Manger interface pointer.
+//      IN EFI_TIME *Time
+//                  -- EFI Time structure
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Modified:
+//      N/A
+//
+// Notes:       
+//      Data is assumed to be valid.  Only a simple check for NULL pointer
+//      is done.
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosSetDateTime (
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  EFI_TIME                    *Time )
+{
+    EFI_CMOS_MANAGER_INTERFACE      *Mgr = GetCmosMangerInterface(Cmos);
+    DEFINE_PEI_SERVICES(Cmos->PeiServices);
+
+    if (Time == NULL || Mgr == NULL) 
+        return EFI_INVALID_PARAMETER;
+
+    StopTime(Mgr);
+    
+    CmosMgrWriteRtcIndex( Mgr, ACPI_CENTURY_CMOS, Time->Year / 100 );
+    CmosMgrWriteRtcIndex( Mgr, 9, Time->Year % 100 );
+    CmosMgrWriteRtcIndex( Mgr, 8, Time->Month );
+    CmosMgrWriteRtcIndex( Mgr, 7, Time->Day );
+    CmosMgrWriteRtcIndex( Mgr, 4, Time->Hour );
+    CmosMgrWriteRtcIndex( Mgr, 2, Time->Minute );
+    CmosMgrWriteRtcIndex( Mgr, 0, Time->Second );
+    
+    StartTime(Mgr);
+
+    return  EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// Procedure:   CmosGetDateTime
+//
+// Description: Return the current date and time
+//
+// Input:       
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- The Manger interface pointer.
+//      OUT EFI_TIME *Time
+//                  -- EFI Time structure
+//
+// Output: 
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+//
+//----------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosGetDateTime (
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    OUT EFI_TIME                    *Time )
+{
+    EFI_CMOS_MANAGER_INTERFACE      *Mgr = GetCmosMangerInterface(Cmos);
+    DEFINE_PEI_SERVICES(Cmos->PeiServices);
+
+    if (Time == NULL || Cmos == NULL) 
+        return EFI_INVALID_PARAMETER;
+
+    //If RTC Year only 1 digit, EFI spec says years range is 1998 - 2097
+    Time->Year      = CmosMgrReadRtcIndex(Mgr, ACPI_CENTURY_CMOS) * 100 
+                        + CmosMgrReadRtcIndex(Mgr, 9);
+    Time->Month     = CmosMgrReadRtcIndex(Mgr, 8);
+    Time->Day       = CmosMgrReadRtcIndex(Mgr, 7);
+    Time->Hour      = CmosMgrReadRtcIndex(Mgr, 4);
+    Time->Minute    = CmosMgrReadRtcIndex(Mgr, 2);
+    Time->Second    = CmosMgrReadRtcIndex(Mgr, 0);
+    Time->Nanosecond= 0;
+
+    return  EFI_SUCCESS;
+}
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosBoard.c b/Core/EM/CmosManager/CmosBoard.c
new file mode 100644
index 0000000..84ad668
--- /dev/null
+++ b/Core/EM/CmosManager/CmosBoard.c
@@ -0,0 +1,517 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Core/EM/CmosManager/CmosBoard.c 1     10/25/12 9:02a Wesleychen $Revision: 0 $
+//
+// $Date: 10/25/12 9:02a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/Projects/Intel/Haswell/LynxPoint_SharkBay-DT_Crb_1AQQW/Core/EM/CmosManager/CmosBoard.c $
+// 
+// 1     10/25/12 9:02a Wesleychen
+// Update it to the rev19.
+// 
+// 19    6/08/12 4:48p Michaela
+// [TAG]          EIP92072
+// [Category]     Spec Update
+// [Severity]     Normal
+// [Description]  CMOS Manager Needs Code Changes for Coding Standards
+// Compliance
+// [Files]        Multiple
+// 
+// 18    5/23/12 12:02p Michaela
+// [TAG]          EIP90679
+// [Category]     Improvement
+// [Description]  MonotonicCounter variable guid changed.
+// [Files]        CmosBoard.c
+// 
+// 17    5/23/12 11:48a Michaela
+// [TAG]          EIP90679
+// [Category]     Improvement
+// [Description]  MonotonicCounter variable guid changed.
+// [Files]        CmosBoard.c
+// 
+// 16    6/15/10 2:22p Michaela
+// 
+// 15    3/08/10 1:08p Michaela
+// 
+// 14    3/08/10 12:56p Michaela
+// Comment example gUnmanagedTable
+// 
+// 13    3/05/10 4:53p Michaela
+// 
+// 12    12/04/09 7:30p Michaela
+// 
+// 11    12/03/09 6:11p Michaela
+// Added default implementation of CmosMgrIsColdBoot
+// 
+// 10    7/29/09 9:54a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 9     6/15/09 5:10p Michaela
+// 
+// 8     6/02/09 3:25p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 7     2/23/09 5:59p Michaela
+// --ReadWriteSecondBankTranslated() is only included as a porting
+//   example, and should be added to SBGeneric.c and prototyped in
+//   SBCsplib.h (See notes)
+// 
+// 6     2/16/09 10:28p Michaela
+// ReadWriteStandardRange()
+//     - Modified to use CMOS_BANK0_INDEX
+//       and CMOS_BANK0_DATA
+//     - Validation of CmosRegister parameter
+//     - OR CmosRegister with CMOS_NMI_BIT_VALUE
+//       to specify NMI bit.
+// ReadWriteSecondBankTranslated()
+//     - Added to translate CmosRegister to
+//       index port value for bank 2 access
+//     - Use CMOS_BANK1_INDEX and CMOS_BANK1_DATA
+//       to access bank 2
+// 
+// 5     1/21/09 2:47p Michaela
+// change CMOS_CLOCK_RANGE_INDEX to CMOS_STD_INDEX
+// and CMOS_CLOCK_RANGE_DATA to CMOS_STD_DATA
+// 
+// 4     1/21/09 2:38p Michaela
+// update for release 4.6.3_CMOSMGR_11:
+// 
+// **Removed CMOS_CLOCK_RANGE_INDEX and 
+//   CMOS_CLOCK_RANGE_DATA SDL Tokens. 
+// **Changed the default value of CMOS_STD_INDEX and 
+//   CMOS_STD_DATA to 0x70 and 0x71, respectively. 
+//   Updated CMOS_PORT_MAPPING elinks to use 
+//   ReadWriteStandardRange() for the 0x0 to 0x7f region. 
+// **Added CMOS_MGR_SET_NMI_BIT to specify whether or 
+//   not to set the NMI bit for access to 0x0 to 0x7f 
+//   region. 
+// **Removed ReadWriteClockRange() in CmosBoard.c 
+// **Modified ReadWriteStandardRange() in CmosBoard.c 
+//   to access the NMI range CMOS, where the NMI bit is 
+//   set, as specified by the CMOS_MGR_SET_NMI_BIT 
+//   Boolean token. 
+// Modified ReadWriteStandardRange() in CmosBoard.c to access the NMI
+// range CMOS, where the NMI bit is set, as specified by the
+// CMOS_MGR_SET_NMI_BIT Boolean token. 
+// 
+// 3     1/08/09 10:51a Michaela
+//   >Added function headers
+//   >Updated function parameter modifiers
+//   >renamed and updated to CmosBoard module part
+//   >Core/Board SDL Tokens and CMOS Tokens are separated
+// 
+// 2     11/17/08 4:01p Michaela
+// --Added default handlers for RTC range and Standard range CMOS
+//   registers
+// 
+// 1     11/14/08 9:24a Michaela
+// **Add support for board-specific access functions
+// 
+// 0     11/12/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosBoard.c
+//
+// Description: Contains routines that are board-specific.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "CmosBoard.h"
+
+//---------------------------------------------------------------------------
+// CmosBank is initialized using the CMOS_PORT_MAPPING SDL Elink.
+// This array is used to determine which index/data port pair to use for a 
+// specific CMOS register address.
+//---------------------------------------------------------------------------
+extern CMOS_PORT_MAP *gCmosBank;
+extern UINT16 gCmosBankCount;
+
+
+// <AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// 
+// Name: ReadWriteStandardRange
+//
+// Description:
+//  This function is used to access addresses in the Standard CMOS 
+//  register range (0x0-0x7f), for PEI and DXE boot phases.
+//
+// Input:   
+//  IN EFI_PEI_SERVICES **PeiServices 
+//                  --  PEI Services table pointer (NULL in DXE phase)
+//  IN CMOS_ACCESS_TYPE AccessType 
+//                  --  ReadType or WriteType to specify the type of access
+//  IN UINT16 CmosRegister 
+//                  --  The CMOS register to access
+//  IN OUT UINT8 *CmosParameterValue 
+//                  -- Pointer to the data variable to be accessed
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Modified:    None
+//
+// Referrals:   IoRead8, IoWrite8
+//
+// Notes:       N/A
+//-------------------------------------------------------------------------- 
+// <AMI_PHDR_END>
+
+EFI_STATUS ReadWriteStandardRange (
+    IN      EFI_PEI_SERVICES      **PeiServices,  // NULL in DXE phase
+    IN      CMOS_ACCESS_TYPE      AccessType,
+    IN      UINT16                CmosRegister,
+    IN OUT  UINT8                 *CmosParameterValue )
+{
+    UINT8   TempValue;
+    
+    if (CmosRegister > 0x7f)
+        return EFI_INVALID_PARAMETER;
+
+    // If reading an RTC register, then check the Update in Progress bit in
+    // Status register A to ensure a read is allowed.
+    if(CmosRegister <= 9 && AccessType == ReadType) {
+        do {
+            IoWrite8(CMOS_BANK0_INDEX, 0xa | CMOS_NMI_BIT_VALUE);
+            TempValue = IoRead8(CMOS_BANK0_DATA);
+        } while (TempValue & 0x80);
+    }
+
+    IoWrite8( CMOS_BANK0_INDEX, (UINT8)CmosRegister | CMOS_NMI_BIT_VALUE );
+
+    if (AccessType == ReadType){
+        *CmosParameterValue = IoRead8( CMOS_BANK0_DATA );
+    }
+    else {
+        IoWrite8( CMOS_BANK0_DATA, *CmosParameterValue );
+    }
+
+    return EFI_SUCCESS;
+}
+
+//----------------------------------------------------------------------------
+// 
+// Name: ReadWriteBank1Translated
+//
+// Description:
+//  This function is used to access addresses in the CMOS register range 
+//  (0x80-0xff), for PEI and DXE boot phases.
+//
+// Input:   
+//  IN EFI_PEI_SERVICES **PeiServices
+//                  --  Pointer to the PEI services table.  (This pointer
+//                      is NULL in the DXE phase.)
+//  IN CMOS_ACCESS_TYPE AccessType 
+//                  --  ReadType or WriteType to specify the type of access
+//  IN UINT16 CmosRegister 
+//                  --  The CMOS register to access
+//  IN OUT  UINT8 *CmosParameterValue 
+//                  -- Pointer to the data variable to be accessed
+//
+// Output:
+//  EFI_STATUS (return value) 
+//                  EFI_SUCCESS - the access operation was successfull.
+//                  Otherwise - a valid EFI error code is returned.
+//
+// Modified:    None
+//
+// Referrals:   IoRead8, IoWrite8
+//
+// Notes:       
+//      This function is used when a translation from logical 
+//      address to index port value is required.  For example, the 
+//      ICH10 only allows values 0-7f for port 72/73 (upper bank) 
+//      access, so logical CMOS address 0x80 must be translated to 
+//      index port value 0, 0x81 becomes index port value 1, and 
+//      so on.
+//
+//-------------------------------------------------------------------------- 
+
+
+//============================================================================
+// Southbridge porting notes
+//============================================================================
+// The following code is an example of how to implement code that
+// translates from CMOS register number to access the physical
+// CMOS location when the register number is not identical to the
+// physical location.
+//
+// If access to the address range above 0x7f is required, and translation
+// between CMOS register number and CMOS index port value must be made,
+// then a function similar to this should be place in SBGeneric.c, SBCsplib.h,
+// and the appropriate CMOS_PORT_MAPPING eLink should also be defined.
+//============================================================================
+
+/*
+EFI_STATUS ReadWriteSecondBankTranslated (
+    IN      EFI_PEI_SERVICES      **PeiServices,  // NULL in DXE phase
+    IN      CMOS_ACCESS_TYPE      AccessType,
+    IN      UINT16                CmosRegister,
+    IN OUT  UINT8                 *CmosParameterValue )
+{
+    if (CmosRegister < 0x80 || CmosRegister > 0xff)
+        return EFI_INVALID_PARAMETER;
+
+    IoWrite8( CMOS_BANK1_INDEX, (UINT8)(CmosRegister-0x80));
+
+    if (AccessType == ReadType){
+        *CmosParameterValue = IoRead8( CMOS_BANK1_DATA );
+    }
+    else {
+        IoWrite8( CMOS_BANK1_DATA, *CmosParameterValue );
+    }
+
+    return EFI_SUCCESS;
+}
+*/
+
+
+// <AMI_PHDR_START>
+//----------------------------------------------------------------------------
+// 
+// Name: CmosMgrBatteryIsGood
+//
+// Description:
+//  This function is used to determing whether or not the CMOS battery is
+//  good.
+//
+// Input:   
+//  IN EFI_PEI_SERVICES **PeiServices
+//                  --  Pointer to the PEI services table.  (This pointer
+//                      is NULL in the DXE phase.)
+//
+// Output:
+//      BOOLEAN (Return Value)
+//                  = TRUE if the battery is good
+//                  = TRUE if the battery is bad
+//
+// Modified:    None
+//
+// Referrals:   IoRead8, IoWrite8
+//
+// Notes:       Some chipsets need to check a PCI configuration space
+//              register to determine the RTC power status.
+//-------------------------------------------------------------------------- 
+// <AMI_PHDR_END>
+
+BOOLEAN CmosMgrBatteryIsGood (
+    IN  EFI_PEI_SERVICES      **PeiServices  /* NULL in DXE */  )
+{
+    // PORTING PORTING PORTING
+
+    IoWrite8( CMOS_BANK0_INDEX, 
+        CMOS_RTC_STATUS_REGISTER + CMOS_NMI_BIT_VALUE );
+
+    return ((IoRead8( CMOS_BANK0_DATA ) & 0x80) != 0) ? TRUE : FALSE;
+
+    // PORTING PORTING PORTING
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosIsUsable
+//
+// Description:
+//      This function determines whether or not the CMOS is usable. It may
+//      be possible to use the CMOS even if the battery is bad.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//
+// Output:
+//      BOOLEAN (Return value)
+//                  = TRUE - CMOS is usable
+//                  = FALSE - CMOS is not usable
+//
+// Notes:
+//      Typically, register 0xd can be used to determine whether or not
+//      CMOS is usable.  It may be possible to use the CMOS for reads/writes
+//      if the battery is bad.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CmosIsUsable (
+    IN  EFI_PEI_SERVICES      **PeiServices  /* NULL in DXE */  )
+{
+    IoWrite8( CMOS_BANK0_INDEX, 
+        CMOS_RTC_STATUS_REGISTER + CMOS_NMI_BIT_VALUE );
+
+    return ((IoRead8( CMOS_BANK0_DATA ) & 0x80) != 0) ? TRUE : FALSE;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosMgrIsFirstBoot
+//
+// Description:
+//      This function determines whether or not this is the first boot after
+//      programming the boot device (flash part, ROM emulator, ...).
+//
+// Input:
+//      IN  EFI_PEI_SERVICES **PeiServices
+//                  --  Pointer to the PEI services table.  (This pointer
+//                      is NULL in the DXE phase.)
+//
+// Output:
+//      BOOLEAN (Return Value)
+//                  = TRUE, if this is the first boot
+//                  = FALSE, otherwise
+//
+// Notes:
+//      For some chipsets, there may be additional issues to consider,
+//      such as warm reboot during the PEI phase, multiple processor threads
+//      and so on.  Therefore, this function can be implemented by an external
+//      module (typically the Southbridge module).
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CmosMgrIsFirstBoot (
+    IN  EFI_PEI_SERVICES        **PeiServices )
+{
+    EFI_STATUS          Status = EFI_SUCCESS;
+
+#ifdef PEI_COMPILE
+    UINTN               Size = sizeof(UINT32);
+#if ((CORE_COMBINED_VERSION > 262797) && defined(AMI_GLOBAL_VARIABLE_GUID))
+    EFI_GUID            GlobalVariableGuid = AMI_GLOBAL_VARIABLE_GUID;
+#else 
+    EFI_GUID            GlobalVariableGuid = EFI_GLOBAL_VARIABLE;
+#endif
+    UINT32              Dummy;
+    EFI_GUID            Guid = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID;
+    EFI_PEI_READ_ONLY_VARIABLE_PPI  *ReadOnlyVariable = NULL;
+
+    // If the MonotonicCounter variable is found then return false
+    // to indicate that this is not the first boot.
+
+    Status = (*PeiServices)->LocatePpi( PeiServices, &Guid,
+                                        0, NULL, &ReadOnlyVariable);
+    if (EFI_ERROR(Status))
+        return TRUE;  // assume first boot if PPI not found
+
+    Status = ReadOnlyVariable->GetVariable( PeiServices, 
+                                            L"MonotonicCounter", 
+                                            &GlobalVariableGuid, 
+                                            NULL, 
+                                            &Size, &Dummy );
+#endif
+
+    // If the CmosManagerStatus variable is not found and this is not the
+    // DXE phase then this is the first boot.
+
+    if ( EFI_ERROR(Status) )
+        return TRUE;
+    else       
+        return FALSE;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosMgrIsBsp
+//
+// Description:
+//      This function returns TRUE if the currently executing CPU core
+//      is the boot strap processor (BSP).
+//
+// Input:
+//      IN  EFI_PEI_SERVICES  **PeiServices
+//                  --  Pointer to the PEI services table.  (This pointer
+//                      is NULL in the DXE phase.)
+//
+// Output:
+//      BOOLEAN (Return Value)
+//                  = TRUE, the BSP is executing
+//                  = FALSE, otherwise
+//
+// Notes:
+//      For some chipsets, this functions may need to be replaced.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CmosMgrIsBsp(
+    IN  EFI_PEI_SERVICES  **PeiServices )
+{
+    // if bit 8 of the APIC base register is set, then the current
+    // core is the BSP (for most chipsets)
+
+    if ( ReadMsr(MSR_XAPIC_BASE) & XAPIC_BASE_BSP_BIT_MASK )
+        return TRUE;
+    else
+        return FALSE;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosMgrIsColdBoot
+//
+// Description:
+//      This function returns TRUE to specify the platform is always perfoming
+//      a cold boot.
+//
+// Input:
+//      IN  EFI_PEI_SERVICES  **PeiServices
+//                  --  Pointer to the PEI services table.  (This pointer
+//                      is NULL in the DXE phase.)
+//
+// Output:
+//      BOOLEAN (Return Value)
+//                  = TRUE
+//
+// Notes:
+//      For some chipsets, this functions may need to be replaced.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CmosMgrIsColdBoot(
+    IN  EFI_PEI_SERVICES  **PeiServices )
+{
+    return TRUE;
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosBoard.h b/Core/EM/CmosManager/CmosBoard.h
new file mode 100644
index 0000000..ad1742b
--- /dev/null
+++ b/Core/EM/CmosManager/CmosBoard.h
@@ -0,0 +1,210 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosBoard.h 12    3/05/10 4:53p Michaela $
+// 
+// $Revision: 12 $
+//
+// $Date: 3/05/10 4:53p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosBoard.h $
+// 
+// 12    3/05/10 4:53p Michaela
+// 
+// 11    12/04/09 7:30p Michaela
+// 
+// 10    12/03/09 6:12p Michaela
+// updated declarations for CmosMgrIsBsp & CmosMgrIsColdBoot
+// 
+// 9     7/29/09 9:54a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 8     6/15/09 5:10p Michaela
+// 
+// 7     6/02/09 3:25p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 6     2/23/09 6:00p Michaela
+// --included AmiCspLib.h for exported SB CMOS access functions
+// --ReadWriteSecondBankTranslated is commented as an example
+//   declaration for SBCsplib.h
+// 
+// 5     2/16/09 10:11p Michaela
+// added prototype for ReadWriteSecondBankTranslated()
+// 
+// 4     1/21/09 2:38p Michaela
+// update for release 4.6.3_CMOSMGR_11:
+// 
+// **Removed CMOS_CLOCK_RANGE_INDEX and 
+//   CMOS_CLOCK_RANGE_DATA SDL Tokens. 
+// **Changed the default value of CMOS_STD_INDEX and 
+//   CMOS_STD_DATA to 0x70 and 0x71, respectively. 
+//   Updated CMOS_PORT_MAPPING elinks to use 
+//   ReadWriteStandardRange() for the 0x0 to 0x7f region. 
+// **Added CMOS_MGR_SET_NMI_BIT to specify whether or 
+//   not to set the NMI bit for access to 0x0 to 0x7f 
+//   region. 
+// **Removed ReadWriteClockRange() in CmosBoard.c 
+// **Modified ReadWriteStandardRange() in CmosBoard.c 
+//   to access the NMI range CMOS, where the NMI bit is 
+//   set, as specified by the CMOS_MGR_SET_NMI_BIT 
+//   Boolean token. 
+// Modified ReadWriteStandardRange() in CmosBoard.c to access the NMI
+// range CMOS, where the NMI bit is set, as specified by the
+// CMOS_MGR_SET_NMI_BIT Boolean token. 
+// 
+// 3     1/08/09 10:51a Michaela
+//   >Added function headers
+//   >Updated function parameter modifiers
+//   >renamed and updated to CmosBoard module part
+//   >Core/Board SDL Tokens and CMOS Tokens are separated
+// 
+// 2     11/17/08 4:01p Michaela
+// --removed development debugging code
+// 
+// 1     11/14/08 9:25a Michaela
+// **Add support for board-specific access functions
+// 
+// 7     11/07/08 5:13p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 6     3/25/08 3:04p Michaela
+// --deleted UpdateLegacyChecksumStatus
+// --Modified SynchronizeLegacyStatusRegisters to 
+//   update both battery and checksum status bits
+// 
+// 5     3/07/08 4:07p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 4     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 3     2/26/08 12:49p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 2     2/22/08 3:20p Olegi
+// Renamed some of the equates to avoid the naming collisions.
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosAccess.c
+//
+// Description: Contains the routines that constitute the CMOS access
+//              implementation.  This file contains source code that is used
+//              for both PEI and DXE phases.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+
+#ifndef _CMOS_BOARD_H
+#define _CMOS_BOARD_H
+
+#include <Efi.h>
+#ifdef PEI_COMPILE
+    #include <Pei.h>
+    #include <AmiPeiLib.h>
+    #include <Ppi\ReadOnlyVariable.h>
+#else
+    #include <AmiDxeLib.h>
+#endif
+#include <CmosAccess.h>
+#include <SspTokens.h>
+#include "AmiCspLib.h"
+#include "CmosManager.h"
+#include "CmosManagerHob.h"
+
+#ifdef MSR_XAPIC_BASE
+  #undef MSR_XAPIC_BASE
+#endif
+#ifdef XAPIC_BASE_BSP_BIT
+  #undef XAPIC_BASE_BSP_BIT
+#endif
+#ifdef XAPIC_BASE_BSP_BIT_MASK
+  #undef XAPIC_BASE_BSP_BIT_MASK
+#endif
+
+#define MSR_XAPIC_BASE 0x1b                     // standard APIC base MSR
+#define XAPIC_BASE_BSP_BIT 8 
+#define XAPIC_BASE_BSP_BIT_MASK  (1 << XAPIC_BASE_BSP_BIT)
+
+EFI_STATUS ReadWriteStandardRange (
+    IN      EFI_PEI_SERVICES      **PeiServices,  // NULL in DXE phase
+    IN      CMOS_ACCESS_TYPE      AccessType,
+    IN      UINT16                CmosRegister,
+    IN OUT  UINT8                 *CmosParameterValue );
+
+
+
+//================================================================
+//   Southbridge should implement functions to support access
+//   to additional CMOS banks (add the following to SBCspLib.h)
+//================================================================
+/*
+EFI_STATUS ReadWriteSecondBankTranslated (
+    IN      EFI_PEI_SERVICES      **PeiServices,  // NULL in DXE phase
+    IN      CMOS_ACCESS_TYPE      AccessType,
+    IN      UINT16                CmosRegister,
+    IN OUT  UINT8                 *CmosParameterValue );
+*/
+
+BOOLEAN CmosMgrBatteryIsGood (
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+BOOLEAN CmosMgrIsFirstBoot (
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+BOOLEAN CmosMgrIsBsp(
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+BOOLEAN CmosMgrIsColdBoot(
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+BOOLEAN CmosIsUsable(
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+#endif
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosBoard.sdl b/Core/EM/CmosManager/CmosBoard.sdl
new file mode 100644
index 0000000..5ea4464
--- /dev/null
+++ b/Core/EM/CmosManager/CmosBoard.sdl
@@ -0,0 +1,905 @@
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
+#
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosBoard.sdl 14    6/15/10 2:22p Michaela $
+#
+# $Revision: 14 $
+#
+# $Date: 6/15/10 2:22p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosBoard.sdl $
+# 
+# 14    6/15/10 2:22p Michaela
+# 
+# 13    3/05/10 4:53p Michaela
+# 
+# 12    12/04/09 7:30p Michaela
+# 
+# 11    12/03/09 6:10p Michaela
+# Added additional options to control bad checksum handling
+# 
+# 10    11/10/09 9:12p Michaela
+# 
+# 9     7/29/09 9:54a Michaela
+# updates Aptio Enhancement EIP 22205
+# (no code changes)
+# 
+# 8     6/02/09 3:25p Michaela
+# For label: 4.6.3_CMOSMGR_11
+# 
+# 7     2/23/09 5:29p Michaela
+# --changed MAX_MANAGED_CMOS_ADDRESS to default of 128
+# --added CMOS_USES_STANDARD_RANGE_ACCESS to specify
+#   whether or not to use CMOS Manager's access function for the
+#   0-0x7f range.
+# --Added notes on SB porting that must be done to acces CMOS
+#   registers above 0x7f
+# 
+#**********************************************************************
+#<AMI_FHDR_START>
+#-----------------------------------------------------------------------
+#
+# Name:         CmosBoard.sdl
+#
+# Description:  This AMI SDL file defines porting constants used in
+#               the CMOS Board subcomponent.
+#
+#-----------------------------------------------------------------------
+#<AMI_FHDR_END>
+#
+#============================================================================
+# Southbridge porting notes
+#============================================================================
+#
+# These tokens are included as an example of tokens to add to the
+# Southbridge module for implementing access to CMOS banks above
+# 0x7f.
+#
+#TOKEN
+#    Name  = "CMOS_BANK1_INDEX"
+#    Value  = "0x72"
+#    Help  = "Index port to access the second CMOS bank. \(Registers in range: 0x80-0xff)"
+#    TokenType = Integer
+#    TargetEQU = Yes
+#    TargetH = Yes
+#End
+#
+#TOKEN
+#    Name  = "CMOS_BANK1_DATA"
+#    Value  = "0x73"
+#    Help  = "Data port to access the second CMOS bank. \(Registers in range: 0x80-0xff)"
+#    TokenType = Integer
+#    TargetEQU = Yes
+#    TargetH = Yes
+#End
+#
+#TOKEN
+#    Name  = "CMOS_BANK1_INDEX_IS_TRANSLATED"
+#    Value  = "1"
+#    Help  = "1 = Index port value requires translation from CMOS address.\0 = Index port value equals CMOS address."
+#    TokenType = Boolean
+#    TargetEQU = Yes
+#    TargetH = Yes
+#End
+#ELINK
+#    Name  = "{0, 0, 0x80, 0xff, ReadWriteSecondBankTranslated},"
+#    Parent  = "CMOS_PORT_MAPPING"
+#    Help  = "Second bank CMOS access range (Registers in range: 0x80-0xff), when index port value is not identical to CMOS address"
+#    InvokeOrder = AfterParent
+#    Token = "CMOS_BANK1_INDEX_IS_TRANSLATED" "=" "1"
+#End
+#
+#ELINK
+#    Name  = "{CMOS_BANK1_INDEX, CMOS_BANK1_DATA, 0x80, 0xff, NULL},"
+#    Parent  = "CMOS_PORT_MAPPING"
+#    Help  = "Second bank CMOS access range (Registers in range: 0x80-0xff), when index port value is identical to CMOS address"
+#    InvokeOrder = AfterParent
+#    Token = "CMOS_BANK1_INDEX_IS_TRANSLATED" "=" "0"
+#End
+#============================================================================
+
+
+#<AMI_GHDR_START>
+#----------------------------------------------------------------------------
+#
+#  Name:    All_Elinks_Tokens
+#
+#  Description:
+#       The following files contain the SDL Tokens/Elinks  
+#       used in the CMOS Manager module, which may be ported. 
+#
+#                   CmosBoard.sdl --    SDL Tokens/Elinks typically
+#                                       used for project-specific porting
+#
+#                   CmosManager.sdl --  SDL Tokens/Elinks typically 
+#                                       not modified
+#
+#----------------------------------------------------------------------------
+#<AMI_GHDR_END>
+
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    FULL_CMOS_MANAGER_DEBUG
+#
+# Description:
+#
+#      Default value is 0
+#
+#               1  = Turn on all available CMOS Manager debug messages,  
+#                    resulting in larger build.
+#               0  = Only basic debugging messages are displayed,
+#                    dependent upon project-level debug settings.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    FIRST_MANAGED_CMOS_ADDRESS
+#
+# Description:
+#
+#       Default value is 0x40
+#
+#       This is the lower limit of the CMOS register range to be managed 
+#       by CMOS Manager
+#
+#       The region starting at FIRST_MANAGED_CMOS_ADDRESS and ending at
+#       MAX_MANAGED_CMOS_ADDRESS - 1 represents the managed region.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    MAX_MANAGED_CMOS_ADDRESS
+#
+# Description:
+#
+#       Default value is 128 (128 bytes with max address of 127)
+#
+#       This is the upper limit (last address + 1) of CMOS address locations 
+#       that are managed by CMOS Manager.
+#
+#       (I.e., if 256 bytes of CMOS is available and is entirely managed
+#       by CMOS Manager, then the value of this token would be 256.)
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_MGR_RECOVER_ONLY_CHECKUMMED
+#
+# Description:
+#
+#       Default value is 0 (all Managed Region locations are recovered)
+#
+#                   1  = Do not recover non-checksummed locations in the 
+#                        Managed Region
+#
+#                   0  = Recover all locations in the Managed Region
+#
+#       This configures the recovery policy so that the Optimal Defaults
+#       buffer is only used for checksummed locations upon bad checksum 
+#       detection.
+#
+# Notes:  
+#               1.  For the bad battery condition, the Optimal Defaults buffer
+#                   will always be used.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_MGR_RECOVER_IN_PEI
+#
+# Description:
+#
+#       Default value is 1 (PEI recovery is enabled)
+#
+#       This configures the recovery policy so that the Optimal Defaults
+#       buffer is written to CMOS in the PEI phase.
+#
+# Notes:  
+#            	1.  This setting may require replacement of the 
+#                   default function defined in the CMOS_IS_COLD_BOOT_MAPPING 
+#                   eLink.
+#
+#               2.  The bad checksum bit in the legacy status CMOS register 
+#                   will indicate bad checksum until the DXE phase, but 
+#                   physical CMOS will be used in the PEI phase.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_SMM_SUPPORT
+#
+# Description:
+#
+#       Default value is 1 (SMM support is enabled)
+#
+#       This token specifies whether or not the CMOS Access interface is  
+#       available in SMM.
+#
+#      			1 = Enable SMM CMOS Access
+#      			0 = Disable SMM CMOS Access
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_USES_STANDARD_RANGE_ACCESS
+#
+# Description:
+#
+#       Default value is 1 (default function is enabled)
+#
+#       Specifies whether or not to use CMOS Manager's default access 
+#       function for the 0-0x7f range.  If a platform provides a different 
+#       access function for this region this token should be FALSE.
+#
+# Notes:
+#               *   If this SDL Token is turned off, an alternate   
+#                   function must be defined using the CMOS_PORT_MAPPING
+#                   SDL eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_BANK0_INDEX
+#
+# Description:
+#
+#       Default value is 0x70
+#
+#       Index I/O port to access CMOS registers in range: 0x0-0x7f.
+#      
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_BANK0_DATA
+#
+# Description:
+#
+#       Default value is 0x71
+#
+#       Data I/O port to access CMOS registers in range: 0x0-0x7f.
+#      
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_MGR_SET_NMI_BIT
+#
+# Description:
+#
+#       Default value is 1 (NMI access is enabled for 0x0-0x7f)
+#
+#               1 = Set NMI bit for access to NMI region
+#               0 = Do not set NMI bit for access to NMI region
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_NMI_BIT_VALUE
+#
+# Description:
+#
+#       Default value is 0x80 (CMOS_MGR_SET_NMI_BIT = TRUE by default)
+#
+#       There are two possible values for this token as determined by the 
+#       value of CMOS_MGR_SET_NMI_BIT:
+#
+#                   0x80 = if CMOS_MGR_SET_NMI_BIT == TRUE
+#                   0x00 = if CMOS_MGR_SET_NMI_BIT == FALSE
+#
+# Notes:
+#
+#       This value will be OR'ed with the index value for CMOS access to 
+#       bank 0 locations. The value will be negated and AND'ed with the 
+#       index to clear the NMI bit if the original index value is to be 
+#       restored.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_SETUP_SUPPORT
+#
+# Description:
+#
+#       Default value is 0 (CMOS_SETUP_SUPPORT = FALSE by default)
+#
+#       This token specifies whether or not a setup page is enabled
+#       to provide CMOS Manager related information/options.
+#
+# Notes:
+#
+#       This feature is only supported for TSE labels only supported for 
+#       TSE versions 4.6.2_TSE_2_01_1204 and later.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_MESSAGES_SUPPORT
+#
+# Description:
+#
+#       Default value is 0 (CMOS_SETUP_SUPPORT = FALSE by default)
+#
+#       This token specifies whether or not messages are displayed
+#       to provide CMOS Manager related power-on information.
+#
+# Notes:
+#
+#       This feature is only supported for TSE labels only supported for 
+#       TSE versions 4.6.2_TSE_2_01_1204 and later.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_USES_STANDARD_BATTERY_TEST
+#
+# Description:
+#
+#       Default value is 1 (default function is used)
+#
+#       This SDL Token specifies whether or not to use the default function
+#       to determine whether or not the CMOS battery is good.
+#
+# Notes:
+#       If this SDL Token is turned off, an alternate function must be
+#       defined and linked using the CMOS_BATTERY_TEST_MAPPING SDL eLink.
+#
+#       The default function eLink is CmosMgrBatteryIsGood.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_USES_STANDARD_IS_FIRST_BOOT
+#
+# Description:
+#
+#       Default value is 1 (default function is used)
+#
+#       This SDL Token specifies whether or not to use the default function
+#       to determine whether or not the platform is executing a first boot.
+#
+# Notes:
+#       If this SDL Token is turned off, an alternate function must be
+#       defined using the CMOS_IS_FIRST_BOOT_MAPPING SDL eLink.
+#
+#       The default function eLink is CmosMgrIsFirstBoot.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_USES_STANDARD_IS_CMOS_USABLE
+#
+# Description:
+#
+#       Default value is 1 (default function is used)
+#
+#       This SDL Token specifies whether or not to use the default function
+#       to determine whether or not the CMOS hardware is usable.  
+#       If a platform provides a different function, this token should be 
+#       disabled.
+#
+# Notes:
+#       If this SDL Token is turned off, an alternate function must be
+#       defined using the CMOS_IS_USABLE_MAPPING SDL eLink.
+#
+#       The default function eLink is CmosMgrIsBsp.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_USES_STANDARD_IS_BSP
+#
+# Description:
+#
+#       Default value is 1 (default function is used)
+#
+#       This SDL Token specifies whether or not to use the default function
+#       to determine whether or not the boot strap processor is executing.  
+#       If a platform provides a different function for determining the BSP, 
+#       this token should be disabled.
+#
+# Notes:
+#       If this SDL Token is turned off, an alternate function must be
+#       defined using the CMOS_IS_BSP_MAPPING SDL eLink.
+#
+#       The default function eLink is CmosMgrIsBsp.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_USES_STANDARD_IS_COLD_BOOT
+#
+# Description:
+#
+#       Default value is 1 (default function is used)
+#
+#       This SDL Token specifies whether or not to use the default function
+#       to determine whether or not the platform is executing a cold boot.
+#
+# Notes:
+#
+#               1.  The default function eLink is CmosMgrIsColdBoot.
+#
+#               2.  In the case of a bad checksum, the Optimal Defaults buffer
+#                   is written to physical CMOS in the PEI phase if:
+#
+#                 	a. CMOS_MGR_RECOVER_IN_PEI is enabled and
+#                 	b. CmosMgrIsColdBoot returns TRUE
+#
+#               3.  Some platforms may execute a warm-reset in the PEI phase,
+#                   with a dependency on some CMOS value, causing 
+#                   unpredicatable results ...possibly an infinite reboot 
+#                   sequence.
+#
+#               4.  A cold boot is defined as a power-on boot, as opposed 
+#                   to a warm boot where a reset is initiated through 
+#                   software.
+#
+#               5.  If this SDL Token is turned off, an alternate function  
+#                   must be defined using the CMOS_IS_COLD_BOOT_MAPPING 
+#                   SDL eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_PORT_MAPPING
+#
+# Description:
+#
+#       Default value (see Notes below)
+#
+#       This Elink is used to associate CMOS register address ranges with 
+#       an 8-bit index/data port pair or an access function.
+#
+#       Additional ranges can be specified by adding additional eLinks.
+#
+#       The default eLink for the 0x0-0x7f range can be replaced by first
+#       disabling the CMOS_USES_STANDARD_RANGE_ACCESS SDL token and then 
+#       defining a new eLink.
+#
+# Notes:
+#      Format:
+#
+#                   {IndexPort, DataPort, LowIndex, HighIndex, FunctionName},
+#
+#      Default:
+#
+#                   ELINK
+#                       Name  = "{0, 0, 0, 127, ReadWriteStandardRange},"
+#                       Parent  = "CMOS_PORT_MAPPING"
+#                       Help  = "Standard NMI-capable access range"
+#                       Token = "CMOS_USES_STANDARD_RANGE_ACCESS" "=" "1"
+#                       InvokeOrder = AfterParent
+#                   End
+#
+#      	        * FunctionName takes precedence over IndexPort/DataPort, if
+#                 both are specified.
+#
+#               * The comma is required.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_BATTERY_TEST_MAPPING
+#
+# Description:
+#
+#       The default function is CmosMgrBatteryIsGood.
+#
+#       This SDL eLink provides a mechanism to replace the default function 
+#       for determining whether or not the battery is bad.
+#
+# Notes:
+#       To override the default function, set the 
+#       CMOS_USES_STANDARD_BATTERY_TEST SDL Token to false and define a
+#       new eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_IS_USABLE_MAPPING
+#
+# Description:
+#
+#       The default function is CmosIsUsable.
+#
+#       This SDL eLink provides a mechanism to replace the default function 
+#       for determining whether or not the CMOS hardware is usable. (Note,
+#       the CMOS may be usable even if the battery is bad.)
+#
+# Notes:
+#       To override the default function, set the 
+#       CMOS_USES_STANDARD_IS_CMOS_USABLE SDL Token to FALSE (0) and define a
+#       new eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_IS_FIRST_BOOT_MAPPING
+#
+# Description:
+#
+#       The default function is CmosMgrIsFirstBoot.
+#
+#       This SDL eLink provides a mechanism to replace the default function 
+#       for determining whether or not the current execution is the first 
+#       boot after programming the boot firmware device (flash part, ROM 
+#       emulator,  ...).
+#
+# Notes:
+#       To override the default function, set the 
+#       CMOS_USES_STANDARD_IS_FIRST_BOOT SDL Token to FALSE (0) and define a
+#       new eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_IS_BSP_MAPPING
+#
+# Description:
+#
+#       The default function is CmosMgrIsBsp.
+#
+#       This SDL eLink provides a mechanism to replace the default function 
+#       for determining whether or not the currently executing CPU core is 
+#       the boot strap processor (BSP).
+#
+# Notes:
+#       To override the default function, set the 
+#       CMOS_USES_STANDARD_IS_BSP SDL Token to FALSE (0) and define a
+#       new eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_IS_COLD_BOOT_MAPPING
+#
+# Description:
+#
+#       The default function is CmosMgrIsColdBoot.
+#
+#       This SDL eLink provides a mechanism to replace the default function 
+#       for determining whether or not the platform is executing a cold
+#       boot.
+#
+# Notes:
+#       To override the default function, set the 
+#       CMOS_USES_STANDARD_IS_COLD_BOOT SDL Token to FALSE (0) and define a
+#       new eLink.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+TOKEN
+    Name  = "FULL_CMOS_MANAGER_DEBUG"
+    Value  = "0"
+    Help  = "1-Turns on all available CMOS Manager module-level debug messages, resulting in larger build\0-Only basic debugging messages are supported, dependent upon project-level debug settings."
+    TokenType = Boolean
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "FIRST_MANAGED_CMOS_ADDRESS"
+    Value  = "0x40"
+    Help  = "This is the lower limit of the CMOS register range to be managed by CMOS Manager. \\Note: the region starting at FIRST_MANAGED_CMOS_ADDRESS and ending at MAX_MANAGED_CMOS_ADDRESS - 1 represents the managed region."
+    TokenType = Integer
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "MAX_MANAGED_CMOS_ADDRESS"
+    Value  = "128"
+    Help  = "Last CMOS address + 1 used to specify the maximum address that is managed by CMOS Manager. \\Note: the region starting at FIRST_MANAGED_CMOS_ADDRESS and ending at MAX_MANAGED_CMOS_ADDRESS - 1 represents the managed region."
+    TokenType = Integer
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_MGR_RECOVER_ONLY_CHECKUMMED"
+    Value  = "0"
+    Help  = "Upon incoherency detection in the Managed Region, only use the Optimal Defaults buffer for checksummed locations."
+    TokenType = Boolean
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_MGR_RECOVER_IN_PEI"
+    Value  = "1"
+    Help  = "Upon incoherency detection due to bad checksum in the Managed Region, invoke the recovery policy in the PEI phase."
+    TokenType = Boolean
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_SMM_SUPPORT"
+    Value  = "1"
+    Help  = "Specifies whether or not to the CMOS Access interface is available in SMM."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+    TargetMAK = Yes
+End
+
+TOKEN
+    Name  = "CMOS_USES_STANDARD_RANGE_ACCESS"
+    Value  = "1"
+    Help  = "Specifies whether or not to use CMOS Manager's default access function for the 0-0x7f range.  If a platform provides a different access function for this region this token should be disabled."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_BANK0_INDEX"
+    Value  = "0x70"
+    Help  = "Index I/O port to access CMOS registers in range: 0x0-0x7f."
+    TokenType = Integer
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_BANK0_DATA"
+    Value  = "0x71"
+    Help  = "Data I/O port to access CMOS registers in range: 0x0-0x7f."
+    TokenType = Integer
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_MGR_SET_NMI_BIT"
+    Value  = "1"
+    Help  = "1-Set NMI bit for access to NMI region\0-Do not set NMI bit for access to NMI region"
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_NMI_BIT_VALUE"
+    Value  = "0x80"
+    Help  = "Value to be ORed with the index port value for BANK0 access, when NMI access is enabled."
+    TokenType = Integer
+    TargetEQU = Yes
+    TargetH = Yes
+    Token = "CMOS_MGR_SET_NMI_BIT" "=" "1"
+End
+
+TOKEN
+    Name  = "CMOS_NMI_BIT_VALUE"
+    Value  = "0x0"
+    Help  = "Value to be ORed with the index port value for BANK0 access, when NMI access is disabled."
+    TokenType = Integer
+    TargetEQU = Yes
+    TargetH = Yes
+    Token = "CMOS_MGR_SET_NMI_BIT" "=" "0"
+End
+
+TOKEN
+    Name  = "CMOS_SETUP_SUPPORT"
+    Value  = "0"
+    Help  = "This SDL Token specifies whether or not the CMOS module setup page is supported.\(This feature is only supported for TSE versions 4.6.2_TSE_2_01_1204 and later)"
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+    TargetMAK = Yes
+End
+
+TOKEN
+    Name  = "CMOS_MESSAGES_SUPPORT"
+    Value  = "0"
+    Help  = "This SDL Token specifies whether or not CMOS messages are supported.\(This feature is only supported for TSE versions 4.6.2_TSE_2_01_1204 and later)"
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+    TargetMAK = Yes
+End
+
+TOKEN
+    Name  = "CMOS_USES_STANDARD_BATTERY_TEST"
+    Value  = "1"
+    Help  = "Specifies whether or not to use CMOS Manager's default battery test function.  If a platform provides a different battery test function this token should be disabled."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_USES_STANDARD_IS_FIRST_BOOT"
+    Value  = "1"
+    Help  = "Specifies whether or not to use CMOS Manager's default first boot test function.  If a platform provides a different first boot test function this token should be disabled."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_USES_STANDARD_IS_BSP"
+    Value  = "1"
+    Help  = "This SDL Token specifies whether or not to use the default function to determine whether or not the boot strap processor is executing.   If a platform provides a different function for determining the BSP, this token should be disabled."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_USES_STANDARD_IS_CMOS_USABLE"
+    Value  = "1"
+    Help  = "This SDL Token specifies whether or not to use the default function to determine whether or not the CMOS is usable.   If a platform provides a different function for determining the usability of CMOS, this token should be disabled."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+TOKEN
+    Name  = "CMOS_USES_STANDARD_IS_COLD_BOOT"
+    Value  = "1"
+    Help  = "This SDL Token specifies whether or not to use the default function to determine whether or not the platform is executing a cold boot."
+    TokenType = Boolean
+    TargetEQU = Yes
+    TargetH = Yes
+End
+
+ELINK
+    Name  = "{0, 0, 0, 127, ReadWriteStandardRange},"
+    Parent  = "CMOS_PORT_MAPPING"
+    Help  = "Standard NMI-capable access range"
+    Token = "CMOS_USES_STANDARD_RANGE_ACCESS" "=" "1"
+    InvokeOrder = AfterParent
+End
+
+ELINK
+    Name  = "CmosMgrBatteryIsGood"
+    Parent  = "CMOS_BATTERY_TEST_MAPPING"
+    Help  = "Link the standard function to determine whether or not the CMOS battery is good."
+    Token = "CMOS_USES_STANDARD_BATTERY_TEST" "=" "1"
+    InvokeOrder = AfterParent
+End
+
+ELINK
+    Name  = "CmosMgrIsFirstBoot"
+    Parent  = "CMOS_IS_FIRST_BOOT_MAPPING"
+    Help  = "Link the standard function to determine whether or not the platform is executing a first boot."
+    Token = "CMOS_USES_STANDARD_IS_FIRST_BOOT" "=" "1"
+    InvokeOrder = AfterParent
+End
+
+ELINK
+    Name  = "CmosIsUsable"
+    Parent  = "CMOS_IS_USABLE_MAPPING"
+    Help  = "Link the standard function to determine whether or not the is usable.  (The CMOS may be usable if the battery is bad.)"
+    Token = "CMOS_USES_STANDARD_IS_CMOS_USABLE" "=" "1"
+    InvokeOrder = AfterParent
+End
+
+ELINK
+    Name  = "CmosMgrIsBsp"
+    Parent  = "CMOS_IS_BSP_MAPPING"
+    Help  = "Link the standard function to determine whether or not the BSP is currently executing."
+    Token = "CMOS_USES_STANDARD_IS_BSP" "=" "1"
+    InvokeOrder = AfterParent
+End
+
+ELINK
+    Name  = "CmosMgrIsColdBoot"
+    Parent  = "CMOS_IS_COLD_BOOT_MAPPING"
+    Help  = "Link the standard function to determine whether or not the platform is executing a cold boot."
+    Token = "CMOS_USES_STANDARD_IS_COLD_BOOT" "=" "1"
+    InvokeOrder = AfterParent
+End
+
+ELINK
+	Name  = "$(CMOS_MANAGER_DIR)\CmosSetup.sd"
+	Parent  = "SETUP_DEFINITIONS"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\CmosSetup.sdb"
+	Parent  = "SETUP_SDBS"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+End
+
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
diff --git a/Core/EM/CmosManager/CmosBoard.ssp b/Core/EM/CmosManager/CmosBoard.ssp
new file mode 100644
index 0000000..0c41c57
--- /dev/null
+++ b/Core/EM/CmosManager/CmosBoard.ssp
@@ -0,0 +1,171 @@
+// This AMI Setup Script Processor (SSP) file contains setup items that
+// are related to the CMOS Manager.
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosBoard.ssp 6     6/15/10 2:22p Michaela $
+//
+// $Revision: 6 $
+//
+// $Date: 6/15/10 2:22p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosBoard.ssp $
+// 
+// 6     6/15/10 2:22p Michaela
+// 
+// 5     7/29/09 9:54a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 4     6/15/09 5:09p Michaela
+// 
+// 3     6/02/09 3:25p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 2     2/06/09 2:05p Michaela
+// MKF_DEFINE_TCG_CMOS_REGISTERS was not used for 
+// conditional TPM register declarations
+// 
+// 1     11/25/08 3:08p Michaela
+// Added for project specific porting
+// 
+// 4     11/07/08 5:14p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 3     3/25/08 3:16p Michaela
+// Several tokens are now only conditionally predefined
+// 
+// 2     2/29/08 9:34p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA $
+// Created
+// 
+//***************************************************************************
+
+
+//---------------------------------------------------------------------------
+// CMOS manager starts auto-assigning at 0x40
+//
+// This is a typical CMOS usage arrangement.  
+// (Note: these locations are not currently reserverd by default.)
+//---------------------------------------------------------------------------
+//
+// 0x00..0x3F   Legacy CMOS area, used by CSM
+// 0x40..0x7F   OEM/ODM
+// 0x80..0xBF   Chipset
+// 0xC0..0xFF   Core+Technologies
+//
+// This is the format of a CMOS token defintion:  
+//---------------------------------------------------------------------------
+// NvramField
+//  OptionBits = integer    // how many bits to use
+//  [Default = integer]     // "optimal" value in assembler format "xxxh"
+//  [CheckSum = YES | NO]   // include = YES
+//  [Location = cmos address, clobber mask]
+// EndNvramField
+
+
+//---------------------------------------------------------------------------
+//
+// Here we pre-define currently known, project-independent, locations. 
+//
+// Note: These definitions should be updated/deleleted as modules
+//       begin to integrate CMOS manager.
+//
+//       *CMOS manager will not complain on duplicate names, unless there
+//        is a mask or location conflict.
+//
+//---------------------------------------------------------------------------
+
+//----------------------------------------------------------------------------
+// CMOS Checksum Location
+//----------------------------------------------------------------------------
+// Declare the CMOS checksum location as a non-checksummed value, that spans 
+// 2 bytes.  The checksum will include only those CMOS addresses that have 
+// been explicitly declared with Checksum = YES.  
+//
+//    * All non-checksummed addresses appear in the NonChecksumTable macros 
+//      in SspData.h)
+//
+//    * The checksum will be computed/used for the entire range of managed, 
+//      checksummed, CMOS.
+
+NvramField (CMOS_CHECKSUM_HIGH)
+	OptionBits  = 8
+    Default     = 00h
+	Checksum    = NO
+    Location    = 040h, 0FFh
+EndNvramField
+
+NvramField (CMOS_CHECKSUM_LOW)
+	OptionBits  = 8
+    Default     = 00h
+	Checksum    = NO
+    Location    = 041h, 0FFh
+EndNvramField
+
+
+
+
+//----------------------------------------------------------------------------
+// Reserve 32-Bit CMOS API Pointer
+//----------------------------------------------------------------------------
+
+NvramField (CMOS_API_BYTE3)
+	OptionBits  = 8
+    Managed     = NO
+    Location    = 042h, 0FFh
+EndNvramField
+
+NvramField (CMOS_API_BYTE2)
+	OptionBits  = 8
+    Managed     = NO
+    Location    = 043h, 0FFh
+EndNvramField
+
+NvramField (CMOS_API_BYTE1)
+	OptionBits  = 8
+    Managed     = NO
+    Location    = 044h, 0FFh
+EndNvramField
+
+NvramField (CMOS_API_BYTE0)
+	OptionBits  = 8
+    Managed     = NO
+    Location    = 045h, 0FFh
+EndNvramField
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManager.c b/Core/EM/CmosManager/CmosManager.c
new file mode 100644
index 0000000..6513e67
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManager.c
@@ -0,0 +1,1193 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosManager.c 22    6/15/10 2:24p Michaela $
+//
+// $Revision: 22 $
+//
+// $Date: 6/15/10 2:24p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosManager.c $
+// 
+// 22    6/15/10 2:24p Michaela
+// 
+// 21    3/08/10 5:40p Michaela
+// 
+// 20    3/05/10 4:55p Michaela
+// 
+// 19    12/04/09 7:32p Michaela
+// 
+// 18    12/03/09 6:31p Michaela
+// 1. Moved gIsBsp here and added gIsColdBoot definition
+// 
+// 2. Updated CmosConfigureManager() to force calculation of
+//    checksum after enabling the Optimal Defaults buffer.
+//    
+// 3. Updated NewCmosManagerInterface() to update first boot,
+//    BSP detected and incoherency policy settings bits prior to
+//    calculating the checksum and getting the battery status.
+// 
+// 17    11/10/09 9:14p Michaela
+// 
+// 16    7/29/09 9:59a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 15    6/15/09 5:11p Michaela
+// 
+// 14    6/02/09 3:27p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 13    3/11/09 3:38p Michaela
+// 
+// 12    2/16/09 10:26p Michaela
+// Rename CmosManagerAsm to gCmosManagerAsm
+// 
+// 11    2/06/09 2:02p Michaela
+// removed hard-coded FIRST_CMOS_REGISTER value
+// 
+// 10    11/25/08 3:20p Michaela
+// Updates for Label 4.6.3_CMOSMGR_08
+// - Assembly macro fixes
+// - Added assembly macros
+// - Moved loading defaults into DXE phase
+// - Updated help file example
+// 
+// 9     11/17/08 4:41p Michaela
+// --Removed Token Name strings in debug development code
+// 
+// 8     11/17/08 3:33p Michaela
+// -added CMOS_ACCESS_TYPE typedef for client code usage
+// -CMOS Buffer feature is depreciated
+// -Removed debug code
+// -SaveApiPointerToCmos & GetApiPointerFromCmos are now
+//  directly calling CmosPhysicalReadWrite to avoid error if using
+//  Optimal Defaults buffer for Reads/Writes
+// -ABORT_ERROR_STATUS replaced with EFI_ERROR macro
+//  usage
+// 
+// 7     11/14/08 9:07a Michaela
+// CMOS register variables changed from UINT8 to UINT16
+// 
+// 6     11/07/08 5:13p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 5     3/25/08 3:00p Michaela
+// Modified call to SynchronizeLegacyStatusRegisters
+// 
+// 4     3/07/08 4:07p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 3     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 2     2/26/08 12:48p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManager.c
+//
+// Description: Contains the routines that constitute the CMOS manager
+//              implementation.  This files is used to create object code
+//              for both PEI and DXE phases, based upon the build
+//              macro PEI_COMPILE.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Efi.h>
+#ifdef PEI_COMPILE
+    #include <Pei.h>
+    #include <AmiPeiLib.h>
+#else
+    #include <AmiDxeLib.h>
+#endif
+#ifdef SMM_COMPILE
+    #include <Protocol\SmmBase.h>
+#endif
+#include <CmosAccess.h>
+#include "CmosManager.h"
+#include "CmosManagerHob.h"
+#include "SspTokens.h"
+#include "CmosBoard.h"
+
+//---------------------------------------------------------------------------
+// These functions are originally defined in CmosAccess.c
+//---------------------------------------------------------------------------
+extern EFI_STATUS CmosRead(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  UINT16                      CmosToken,
+    OUT UINT8                       *CmosValue );
+extern EFI_STATUS CmosWrite(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  UINT16                      CmosToken,
+    IN  UINT8                       CmosValue );
+extern UINT16 CmosGetTokenFromRegister(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  UINT16                      CmosRegister );
+extern EFI_STATUS CalculateChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      *ChecksumValue );
+extern EFI_STATUS LoadOptimalDefaults(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager );
+extern EFI_STATUS WriteChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      ChecksumValue );
+extern EFI_STATUS ReadChecksum(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      *ChecksumValue );
+extern EFI_STATUS ReadCmosStatusBytes(
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    OUT CMOS_STATUS_BYTES           *StatusBytes );
+extern EFI_STATUS SynchronizeLegacyStatusRegisters(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap,
+    IN CMOS_BIT_ACCESS_TYPE         AccessType );
+extern EFI_STATUS CmosPhysicalReadWrite(
+    IN      EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    IN      CMOS_ACCESS_TYPE            AccessType,
+    IN      UINT16                      CmosAddress,
+    IN      UINT8                       BitsToWrite,  
+    IN OUT  UINT8                       *CmosParameterValue );
+    
+extern EFI_STATUS CmosGetDateTime (
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    OUT EFI_TIME                    *Time );
+
+extern EFI_STATUS CmosSetDateTime (
+    IN  EFI_CMOS_ACCESS_INTERFACE   *Cmos,
+    IN  EFI_TIME                    *Time );
+
+EFI_STATUS UpdateBatteryStatus (
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager );   
+
+// porting functions
+
+EFI_CMOS_IS_FIRST_BOOT  gIsFirstBoot  = CMOS_IS_FIRST_BOOT_MAPPING; 
+EFI_CMOS_IS_BSP         gIsBsp        = CMOS_IS_BSP_MAPPING;
+EFI_CMOS_IS_COLD_BOOT   gIsColdBoot   = CMOS_IS_COLD_BOOT_MAPPING;
+EFI_CMOS_IS_CMOS_USABLE gCmosIsUsable = CMOS_IS_USABLE_MAPPING;
+
+
+#if  defined( PEI_COMPILE ) || defined( SMM_COMPILE ) 
+
+    // In early PEI, these data items are accessed in ROM.
+
+    // In SMM, the gCmosOptimalDefaultTable structure is
+    // read/write.
+
+    extern CONST CMOS_TOKEN       gCmosTokenTable[];
+    extern CONST UINT16           gCmosTokenTableSize;
+    extern CONST CMOS_REGISTER    gCmosNoCheckSumTable[];
+    extern CONST UINT16           gCmosNoCheckSumTableSize;
+    extern CONST CMOS_REGISTER    gUnmanagedTable[];
+    extern CONST UINT16           gUnmanagedTableSize;
+    extern CMOS_REGISTER          gCmosOptimalDefaultTable[];
+    extern CONST UINT16           gCmosOptimalDefaultTableSize;
+    extern CONST UINT8            gFirstManagedRegister;
+    extern CONST UINT8            gLastManagedRegister;
+#endif
+
+
+#ifdef PEI_COMPILE // PEI phase-specific declarations
+    extern EFI_STATUS SaveCmosDataTablesToHob(
+        EFI_PEI_SERVICES                **PeiServices, 
+        EFI_CMOS_MANAGER_INTERFACE      *Manager );
+    extern VOID CmosSynchronizeHobManagerStatus(
+        IN EFI_CMOS_MANAGER_INTERFACE   *Manager );    
+#endif
+
+
+// DXE phase-specific declarations
+
+#if !defined(PEI_COMPILE) && !defined(SMM_COMPILE)   
+    extern EFI_STATUS InitializeCmosTablesFromHob(
+        EFI_CMOS_MANAGER_INTERFACE  *Manager );
+        
+#endif
+
+
+#ifdef PEI_COMPILE // PEI phase-specific globals
+  EFI_GUID gCmosAccessGuid = EFI_PEI_CMOS_ACCESS_GUID;
+  EFI_GUID gMemoryInstalledGuid = 
+                        EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI;
+
+#elif defined(SMM_COMPILE) // SMM-specific globals
+  EFI_GUID gCmosAccessGuid = EFI_SMM_CMOS_ACCESS_GUID;
+
+#else   // default is DXE phase-specific globals
+  EFI_GUID  gCmosAccessGuid = EFI_DXE_CMOS_ACCESS_GUID;
+
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerAllocatePool
+//
+// Description:
+//      This function allocates memory for all boot phases.
+//
+// Input:
+//      IN EFI_PEI_SERVICES **PeiServices
+//                  -- PEI Services table (NULL in DXE phase)
+//      IN UINTN Size
+//                  -- Number of bytes to allocate
+//      OUT VOID **Buffer
+//                  -- Pointer to buffer for which memory is allocated
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosManagerAllocatePool(
+    IN EFI_PEI_SERVICES   **PeiServices,
+    IN UINTN              Size,
+    OUT VOID              **Buffer )
+{
+#ifdef PEI_COMPILE
+    return (*PeiServices)->AllocatePool( PeiServices, 
+            Size, Buffer);
+#elif defined(SMM_COMPILE)
+    return pSmst->SmmAllocatePool(0, Size, Buffer);
+#else // DXE
+    return pBS->AllocatePool( EfiBootServicesData, Size, Buffer);
+#endif
+
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosGetMangerInterface
+//
+// Description:
+//      Gets the EFI_CMOS_MANAGER_INTERFACE for the current access
+//      interface.
+//
+// Input:
+//      IN  EFI_CMOS_ACCESS_INTERFACE *Cmos
+//                  -- This is the access interface pointer.
+//
+// Output:
+//      EFI_CMOS_MANAGER_INTERFACE * (Return Value)
+//                  -- If successful, the CMOS manager interface is returned.
+//                  -- Otherwise, a valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_CMOS_MANAGER_INTERFACE *GetCmosMangerInterface(
+    IN EFI_CMOS_ACCESS_INTERFACE   *Cmos )
+{
+    // The installed Protocol type will be EFI_CMOS_ACCESS_INTERFACE
+    // (converted as needed by the CMOS manager)
+
+    EFI_CMOS_MANAGER_INTERFACE *Interface = (EFI_CMOS_MANAGER_INTERFACE*) Cmos;
+    return Interface;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: GetCmosAccessInterface
+//
+// Description:
+//      Gets the EFI_CMOS_ACCESS_INTERFACE for the current manager
+//      interface.
+//
+// Input:
+//      IN  EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- This is the manager interface pointer.
+//
+// Output:
+//      EFI_CMOS_ACCESS_INTERFACE * (Return Value)
+//                  -- If successful, the CMOS access interface is returned.
+//                  -- Otherwise, NULL is returned.
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_CMOS_ACCESS_INTERFACE *GetCmosAccessInterface(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager )
+{
+    EFI_CMOS_ACCESS_INTERFACE *Interface = NULL;
+    
+    // The installed Protocol type will be EFI_CMOS_ACCESS_INTERFACE
+    // (converted as needed by the CMOS manager)
+    if (Manager != NULL &&
+        Manager->CheckStatus(Manager, CMOS_VALID_INTERFACE))
+            Interface = (EFI_CMOS_ACCESS_INTERFACE*) Manager;
+        
+    return Interface;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerCheckStatus
+//
+// Description:
+//      This function returns true if all the status bits are set as 
+//      specified by the BitMap.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE   *Manager
+//                  -- Pointer to the Manager's interface
+//      IN CMOS_MANAGER_STATUS          BitMap 
+//                  -- Bits to check
+//
+//
+// Output:
+//      BOOLEAN (Return value)
+//               = TRUE, if all bits in ManagerStatus specified by 
+//                 BitMap are set.
+//
+//               = FALSE, otherwise.
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CmosManagerCheckStatus(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap )
+{
+    if ((Manager->ManagerStatus & BitMap) == BitMap)
+        return TRUE;
+    else
+        return FALSE;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerCheckAnyStatus
+//
+// Description:
+//      This function returns true if any of the status bits are set as 
+//      specified by the BitMap.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE   *Manager
+//                  -- Pointer to the Manager's interface
+//      IN CMOS_MANAGER_STATUS          BitMap 
+//                  -- Bits to check
+//
+//
+// Output:
+//      BOOLEAN (Return value)
+//               = TRUE, if one or more of the bits in ManagerStatus 
+//                 specified by BitMap are set.
+//
+//               = FALSE, otherwise.
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+BOOLEAN CmosManagerCheckAnyStatus(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap )
+{
+    if ((Manager->ManagerStatus & BitMap) != 0)
+        return TRUE;
+    else
+        return FALSE;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerSetClearStatus
+//
+// Description:
+//      This function provides a single entry point into the code that
+//      actually updates status values.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//      IN CMOS_MANAGER_STATUS BitMap 
+//                  -- Bits to set or clear
+//      IN CMOS_BIT_ACCESS_TYPE AccessType
+//                  -- SetType or ClearType depending upon whether
+//                     setting or clearing bits
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID CmosManagerSetClearStatus(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Mgr,
+    IN CMOS_MANAGER_STATUS          BitMap,
+    IN CMOS_BIT_ACCESS_TYPE         AccessType )
+{
+    if (AccessType == SetType){
+        Mgr->ManagerStatus = Mgr->ManagerStatus | BitMap;
+
+        // A boot/setup event callback explicitly clears these bits each boot
+
+        if ( Mgr->CheckStatus(Mgr, CMOS_IS_USABLE) ){
+            if ( BitMap & CMOS_BAD_BATTERY )
+                Mgr->Access.Write(&Mgr->Access, CMOS_MGR_BATTERY_BAD, 1);
+            if ( BitMap & CMOS_BAD_CHECKSUM )
+                Mgr->Access.Write(&Mgr->Access, CMOS_MGR_CHECKSUM_BAD, 1);
+            if ( BitMap & CMOS_DEFAULTS_LOADED )
+                Mgr->Access.Write(&Mgr->Access, CMOS_MGR_DEFAULTS_LOADED, 1);
+            if ( BitMap & CMOS_FIRST_BOOT_DETECTED )
+                Mgr->Access.Write(&Mgr->Access, CMOS_MGR_FIRST_BOOT_DETECTED, 1);
+        }
+
+    }
+    else
+        Mgr->ManagerStatus = Mgr->ManagerStatus & ~BitMap;
+
+#ifdef PEI_COMPILE  // In PEI, update ManagerStatus for DXE
+    CmosSynchronizeHobManagerStatus(Mgr);
+#endif
+
+    // if the Checksum or Battery status is being modified, then 
+    // update the legacy status registers
+    if ( (BitMap & (CMOS_BAD_CHECKSUM | CMOS_BAD_BATTERY)) != 0  ){
+        SynchronizeLegacyStatusRegisters(Mgr, BitMap, AccessType);
+    }
+
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerSetStatus
+//
+// Description:
+//      This function sets status bits according to the specified bitmap.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//      IN CMOS_MANAGER_STATUS BitMap 
+//                  -- Bits to set
+//
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID CmosManagerSetStatus(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap )
+{
+    CmosManagerSetClearStatus(Manager, BitMap, SetType);
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerClearStatus
+//
+// Description:
+//      This function clears status bits according to the specified bitmap.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//      IN CMOS_MANAGER_STATUS BitMap 
+//                  -- Bits to clear
+//
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID CmosManagerClearStatus(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap )
+{
+    CmosManagerSetClearStatus(Manager, BitMap, ClearType);
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosUpdateMemoryStatus
+//
+// Description:
+//      This function is used in the PEI phase to set/clear the 
+//      CMOS_EXECUTING_IN_MEMORY depending on whether or not the manager
+//      is executing after permanent memory has been initialized.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#ifdef PEI_COMPILE
+VOID CmosUpdateMemoryStatus (
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager )
+{
+    EFI_STATUS      Status = EFI_SUCCESS;
+    VOID            *InterfacePtr;
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+    
+    CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, "CmosUpdateMemoryStatus Entry\n"));
+    
+    Status = (*PeiServices)->LocatePpi( PeiServices, &gMemoryInstalledGuid, 
+                                        0, NULL, &InterfacePtr);
+    if ( EFI_ERROR(Status) ) 
+        Manager->ClearStatus(Manager, CMOS_EXECUTING_IN_MEMORY); 
+    else
+        Manager->SetStatus(Manager, CMOS_EXECUTING_IN_MEMORY); 
+
+}
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosConfigureManager
+//
+// Description:
+//      This function configures the CMOS Manager.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Pointer to the Manager's interface
+//      IN CMOS_CONFIGURATION_SETTING Setting
+//                  -- Configuration setting to invoke.
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosConfigureManager(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Mgr,
+    IN CMOS_CONFIGURATION_SETTING   Setting )
+{
+    EFI_STATUS                  Status = EFI_SUCCESS;
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+#define Request(x) ((Setting & (x)) != 0)
+
+    // Basic error checking
+
+    if (    Request(CMOS_OPTIMAL_DEFAULTS_ON) 
+         && Request(CMOS_OPTIMAL_DEFAULTS_OFF) )
+    {
+        return Status = EFI_INVALID_PARAMETER;
+    }
+
+    //-----------------------------------------------------------------------
+    // CMOS_OPTIMAL_DEFAULTS_ON
+    //-----------------------------------------------------------------------
+    // If configuring usage of the optimal defaults buffer and it's already 
+    // enabled, simply return.  Otherwise...
+    //
+    //  *  If executing in memory, enable the optimal defaults buffer
+    //     and update the checksum.
+    //  *  If not executing in memory, allocate the optimal defaults buffer,
+    //     copy the values into it, and update the 
+    //     Manager->OptimalDefaultTable pointer to point to the read/write
+    //     buffer.
+    //  *  Set the manager status bit to indicate usage of the optimal
+    //     defaults buffer.
+
+    if ( Request( CMOS_OPTIMAL_DEFAULTS_ON ) )
+    {
+        if (Mgr->CheckStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED))
+            return EFI_SUCCESS;  // already configured
+            
+        // This will only occur in PEI phase!!
+
+        if (!Mgr->CheckStatus(Mgr, CMOS_EXECUTING_IN_MEMORY)) {
+            VOID *Temp;
+            CmosManagerAllocatePool( PeiServices,
+                Mgr->OptimalDefaultCount * sizeof(CMOS_REGISTER), 
+                &Temp);
+            MemCpy( Temp , Mgr->OptimalDefaultTable,
+                Mgr->OptimalDefaultCount * sizeof(CMOS_REGISTER) );
+            Mgr->OptimalDefaultTable = Temp;
+        }
+        
+        Mgr->SetStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED);
+        Mgr->CalculateChecksum(Mgr, &Mgr->Checksum);
+        Mgr->WriteChecksum(Mgr, Mgr->Checksum);
+
+    }
+    
+    //-----------------------------------------------------------------------
+    // CMOS_OPTIMAL_DEFAULTS_OFF
+    //-----------------------------------------------------------------------
+    //
+    // Clear the status bit, and let the Manager interface user must decide
+    // what to do next ...call LoadOptimalDefaults, enable buffered CMOS 
+    // mode, ....
+
+    if ( Request( CMOS_OPTIMAL_DEFAULTS_OFF ) ){
+        Mgr->ClearStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED);
+    }
+
+#undef Request
+
+    return Status;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: SaveApiPointerToCmos
+//
+// Description:
+//      This function saves the specified pointer to a predefined 4-byte
+//      CMOS location.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *CmosManager
+//                  - Pointer to the manager's interface
+//      IN EFI_CMOS_ACCESS_INTERFACE *ApiPointer
+//                  - API address
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS SaveApiPointerToCmos( 
+    IN EFI_CMOS_MANAGER_INTERFACE      *Mgr,
+    IN EFI_CMOS_ACCESS_INTERFACE       *ApiPointer )
+{
+    UINT32   Offset;
+    UINT8    Byte;  // Only used in PEI
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    if (ApiPointer == NULL)
+        ApiPointer = Mgr->GetAccessInterface(Mgr);
+
+    if ( !Mgr->CheckAnyStatus(Mgr, CMOS_IS_USABLE ) ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "CMOS Not Usable: Could not save API pointer.\n"));
+        return EFI_DEVICE_ERROR;
+    }
+
+    for (Offset = 0; Offset < 4; Offset++){
+        Byte = (UINT8)((UINT32)ApiPointer >> (24 - (Offset * 8))) & 0xff;
+        CmosPhysicalReadWrite(  Mgr, 
+                                WriteType, 
+                                CMOS_ACCESS_API_BYTE3 + Offset,
+                                ALL_BITS, 
+                                &Byte );
+    }
+
+    return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: GetApiPointerFromCmos
+//
+// Description:
+//      This function get the CMOS API pointer from a predefined 4-byte
+//      CMOS location and updates the output parameter with the pointer.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *CmosManager
+//                  - Pointer to the manager's interface to be installed
+//      OUT EFI_CMOS_ACCESS_INTERFACE **ApiPointer
+//                  - Address of the API pointer
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS GetApiPointerFromCmos( 
+    IN EFI_CMOS_MANAGER_INTERFACE   *Mgr,
+    EFI_CMOS_ACCESS_INTERFACE       **ApiPointer )
+{
+    UINT8   Temp; 
+    UINT32  Ptr = 0;
+    UINT8   Offset;
+    DEFINE_PEI_SERVICES(Mgr->Access.PeiServices);
+
+    if ( !Mgr->CheckAnyStatus(Mgr, CMOS_IS_USABLE ) ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "CMOS Not Usable: Could not read API pointer.\n"));
+        return EFI_DEVICE_ERROR;
+    }
+
+    for (Offset = 0; Offset < 4; Offset++){
+        CmosPhysicalReadWrite(  Mgr, 
+                                ReadType, 
+                                CMOS_ACCESS_API_BYTE3 + Offset,
+                                0, 
+                                &Temp );
+        Ptr =  (Ptr << 8) | Temp;
+    }
+        
+    *ApiPointer = (EFI_CMOS_ACCESS_INTERFACE*) Ptr;
+
+    return EFI_SUCCESS;
+}
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: InstallCmosAccessInterface
+//
+// Description:
+//      This function installs either the PEI or DXE phase interface
+//      (PPI or Protocol) for accessing CMOS.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE      *CmosManager
+//                  - Pointer to the interface to be installed
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//      CmosManager->ManagerStatus 
+//                  = CMOS_VALID_MANAGER indicates successful
+//                    installation of interface.
+//
+// Notes:
+//      This function is used for both PEI and DXE phase.  The build
+//      macro PEI_COMPILE will determine how the object code is
+//      created/linked.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS InstallCmosAccessInterface( 
+    IN EFI_CMOS_MANAGER_INTERFACE      *CmosManager )
+{
+    EFI_STATUS          Status = EFI_SUCCESS;
+    EFI_HANDLE          Handle = 0;
+    DEFINE_PEI_SERVICES(CmosManager->Access.PeiServices);
+
+#ifdef PEI_COMPILE
+    Status = (*PeiServices)->InstallPpi( 
+            PeiServices, &CmosManager->Ppi[CMOS_ACCESS_PPI_TYPE]);
+#else
+    Status = pBS->InstallMultipleProtocolInterfaces(
+            &Handle, &CmosManager->AccessGuid, CmosManager, NULL);
+#endif
+
+    if (!EFI_ERROR(Status)) 
+        CmosManager->SetStatus(CmosManager, CMOS_VALID_MANAGER);
+    else {
+        CmosManager->SetStatus(CmosManager, CMOS_INSTALL_FAILED);
+        CmosManager->ClearStatus(CmosManager, CMOS_VALID_MANAGER);
+    }
+    
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: InitializeCmosManagerInterface
+//
+// Description:
+//      This function initializes structure data and function pointer  
+//      elements for a EFI_CMOS_MANAGER_INTERFACE.  
+//
+// Input:
+//      IN  EFI_PEI_SERVICES **PeiServices
+//                  - This parameter will be NULL in the DXE phase
+//      OUT EFI_CMOS_MANAGER_INTERFACE *CmosManager
+//                  - Pointer to the interface to be initialized
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS or valid EFI error code
+//      CmosManager->ManagerStatus 
+//                  = CMOS_VALID_INTERFACE indicates successful
+//                      initialization of the structure.
+//
+// Notes:
+//      This function is used for both PEI and DXE phase.  The build
+//      macro PEI_COMPILE will determine how the object code is
+//      created.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+
+EFI_STATUS InitializeCmosManagerInterface( 
+    IN  EFI_PEI_SERVICES                **PeiServices,
+    OUT EFI_CMOS_MANAGER_INTERFACE      *CmosManager )
+{
+    EFI_STATUS Status = EFI_SUCCESS;
+    
+    CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+        "InitializeCmosManagerInterface Entry\n"));
+
+    // Note: all pointers/values are already NULL/Zero
+    
+    // Not using an initializer list in order to avoid problems
+    // if/when the interface declarations are modified.
+
+    //-----------------------------------------------------------------------
+    // Phase-independent initialization
+    //-----------------------------------------------------------------------
+    CmosManager->AccessGuid = gCmosAccessGuid;
+    CmosManager->Access.PeiServices = PeiServices;  // ensure NULL in DXE
+    CmosManager->Access.Read = CmosRead;
+    CmosManager->Access.Write = CmosWrite;
+    CmosManager->Access.GetTokenFromRegister = CmosGetTokenFromRegister;
+    CmosManager->Access.ReadCmosStatusBytes = ReadCmosStatusBytes;
+    CmosManager->Access.GetTime = CmosGetDateTime;
+    CmosManager->Access.SetTime = CmosSetDateTime;
+    CmosManager->GetAccessInterface = GetCmosAccessInterface;
+    CmosManager->InstallAccessInterface = InstallCmosAccessInterface;
+    CmosManager->CalculateChecksum = CalculateChecksum;
+    CmosManager->ReadChecksum = ReadChecksum;
+    CmosManager->WriteChecksum = WriteChecksum;
+    CmosManager->ConfigureManager = CmosConfigureManager;
+    CmosManager->CheckStatus = CmosManagerCheckStatus;
+    CmosManager->CheckAnyStatus = CmosManagerCheckAnyStatus;
+    CmosManager->SetStatus = CmosManagerSetStatus;
+    CmosManager->ClearStatus = CmosManagerClearStatus;
+    CmosManager->LoadOptimalDefaults = LoadOptimalDefaults;
+    CmosManager->SaveApiPointerToCmos = SaveApiPointerToCmos;
+    CmosManager->GetApiPointerFromCmos = GetApiPointerFromCmos;
+    
+    //-----------------------------------------------------------------------
+    // Phase-specific initialization
+    //-----------------------------------------------------------------------
+    // update the access PPI descriptor and CMOS data table pointers.
+    //
+    // Note:
+    //        Before memory detection, the tables to which these pointers refer
+    //        will reside in ROM.  At runtime, these tables will reside in
+    //        SMRAM and boot updates will be copied into them.
+    //-----------------------------------------------------------------------
+
+#if defined(PEI_COMPILE) || defined(SMM_COMPILE)
+    CmosManager->FirstManagedRegister = gFirstManagedRegister;
+    CmosManager->LastManagedRegister = gLastManagedRegister;
+    CmosManager->TokenTable = (CMOS_TOKEN*) gCmosTokenTable; 
+    CmosManager->TokenCount = gCmosTokenTableSize;
+    CmosManager->NoChecksumTable = (CMOS_REGISTER*) gCmosNoCheckSumTable;
+    CmosManager->NoChecksumCount = gCmosNoCheckSumTableSize;
+    CmosManager->UnmanagedTable = (CMOS_REGISTER*) gUnmanagedTable;
+    CmosManager->UnmanagedTableCount = gUnmanagedTableSize;
+    CmosManager->OptimalDefaultTable = 
+        (CMOS_REGISTER*) gCmosOptimalDefaultTable;
+    CmosManager->OptimalDefaultCount = gCmosOptimalDefaultTableSize;
+#endif
+
+#if defined(PEI_COMPILE)
+    CmosManager->Ppi[CMOS_ACCESS_PPI_TYPE].Flags = 
+        EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+    CmosManager->Ppi[CMOS_ACCESS_PPI_TYPE].Guid = &gCmosAccessGuid;
+    CmosManager->Ppi[CMOS_ACCESS_PPI_TYPE].Ppi = (VOID*)CmosManager;
+#endif
+   
+    CmosManager->SetStatus(CmosManager, CMOS_VALID_INTERFACE);
+  
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: NewCmosManagerInterface
+//
+// Description:
+//      This function locates (or allocates memory for) the
+//      EFI_CMOS_MANAGER_INTERFACE, calculates the checksum, checks the
+//      battery condition and updates the Manager's status bits.  
+//
+// Input:
+//      IN EFI_PEI_SERVICES **PeiServices
+//                  - This parameter will be NULL in the DXE phase
+//
+// Output:
+//      EFI_CMOS_MANAGER_INTERFACE* (Return Value)
+//                  =  If successful, a pointer to the allocated/found
+//                     structure is returned.
+//                  =  NULL is returned on failure to allocate
+//
+//      NewManager->ManagerStatus
+//                  =  CMOS_INTERFACE_ALREADY_INSTALLED, if the interface is 
+//                     found prior to allocating
+//                  =  CMOS_VALID_INTERFACE, on successful initialization
+//                     of the access interface.
+//
+// Notes:
+//      This function is used for PEI, DXE and SMM interface initialization.  
+//      The build macros PEI_COMPILE and SMM_COMPILE will determine how the 
+//      object code is compiled.
+//
+//      See CMOS_MANAGER_STATUS enum type for more information on manager 
+//      status bits.
+//
+//      Assumptions: 
+//
+//               1) This function should only be called once for each 
+//                  entrypoint.
+//
+//               2) It is up to the user of the Manager interface to determine
+//                  how to use the CMOS_MANAGER_STATUS bits upon return from
+//                  this function.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_CMOS_MANAGER_INTERFACE* NewCmosManagerInterface( 
+    IN EFI_PEI_SERVICES        **PeiServices )
+{
+    EFI_CMOS_MANAGER_INTERFACE    *NewManager;
+    EFI_STATUS                    Status;
+    
+    //-----------------------------------------------------------------------
+    // If the interface is found then no initialization is done.
+    //-----------------------------------------------------------------------
+
+#ifdef PEI_COMPILE
+    LOCATE_CMOS_ACCESS_PPI(Status, NewManager);
+#elif defined (SMM_COMPILE)
+    LOCATE_CMOS_ACCESS_SMM_PROTOCOL(Status, NewManager)
+#else
+    LOCATE_CMOS_ACCESS_PROTOCOL(Status, NewManager)
+#endif    
+    if (Status == EFI_SUCCESS)
+    { 
+        NewManager->SetStatus(NewManager, CMOS_INTERFACE_ALREADY_INSTALLED);
+        return NewManager;
+    }
+    
+    //-----------------------------------------------------------------------
+    // Return NULL on allocation error.
+    //-----------------------------------------------------------------------
+
+    if (EFI_ERROR(CmosManagerAllocatePool( PeiServices, 
+                                           sizeof(EFI_CMOS_MANAGER_INTERFACE),
+                                           (VOID**)&NewManager ) )){
+        return NULL;
+    }
+
+    //-----------------------------------------------------------------------
+    // Zero the interface buffer (also ensures ManagerStatus bits are clear 
+    // and ensures pointers are NULL)
+    //-----------------------------------------------------------------------
+
+    MemSet( (void*)NewManager, sizeof(EFI_CMOS_MANAGER_INTERFACE), 0);
+    
+    //-----------------------------------------------------------------------
+    // Initialize general structures and function pointers
+    //-----------------------------------------------------------------------
+
+    InitializeCmosManagerInterface(PeiServices, NewManager);
+
+    //-----------------------------------------------------------------------
+    // Initialize pointers to/from data structures in the HOB or DXE Buffer
+    // updates
+    //-----------------------------------------------------------------------
+    // In PEI phase: 
+    //      1.  Update memory status
+    //
+    // In DXE phase: 
+    //      1.  Get the HOB and complete the initialization of the Manager 
+    //          interface data structure pointers.
+    //
+    // In SMM registration: 
+    //      1.  Use the original optimal defaults buffer, as the DXE buffer
+    //          has already by flushed to the physical registers if the battery
+    //          is good.  (If the battery is bad, it is unlikely CMOS is of
+    //          any use in SMM.)
+
+#ifdef PEI_COMPILE
+    CmosUpdateMemoryStatus( NewManager );
+#elif !defined(SMM_COMPILE)
+    if (EFI_ERROR( InitializeCmosTablesFromHob(NewManager) ))
+        return NULL;
+#endif
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Call CmosIsUsable: " ));
+    if ( gCmosIsUsable( NewManager->Access.PeiServices ) ){
+        NewManager->SetStatus(NewManager, CMOS_IS_USABLE);
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CMOS is usable\n" ));
+    }
+    else {
+        NewManager->ClearStatus(NewManager, CMOS_IS_USABLE);
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CMOS is not usable\n" ));
+    }
+
+    //-----------------------------------------------------------------------
+    // Update CMOS_FIRST_BOOT_DETECTED status bit before calculating
+    // the checksum or determining the battery status.
+    //-----------------------------------------------------------------------
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Call gIsFirstBoot: " ));
+    if ( gIsFirstBoot( NewManager->Access.PeiServices ) ){
+        NewManager->SetStatus(NewManager, CMOS_FIRST_BOOT_DETECTED);
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "First boot detected\n" ));
+    }
+    else {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "First boot NOT detected\n" ));
+    }
+
+    // Update CMOS_COLD_BOOT_DETECTED status bit.
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Call gIsColdBoot: " ));
+    if ( gIsColdBoot( NewManager->Access.PeiServices ) ){
+        NewManager->SetStatus(NewManager, CMOS_COLD_BOOT_DETECTED);
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Cold boot detected\n" ));
+    }
+    else {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Cold boot NOT detected\n" ));
+    }
+
+    // Update CMOS_BSP_IS_EXECUTING status bit.
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Call gIsBsp: " ));
+    if ( gIsBsp( NewManager->Access.PeiServices ) ){
+        NewManager->SetStatus(NewManager, CMOS_BSP_IS_EXECUTING);
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "BSP is executing\n" ));
+    }
+    else {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "BSP is NOT executing\n" ));
+    }
+
+    // Configure incoherency recovery policy
+
+#if CMOS_MGR_RECOVER_ONLY_CHECKUMMED
+    NewManager->SetStatus(NewManager, CMOS_RECOVER_ONLY_CHECKSUMMED);
+#endif
+
+#if CMOS_MGR_RECOVER_IN_PEI
+    NewManager->SetStatus(NewManager, CMOS_RECOVER_IN_PEI);
+#endif
+
+
+    //-----------------------------------------------------------------------
+    // Update the NewManager->Checksum
+    //
+    // Note: This call only calculates and updates the checksum in
+    //       the manager interface structure.  The CMOS_BAD_CHECKSUM bit
+    //       is set in NewManager->ManagerStatus, if the calculated checksum 
+    //       does not match the current checksum in CMOS.
+    //
+    //       The user of the Manager interface will decide how to handle
+    //       a bad checksum.
+    //-----------------------------------------------------------------------
+
+    NewManager->CalculateChecksum(NewManager, &NewManager->Checksum);
+    
+    UpdateBatteryStatus(NewManager);
+
+    return NewManager;
+}
+
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManager.chm b/Core/EM/CmosManager/CmosManager.chm
new file mode 100644
index 0000000..5dc1ea2
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManager.chm
diff --git a/Core/EM/CmosManager/CmosManager.cif b/Core/EM/CmosManager/CmosManager.cif
new file mode 100644
index 0000000..7bedda6
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManager.cif
@@ -0,0 +1,16 @@
+<component>
+	name = "CMOS Manager"
+	category = eModule
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosManager"
+[files]
+"CmosManager.sdl"	
+"CmosManager.chm"	
+[parts]
+"CmosBoard"
+"CmosSec"
+"CmosPei"
+"CmosDxe"
+"CmosSmm"
+"CmosCore"
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManager.h b/Core/EM/CmosManager/CmosManager.h
new file mode 100644
index 0000000..7c039df
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManager.h
@@ -0,0 +1,260 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Includes/CmosManager.h 12    6/15/10 2:26p Michaela $
+//
+// $Revision: 12 $
+//
+// $Date: 6/15/10 2:26p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Includes/CmosManager.h $
+// 
+// 12    6/15/10 2:26p Michaela
+// 
+// 11    12/04/09 7:32p Michaela
+// 
+// 10    7/29/09 10:00a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 9     6/15/09 5:11p Michaela
+// 
+// 8     6/02/09 3:28p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 7     11/25/08 3:20p Michaela
+// Updates for Label 4.6.3_CMOSMGR_08
+// - Assembly macro fixes
+// - Added assembly macros
+// - Moved loading defaults into DXE phase
+// - Updated help file example
+// 
+// 6     11/17/08 3:51p Michaela
+// --CMOS Buffer feature is depreciated
+// 
+// 5     11/14/08 9:17a Michaela
+// **CMOS register variables are changed from UINT8 to UINT16
+// 
+// 4     11/07/08 5:13p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 3     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 2     2/26/08 12:50p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManager.h
+//
+// Description: Contains the constants, data types and declarations 
+//              necessary to support the CMOS manager interface.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+
+//<AMI_GHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name:    Internal_Interfaces
+//
+// Description:        
+//      The page provides links to descriptions of the internal interfaces 
+//      used by the CMOS Manager's subsystems.
+//
+// Fields:  Phase  Name  Description
+// ------------------------------------------------------------------
+// All  EFI_CMOS_MANAGER_INTERFACE      Provides general services
+//
+//----------------------------------------------------------------------------
+//<AMI_GHDR_END>
+
+
+#ifndef _CMOS_MANAGER_H
+#define _CMOS_MANAGER_H
+
+#include <Efi.h>
+#include <CmosAccess.h>
+#include "CmosManagerHob.h"
+#include "CmosTypes.h"
+
+typedef struct _EFI_CMOS_MANAGER_INTERFACE EFI_CMOS_MANAGER_INTERFACE;
+
+typedef EFI_STATUS (*CMOS_MANAGER_DISPLAY_TOKEN_TABLE) ( 
+    IN EFI_CMOS_MANAGER_INTERFACE       *Manager );
+
+typedef EFI_CMOS_ACCESS_INTERFACE * (*CMOS_MANAGER_GET_ACCESS_INTERFACE) (
+    IN EFI_CMOS_MANAGER_INTERFACE       *Manager );
+    
+typedef EFI_STATUS  (*CMOS_MANAGER_INSTALL_ACCESS_INTERFACE) (
+    IN EFI_CMOS_MANAGER_INTERFACE       *Manager );
+
+typedef EFI_STATUS (*CMOS_MANAGER_CALCULATE_CHECKSUM)(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      *ChecksumValue );
+
+typedef EFI_STATUS (*CMOS_MANAGER_READ_CHECKSUM)(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      *ChecksumValue );
+    
+typedef EFI_STATUS (*CMOS_MANAGER_WRITE_CHECKSUM)(
+    IN  EFI_CMOS_MANAGER_INTERFACE  *Manager,
+    OUT UINT16                      ChecksumValue );
+
+typedef EFI_STATUS (*CMOS_MANAGER_CONFIGURE) ( 
+    IN EFI_CMOS_MANAGER_INTERFACE       *Manager,
+    IN CMOS_CONFIGURATION_SETTING       Setting );
+    
+typedef VOID (*CMOS_MANAGER_SET_STATUS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap );
+
+typedef VOID (*CMOS_MANAGER_CLEAR_STATUS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap );
+
+typedef BOOLEAN (*CMOS_MANAGER_CHECK_STATUS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap );
+
+typedef BOOLEAN (*CMOS_MANAGER_CHECK_ANY_STATUS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN CMOS_MANAGER_STATUS          BitMap );
+
+typedef EFI_STATUS (*CMOS_MANAGER_LOAD_OPTIMAL_DEFAULTS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager );
+    
+typedef EFI_STATUS (*CMOS_MANAGER_SAVE_API_POINTER_TO_CMOS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN EFI_CMOS_ACCESS_INTERFACE    *ApiPointer  );
+
+typedef EFI_STATUS (*CMOS_MANAGER_GET_API_POINTER_FROM_CMOS)(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager,
+    IN EFI_CMOS_ACCESS_INTERFACE    **ApiPointer  );
+
+    
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+//  Name:   EFI_CMOS_MANAGER_INTERFACE
+//
+//  Description: 
+//      This is the internal interface used by subsystems within the CMOS
+//      manager module.
+//
+//  Fields:  Type  Name  Description
+//      EFI_CMOS_ACCESS_INTERFACE               Access                      The external interface
+//      CMOS_MANAGER_INSTALL_ACCESS_INTERFACE   InstallAccessInterface      Installs the Access PPI or Protocol, depending on the phase (see InstallCmosAccessInterface)
+//      CMOS_MANAGER_GET_ACCESS_INTERFACE       GetAccessInterface          Used internally to get a pointer to the Access interface (see GetCmosAccessInterface)
+//      EFI_GUID                                AccessGuid                  The Access PPI (or Protocol) GUID
+//      EFI_PEI_PPI_DESCRIPTOR                  Ppi[4]                      Descriptors for the PEIMs installed by this module
+//      UINT8                                   FirstManagedRegister        First register in the managed space
+//      UINT8                                   LastManagedRegister         Last register in the managed space
+//      CMOS_TOKEN                              *TokenTable                 All defined tokens
+//      UINT16                                  TokenCount                  Entry count for TokenTable (#Tokens + 1)
+//      CMOS_REGISTER                           *OptimalDefaultTable        Default values for all managed CMOS addresses
+//      UINT16                                  OptimalDefaultCount         Entry count for OptimalDefaultTable
+//      CMOS_REGISTER                           *NoChecksumTable            CMOS address of locations not included in the checksum in the managed area
+//      UINT16                                  NoChecksumCount             Entry count for NoChecksumTable
+//      CMOS_MANAGER_CONFIGURE                  ConfigureManager            Provides means for specifying configurable settings for CMOS manager during PEI/DXE initialization (see CmosConfigureManager)
+//      CMOS_CHECKSUM                           Checksum                    Valid checksum after the call to NewCmosManagerInterface()
+//      CMOS_MANAGER_CALCULATE_CHECKSUM         CalculateChecksum           Forces calculation of the checksum over the entire managed region
+//      CMOS_MANAGER_READ_CHECKSUM              ReadChecksum                Reads checksum from the CMOS checksum location
+//      CMOS_MANAGER_WRITE_CHECKSUM             WriteChecksum               Writes the provided checksum to the CMOS checksum location
+//      CMOS_MANAGER_LOAD_OPTIMAL_DEFAULTS      LoadOptimalDefaults         Writes default values from the OptimalDefaultTable to all CMOS registers
+//      CMOS_MANAGER_STATUS                     ManagerStatus               Bitmap containing various Manager-related status values
+//      CMOS_MANAGER_SET_STATUS                 SetStatus                   Sets bits in the ManagerStatus value (see CmosManagerSetStatus)
+//      CMOS_MANAGER_CLEAR_STATUS               ClearStatus                 Clears bits in the ManagerStatus value (see CmosManagerClearStatus)
+//      CMOS_MANAGER_CHECK_STATUS               CheckStatus                 Returns true if all of the specified bits are "set" in the ManagerStatus value (see CmosManagerCheckStatus)
+//      CMOS_MANAGER_CHECK_ANY_STATUS           CheckAnyStatus              Returns true if any of the specified bits are "set" in the ManagerStatus value (see CmosManagerCheckAnyStatus)
+//      CMOS_MANAGER_HOB                        *ManagerHob                 Pointer to the HOB defined after permanent memory detection in PEI
+//      CMOS_MANAGER_SAVE_API_POINTER_TO_CMOS   SaveApiPointerToCmos        Pointer to the Access interface is maintained in a 4-byte CMOS location
+//      CMOS_MANAGER_GET_API_POINTER_FROM_CMOS  GetApiPointerFromCmos       Retrieve pointer to the Access interface from 4-byte CMOS location
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+#pragma pack(push, 1)           // force byte alignment
+typedef struct _EFI_CMOS_MANAGER_INTERFACE 
+{
+    // Note: EFI_CMOS_ACCESS_INTERFACE must be first in this structure
+    EFI_CMOS_ACCESS_INTERFACE               Access;                 // Access
+    CMOS_MANAGER_INSTALL_ACCESS_INTERFACE   InstallAccessInterface;
+    CMOS_MANAGER_GET_ACCESS_INTERFACE       GetAccessInterface;
+    EFI_GUID                                AccessGuid;
+    EFI_PEI_PPI_DESCRIPTOR                  Ppi[4];
+    UINT16                                  FirstManagedRegister;
+    UINT16                                  LastManagedRegister;
+    CMOS_TOKEN                              *TokenTable;            // Tables
+    UINT16                                  TokenCount;
+    CMOS_REGISTER                           *OptimalDefaultTable;
+    UINT16                                  OptimalDefaultCount;
+    CMOS_REGISTER                           *NoChecksumTable;
+    UINT16                                  NoChecksumCount;
+    CMOS_REGISTER                           *UnmanagedTable;
+    UINT16                                  UnmanagedTableCount;
+    CMOS_MANAGER_CONFIGURE                  ConfigureManager;       // Manager
+    CMOS_CHECKSUM                           Checksum;
+    CMOS_MANAGER_CALCULATE_CHECKSUM         CalculateChecksum;
+    CMOS_MANAGER_READ_CHECKSUM              ReadChecksum;
+    CMOS_MANAGER_WRITE_CHECKSUM             WriteChecksum;
+    CMOS_MANAGER_LOAD_OPTIMAL_DEFAULTS      LoadOptimalDefaults;
+    CMOS_MANAGER_STATUS                     ManagerStatus;
+    CMOS_MANAGER_SET_STATUS                 SetStatus;
+    CMOS_MANAGER_CLEAR_STATUS               ClearStatus;
+    CMOS_MANAGER_CHECK_STATUS               CheckStatus;
+    CMOS_MANAGER_CHECK_ANY_STATUS           CheckAnyStatus;
+    CMOS_MANAGER_HOB                        *ManagerHob;
+    CMOS_MANAGER_SAVE_API_POINTER_TO_CMOS   SaveApiPointerToCmos;
+    CMOS_MANAGER_GET_API_POINTER_FROM_CMOS  GetApiPointerFromCmos;
+};
+#pragma pack(pop)           // force byte alignment
+
+// This is the only exposed internal CMOS manager function
+EFI_CMOS_MANAGER_INTERFACE* NewCmosManagerInterface( 
+    EFI_PEI_SERVICES                **PeiServices );
+
+#endif  // #ifndef _CMOS_MANAGER_H
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManager.mak b/Core/EM/CmosManager/CmosManager.mak
new file mode 100644
index 0000000..407d239
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManager.mak
@@ -0,0 +1,423 @@
+#*************************************************************************
+#*************************************************************************
+#**                                                                     **
+#**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+#**                                                                     **
+#**                       All Rights Reserved.                          **
+#**                                                                     **
+#**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+#**                                                                     **
+#**                       Phone: (770)-246-8600                         **
+#**                                                                     **
+#*************************************************************************
+#*************************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Build/CmosManager.mak 23    6/15/10 2:26p Michaela $
+#
+# $Revision: 23 $
+#
+# $Date: 6/15/10 2:26p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Build/CmosManager.mak $
+# 
+# 23    6/15/10 2:26p Michaela
+# 
+# 22    3/05/10 4:55p Michaela
+# 
+# 21    12/03/09 6:48p Michaela
+# 1. Clean-up the SEC target code
+# 
+# 2. Define CMOS_IS_COLD_BOOT_MAPPING environment
+#    variable passed to C-source for cold boot
+#    detection function overriding
+# 
+# 20    11/12/09 6:06p Michaela
+# Fixed build dependencies so that client make files can put
+# a dependency on SspTokens.h for rebuilding only if SSP files
+# change or a project rebuild is invoked.
+# 
+# 19    11/10/09 9:14p Michaela
+# 
+# 18    7/29/09 10:01a Michaela
+# updates Aptio Enhancement EIP 22205
+# (no code changes)
+# 
+# 17    7/23/09 1:30p Michaela
+# Fix PE32 related build issue
+# 
+# 16    6/15/09 5:12p Michaela
+# 
+# 15    6/02/09 3:28p Michaela
+# For label: 4.6.3_CMOSMGR_11
+# 
+# 14    3/11/09 3:38p Michaela
+# 
+# 13    2/23/09 6:04p Michaela
+# --Added $(AMICSPLib) dependency for exported SB CMOS
+#   access functions
+# --Removed Tokens.ssp
+# 
+# 12    1/08/09 12:54p Michaela
+# >removed COPY_INCLUDES target because CmosAccess32.inc and
+# CmosAccessSec.inc
+#  are now in the INCLUDE directory
+# 
+# 11    12/15/08 12:58p Michaela
+# Removed copying of CmosAccess32.inc and CmosAccessSec.inc
+# 
+# 10    11/25/08 3:20p Michaela
+# Updates for Label 4.6.3_CMOSMGR_08
+# - Assembly macro fixes
+# - Added assembly macros
+# - Moved loading defaults into DXE phase
+# - Updated help file example
+# 
+# 9     11/17/08 3:57p Michaela
+# --CMOS Buffer feature is depreciated
+# --Development debugging code is removed
+# --The DXE driver is invoked through the DXE INIT_LIST
+# 
+# 8     11/14/08 9:32a Michaela
+# **CMOS Manager PEI phase is now linked to CORE_PEIBin and
+# the entry point is called via PeiCoreInitialize INIT_LIST Elink
+# **CMOS_PORT_MAPPING Elink is pass to C source via
+# build environment variable.
+# **Added PeiCmosBoard.obj and CmosBoard.obj for PEI/DXE phase
+# board-specific access functions.
+# **AFTER_ROM target modified to search for 
+# CMOS_MANAGER_API string in CORE_PEI FFS and update
+# the pointer in Startup.FFS
+# 
+# 7     11/07/08 5:14p Michaela
+# Updated to make CMOS manager available in all phases 
+# of the boot process:
+# 
+# A CMOS API Pointer is maintained in CMOS and accessible
+# via provided macros in C and assembly source.
+# 
+# 6     3/25/08 3:06p Michaela
+# CmosManager.ssp is now forced to be the first file in the SSP file list
+# 
+# 5     2/29/08 9:35p Michaela
+# - removed redundant source file in DXE
+# 
+# 4     2/27/08 11:28a Michaela
+# Modified dependencies to prevent build errors under certain conditions
+# 
+# 3     2/26/08 12:51p Michaela
+# Fixed build dependency issues
+# 
+# 2     2/22/08 3:21p Olegi
+# Added GENERATE_CMOS_TOKENS target.
+# 
+# 1     2/22/08 2:29p Michaela
+# 
+# 1     2/04/08 6:00p MichaelA $
+# Created
+# 
+#**********************************************************************
+
+#<AMI_FHDR_START>
+#-----------------------------------------------------------------------
+#
+# Name:	CmosManager.mak
+#
+# Description:	
+#       This is a make file used to build the CMOS manager component
+#
+#-----------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+
+#<AMI_GHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    Entry_Functions
+#
+# Description:        
+#      This page provides links to descriptions of the PEI and DXE phase 
+#      entrypoint functions for the CMOS Manager module.
+#
+# Fields:  Phase  Entrypoint  Description
+# ------------------------------------------------------------------
+# PEI CmosManagerPeiEntry          Main PEI phase entry point
+# PEI CmosManagerAfterMemoryEntry  PEI after memory detection entry point
+# DXE CmosManagerDxeEntry          Main DXE phase entry point
+# DXE CmosManagerSmmEntry          Entry into SMM (Runtime) CMOS access support driver
+#
+#----------------------------------------------------------------------------
+#<AMI_GHDR_END>
+
+!INCLUDE $(BUILD_DIR)\timestamp.mak
+
+PREPARE : GENERATE_CMOS_TOKENS
+
+CMOS_MANAGER_COMPONENTS=\
+    CMOS_MANAGER_PEI \
+    CMOS_MANAGER_DXE \
+!IF $(CMOS_SMM_SUPPORT)
+    CMOS_MANAGER_SMM \
+!ENDIF
+
+
+all : $(CMOS_MANAGER_COMPONENTS)
+
+
+
+#---------------------------------------------------------------------------
+#		Shared module make file dependencies
+#---------------------------------------------------------------------------
+
+CMOS_MANAGER_MAK_DEPS = \
+    $(CMOS_MANAGER_DIR)\CmosManager.mak
+
+
+
+#----------------------------------------------------------------------------
+# Generate SSP output files in the build directory
+#----------------------------------------------------------------------------
+#
+# DEFAULT SETUP APPEARANCE AND ORDER
+#
+# Template.ssp			(Order of the SSP files is important)
+#	|
+#	+--CmosBoard.ssp  
+#	|
+#	+--ADDON_SSPs		(other Modules can add SSP files here and if they
+#	    :               define a duplicate name with the same mask the
+#       :               duplicate name will override the one defined in
+#                       CmosBoard.ssp)
+#
+#
+#  AmiSsp2.exe is only executed if an SSP file is modified or if a project
+#  rebuild is invoked.  (Note: modifying SDL forces a project rebuild.)
+#
+#       * Client modules should place a dependency on the SspTokens.h
+#         output files to ensure rebuild in the case CMOS Manager is
+#         rebuilt.
+#
+#----------------------------------------------------------------------------
+
+SSP_FILE_LIST = $(SSP_FILE_LIST) \
+$(CMOS_MANAGER_DIR)\Template.ssp \
+$(CMOS_MANAGER_DIR)\CmosBoard.ssp \
+$(ADDON_SSP_FILES)
+
+UPDATE_PROJECT_LOG:
+    type << >> $(BUILD_DIR)\SSP.log
+     Project build: $(TODAY) @ $(NOW)
+<<
+
+SSP_FILES = $(**:\=\\)
+$(BUILD_DIR)\SSP.log: $(SSP_FILE_LIST)
+    type << > $(BUILD_DIR)\SspFileList.txt
+include "$(SSP_FILES: ="^
+include ")"
+<<
+    @$(SSP) $(BUILD_DIR)\ -s2 -efi $(BUILD_DIR)\SspFileList.txt
+!IF EXIST($(BUILD_DIR)\$(CMOS_MANAGER_DIR))
+    -del /S /Q $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\* > NUL
+!ENDIF
+    type << >> $(BUILD_DIR)\SSP.log
+CMOS Manager build: $(TODAY) @ $(NOW)
+<<
+
+GENERATE_CMOS_TOKENS: $(BUILD_DIR)\SSP.log UPDATE_PROJECT_LOG
+
+
+#---------------------------------------------------------------------------
+#		CMOS Manager SEC object component
+#---------------------------------------------------------------------------
+CMOSMGR_SEC_ASM_FLAGS = /c /nologo /Sa /I$(CMOS_MANAGER_DIR) \
+    /Fl$(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SEC\ \
+!if "$(SEC_CREATE_PE32)" == "1"
+    /coff
+!endif
+
+$(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SEC\CmosManagerSec.obj : $(CMOS_MANAGER_DIR)\CmosManagerSec.asm
+!IF !EXIST($(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SEC)
+	mkdir $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SEC
+!ENDIF
+  $(ASM) $(CMOSMGR_SEC_ASM_FLAGS) /Fo$(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SEC\ $(CMOS_MANAGER_DIR)\CmosManagerSec.asm
+
+
+
+#---------------------------------------------------------------------------
+#		CMOS Manager PEI library component
+#---------------------------------------------------------------------------
+
+CMOS_MANAGER_PEI : $(BUILD_DIR)\CmosManagerPei.mak CmosManagerPeiBin
+
+CORE_PEIBin : $(BUILD_DIR)\CmosManagerPei.lib
+
+$(BUILD_DIR)\CmosManagerPei.lib : CMOS_MANAGER_PEI
+
+$(BUILD_DIR)\CmosManagerPei.mak : $(CMOS_MANAGER_MAK_DEPS) $(BUILD_RULES)
+!IF !EXIST($(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI)
+	mkdir $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI
+!ENDIF
+	$(CIF2MAK) $(CMOS_MANAGER_DIR)\CmosManager.cif $(CIF2MAK_DEFAULTS)
+
+CMOS_PEI_CFLAGS = \
+    $(CFLAGS) \
+    $(CMOS_MGR_CFLAGS) \
+    /D\"CMOS_PORT_MAPPING=$(CMOS_PORT_MAPPING)\" \
+    /D\"CMOS_IS_BSP_MAPPING=$(CMOS_IS_BSP_MAPPING)\" \
+    /D\"CMOS_IS_FIRST_BOOT_MAPPING=$(CMOS_IS_FIRST_BOOT_MAPPING)\" \
+    /D\"CMOS_BATTERY_TEST_MAPPING=$(CMOS_BATTERY_TEST_MAPPING)\" \
+    /D\"CMOS_IS_USABLE_MAPPING=$(CMOS_IS_USABLE_MAPPING)\" \
+    /D\"CMOS_IS_COLD_BOOT_MAPPING=$(CMOS_IS_COLD_BOOT_MAPPING)\" \
+    /DPEI_COMPILE 
+    
+
+{$(PROJECT_DIR)\Core\EM\CmosManager}.c{$(BUILD_DIR)\Core\EM\CmosManager\Pei}.obj:: 
+	$(CC) $(CMOS_PEI_CFLAGS) /Fo$(BUILD_DIR)\Core\EM\CmosManager\Pei\ $<
+
+CMOS_MANAGER_PEI_OBJECTS = \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI\CmosTables.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI\CmosAccess.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI\CmosBoard.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI\CmosManager.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI\CmosManagerHob.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\PEI\CmosManagerPei.obj
+
+CmosManagerPeiBin : $(AMIPEILIB) $(AMICSPLib) $(CMOS_MANAGER_PEI_OBJECTS)
+	@set INCLUDE=%%INCLUDE%%
+	$(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS) \
+		/f $(BUILD_DIR)\CmosManagerPei.mak all \
+		NAME=CmosManagerPei \
+        "OBJECTS=" \
+	    "CFLAGS=$(CMOS_PEI_CFLAGS)" \
+        TYPE=PEI_LIBRARY \
+        LIBRARY_NAME=$(BUILD_DIR)\CmosManagerPei.lib
+
+
+
+#---------------------------------------------------------------------------
+#		CMOS Manager DXE library component
+#---------------------------------------------------------------------------
+
+CMOS_MANAGER_DXE: $(BUILD_DIR)\CmosManagerDxe.mak CmosManagerDxeBin
+
+CORE_DXEBin : $(BUILD_DIR)\CmosManagerDxe.lib
+
+$(BUILD_DIR)\CmosManagerDxe.lib : CMOS_MANAGER_DXE
+
+$(BUILD_DIR)\CmosManagerDxe.mak : $(CMOS_MANAGER_MAK_DEPS) $(BUILD_RULES)
+!IF !EXIST($(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE)
+	mkdir $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE
+!ENDIF
+	$(CIF2MAK) $(CMOS_MANAGER_DIR)\CmosManager.cif $(CIF2MAK_DEFAULTS)
+
+CMOS_DXE_CFLAGS = \
+    $(CFLAGS) \
+    $(CMOS_MGR_CFLAGS) \
+    /D\"CMOS_PORT_MAPPING=$(CMOS_PORT_MAPPING)\" \
+    /D\"CMOS_IS_BSP_MAPPING=$(CMOS_IS_BSP_MAPPING)\" \
+    /D\"CMOS_IS_FIRST_BOOT_MAPPING=$(CMOS_IS_FIRST_BOOT_MAPPING)\" \
+    /D\"CMOS_BATTERY_TEST_MAPPING=$(CMOS_BATTERY_TEST_MAPPING)\" \
+    /D\"CMOS_IS_USABLE_MAPPING=$(CMOS_IS_USABLE_MAPPING)\" \
+    /D\"CMOS_IS_COLD_BOOT_MAPPING=$(CMOS_IS_COLD_BOOT_MAPPING)\" 
+
+{$(PROJECT_DIR)\Core\EM\CmosManager}.c{$(BUILD_DIR)\Core\EM\CmosManager\Dxe}.obj::
+	$(CC) $(CMOS_DXE_CFLAGS) /Fo$(BUILD_DIR)\Core\EM\CmosManager\Dxe\ $<
+
+CMOS_MANAGER_DXE_OBJECTS = \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosAccess.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosBoard.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosManager.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosManagerHob.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosManagerDxe.obj 
+
+CmosManagerDxeBin :  $(AMICSPLib) $(AMIDXELIB) $(CMOS_MANAGER_DXE_OBJECTS)
+	@set INCLUDE=%%INCLUDE%%
+    echo $(CMOS_PORT_MAPPING)
+	$(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS) \
+		/f $(BUILD_DIR)\CmosManagerDxe.mak all \
+		NAME=CmosManagerDxe \
+        "CFLAGS=$(CMOS_DXE_CFLAGS)" \
+		"OBJECTS=" \
+        TYPE=LIBRARY \
+        LIBRARY_NAME=$(BUILD_DIR)\CmosManagerDxe.lib \
+        LIBRARIES=\
+
+
+#---------------------------------------------------------------------------
+#		CMOS Manager SMM DXE driver component
+#---------------------------------------------------------------------------
+
+
+CMOS_MANAGER_SMM: $(BUILD_DIR)\CmosManagerSmm.mak CmosManagerSmmBin
+
+$(BUILD_DIR)\CmosManagerSmm.mak : $(CMOS_MANAGER_MAK_DEPS) $(BUILD_RULES)
+!IF !EXIST($(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SMM)
+	mkdir $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SMM
+!ENDIF
+	$(CIF2MAK) $(CMOS_MANAGER_DIR)\CmosManager.cif $(CIF2MAK_DEFAULTS)
+
+CMOS_SMM_CFLAGS = \
+    $(CFLAGS) \
+    $(CMOS_MGR_CFLAGS) \
+    /D\"CMOS_PORT_MAPPING=$(CMOS_PORT_MAPPING)\" \
+    /D\"CMOS_IS_BSP_MAPPING=$(CMOS_IS_BSP_MAPPING)\" \
+    /D\"CMOS_IS_FIRST_BOOT_MAPPING=$(CMOS_IS_FIRST_BOOT_MAPPING)\" \
+    /D\"CMOS_BATTERY_TEST_MAPPING=$(CMOS_BATTERY_TEST_MAPPING)\"\
+    /D\"CMOS_IS_USABLE_MAPPING=$(CMOS_IS_USABLE_MAPPING)\" \
+    /D\"CMOS_IS_COLD_BOOT_MAPPING=$(CMOS_IS_COLD_BOOT_MAPPING)\" \
+    /DSMM_COMPILE 
+
+{$(PROJECT_DIR)\Core\EM\CmosManager}.c{$(BUILD_DIR)\Core\EM\CmosManager\Smm}.obj::
+	$(CC) $(CMOS_SMM_CFLAGS) /Fo$(BUILD_DIR)\Core\EM\CmosManager\Smm\ $<
+
+# CmosAccess and CmosBoard are not SMM-buid dependent
+CMOS_MANAGER_SMM_OBJECTS = \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosAccess.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\DXE\CmosBoard.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SMM\CmosTables.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SMM\CmosManager.obj \
+    $(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SMM\CmosManagerSmm.obj
+
+CmosManagerSmmBin :  $(AMICSPLib) $(AMIDXELIB) $(CMOS_MANAGER_SMM_OBJECTS)
+	@set INCLUDE=%%INCLUDE%%
+	$(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS) \
+		/f $(BUILD_DIR)\CmosManagerSmm.mak all \
+		GUID=6869C5B3-AC8D-4973-8B37-E354DBF34ADD\
+		NAME=CmosManagerSmm \
+		ENTRY_POINT=CmosManagerSmmEntry\
+		"OBJECTS=" \
+        "CFLAGS=$(CMOS_SMM_CFLAGS)" \
+        TYPE=BS_DRIVER \
+        DEPEX1=$(CMOS_MANAGER_DIR)\CmosManagerSmm.DXS DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+		COMPRESS=1
+
+
+#---------------------------------------------------------------------------
+#		CMOS Manager setup database build script
+#---------------------------------------------------------------------------
+
+!IF "$(CMOS_SETUP_SUPPORT)" == "1"
+
+SetupSdbs : $(BUILD_DIR)\CmosSetup.sdb
+
+$(BUILD_DIR)\CmosSetup.sdb : $(CMOS_MANAGER_DIR)\$(@B).sd $(CMOS_MANAGER_DIR)\$(@B).uni
+    $(STRGATHER) -i INCLUDE -parse -newdb -db $(BUILD_DIR)\$(@B).sdb $(CMOS_MANAGER_DIR)\$(@B).uni
+    $(STRGATHER) -scan -db $(BUILD_DIR)\$(@B).sdb -od $(BUILD_DIR)\$(@B).sdb $(CMOS_MANAGER_DIR)\$(@B).sd
+
+!ENDIF
+
+#---------------------------------------------------------------------------
+#*************************************************************************
+#*************************************************************************
+#**                                                                     **
+#**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+#**                                                                     **
+#**                       All Rights Reserved.                          **
+#**                                                                     **
+#**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+#**                                                                     **
+#**                       Phone: (770)-246-8600                         **
+#**                                                                     **
+#*************************************************************************
+#*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManager.sdl b/Core/EM/CmosManager/CmosManager.sdl
new file mode 100644
index 0000000..e346f42
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManager.sdl
@@ -0,0 +1,409 @@
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
+#
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/CMOS Manager/CmosManager.sdl 5     12/11/11 8:51p Michaela $
+#
+# $Revision: 5 $
+#
+# $Date: 12/11/11 8:51p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/CMOS Manager/CmosManager.sdl $
+# 
+# 5     12/11/11 8:51p Michaela
+# 
+# 4     11/30/11 11:45p Michaela
+# TAG]         EIP56197
+# [Category]    New Feature
+# [Severity]    Normal
+# [Description] CMOS Manager Support in Runtime Code
+# [Files]       CmosManager.sdl
+#               CmosSetup.uni
+#               CmosMessages.uni
+#               CmosManagerSmm.cif
+#               CmosAccess.h
+#               CmosManagerSmm.c
+# 
+# 3     3/16/11 2:46p Michaela
+# 
+# 2     6/16/10 3:25p Michaela
+# 
+# 1     6/15/10 2:27p Michaela
+# 
+# 15    3/05/10 4:54p Michaela
+# 
+# 14    12/04/09 7:32p Michaela
+# 
+# 13    12/03/09 6:26p Michaela
+# 1. CMOS_PEI_BEFORE_NVRAM_PEI token is added to control whether
+#    or not CMOS PEI code executes before NVRAM PEI
+#    code. (default is off)
+#    
+# 2. If DEBUG_MODE is on, INIT_LIST ordering is changed
+#    so that Status Codes initialization is done
+#    before CMOS code.
+#    
+# 3. CMOS_IS_COLD_BOOT_MAPPING eLink added to allow
+#    overriding of the default cold boot detection
+#    code.
+# 
+# 12    11/12/09 6:04p Michaela
+# Updated destination for SEC object code
+# 
+# 11    11/10/09 9:13p Michaela
+# 
+# 10    7/29/09 9:57a Michaela
+# updates Aptio Enhancement EIP 22205
+# (no code changes)
+# 
+# 9     6/02/09 3:27p Michaela
+# For label: 4.6.3_CMOSMGR_11
+# 
+# 8     2/23/09 6:01p Michaela
+# 
+#**********************************************************************
+
+#<AMI_FHDR_START>
+#-----------------------------------------------------------------------
+#
+# Name:         CmosManager.sdl
+#
+# Description:  This AMI SDL file defines porting constants used in
+#               the CMOS Manager module.  Please see CmosBoard.sdl for
+#               SDL Tokens/eLinks that are expected to be cloned/added
+#               for project-level porting.
+#
+#-----------------------------------------------------------------------
+#<AMI_FHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_MANAGER_SUPPORT
+#
+# Description:
+#      This token is the main switch to enable CMOS manager support in Project
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_RTC_STATUS_REGISTER
+#
+# Description:
+#
+#       Default value is 0xd
+#
+#       This is the RTC status register. Bit 7 is the battery status. 
+#       (Do not set the NMI bit as this is a policy to be implmeneted by 
+#       the ReadWrite function.)
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_DIAGNOSTIC_STATUS_REGISTER
+#
+# Description:
+#
+#       Default value is 0xe
+#
+#       This is the diagnostic status register. (Do not set the NMI bit as 
+#       this is a policy to be implmeneted by the ReadWrite function.)
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    CMOS_ACCESS_API_BYTE3
+#
+# Description:
+#
+#       Default value is 0x42
+#
+#       The high byte of the CMOS Access API pointer registers.
+#                  1) These registers are in range: 0x10-0x7f. 
+#                  2) If you change this token, you must modify CmosManager.ssp.
+#                  3) Do not set the NMI bit as this is a policy to be
+#                     implemented by the ReadWrite function.
+#
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:    SSP
+#
+# Description:
+#
+#       Default value is AMISSP2.exe
+#
+#       Defines the location of AmiSsp2.exe, which is used to generate
+#       the header files containing CMOS information.
+#      
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+#<AMI_SHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:     ADDON_SSP_FILES
+#
+# Description:
+#
+#       There are no default eLinks
+#
+#       This eLink is used to update the list of CMOS Token definition files
+#       to be processed by AmiSsp2.exe during the build process.  
+#
+#       For example, the following eLink will add AgesaCmosTokens.ssp to the 
+#       list of CMOS Token definition files:
+#
+#                   ELINK
+#                       Name = "$(AGESA_EFI_DIR)\AgesaCmosTokens.ssp"
+#                       Parent  = "ADDON_SSP_FILES"
+#                       InvokeOrder = AfterParent
+#                   End
+#      
+#----------------------------------------------------------------------------
+#<AMI_SHDR_END>
+
+TOKEN
+	Name  = "CMOS_MANAGER_SUPPORT"
+	Value  = "1"
+	Help  = "Main switch to enable CMOS manager support in Project"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	TargetH = Yes
+	Master = Yes
+End
+
+TOKEN
+	Name  = "CMOS_MANAGER_SOURCE_VERSION"
+	Value  = "40"
+	Help  = "This source version number will increase with each release of CMOS Manager."
+	TokenType = Integer
+	TargetEQU = Yes
+	TargetH = Yes
+	TargetMAK = Yes
+End
+
+TOKEN
+	Name  = "CMOS_RTC_STATUS_REGISTER"
+	Value  = "0xd"
+	Help  = "This is the Battery status register. (Do not set NMI bit)."
+	TokenType = Integer
+	TargetEQU = Yes
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "CMOS_DIAGNOSTIC_STATUS_REGISTER"
+	Value  = "0xe"
+	Help  = "This is the diagnostic status register. (Do not set NMI bit)."
+	TokenType = Integer
+	TargetEQU = Yes
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "CMOS_ACCESS_API_BYTE3"
+	Value  = "0x42"
+	Help  = "The high byte of the CMOS Access API pointer registers.\1) These registers are in range: 0x10-0x7f. \2) Do not set the NMI bit.\3) If you change this token, you must modify CmosManager.ssp."
+	TokenType = Integer
+	TargetEQU = Yes
+	TargetH = Yes
+End
+
+TOKEN
+	Name  = "SSP"
+	Value  = "AMISSP2.exe"
+	Help  = "Setup Script Processor executable"
+	TokenType = Expression
+	TargetMAK = Yes
+End
+
+TOKEN
+	Name  = "SRSI"
+	Value  = "$(SW_SMI_IO_ADDRESS)"
+	TokenType = Integer
+	TargetASL = Yes
+End
+
+TOKEN
+	Name  = "CSMI"
+	Value  = "0x61"
+	TokenType = Integer
+	TargetH = Yes
+	TargetASL = Yes
+End
+
+TOKEN
+	Name  = "CMOS_MANAGER_ASL_SUPPORT"
+	Value  = "0"
+	Help  = "Enable ASL support for CMOS Manager as \CMOS device"
+	TokenType = Boolean
+	TargetMak = Yes
+	TargetH = Yes
+End
+
+PATH
+	Name  = "CMOS_MANAGER_DIR"
+	Path  = "Core\EM\CmosManager"
+End
+
+MODULE
+	Help  = "Includes CmosManager.mak to Project"
+	File  = "CmosManager.mak"
+End
+
+ELINK
+	Name = "$(CMOS_MANAGER_DIR)\CmosAccess.asl"
+	Parent = "GENERIC_ASL"
+	Help = "ASL code for using CMOS Manager services in ASL code"
+	InvokeOrder = AfterParent
+	Token = "CMOS_MANAGER_ASL_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\$(CMOS_MANAGER_DIR)\SEC\CmosManagerSec.OBJ"
+	Parent  = "ADDON_SEC_CORE_OBJ_FILES"
+	Priority  = 0
+	InvokeOrder = AfterParent
+End
+
+ELINK
+	Name  = "CmosManagerPeiEntry,"
+	Parent  = "PeiCoreInitialize"
+	Help  = "This simply adds the CMOS PEI entry to the PeiCoreInitialize Init list."
+	InvokeOrder = AfterParent
+	Token = "DEBUG_MODE" "=" "0"
+End
+
+ELINK
+	Name  = "CmosManagerPeiEntry,"
+	Parent  = "PeiInitStatusCode,"
+	Help  = "This forces CMOS PEI after status codes PEI code so that CMOS Manager console messages can be displayed."
+	InvokeOrder = AfterParent
+	Token = "DEBUG_MODE" "=" "1"
+End
+
+ELINK
+	Name  = "CmosManagerAfterMemoryEntry,"
+	Parent  = "PeiCoreMemoryInstalled"
+	InvokeOrder = AfterParent
+End
+
+ELINK
+	Name  = "CmosManagerDxeEntry,"
+	Parent  = "DxeCoreInitialize"
+	Help  = "This simply adds the CMOS DXE entry point to the DxeCoreInitialize Init list."
+	InvokeOrder = AfterParent
+	Token = "DEBUG_MODE" "=" "0"
+End
+
+ELINK
+	Name  = "CmosManagerDxeEntry,"
+	Parent  = "DxeInitStatusCode,"
+	Help  = "This forces CMOS DXE after status codes DXE code so that CMOS Manager console messages can be displayed."
+	InvokeOrder = AfterParent
+	Token = "DEBUG_MODE" "=" "1"
+End
+
+ELINK
+	Name  = "SEC_CmosManager"
+	Parent  = "SECCoreAtPowerOn"
+	Help  = "CMOS Early Init in SEC (before Cache as memory enabling)"
+	SrcFile  = "Core\Em\CmosManager\CmosManagerSec.asm"
+	InvokeOrder = AfterParent
+End
+
+ELINK
+	Name  = "ADDON_SSP_FILES"
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\CmosManagerSmm.ffs"
+	Parent  = "FV_MAIN"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SMM_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "CMOS_MGR_CFLAGS"
+	Help  = "CMOS Manager command line options of the C compiler"
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "CMOS_PORT_MAPPING"
+	Help  = "Associate a CMOS address range with an \8-bit index/data port pair or a board-specific access function:\\{Index, Data, Low, High, FunctionName},\\This function is typicall provided by the Southbridge for CMOS addresses above 0x7f."
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "CMOS_BATTERY_TEST_MAPPING"
+	Help  = "Returns BOOLEAN (TRUE=1, FALSE=0) value specifying whether or not the battery is good. This function is implemented by CMOS Manager but can be overriden, typically by the Southbridge."
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "CMOS_IS_FIRST_BOOT_MAPPING"
+	Help  = "Returns BOOLEAN (TRUE=1, FALSE=0) value specifying whether or not the this is the first boot. This function is implemented by CMOS Manager but can be overriden, typically by the Southbridge."
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "CMOS_IS_BSP_MAPPING"
+	Help  = "Returns BOOLEAN (TRUE=1, FALSE=0) value specifying whether or not BSP is currently executing. This function is implemented by CMOS Manager but can be overriden by another module."
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "CMOS_IS_COLD_BOOT_MAPPING"
+	Help  = "Returns BOOLEAN (TRUE=1, FALSE=0) value specifying whether or not the platform is currently executing a cold boot. This function is implemented by CMOS Manager but can be overriden by another module."
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "CMOS_IS_USABLE_MAPPING"
+	Help  = "Returns BOOLEAN (TRUE=1, FALSE=0) value specifying whether or not the CMOS hardware is usable. This function is implemented by CMOS Manager but can be overriden by another module."
+	InvokeOrder = ReplaceParent
+End
+
+
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerBoard.cif b/Core/EM/CmosManager/CmosManagerBoard.cif
new file mode 100644
index 0000000..0f22848
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerBoard.cif
@@ -0,0 +1,15 @@
+<component>
+	name = "CMOS Board"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosBoard"
+[files]
+"CmosBoard.sdl"	
+"CmosBoard.ssp"	
+"CmosBoard.c"	
+"CmosBoard.h"	
+"CmosSetup.sd"
+"CmosSetup.uni"
+[parts]
+"CmosMessages"
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerBuild.cif b/Core/EM/CmosManager/CmosManagerBuild.cif
new file mode 100644
index 0000000..957fbe1
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerBuild.cif
@@ -0,0 +1,9 @@
+<component>
+	name = "CMOS Build"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosBuild"
+[files]
+"CmosManager.mak"	
+"Template.ssp"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerCore.cif b/Core/EM/CmosManager/CmosManagerCore.cif
new file mode 100644
index 0000000..85aaca5
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerCore.cif
@@ -0,0 +1,12 @@
+<component>
+	name = "CMOS Core"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosCore"
+[files]
+[parts]
+"CmosInterfaces"
+"CmosSource"
+"CmosIncludes"
+"CmosBuild"
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerDxe.c b/Core/EM/CmosManager/CmosManagerDxe.c
new file mode 100644
index 0000000..8f4c608
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerDxe.c
@@ -0,0 +1,456 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS DXE/CmosManagerDxe.c 16    6/15/10 2:24p Michaela $
+//
+// $Revision: 16 $
+//
+// $Date: 6/15/10 2:24p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS DXE/CmosManagerDxe.c $
+// 
+// 16    6/15/10 2:24p Michaela
+// 
+// 15    3/05/10 4:54p Michaela
+// 
+// 14    12/04/09 7:31p Michaela
+// 
+// 13    12/03/09 6:22p Michaela
+// 1. CMOS_DISCONTINUE_OPTIMAL_DEFAULTS is replace with
+//    CMOS_OPTIMAL_DEFAULTS_OFF.
+// 
+// 2. Loading of Optimal Defaults depends only on
+//    wether or not the buffer is enabled.
+// 
+// 12    11/10/09 9:13p Michaela
+// 
+// 11    7/29/09 9:56a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 10    6/15/09 5:11p Michaela
+// 
+// 9     6/02/09 3:26p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 8     3/11/09 3:39p Michaela
+// 
+// 7     11/25/08 3:15p Michaela
+// Updates for Label 4.6.3_CMOSMGR_08
+// - Assembly macro fixes
+// - Added assembly macros
+// - Moved loading defaults into DXE phase
+// - Updated help file example
+// 
+// 6     11/17/08 4:05p Michaela
+// --Removed development debugging code
+// 
+// 5     11/07/08 5:15p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 4     3/07/08 4:05p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 3     2/29/08 9:33p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 2     2/26/08 12:52p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerDxe.c
+//
+// Description: Contains the routines that constitute the CMOS manager's
+//              DXE phase entry.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "CmosManagerDxe.h"
+#include <Protocol\Reset.h>
+#include <Setup.h>
+
+static EFI_EVENT  gSetupEnterEvent;
+static EFI_EVENT  gBootEvent;
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: ClearCmosBasedStatus
+//
+// Description:
+//      This function uses the CMOS Manager interface to clear the un-managed
+//      private status bits upon boot or setup entry.
+//
+// Input:
+//      IN EFI_EVENT Event
+//                  - Event handle
+//      IN VOID *Context
+//                  - Not used
+//
+// Output:
+//      None
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID ClearCmosBasedStatus(
+    IN EFI_EVENT    Event,
+    IN VOID         *Context )
+{
+    EFI_CMOS_ACCESS_INTERFACE   *Cmos;
+    EFI_STATUS                  Status;
+    CMOS_STATUS_BYTES           CmosInfo;
+    BOOLEAN                     Usable;
+
+    LOCATE_CMOS_ACCESS_PROTOCOL(Status, Cmos);
+
+    if ( !EFI_ERROR(Status) ){
+
+        // get CMOS-based info
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                            "Clear CMOS-based status values.\n" ));
+
+        Cmos->ReadCmosStatusBytes(Cmos, &CmosInfo);
+        Usable = CmosInfo.ConfigurationStatus.NotUsable == 1 ? FALSE : TRUE;
+
+        // clear status values for next boot
+
+        if ( Usable ){
+            Cmos->Write(Cmos, CMOS_MGR_BATTERY_BAD,         0);
+            Cmos->Write(Cmos, CMOS_MGR_CHECKSUM_BAD,        0);
+            Cmos->Write(Cmos, CMOS_MGR_DEFAULTS_LOADED,     0);
+            Cmos->Write(Cmos, CMOS_MGR_FIRST_BOOT_DETECTED, 0);
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "...Done\n" ));
+        }
+
+    }
+    else
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, "ClearCmosBasedStatus...Failed\n" ));
+
+
+    // This function only needs to be called one time to 
+    // get proper updates in setup and to clear the CMOS values.
+
+#if CMOS_SETUP_SUPPORT
+    pBS->CloseEvent(gSetupEnterEvent);
+#endif
+    pBS->CloseEvent(gBootEvent);
+
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: UpdateCmosSetupVariable
+//
+// Description:
+//      This function updates the CMOS setup variable using information
+//      from the CMOS-based status bits.
+//
+// Input:
+//      IN EFI_EVENT Event
+//                  - Event handle
+//      IN VOID *Context
+//                  - Not used
+//
+// Output:
+//      None
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#if CMOS_SETUP_SUPPORT
+VOID UpdateCmosSetupVariable(
+    IN EFI_EVENT    Event,
+    IN VOID         *Context )
+{
+    EFI_CMOS_ACCESS_INTERFACE   *Cmos;
+    EFI_STATUS                  Status;
+    CMOS_STATUS_BYTES           CmosInfo;
+    EFI_GUID                    SetupGuid = SETUP_GUID;
+    UINTN                       VariableSize = sizeof(SETUP_DATA);
+    UINT32                      Attributes;
+    SETUP_DATA                  Sd;
+    EFI_GUID                    CmosGuid = EFI_DXE_CMOS_ACCESS_GUID;
+    BOOLEAN                     NotUsable;
+    BOOLEAN                     BadBattery;
+    BOOLEAN                     DefaultsLoaded;
+    BOOLEAN                     FirstBoot;
+    BOOLEAN                     BadChecksum;
+
+    CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+                      "Locate CMOS Manager interface...\n" ));
+    Status = pBS->LocateProtocol( &CmosGuid, NULL, &Cmos);
+    if (!EFI_ERROR (Status)) {
+        Status = Cmos->ReadCmosStatusBytes(Cmos, &CmosInfo);
+        if (EFI_ERROR(Status)){
+            ASSERT_EFI_ERROR(EFI_NOT_FOUND);
+            return;
+        }
+        NotUsable = (BOOLEAN)CmosInfo.ConfigurationStatus.NotUsable;
+    }
+    else {
+        ASSERT_EFI_ERROR(Status);
+        return;        
+    }
+
+    // update setup data
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                        "Updating setup data.\n" ));
+    Status = pRS->GetVariable( L"Setup", &SetupGuid, &Attributes, 
+                               &VariableSize, &Sd );
+    if (EFI_ERROR(Status)){
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                        "Could not locate Setup variable.\n" ));
+    }
+    else {
+        if ( NotUsable ) {
+            CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+                        "  Status: Cannot use CMOS-based status\n"));
+            Sd.CmosBatteryIsBad = CmosInfo.Battery.Field.IsGood == 0 ? 
+                                      TRUE : FALSE;
+            Sd.CmosNotUsable = TRUE;
+        }
+        else {
+            Cmos->Read(Cmos, CMOS_MGR_BATTERY_BAD,         &BadBattery);
+            Cmos->Read(Cmos, CMOS_MGR_CHECKSUM_BAD,        &BadChecksum);
+            Cmos->Read(Cmos, CMOS_MGR_DEFAULTS_LOADED,     &DefaultsLoaded);
+            Cmos->Read(Cmos, CMOS_MGR_FIRST_BOOT_DETECTED, &FirstBoot);
+
+            Sd.CmosDefaultsLoaded = DefaultsLoaded;
+            Sd.CmosFirstBootDetected = FirstBoot;
+            Sd.CmosBatteryIsBad = BadBattery;
+            Sd.CmosCheckSumIsBad = BadChecksum;
+            Sd.CmosNotUsable = FALSE;
+        }
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+                "  Status: DefaultsLoaded=%X, FirstBoot=%X, BatteryBad=%X\n",
+                Sd.CmosDefaultsLoaded, Sd.CmosFirstBootDetected,
+                Sd.CmosBatteryIsBad ));
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+                "          BadChecksum=%X, CmosNotUsable=%X\n",
+                Sd.CmosCheckSumIsBad, Sd.CmosNotUsable ));
+        Status = pRS->SetVariable( L"Setup", &SetupGuid, Attributes, 
+                                   VariableSize, &Sd );
+    }
+
+    // Clear the CMOS-based status bits after updating the setup variable
+
+    ClearCmosBasedStatus(Event, Context);
+
+    return;
+}
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CreateEventHandlers
+//
+// Description:
+//      This function creates a callback on the setup entry event and boot 
+//      event to (respectively) update the CMOS setup variable and clear
+//      the CMOS-based status bits.
+//
+// Input:
+//      None
+//
+// Output:
+//      None
+//
+// Notes:
+//      None
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+VOID CreateEventHandlers( VOID )
+{
+    EFI_STATUS  Status;
+
+#if CMOS_SETUP_SUPPORT
+    EFI_GUID    SetupEnterProtocolGuid = AMITSE_SETUP_ENTER_GUID;
+    VOID        *Registration;
+
+    Status = RegisterProtocolCallback( &SetupEnterProtocolGuid, 
+        UpdateCmosSetupVariable, NULL, &gSetupEnterEvent, &Registration );
+    ASSERT_EFI_ERROR(Status);
+#endif
+
+    Status = CreateReadyToBootEvent( TPL_CALLBACK, ClearCmosBasedStatus, NULL, 
+        &gBootEvent );
+    ASSERT_EFI_ERROR(Status);
+
+
+}
+
+//---------------------------------------------------------------------------
+//  DXE entry point function
+//
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerDxeEntry
+//
+// Description:
+//      This function is the main DXE phase entry point for the CMOS
+//      manager module.
+//
+// Input:
+//      IN EFI_HANDLE ImageHandle
+//                  - Image handle
+//      IN EFI_SYSTEM_TABLE *SystemTable
+//                  - System table pointer
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//               *  Initializes/Installs the EFI_CMOS_ACCESS_INTERFACE 
+//                  Protocol.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosManagerDxeEntry (
+    IN  EFI_HANDLE              ImageHandle,
+    IN  EFI_SYSTEM_TABLE        *SystemTable )
+{
+    EFI_STATUS                  Status;
+    EFI_CMOS_MANAGER_INTERFACE  *Mgr;
+    
+	InitAmiLib(ImageHandle, SystemTable);
+
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CmosManagerDXE Entry\n" ));
+ 
+    //-----------------------------------------------------------------------
+    // Initialize the manager interface and, at this point, only check for  
+    // interface initialization errors.
+    //-----------------------------------------------------------------------
+
+    Mgr = NewCmosManagerInterface(NULL);
+    if ( Mgr == NULL || !Mgr->CheckStatus(Mgr, CMOS_VALID_INTERFACE) ) {
+        return  Status = EFI_UNSUPPORTED;
+    }
+    if ( Mgr->CheckStatus( Mgr, CMOS_INTERFACE_ALREADY_INSTALLED) )
+        return  Status = EFI_SUCCESS;
+
+
+    //-----------------------------------------------------------------------
+    // Handle specific reported errors.
+    //
+    // If there is a bad battery, continue using the Optimal Defaults Table.
+    //
+    // Otherwise, if there is a bad checksum or the Optimal Defaults table
+    // is in use from PEI, then flush the table to physical CMOS and
+    // discontinue its use.
+    //
+    // Note: the Optimal Defaults Table is enabled only in PEI
+    //-----------------------------------------------------------------------
+
+    if (  !Mgr->CheckStatus(Mgr, CMOS_IS_USABLE) ) {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "CmosManagerDXE: CMOS_IS_USABLE = FALSE\n" ));
+
+        // Default handler is to continue using the Optimal Defaluts Table
+        // if the CMOS is unusable.
+    }
+    else if ( Mgr->CheckStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED) )
+    {
+#if (FULL_CMOS_MANAGER_DEBUG)
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "CmosManagerDXE: CMOS_OPTIMAL_DEFAULTS_ENABLED = TRUE\n" ));
+        if (  Mgr->CheckStatus(Mgr, CMOS_BAD_CHECKSUM) ) {
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "CmosManagerDXE: CMOS_BAD_CHECKSUM = TRUE\n" ));
+        }
+#endif
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "CmosManagerDXE: Calling LoadOptimalDefaults()\n" ));
+        Mgr->LoadOptimalDefaults(Mgr);
+        if ( Mgr->CheckStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED) ) {
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "CmosManagerDXE: CMOS_OPTIMAL_DEFAULTS_OFF\n" ));
+            Mgr->ConfigureManager( Mgr, CMOS_OPTIMAL_DEFAULTS_OFF );
+        }
+    }
+
+
+    //-----------------------------------------------------------------------
+    // Create handlers for CMOS Manager
+    //-----------------------------------------------------------------------
+    CreateEventHandlers();
+
+    //-----------------------------------------------------------------------
+    // Install the CMOS Access interface
+    //-----------------------------------------------------------------------
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "CmosManagerDXE: Installing CMOS Access Protocol\n" ));
+    Mgr->InstallAccessInterface(Mgr);
+    if ( !Mgr->CheckStatus(Mgr, CMOS_VALID_MANAGER) ){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+            "CmosManagerDXE: Invalid interface\n" ));
+        return Status = EFI_UNSUPPORTED;
+    }
+
+    return Status = EFI_SUCCESS;
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerDxe.cif b/Core/EM/CmosManager/CmosManagerDxe.cif
new file mode 100644
index 0000000..e4d3d45
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerDxe.cif
@@ -0,0 +1,9 @@
+<component>
+	name = "CMOS DXE"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosDxe"
+[files]
+"CmosManagerDxe.c"	
+"CmosManagerDxe.h"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerDxe.h b/Core/EM/CmosManager/CmosManagerDxe.h
new file mode 100644
index 0000000..aa9d03e
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerDxe.h
@@ -0,0 +1,74 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS DXE/CmosManagerDxe.h 3     7/29/09 9:56a Michaela $
+//
+// $Revision: 3 $
+//
+// $Date: 7/29/09 9:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS DXE/CmosManagerDxe.h $
+// 
+// 3     7/29/09 9:56a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 2     6/15/09 5:11p Michaela
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerDxe.h
+//
+// Description: Contains declarations to support the CMOS Manager
+//              in DXE phase.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _CMOS_MANAGER_DXE_H
+#define _CMOS_MANAGER_DXE_H
+
+#include <Efi.h>
+#include <AmiDxeLib.h>
+#include <SspData.h>
+#include <SspTokens.h>
+#include <CmosAccess.h>
+#include "CmosManager.h"
+
+#endif  // #ifndef _CMOS_MANAGER_DXE_H
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerHob.c b/Core/EM/CmosManager/CmosManagerHob.c
new file mode 100644
index 0000000..c2d785c
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerHob.c
@@ -0,0 +1,429 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosManagerHob.c 13    6/15/10 2:24p Michaela $
+//
+// $Revision: 13 $
+//
+// $Date: 6/15/10 2:24p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosManagerHob.c $
+// 
+// 13    6/15/10 2:24p Michaela
+// 
+// 12    12/04/09 7:32p Michaela
+// 
+// 11    12/03/09 6:43p Michaela
+// changed CmosManagerAfterMemoryEntry() to update
+// the PEI Services table earlier.
+// 
+// 10    7/29/09 9:59a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 9     6/15/09 5:11p Michaela
+// 
+// 8     6/02/09 3:27p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 7     11/17/08 3:42p Michaela
+// --Removed development debugging code
+// --ABORT_ERROR macro replaced with EFI_ERROR macro usage
+// 
+// 6     11/07/08 5:13p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 5     3/07/08 4:07p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 4     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 3     2/26/08 12:49p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 2     2/22/08 5:08p Michaela
+// update EFI_PEI_SERVICES pointer on ppi callback
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerHob.c
+//
+// Description: Contains the routines that are used to access the 
+//              HOB data structure.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Efi.h>
+#ifdef PEI_COMPILE
+    #include <Pei.h>
+    #include <AmiPeiLib.h>
+#else
+    #include <AmiDxeLib.h>
+#endif
+#include "CmosManager.h"
+#include "CmosManagerHob.h"
+
+#ifdef PEI_COMPILE
+
+    //-----------------------------------------------------------------------
+    // Data originally defined in CmosTables.c
+    //-----------------------------------------------------------------------
+
+    extern CMOS_TOKEN  gCmosTokenTable[];
+    extern UINT16 gCmosTokenTableSize;
+    extern CMOS_REGISTER  gCmosOptimalDefaultTable[];
+    extern UINT16 gCmosOptimalDefaultTableSize;
+    extern CMOS_REGISTER  gCmosNoCheckSumTable[];
+    extern UINT16 gCmosNoCheckSumTableSize;
+    extern CMOS_REGISTER gUnmanagedTable[];
+    extern UINT16 gUnmanagedTableSize;
+
+    EFI_GUID gCmosDataHobInstalledGuid = 
+                            EFI_CMOS_DATA_HOB_INSTALLED_GUID;
+#endif
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosSynchronizeHobManagerStatus
+//
+// Description:
+//      This function synchronizes the ManagerStatus information in
+//      the CMOS data HOB to be passed to DXE.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE   *Manager
+//                  -- Manager interface pointer
+//
+// Output:
+//      VOID (Return value)
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#ifdef PEI_COMPILE
+VOID CmosSynchronizeHobManagerStatus(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager )
+{
+    if (Manager->ManagerHob != NULL)
+        Manager->ManagerHob->ManagerStatus = Manager->ManagerStatus;
+}
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosSynchronizeHobChecksum
+//
+// Description:
+//      This function synchronizes the Checksum information in
+//      the CMOS data HOB to be passed to DXE.
+//
+// Input:
+//      OUT EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manager->ManagerHob->CheckSum = Manager->CheckSum
+//
+// Output:
+//      VOID (Return value)
+//
+// Notes:
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#ifdef PEI_COMPILE
+VOID CmosSynchronizeHobChecksum(
+    OUT EFI_CMOS_MANAGER_INTERFACE   *Manager )
+{
+    if (Manager->ManagerHob != NULL)
+        Manager->ManagerHob->Checksum = Manager->Checksum;
+
+}
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CreateCmosDataHob
+//
+// Description:
+//      This function creates the CMOS data HOB, when memory is available.
+//
+// Input:
+//      IN EFI_CMOS_MANAGER_INTERFACE *Manager
+//                  -- Manager interface pointer
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      This function is used only in PEI phase, included by the build
+//      macro PEI_COMPILE.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#ifdef PEI_COMPILE
+EFI_STATUS CreateCmosDataHob(
+    IN EFI_CMOS_MANAGER_INTERFACE   *Manager )
+{
+    UINT16              TokenIndex = 0; // First valid token table index is 1
+    EFI_STATUS          Status;
+    UINT16              HobSize = sizeof(CMOS_MANAGER_HOB);
+    EFI_GUID            CmosManagerHobGuid = CMOS_MANAGER_HOB_GUID;
+    CMOS_MANAGER_HOB    *CmosManagerHob;
+    DEFINE_PEI_SERVICES(Manager->Access.PeiServices);
+
+    Status = (*PeiServices)->CreateHob( PeiServices,
+                                        EFI_HOB_TYPE_GUID_EXTENSION,
+                                        HobSize,
+                                        &CmosManagerHob);
+                                          
+    CmosManagerHob->Header.Name = CmosManagerHobGuid;
+    CmosManagerHob->FirstManagedRegister = Manager->FirstManagedRegister;
+    CmosManagerHob->LastManagedRegister = Manager->LastManagedRegister;
+    CmosManagerHob->TokenCount = Manager->TokenCount;
+    CmosManagerHob->OptimalDefaultCount = Manager->OptimalDefaultCount;
+    CmosManagerHob->NoChecksumCount = Manager->NoChecksumCount;
+    CmosManagerHob->UnmanagedTableCount = Manager->UnmanagedTableCount;
+    CmosManagerHob->Checksum = Manager->Checksum;
+    CmosManagerHob->ManagerStatus = Manager->ManagerStatus;
+    Manager->ManagerHob = CmosManagerHob;
+
+    // Use a raw copy to initialize the tables in the HOB 
+    // from global arrays 
+
+    if ( EFI_ERROR(Status) ) 
+        return Status;
+    else {
+        MemCpy( CmosManagerHob->TokenTable,
+                Manager->TokenTable,
+                Manager->TokenCount * sizeof(CMOS_TOKEN)
+        );
+        MemCpy( CmosManagerHob->OptimalDefaultTable ,
+                Manager->OptimalDefaultTable,
+                Manager->OptimalDefaultCount * sizeof(CMOS_REGISTER)
+        );
+        MemCpy( CmosManagerHob->NoChecksumTable ,
+                Manager->NoChecksumTable,
+                Manager->NoChecksumCount * sizeof(CMOS_REGISTER)
+        );
+        MemCpy( CmosManagerHob->UnmanagedTable ,
+                Manager->UnmanagedTable,
+                Manager->UnmanagedTableCount * sizeof(CMOS_REGISTER)
+        );
+    }
+
+    //-----------------------------------------------------------------------
+    // The Manager will now use the HOB versions of the tables for
+    // faster access and to ensure proper updating of the optimal defaults 
+    // buffer.
+    //-----------------------------------------------------------------------
+
+    Manager->TokenTable = CmosManagerHob->TokenTable;
+    Manager->OptimalDefaultTable = CmosManagerHob->OptimalDefaultTable;
+    Manager->NoChecksumTable = CmosManagerHob->NoChecksumTable;
+    Manager->UnmanagedTable = CmosManagerHob->UnmanagedTable;
+
+    //-----------------------------------------------------------------------
+    // Install a notification PPI to inform that the CMOS data HOB is 
+    // installed.
+    //
+    // Note:    The current routine is executed from within a notification, 
+    //          so any PPI waiting on the install notification PPI must 
+    //          use the EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK Flag.
+    //-----------------------------------------------------------------------
+
+    Manager->Ppi[CMOS_DATA_HOB_INSTALLED_PPI_TYPE].Flags = 
+        EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+    Manager->Ppi[CMOS_DATA_HOB_INSTALLED_PPI_TYPE].Guid = 
+        &gCmosDataHobInstalledGuid;
+    Manager->Ppi[CMOS_DATA_HOB_INSTALLED_PPI_TYPE].Ppi = NULL;
+    Status = (*PeiServices)->InstallPpi( 
+            PeiServices, &Manager->Ppi[CMOS_DATA_HOB_INSTALLED_PPI_TYPE]);
+    
+    return Status;
+}
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerAfterMemoryEntry
+//
+// Description:
+//      This function calls CreateCmosDataHob to create the DXE data HOB
+//      after permanent memory has been installed, and updates the new CMOS 
+//      Access Interface Address, as well as the CMOS-based API pointer.
+//
+// Input:
+//      IN EFI_FFS_FILE_HEADER *FfsHeader
+//                  -- EFI_FFS_FILE_HEADER pointer
+//      IN EFI_PEI_SERVICES **PeiServices
+//                  -- PEI Services table pointer
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      This function is used only in PEI phase, included by the build
+//      macro PEI_COMPILE.
+//
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#ifdef PEI_COMPILE
+EFI_STATUS CmosManagerAfterMemoryEntry (
+	IN EFI_FFS_FILE_HEADER       *FfsHeader,
+	IN EFI_PEI_SERVICES          **PeiServices )
+{
+    EFI_STATUS                  Status = EFI_SUCCESS;
+    EFI_CMOS_ACCESS_INTERFACE   *Cmos;
+    EFI_CMOS_MANAGER_INTERFACE  *Manager;
+    
+    extern EFI_CMOS_MANAGER_INTERFACE *GetCmosMangerInterface(
+        IN EFI_CMOS_ACCESS_INTERFACE   *Cmos );
+
+    LOCATE_CMOS_ACCESS_PPI(Status, Cmos);       // get Manager's interface
+    if (EFI_ERROR(Status))
+        return Status;
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CmosManagerAfterMemoryEntry...\n" ));
+
+    Manager = GetCmosMangerInterface(Cmos);
+    
+    // Update PeiServices first
+
+    Manager->Access.PeiServices = PeiServices;
+
+    // Update the API pointer in CMOS
+
+    Manager->SaveApiPointerToCmos(Manager, Cmos);
+    
+    // Indicate that manager is now executing in memory
+
+    Manager->SetStatus(Manager, CMOS_EXECUTING_IN_MEMORY);
+
+    // Create the HOB
+
+    CreateCmosDataHob(Manager);
+    
+    return Status;
+}
+#endif
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: InitializeCmosDataTablesFromHob
+//
+// Description:
+//      This function locates the HOB containing the table of CMOS tokens
+//      and initializes token table information in the CMOS manager's
+//      interface.
+//
+// Input:
+//      OUT EFI_CMOS_MANAGER_INTERFACE  *Manager
+//                  - The CMOS manager interface to initialize.
+//
+// Output:
+//      EFI_STATUS (Return value)
+//                  = EFI_SUCCESS or valid EFI error code
+//
+// Notes:
+//      This function is used only in DXE phase, included by the build
+//      process via the absence of the macro PEI_COMPILE.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+#ifndef PEI_COMPILE
+EFI_STATUS InitializeCmosTablesFromHob(
+    OUT EFI_CMOS_MANAGER_INTERFACE  *Manager )
+{
+    EFI_STATUS          Status;
+    EFI_GUID            HobListGuid = HOB_LIST_GUID;
+    EFI_GUID            CmosManagerHobGuid = CMOS_MANAGER_HOB_GUID;
+    CMOS_MANAGER_HOB    *CmosManagerHob;
+
+    CmosManagerHob = 
+        (CMOS_MANAGER_HOB*)GetEfiConfigurationTable(pST,&HobListGuid);
+    if ( CmosManagerHob == NULL )
+        return Status = EFI_UNSUPPORTED;
+
+    Status = FindNextHobByGuid( &CmosManagerHobGuid, (VOID**)&CmosManagerHob);
+    if (EFI_ERROR( Status ))
+        return Status;
+ 
+    Manager->ManagerHob = CmosManagerHob;      // for completeness
+    Manager->FirstManagedRegister = CmosManagerHob->FirstManagedRegister;
+    Manager->LastManagedRegister = CmosManagerHob->LastManagedRegister;
+    Manager->TokenTable = CmosManagerHob->TokenTable;
+    Manager->TokenCount = CmosManagerHob->TokenCount;
+    Manager->OptimalDefaultTable = CmosManagerHob->OptimalDefaultTable;
+    Manager->OptimalDefaultCount = CmosManagerHob->OptimalDefaultCount;
+    Manager->NoChecksumTable = CmosManagerHob->NoChecksumTable;
+    Manager->NoChecksumCount = CmosManagerHob->NoChecksumCount;
+    Manager->UnmanagedTable = CmosManagerHob->UnmanagedTable;
+    Manager->UnmanagedTableCount = CmosManagerHob->UnmanagedTableCount;
+    Manager->Checksum = CmosManagerHob->Checksum;
+    Manager->ManagerStatus = CmosManagerHob->ManagerStatus;
+    
+    return Status = EFI_SUCCESS;
+}
+#endif
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerHob.h b/Core/EM/CmosManager/CmosManagerHob.h
new file mode 100644
index 0000000..f460cc7
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerHob.h
@@ -0,0 +1,139 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Includes/CmosManagerHob.h 7     6/15/10 2:26p Michaela $
+//
+// $Revision: 7 $
+//
+// $Date: 6/15/10 2:26p $
+//**********************************************************************//
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Includes/CmosManagerHob.h $
+// 
+// 7     6/15/10 2:26p Michaela
+// 
+// 6     7/29/09 10:00a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 5     6/15/09 5:11p Michaela
+// 
+// 4     11/17/08 3:52p Michaela
+// --CMOS Buffer feature is depreciated
+// 
+// 3     11/14/08 9:17a Michaela
+// **CMOS register variables are changed from UINT8 to UINT16
+// 
+// 2     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/14/08 12:00p MichaelA
+// Created 
+// 
+//*****************************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerHob.h
+//
+// Description: Contains declarations to support the CMOS Manager
+//              CMOS_MANAGER_HOB.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef  _CMOS_MANAGER_HOB_H            
+#define  _CMOS_MANAGER_HOB_H
+
+#include <hob.h>
+#include <SspData.h>
+#include "CmosTypes.h"
+
+// Currently the manager's HOB size is calculated during the build process.
+
+// Cannot define arrays of size 0
+#if ((LAST_CMOS_REGISTER - FIRST_CMOS_REGISTER) < 1)
+    #define MANAGED_CMOS_SIZE 1
+#else
+    #define MANAGED_CMOS_SIZE LAST_CMOS_REGISTER - FIRST_CMOS_REGISTER + 2
+#endif
+
+#if (TOTAL_CMOS_TOKENS < 1)
+    #define TOKEN_COUNT 1
+#else
+    #define TOKEN_COUNT TOTAL_CMOS_TOKENS + 1
+#endif
+
+#if (TOTAL_NOT_CHECKSUMMED < 1)
+    #define NO_CHECKSUM_COUNT 1
+#else
+    #define NO_CHECKSUM_COUNT TOTAL_NOT_CHECKSUMMED + 1
+#endif
+
+
+// CMOS_MANAGER_HOB GUID
+//--------------------------------------------------------------
+// {D5367802-B873-4c0f-B544-31B7CCF5C555}
+#define CMOS_MANAGER_HOB_GUID \
+{0xd5367802, 0xb873, 0x4c0f, 0xb5, 0x44, 0x31, 0xb7, 0xcc, 0xf5, 0xc5, 0x55}
+    
+    
+// PPI notification that CMOS_MANAGER_HOB is installed
+//--------------------------------------------------------------
+// {5A6A93F4-2907-4a34-BD11-6CA8A0959E09}
+#define EFI_CMOS_DATA_HOB_INSTALLED_GUID \
+{ 0x5a6a93f4, 0x2907, 0x4a34, 0xbd, 0x11, 0x6c, 0xa8, 0xa0, 0x95, 0x9e, 0x9 }
+
+    
+// Table indexes - For all tables, the first valid index is 1
+//
+// OptimalDefaultTable - OptimalDefaultTable[1] =  FIRST_CMOS_REGISTER 
+//
+typedef struct _CMOS_MANAGER_HOB {
+    EFI_HOB_GUID_TYPE           Header;
+    CMOS_MANAGER_STATUS         ManagerStatus;
+    CMOS_CHECKSUM               Checksum;
+    UINT16                      FirstManagedRegister;
+    UINT16                      LastManagedRegister;
+    UINT16                      TokenCount;
+    CMOS_TOKEN                  TokenTable[TOKEN_COUNT];  // NULL at index 0
+    UINT16                      OptimalDefaultCount;
+    CMOS_REGISTER               OptimalDefaultTable[MANAGED_CMOS_SIZE];
+    UINT16                      NoChecksumCount;
+    CMOS_REGISTER               NoChecksumTable[NO_CHECKSUM_COUNT];
+    UINT16                      UnmanagedTableCount;
+    CMOS_REGISTER               UnmanagedTable[TOKEN_COUNT];       // DEBUG change when AmiSsp2.exe is updated
+} CMOS_MANAGER_HOB;
+
+#endif 
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerIncludes.cif b/Core/EM/CmosManager/CmosManagerIncludes.cif
new file mode 100644
index 0000000..2264ff0
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerIncludes.cif
@@ -0,0 +1,10 @@
+<component>
+	name = "CMOS Includes"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosIncludes"
+[files]
+"CmosManager.h"	
+"CmosManagerHob.h"	
+"CmosTypes.h"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerMessages.cif b/Core/EM/CmosManager/CmosManagerMessages.cif
new file mode 100644
index 0000000..6b119c1
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerMessages.cif
@@ -0,0 +1,11 @@
+<component>
+	name = "CMOS Messages"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosMessages"
+[files]
+"CmosMessages.sdl"	
+"CmosMessages.mak"	
+"CmosMessages.c"	
+"CmosMessages.uni"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerPei.c b/Core/EM/CmosManager/CmosManagerPei.c
new file mode 100644
index 0000000..3cc9458
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerPei.c
@@ -0,0 +1,264 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS PEI/CmosManagerPei.c 17    6/15/10 2:23p Michaela $
+//
+// $Revision: 17 $
+//
+// $Date: 6/15/10 2:23p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS PEI/CmosManagerPei.c $
+// 
+// 17    6/15/10 2:23p Michaela
+// 
+// 16    3/05/10 4:53p Michaela
+// 
+// 15    12/04/09 7:30p Michaela
+// 
+// 14    12/03/09 6:19p Michaela
+// 1. CMOS_BSP_IS_EXECUTING status bit 
+//    is used instead of gIsBsp
+// 
+// 2. Loading of Optimal Defaults on bad checksum
+//    is done earlier by default and is enabled/disabled
+//    by CMOS_RECOVER_IN_PEI SDL token.
+//    
+//    Note: the bad checksum bit is not cleared until DXE.
+//    
+// 3. The CMOS_USE_OPTIMAL_DEFAULTS enum is replaced with
+//    CMOS_OPTIMAL_DEFAULTS_ON.
+// 
+// 13    11/10/09 9:13p Michaela
+// 
+// 12    7/29/09 9:56a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 11    6/15/09 5:10p Michaela
+// 
+// 10    6/02/09 4:38p Michaela
+// 
+// 9     6/02/09 3:26p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 8     3/11/09 3:37p Michaela
+// 
+// 7     11/25/08 3:15p Michaela
+// Updates for Label 4.6.3_CMOSMGR_08
+// - Assembly macro fixes
+// - Added assembly macros
+// - Moved loading defaults into DXE phase
+// - Updated help file example
+// 
+// 6     11/17/08 4:03p Michaela
+// --Removed development degugging code
+// 
+// 5     11/07/08 5:14p Michaela
+// Updated to make CMOS manager available in all phases 
+// of the boot process:
+// 
+// A CMOS API Pointer is maintained in CMOS and accessible
+// via provided macros in C and assembly source.
+// 
+// 4     3/07/08 4:06p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 3     2/29/08 9:33p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 2     2/26/08 12:52p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerPei.c
+//
+// Description:     Contains the routines that constitute the CMOS manager's
+//                  PEI phase entry.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include <Token.h>
+#include "CmosManagerPei.h"
+
+#define LOCATE_READ_ONLY_VARIABLE_PPI(Status, InterfacePtr) { \
+    EFI_GUID Guid = EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID; \
+    Status = (*PeiServices)->LocatePpi( PeiServices, &Guid, \
+        0, NULL, &InterfacePtr); }
+        
+
+//---------------------------------------------------------------------------
+//  PEI entry point function
+//
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerPeiEntry
+//
+// Description:
+//      This function is the main PEI phase entry point for the CMOS
+//      manager module.
+//
+// Input:
+//      IN EFI_FFS_FILE_HEADER *FfsHeader
+//                  -- FFS file header pointer
+//      IN EFI_PEI_SERVICES **PeiServices
+//                  -- PEI Services table pointer
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//      Execution Sequence:
+//                  1)  Initialize CMOS Manager interface
+//                  2)  Load default values into CMOS registers if
+//                      this is the first boot.
+//                  3)  Configure usage of the Optimal Defaults table if
+//                      the battery or checksum is bad.
+//                  4)  Update the CMOS-based API/PPI pointer.
+//                  5)  Install the EFI_CMOS_ACCESS_INTERFACE PPI
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosManagerPeiEntry (
+    IN EFI_FFS_FILE_HEADER       *FfsHeader,
+    IN EFI_PEI_SERVICES          **PeiServices )
+{
+    EFI_STATUS                  Status;
+    EFI_CMOS_MANAGER_INTERFACE  *Mgr;
+    UINT8                       CmosValue = 0;
+
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CmosManagerPeiEntry Entry\n" ));
+
+    //-----------------------------------------------------------------------
+    // Initialize the manager interface and, at this point, only check for  
+    // interface initialization errors.
+    //-----------------------------------------------------------------------
+
+    Mgr = NewCmosManagerInterface(PeiServices);
+    if ( Mgr == NULL || !Mgr->CheckStatus(Mgr, CMOS_VALID_INTERFACE) )
+        return  Status = EFI_UNSUPPORTED;
+    if ( Mgr->CheckStatus( Mgr, CMOS_INTERFACE_ALREADY_INSTALLED) )
+        return  Status = EFI_SUCCESS;
+    
+    //-----------------------------------------------------------------------
+    // Handle specific internally-reported conditions.
+    //-----------------------------------------------------------------------
+
+    if (    Mgr->CheckStatus(Mgr, CMOS_IS_USABLE )
+         && Mgr->CheckStatus(Mgr, CMOS_BSP_IS_EXECUTING ) )
+    {
+        // Load optimal defaults on first boot after programming
+        // boot device.
+
+        if  (    Mgr->CheckStatus(Mgr, CMOS_FIRST_BOOT_DETECTED )
+              && Mgr->CheckStatus(Mgr, CMOS_COLD_BOOT_DETECTED )  )
+        {
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "First boot detected ...\n" ));
+            Mgr->LoadOptimalDefaults(Mgr);
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "...Defaults loaded\n" ));
+        }
+
+        // Save CMOS-based PPI pointer
+
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Saving PPI pointer to CMOS\n" ));
+        Mgr->SaveApiPointerToCmos(Mgr, NULL);
+    }
+    else {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Defaults were not loaded\n" ));
+    }
+
+    //-----------------------------------------------------------------------
+    // If the CMOS hardware is not usable, configure CMOS Manager to use the
+    // read/write Optimal Defaults buffer for Managed Region access. 
+    //-----------------------------------------------------------------------
+
+    if ( Mgr->CheckAnyStatus( Mgr, CMOS_BAD_CHECKSUM | CMOS_BAD_BATTERY ) ){
+        if ( Mgr->CheckStatus( Mgr, CMOS_BAD_CHECKSUM) )
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "Bad Checksum:\n" ));
+
+        if ( Mgr->CheckStatus( Mgr, CMOS_BAD_BATTERY) )
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "Bad Battery:\n" ));
+
+        if (    Mgr->CheckStatus(Mgr, CMOS_IS_USABLE )
+             && Mgr->CheckStatus(Mgr, CMOS_RECOVER_IN_PEI ) )
+        {
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "  Loading Optimal Defaults\n"));
+            Mgr->LoadOptimalDefaults( Mgr );
+            Mgr->ConfigureManager( Mgr, CMOS_OPTIMAL_DEFAULTS_OFF );
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "...Defaults loaded\n" ));
+        }
+        else {
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "  Using Optimal Defaults.\n"));
+            Mgr->ConfigureManager( Mgr, CMOS_OPTIMAL_DEFAULTS_ON );
+        }
+
+    }    
+
+   
+    //-----------------------------------------------------------------------
+    // Install the CMOS Access PPI
+    //-----------------------------------------------------------------------
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Installing CMOS Access PPI\n" ));
+    Mgr->InstallAccessInterface(Mgr);
+    if ( !Mgr->CheckStatus(Mgr, CMOS_VALID_MANAGER ) ){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+            "Invalid interface ... Access PPI not installed\n" ));
+        return Status = EFI_UNSUPPORTED;
+    }
+
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "CmosManagerPeiEntry successful exit\n" ));
+
+    return Status = EFI_SUCCESS;
+}
+    
+    
+
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerPei.cif b/Core/EM/CmosManager/CmosManagerPei.cif
new file mode 100644
index 0000000..fb9abbb
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerPei.cif
@@ -0,0 +1,9 @@
+<component>
+	name = "CMOS PEI"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosPei"
+[files]
+"CmosManagerPei.c"	
+"CmosManagerPei.h"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerPei.h b/Core/EM/CmosManager/CmosManagerPei.h
new file mode 100644
index 0000000..e216728
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerPei.h
@@ -0,0 +1,81 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS PEI/CmosManagerPei.h 5     7/29/09 9:56a Michaela $
+//
+// $Revision: 5 $
+//
+// $Date: 7/29/09 9:56a $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS PEI/CmosManagerPei.h $
+// 
+// 5     7/29/09 9:56a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 4     6/15/09 5:10p Michaela
+// 
+// 3     6/02/09 3:26p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 2     3/11/09 3:37p Michaela
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerPei.h
+//
+// Description: Contains declarations to support the CMOS Manager
+//              in PEI phase.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+#ifndef _CMOS_MANAGER_PEI_H
+#define _CMOS_MANAGER_PEI_H
+
+#include <Efi.h>
+#include <Pei.h>
+#include <AmiPeiLib.h>
+#include <AmiCspLibInc.h>
+#include <SspData.h>
+#include <SspTokens.h>
+#include <CmosAccess.h>
+#include "CmosManager.h"
+#include "CmosBoard.h"
+
+#endif  // #ifndef _CMOS_MANAGER_PEI_H
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerSec.asm b/Core/EM/CmosManager/CmosManagerSec.asm
new file mode 100644
index 0000000..94ae87e
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSec.asm
@@ -0,0 +1,396 @@
+;**********************************************************************
+;**********************************************************************
+;**                                                                  **
+;**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+;**                                                                  **
+;**                       All Rights Reserved.                       **
+;**                                                                  **
+;**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+;**                                                                  **
+;**                       Phone: (770)-246-8600                      **
+;**                                                                  **
+;**********************************************************************
+;**********************************************************************
+; $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SEC/CmosManagerSec.asm 11    12/04/09 7:30p Michaela $
+;
+; $Revision: 11 $
+;
+; $Date: 12/04/09 7:30p $
+;
+;****************************************************************************
+; Revision History
+; ----------------
+; $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SEC/CmosManagerSec.asm $
+; 
+; 11    12/04/09 7:30p Michaela
+; 
+; 10    7/29/09 9:55a Michaela
+; updates Aptio Enhancement EIP 22205
+; (no code changes)
+; 
+; 9     7/23/09 2:28p Michaela
+; 
+; 8     7/23/09 1:35p Michaela
+; Fixed build issue related to PE32 binaries
+; 
+; 7     6/02/09 3:26p Michaela
+; For label: 4.6.3_CMOSMGR_11
+; 
+; 6     3/11/09 3:37p Michaela
+; 
+; 5     2/23/09 6:01p Michaela
+; --Fix token name
+; 
+; 4     2/16/09 10:15p Michaela
+;   - Use CMOS_BANK0_INDEX/CMOS_BANK0_INDEX SDL token
+;   - OR CMOS_NMI_BIT_VALUE with index port
+;     values
+; 
+; 3     1/21/09 3:30p Michaela
+; fixed build issue
+; 
+; 2     1/21/09 2:59p Michaela
+; **Implemented check for CMOS_MGR_SET_NMI_BIT when
+;   writing the address
+; **Now using CMOS_STD_INDEX and CMOS_STD_DATA
+;   for all CMOS access in SEC (this restricts all SEC-phase CMOS 
+;   locations to below 0x80, which is not expected to be an issue)
+; 
+; 1     11/25/08 3:12p Michaela
+; Organize SEC-related initialization code
+; 
+; 4     11/17/08 3:44p Michaela
+; --Port and register constants are initialized using SDL tokens
+; --CMOS-based API pointer and all other SEC accesses are assumed 
+;   to be located in the 0xF to 0x7F standard CMOS region.
+; 
+; 3     11/14/08 9:16a Michaela
+; **CmosReadWrite procedure is used for all CMOS access in the SEC
+; phase. 
+; **Include CmosAccessSec.inc for the prototype, error codes
+; and jump macros
+; 
+; 2     11/07/08 5:30p Michaela
+; Added SS header
+; 
+ 
+;*************************************************************************
+;<AMI_FHDR_START>
+;
+; Name: CmosManagerSec.asm
+;
+; Description:
+;   This file contains all code necessary to support CMOS Manager's SEC
+;   phase initialization and external services.
+;
+;<AMI_FHDR_END>
+;*************************************************************************
+
+;----------------------------------------------------------------------------
+; Assembler build options
+;----------------------------------------------------------------------------
+
+.586P
+.XMM
+.MODEL SMALL
+
+INCLUDE        TOKEN.EQU
+INCLUDE        TOKENEQU.EQU
+
+CMOS_NO_EXTERNS equ 1
+INCLUDE        CmosAccessSec.inc
+
+
+; Externs
+EXTERN  SEC_CmosManagerEnd:NEAR32
+
+IF  SEC_LAST_ADDRESS_VALID
+EXTERN  LAST_ADDRESS:ABS
+ENDIF
+
+; Equates
+bcmos_addr_port         equ   MKF_CMOS_BANK0_INDEX
+bcmos_data_port         equ   MKF_CMOS_BANK0_DATA
+MKF_stnd_storage_size   equ   00Fh  ; size of standard
+CLOCK_STATUS_REG        EQU   MKF_CMOS_RTC_STATUS_REGISTER
+BATT_BIT                EQU   080h  ; bit 8 is battery status (set == good)
+
+MSR_XAPIC_BASE          EQU   01Bh  ; standard APIC base MSR
+XAPIC_BASE_BSP_BIT      EQU   008h
+
+
+IO_DELAY_bb    MACRO            
+        jmp     $+2
+        jmp     $+2
+ENDM                    
+
+;----------------------------------------------------------------------------
+;   STARTUP_SEG  S E G M E N T  STARTS
+;----------------------------------------------------------------------------
+STARTUP_SEG   SEGMENT   PARA PUBLIC 'CODE' USE32
+
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure:    CmosReadWrite
+;
+; Description:
+;   Returns the CMOS value associated with the given CMOS token
+;   from the actual CMOS storage. CMOS checksum is don't care. Upon detecting
+;   an error, the carry flag is set and an error code is returned in AX.
+;
+; Input:        
+;   AX - CMOS Token.
+;   DL - Set for write or Clear for read
+;   DH - Value to write
+;
+; Output:        
+;   AX - CMOS value if reading
+;   NC - If success
+;   CY - If error & AX = Error code
+;                                                                               
+; Modified:        
+;   AX, MM0, MM1, MM2, MM3
+;   (EDX upper word and EAX upper word are unmodified)
+;   All other registers are preserved 
+;
+; Referrals:        
+;   None
+;
+; Notes:
+;   An error code is returned in AX with Carry Flag set upon detected
+;   error condition. The following error code constants (defined in 
+;   CmosAccessSec.inc) are used:
+;
+;                   CMOS_BATTERY_ERR
+;                   CMOS_BITSIZE_ERR
+;                   CMOS_OVERFLOW_ERR
+;                                                                               
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+CmosReadWrite PROC NEAR PUBLIC
+
+; Token[2:0]   = Bit offset within a byte of item's start address in CMOS
+; Token[11:3]  = Byte offset of item's start address in CMOS
+; Token[15:12] = Size of item (in units of bits)
+
+        movd    mm1, ebx            ; save registers
+        movd    mm2, ecx
+        movd    mm3, edx
+
+        mov     bx, ax                        
+        shr     bx, 12
+        cmp     bx, 8               ; BX has the size in Bits
+        ja      CmosReadWriteSizeError
+        cmp     bx, 0
+        je      CmosReadWriteSizeError
+
+        mov     cx, ax
+        and     cx, 07h             ; CX has the bit position.
+
+
+        and     ax, 0FFFh             
+        shr     ax, 3               ; AL has the CMOS address
+
+;-----------------------------------------------------
+; return error if battery is bad (using standard ports)
+;-----------------------------------------------------
+
+        xchg    ah, al              ; save address in AH
+        mov     al, CLOCK_STATUS_REG
+        or      al, MKF_CMOS_NMI_BIT_VALUE ; set value of NMI bit
+        out     bcmos_addr_port, al  
+        io_delay_bb
+        io_delay_bb
+        in      al, bcmos_data_port  ; AL = battery status
+        test    al, BATT_BIT        ; bit is set if OK
+        .if (zero?)
+            mov ax, CMOS_BATTERY_ERR ; CMOS battery is low.
+            jmp CmosReadWriteError
+        .endif
+        xchg    ah, al              ; restore address to AL
+
+;-----------------------------------------------------
+; Create an AND mask in CX with bits set corresponding
+; the destination bit field
+;-----------------------------------------------------
+
+        ror ecx, 16                 ; ECX upper = bit position
+        xor cx, cx
+        .while (bx > 0)
+            shl cx, 1
+            or  cx, 1
+            dec bx
+        .endw
+        mov bx, cx                  ; BX = mask
+        ror ecx, 16                 ; CX = bit position
+        shl bx, cl                  ; BX = shifted mask
+        ror ecx, 16                 ; ECX upper = bit position
+        mov cx, bx                  ; CX = shifted mask
+
+;-----------------------------------------------------
+; If writing, encode the value:
+;
+; 1) shift the value in DH to its position,
+; 2) complement the mask so that it can be used to clear
+;    the destination bit field
+; 3) apply/test mask to DH to ensure adjacent bits are not
+;    overwritten, returning an error if there is overflow
+;
+; Note: error checking here will detect an error 
+;       if attempted write is not within the owned
+;       bits of a token.
+;-----------------------------------------------------
+
+        .if (dl == CMOS_WRITE_ACCESS)
+            ror   ecx, 16           ; CX = bit position & ECX upper = mask
+            movzx bx, dh            ; test upper bit overflow
+            shl   bx, cl        
+            or    bh, bh
+            .if (!zero?)            ; error if bits are shifted into BH
+                mov ax, CMOS_OVERFLOW_ERR
+                jmp CmosReadWriteError
+            .endif
+            shl   dh, cl            ; do the shift for real
+            ror   ecx, 16           ; CX = mask & ECX upper = bit position
+            not   cx                ; CX = complemented mask
+            test  dh, cl            ; ensure no overwriting of destination
+            .if (!zero?)
+                mov ax, CMOS_OVERFLOW_ERR
+                jmp CmosReadWriteError
+            .endif
+            mov   bl, dh            ; BL = value to write                  
+        .endif
+
+;-----------------------------------------------------
+; Note: EDX will contain value/access type information
+;       or data/index port information as needed.
+;       MM0/MM3 are used as a swap registers for this
+;       purpose. 
+;-----------------------------------------------------
+
+        mov     dx, bcmos_data_port
+        ror     edx, 16
+        mov     dx, bcmos_addr_port
+        movd    mm0, edx            ; save data|index in MM0
+                                    ; data port in EDX upper word
+                                    ; index port in DX
+
+;-----------------------------------------------------
+; Read/write the CMOS register
+;
+; Note: A read always occurs. If a write is requested,
+;       only the bits that are owned by the token
+;       are modified and written back.
+;-----------------------------------------------------
+
+        or      al, MKF_CMOS_NMI_BIT_VALUE ; set value of NMI bit
+        out     dx, al              ; AL = address
+        io_delay_bb
+        io_delay_bb
+        xchg    ah, al              ; AH contains address
+        ror     edx, 16             ; DX = data port
+        in      al, dx              ; AL = value from CMOS
+        movd    edx, mm3            ; EDX = value|access type
+
+        .if (dl == CMOS_WRITE_ACCESS)
+            movd    edx, mm0        ; EDX = data|index ports
+            xchg    ah, al          ; AL = address & AH = register value
+            out     dx, al
+            io_delay_bb
+            io_delay_bb
+            xchg    al, ah          ; AL = register value & AH = address
+            and     al, cl          ; clear the destination field
+            or      al, bl          ; set the value in AL
+            ror     edx, 16         ; DX = data port
+            out     dx, al
+            clc                     ; clear error flag
+            jmp     CmosReadWriteExit
+
+;-----------------------------------------------------
+; If reading, decode the value:
+;
+; 1) AND with mask to clear unused bits
+; 2) Shift down to zero by bit position
+;-----------------------------------------------------
+
+        .else 
+            and     al, cl          ; CL is shifted, uncomplemented mask
+            ror     ecx, 16         ; CL = bit position & ECX upper = mask
+            shr     al, cl
+            movzx   ax, al          ; AX = value
+            clc                     ; clear error flag
+            jmp     CmosReadWriteExit
+        .endif
+
+CmosReadWriteSizeError:
+        mov ax, CMOS_BITSIZE_ERR
+
+CmosReadWriteError:
+        stc                         ; set error flag
+
+CmosReadWriteExit:
+        movd    ebx, mm1            ; restore registers
+        movd    ecx, mm2
+        movd    edx, mm3
+
+        jmp     edi
+
+CmosReadWrite    ENDP
+
+
+
+;<AMI_PHDR_START>
+;----------------------------------------------------------------------------
+;
+; Procedure:    SEC_CmosManager
+;
+; Description:        
+;   This is the entrypoint for CMOS Manager SEC code.
+;
+; Input:
+;   None
+;
+; Output:        
+;   None
+;                                                                               
+; Modified:        
+;   None
+;
+; Referrals:        
+;   None
+;                                                                               
+; Notes:
+;   Currently, there are no SEC tasks for the CMOS Manager.
+;
+;----------------------------------------------------------------------------
+;<AMI_PHDR_END>
+
+SEC_CmosManager     PROC PUBLIC
+        jmp     SEC_CmosManagerEnd
+SEC_CmosManager     ENDP
+
+;----------------------------------------------------------------------------
+;   STARTUP_SEG  S E G M E N T  ENDS
+;----------------------------------------------------------------------------
+STARTUP_SEG         ENDS
+
+END
+
+;**********************************************************************
+;**********************************************************************
+;**                                                                  **
+;**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+;**                                                                  **
+;**                       All Rights Reserved.                       **
+;**                                                                  **
+;**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+;**                                                                  **
+;**                       Phone: (770)-246-8600                      **
+;**                                                                  **
+;**********************************************************************
+;**********************************************************************
+
diff --git a/Core/EM/CmosManager/CmosManagerSec.cif b/Core/EM/CmosManager/CmosManagerSec.cif
new file mode 100644
index 0000000..be948be
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSec.cif
@@ -0,0 +1,8 @@
+<component>
+	name = "CMOS SEC"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosSec"
+[files]
+"CmosManagerSec.asm"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerSmm.c b/Core/EM/CmosManager/CmosManagerSmm.c
new file mode 100644
index 0000000..e50438d
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSmm.c
@@ -0,0 +1,462 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosManagerSmm.c 8     1/25/12 2:38p Michaela $
+//
+// $Revision: 8 $
+//
+// $Date: 1/25/12 2:38p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosManagerSmm.c $
+// 
+// 8     1/25/12 2:38p Michaela
+// 
+// 7     1/25/12 2:37p Michaela
+// [TAG]         EIP56197
+// [Category]    New Feature
+// [Severity]    Normal
+// [Description] CMOS Manager Support in Runtime Code
+// [Files]       CmosManager.sdl
+//               CmosSetup.uni
+//               CmosMessages.uni
+//               CmosManagerSmm.cif
+//               CmosAccess.h
+//               CmosManagerSmm.c
+//               CmosAccess.asl
+// 
+// 6     12/11/11 8:56p Michaela
+// 
+// 4     11/30/11 11:48p Michaela
+// [TAG]         EIP75889
+// [Category]    Spec Update
+// [Severity]    Normal
+// [Description] Support Setup Customization
+// [Files]       CmosManager.sdl
+//               CmosSetup.sd
+//               CmosSetup.uni
+//               CmosMessages.uni
+// 
+// 3     3/16/11 2:45p Michaela
+// 
+// 2     3/05/10 4:54p Michaela
+// 
+// 1     11/10/09 8:45p Michaela
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerSmm.c
+//
+// Description: Contains the routines that initialize the CMOS manager's
+//              SMM services.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "CmosManagerSmm.h"
+#include <Protocol\Reset.h>
+#include <Protocol\SmmBase.h>
+#include <Protocol\SmmSwDispatch.h>
+#include <Protocol\AcpiSupport.h>
+#include <Acpi.h>
+#include <AcpiRes.h>
+
+EFI_CMOS_ACCESS_INTERFACE   *gCmos = NULL;
+CMOS_SMM_CONTEXT            *gAslContext = NULL;  // ASL communication buffer
+
+//**********************************************************************
+//<AMI_PHDR_START>
+//
+// Procedure:   SmiHandler
+//
+// Description:
+//      This is called from SMM or ASL code to access CMOS during
+//      runtime.
+//
+// Input:
+//      IN EFI_HANDLE DispatchHandle
+//      IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+//
+// Output:
+//      NONE
+//
+// Modified:
+//      NONE
+//
+// Referrals:
+//
+// Notes:
+//      
+//
+//<AMI_PHDR_END>
+//**********************************************************************
+
+VOID SmiHandler (
+    IN  EFI_HANDLE                    DispatchHandle,
+    IN  EFI_SMM_SW_DISPATCH_CONTEXT   *DispatchContext )
+{
+
+    UINT8               Function = (UINT8)DispatchContext->SwSmiInputValue;
+    EFI_STATUS          Status = EFI_NOT_FOUND;
+
+    if (Function == CSMI){
+        if (gCmos == NULL){
+            gAslContext->Status = 0; // FALSE => operation failed
+        }
+        else {
+            switch (gAslContext->Opcode) {
+            case 0:  // Write from the communication buffer
+                Status = gCmos->Write(gCmos, gAslContext->CmosToken, 
+                    gAslContext->CmosByte);
+                break;
+            case 1:  // Read into the communication buffer
+                Status = gCmos->Read(gCmos, gAslContext->CmosToken, 
+                    &gAslContext->CmosByte);
+                break;
+            }
+            if (EFI_ERROR(Status)){
+               gAslContext->Status = 0; // FALSE => operation failed
+            }
+            else {
+               gAslContext->Status = 1; // FALSE => operation success
+            }
+        }
+    }
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: InSmmFunction
+//
+// Description:
+//      This function is executed from SMM in order to install the SMRAM-based
+//      CMOS Access Interface pointer.
+//
+// Input:
+//      IN EFI_HANDLE ImageHandle
+//                  - Image handle
+//      IN EFI_SYSTEM_TABLE *SystemTable
+//                  - System table pointer
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//               *  Initializes/Installs the EFI_CMOS_ACCESS_INTERFACE 
+//                  Protocol for SMM.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS InSmmFunction (
+    IN  EFI_HANDLE              ImageHandle,
+    IN  EFI_SYSTEM_TABLE        *SystemTable )
+{
+    EFI_STATUS                      Status;
+    EFI_CMOS_MANAGER_INTERFACE      *Mgr;
+    EFI_SMM_SW_DISPATCH_CONTEXT     SwContext;
+    EFI_SMM_SW_DISPATCH_PROTOCOL    *SwDispatch;
+    EFI_HANDLE                      SwHandle  = NULL;
+    
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CmosManagerSMM Entry\n" ));
+ 
+    //-----------------------------------------------------------------------
+    // Initialize the manager interface and, at this point, only check for  
+    // interface initialization errors.
+    //-----------------------------------------------------------------------
+
+    Mgr = NewCmosManagerInterface(NULL);
+    if ( Mgr == NULL || !Mgr->CheckStatus(Mgr, CMOS_VALID_INTERFACE) ) {
+        return  Status = EFI_UNSUPPORTED;
+    }
+    if ( Mgr->CheckStatus( Mgr, CMOS_INTERFACE_ALREADY_INSTALLED) )
+        return  Status = EFI_SUCCESS;
+
+    //-----------------------------------------------------------------------
+    // Handle specific reported errors.
+    //
+    // Note:    All boot time error conditions should have been handled
+    //          before execution gets here.
+    //
+    //          All that is needed is to report the status for debugging.
+    //-----------------------------------------------------------------------
+
+    if (  Mgr->CheckStatus(Mgr, CMOS_BAD_BATTERY) ) {
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "CmosManagerSMM: CMOS_BAD_BATTERY = TRUE\n" ));
+
+        // Default handler is to continue from DXE phase
+    }
+    else if ( Mgr->CheckAnyStatus(Mgr,   CMOS_BAD_CHECKSUM 
+                                       | CMOS_OPTIMAL_DEFAULTS_ENABLED) )
+    {
+#if (FULL_CMOS_MANAGER_DEBUG)
+        if (  Mgr->CheckStatus(Mgr, CMOS_BAD_CHECKSUM) ) {
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "CmosManagerSMM: CMOS_BAD_CHECKSUM = TRUE\n" ));
+        }
+
+        if (  Mgr->CheckStatus(Mgr, CMOS_OPTIMAL_DEFAULTS_ENABLED) ) {
+            CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+                "CmosManagerSMM: CMOS_OPTIMAL_DEFAULTS_ENABLED = TRUE\n" ));
+        }
+#endif
+    }
+
+
+    //-----------------------------------------------------------------------
+    // Install the CMOS Access interface
+    //-----------------------------------------------------------------------
+
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+        "CmosManagerSMM: Installing CMOS Access SMM Protocol @ 0x%x\n",
+        Mgr ));
+    Mgr->InstallAccessInterface(Mgr);
+    if ( !Mgr->CheckStatus(Mgr, CMOS_VALID_MANAGER) ){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+            "CmosManagerSMM: Invalid interface\n" ));
+        return Status = EFI_UNSUPPORTED;
+    }
+
+    // Update the module-scope interface pointer.
+    gCmos = (EFI_CMOS_ACCESS_INTERFACE*) &Mgr->Access;
+
+    //Register the SW SMI handler
+    Status = pBS->LocateProtocol (&gEfiSmmSwDispatchProtocolGuid, 
+        NULL, &SwDispatch);
+    ASSERT_EFI_ERROR(Status);
+
+    SwContext.SwSmiInputValue = CSMI;
+    Status = SwDispatch->Register (SwDispatch, SmiHandler, &SwContext, 
+        &SwHandle);
+
+    if (EFI_ERROR(Status)){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS,
+            "InSmmFunction: could not register...\n"));
+    }
+    ASSERT_EFI_ERROR(Status);
+
+    CMOS_TRACE((CMOS_TRACE_ALWAYS, "InSmmFunction Registered.\n"));
+
+    return Status = EFI_SUCCESS;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: GetAslNameObject
+//
+// Description:
+//      This function returns the 64-bit value assigned to the ASL named
+//      object.
+//
+// Input:
+//      IN ACPI_HDR *PDsdt 
+//                  - pointer to the DSDT table
+//      IN UINT8 *ObjName
+//                  - pointer to the name string
+//      OUT UINT64 *Value
+//                  - pointer to the value to be updated
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//      N/A
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS  GetAslNameObject(
+    IN  ACPI_HDR  *PDsdt,
+    IN  UINT8     *ObjName,
+    OUT UINT64    *Value)
+{
+    ASL_OBJ_INFO    Obj;
+    EFI_STATUS      Status;
+
+    if (PDsdt->Signature != DSDT_SIG){
+        return EFI_INVALID_PARAMETER;
+    }
+
+    Status = GetAslObj((UINT8*)(PDsdt+1), PDsdt->Length-sizeof(ACPI_HDR)-1,
+        ObjName, otName, &Obj);
+    
+    if (!EFI_ERROR(Status)){
+        *Value = *((UINT64*)((UINT8*)Obj.DataStart + 1));
+    }
+    
+    return Status;
+}
+
+
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: UpdateAslCommunicationBuffer
+//
+// Description:
+//      This function is executed in non-SMM in order to allocate the 
+//      runtime communication buffer used by the \CMOS.ACCE asl method
+//      to use CMOS Manager services at runtime.
+//
+// Input:
+//      N/A
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//      N/A
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS UpdateAslCommunicationBuffer ( VOID )
+{
+    EFI_PHYSICAL_ADDRESS  DsdtAddress = NULL;
+    ACPI_HDR              *Dsdt = NULL;
+    UINT64                CurrentValue;
+    EFI_STATUS            Status;
+
+    // Get a pointer to the DSDT.
+
+    Status = LibGetDsdt(&DsdtAddress, EFI_ACPI_TABLE_VERSION_ALL);
+    if (EFI_ERROR(Status)){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, "CMOS Manager: failed to get DSDT\n"));
+        goto EXIT;
+    }
+    Dsdt = (ACPI_HDR*)DsdtAddress;
+
+    // Get the current value of \CCOM.
+
+    Status = GetAslNameObject(Dsdt, "CCOM", &CurrentValue);
+    if (EFI_ERROR(Status)){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS, "Could not get \\CCOM ASL object.\n"));
+        goto EXIT;
+    }
+    CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "CurrentValue of \\CCOM is 0x%lX\n",
+        CurrentValue));
+
+    // If \CCOM has not been updated yet, allocate the runtime communication
+    // buffer and update the ASL object.  Otherwise, save the value of 
+    // \CCOM to the global variable in SMRAM scope.
+
+    if (CurrentValue == 0x0123456789ABCDEF){
+        Status = pBS->AllocatePool(EfiRuntimeServicesData, 
+            sizeof(CMOS_SMM_CONTEXT), &gAslContext);
+        if (EFI_ERROR(Status)){
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, 
+                "failed to allocate CMOS_SMM_CONTEXT\n"));
+            goto EXIT;
+        }
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, 
+            "CMOS_SMM_CONTEXT allocated to 0x%lX\n", gAslContext ));
+
+        Status = UpdateAslNameObject(Dsdt, "CCOM", (UINT64)gAslContext);
+        if (EFI_ERROR(Status)){
+            CMOS_TRACE((CMOS_TRACE_ALWAYS, "failed to update \\CCOM\n"));
+            goto EXIT;
+        }
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "Updated \\CCOM ASL object.\n"));
+    }
+    else {
+        gAslContext = (CMOS_SMM_CONTEXT*)CurrentValue;
+        CMOS_TRACE_FULL((CMOS_TRACE_ALWAYS, "gAslContext was updated\n"));
+    }
+
+EXIT:
+    return Status;
+}
+
+
+//---------------------------------------------------------------------------
+//  SMM entry point function
+//
+//<AMI_PHDR_START>
+//---------------------------------------------------------------------------
+//
+// Procedure: CmosManagerSmmEntry
+//
+// Description:
+//      This function is the entrypoint for installing the SMM driver for
+//      CMOS Manager.
+//
+// Input:
+//      IN EFI_HANDLE ImageHandle
+//                  - Image handle
+//      IN EFI_SYSTEM_TABLE *SystemTable
+//                  - System table pointer
+//
+// Output:
+//      EFI_STATUS (Return Value)
+//                  = EFI_SUCCESS if successful
+//                  = or other valid EFI error code
+//
+// Notes:
+//               *  Initializes/Installs the EFI_CMOS_ACCESS_INTERFACE 
+//                  Protocol for SMM.
+//
+//---------------------------------------------------------------------------
+//<AMI_PHDR_END>
+
+EFI_STATUS CmosManagerSmmEntry (
+    IN  EFI_HANDLE              ImageHandle,
+    IN  EFI_SYSTEM_TABLE        *SystemTable )
+{
+    EFI_STATUS               Status = EFI_SUCCESS;
+
+    InitAmiLib(ImageHandle, SystemTable);
+
+#if CMOS_MANAGER_ASL_SUPPORT
+    Status = UpdateAslCommunicationBuffer();
+    if (EFI_ERROR(Status)){
+        CMOS_TRACE((CMOS_TRACE_ALWAYS,
+            "CMOS Manager failed to update ASL communication buffer\n"));
+        ASSERT_EFI_ERROR(Status);
+    }
+#endif
+
+    return InitSmmHandler(ImageHandle, SystemTable, InSmmFunction, NULL);
+
+}
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerSmm.cif b/Core/EM/CmosManager/CmosManagerSmm.cif
new file mode 100644
index 0000000..0ff3503
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSmm.cif
@@ -0,0 +1,11 @@
+<component>
+	name = "CMOS SMM"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosSmm"
+[files]
+"CmosManagerSmm.c"	
+"CmosManagerSmm.h"	
+"CmosManagerSmm.dxs"	
+"CmosAccess.asl"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosManagerSmm.dxs b/Core/EM/CmosManager/CmosManagerSmm.dxs
new file mode 100644
index 0000000..810a938
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSmm.dxs
@@ -0,0 +1,59 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosManagerSmm.dxs 1     11/10/09 8:45p Michaela $
+//
+// $Revision: 1 $
+//
+// $Date: 11/10/09 8:45p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosManagerSmm.dxs $
+// 
+// 1     11/10/09 8:45p Michaela
+// 
+//
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name:	        CmosManagerSmm.dxs
+//
+// Description:     Contains the dependency expression for SMM CMOS
+//                  driver.
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#include <Protocol/SmmBase.h>
+
+
+DEPENDENCY_START
+  EFI_SMM_BASE_PROTOCOL_GUID
+DEPENDENCY_END
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerSmm.h b/Core/EM/CmosManager/CmosManagerSmm.h
new file mode 100644
index 0000000..3b65b90
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSmm.h
@@ -0,0 +1,65 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosManagerSmm.h 1     11/10/09 8:45p Michaela $
+//
+// $Revision: 1 $
+//
+// $Date: 11/10/09 8:45p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS SMM/CmosManagerSmm.h $
+// 
+// 1     11/10/09 8:45p Michaela
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosManagerSmm.h
+//
+// Description: Contains declarations to support the CMOS Access interface
+//              in SMM.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _CMOS_MANAGER_SMM_H
+#define _CMOS_MANAGER_SMM_H
+
+#include <Efi.h>
+#include <AmiDxeLib.h>
+#include <SspData.h>
+#include <SspTokens.h>
+#include <CmosAccess.h>
+#include "CmosManager.h"
+
+#endif  // #ifndef _CMOS_MANAGER_SMM_H
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosManagerSource.cif b/Core/EM/CmosManager/CmosManagerSource.cif
new file mode 100644
index 0000000..97b7253
--- /dev/null
+++ b/Core/EM/CmosManager/CmosManagerSource.cif
@@ -0,0 +1,11 @@
+<component>
+	name = "CMOS Source"
+	category = ModulePart
+	LocalRoot = "Core\EM\CmosManager\"
+	RefName = "CmosSource"
+[files]
+"CmosManager.c"	
+"CmosAccess.c"	
+"CmosTables.c"	
+"CmosManagerHob.c"	
+<endComponent>
diff --git a/Core/EM/CmosManager/CmosMessages.c b/Core/EM/CmosManager/CmosMessages.c
new file mode 100644
index 0000000..e262f52
--- /dev/null
+++ b/Core/EM/CmosManager/CmosMessages.c
@@ -0,0 +1,231 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2010, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CMOS Messages/CmosMessages.c 2     6/15/10 2:22p Michaela $
+//
+// $Date: 6/15/10 2:22p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CMOS Messages/CmosMessages.c $
+// 
+// 2     6/15/10 2:22p Michaela
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:        CmosMessages.c
+//
+// Description: Contains code to display CMOS-related boot messages.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#include "Tiano.h"
+#include <Efi.h>
+#include <AmiDxeLib.h>
+#include <SspData.h>
+#include <SspTokens.h>
+#include <CmosAccess.h>
+#include "CmosManager.h"
+#include <Setup.h>
+#include <Protocol\AMIPostMgr.h>
+#include <Protocol\SimpleTextIn.h>
+#include <Protocol\SimpleTextOut.h>
+#include "HiiLib.h"
+#include "Mem.h"
+#include "AMITSEStrTokens.h"
+#include "AmiVfr.h"
+
+#if EFI_SPECIFICATION_VERSION > 0x20000
+#include "Include\UefiHii.h"
+#include "Protocol\HiiDatabase.h"
+#include "Protocol\HiiString.h"
+#else
+#include <Protocol/Hii.h>
+#endif
+
+
+extern EFI_BOOT_SERVICES        *gBS;
+extern EFI_SYSTEM_TABLE         *gST;
+extern EFI_RUNTIME_SERVICES     *gRT;
+
+// Console messages are only supported if TSE sources are included
+
+#if !TSE_SOURCES_SUPPORT
+  #ifdef CMOS_TRACE_FULL
+    #undef CMOS_TRACE_FULL
+  #endif
+  #define CMOS_TRACE_FULL
+#endif
+
+BOOLEAN CmosMgrProcessConInAvailability( VOID )
+{
+    EFI_GUID                    AmiPostManagerProtocolGuid 
+                                    = AMI_POST_MANAGER_PROTOCOL_GUID;
+    AMI_POST_MANAGER_PROTOCOL   *AmiPostMgr;
+    UINT8                       Selection = 0;
+    EFI_STATUS                  Status;
+    EFI_TPL                     OldTpl = 0;  // zero initial value required
+    EFI_CMOS_ACCESS_INTERFACE   *Cmos = NULL;
+    EFI_GUID                    CmosGuid = EFI_DXE_CMOS_ACCESS_GUID;
+    BOOLEAN                     BadBattery = FALSE;
+    BOOLEAN                     DefaultsLoaded = FALSE;
+    BOOLEAN                     NotUsable = FALSE;
+    BOOLEAN                     BadChecksum = FALSE;
+    BOOLEAN                     FirstBoot = FALSE;
+    CMOS_STATUS_BYTES           CmosInfo;
+   	CHAR16                      *Title = NULL;
+    CHAR16                      *BatteryMsg = NULL;
+    CHAR16                      *ChecksumMsg = NULL;
+    CHAR16                      *DefaultsMsg = NULL;
+    CHAR16                      *UsableMsg = NULL;
+    CHAR16                      *FirstBootMsg = NULL;
+
+    CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+        "Locate CMOS Manager interface...\n" ));
+    Status = gBS->LocateProtocol( &CmosGuid, NULL, &Cmos);
+    if (!EFI_ERROR (Status)) {
+        Cmos->ReadCmosStatusBytes(Cmos, &CmosInfo);
+
+        NotUsable = CmosInfo.ConfigurationStatus.NotUsable;
+    }
+    else {
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Could not locate CMOS Manager\n" ));
+    }
+
+    if ( !NotUsable ) {
+        Cmos->Read(Cmos, CMOS_MGR_CHECKSUM_BAD,        &BadChecksum);
+        Cmos->Read(Cmos, CMOS_MGR_BATTERY_BAD,         &BadBattery);
+        Cmos->Read(Cmos, CMOS_MGR_DEFAULTS_LOADED,     &DefaultsLoaded);
+        Cmos->Read(Cmos, CMOS_MGR_FIRST_BOOT_DETECTED, &FirstBoot);
+    }
+
+    // Show messages if the battery is bad or defaults were loaded.
+
+    if ( BadChecksum || BadBattery || DefaultsLoaded 
+         || NotUsable || FirstBoot )
+    {
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Locate POST Manager interface...\n" ));
+        Status = gBS->LocateProtocol( &AmiPostManagerProtocolGuid, NULL, 
+                                      &AmiPostMgr );
+        if (EFI_ERROR (Status)) {
+            CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+                              "Could not locate POST manager\n" ));
+            return FALSE;
+        }   
+
+        // get strings
+
+        Title = HiiGetString( gHiiHandle, STRING_TOKEN(CMOS_MESSAGE_TITLE));
+        BatteryMsg = HiiGetString( gHiiHandle, STRING_TOKEN(BAD_BATTERY_MESSAGE));
+        ChecksumMsg = HiiGetString( gHiiHandle, STRING_TOKEN(BAD_CHECKSUM_MESSAGE));
+        DefaultsMsg = HiiGetString( gHiiHandle, STRING_TOKEN(DEFAULTS_LOADED_MESSAGE));
+        UsableMsg = HiiGetString( gHiiHandle, STRING_TOKEN(NOT_USABLE_MESSAGE));
+        FirstBootMsg = HiiGetString( gHiiHandle, STRING_TOKEN(FIRST_BOOT_MESSAGE));
+
+        // save current TPL and then lower TPL to EFI_TPL_APPLICATION
+
+        OldTpl = gBS->RaiseTPL( EFI_TPL_HIGH_LEVEL );  
+        gBS->RestoreTPL( EFI_TPL_APPLICATION );
+
+        AmiPostMgr->SwitchToPostScreen(); 
+    }
+
+    if ( BadBattery  ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Displaying bad battery POST message box...\n" ));
+        Status = AmiPostMgr->DisplayMsgBox( Title, 
+                                             BatteryMsg,
+                                             MSGBOX_TYPE_OK, 
+                                             &Selection);
+    } 
+
+    if ( FirstBoot  ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Displaying first boot POST message box...\n" ));
+        Status = AmiPostMgr->DisplayMsgBox( Title, 
+                                             FirstBootMsg,
+                                             MSGBOX_TYPE_OK,
+                                             &Selection);        
+    }
+
+    // The bad checksum message is expected on the first boot
+
+    if ( BadChecksum && !FirstBoot  ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Displaying bad checksum POST message box...\n" ));
+        Status = AmiPostMgr->DisplayMsgBox( Title, 
+                                             ChecksumMsg,
+                                             MSGBOX_TYPE_OK,
+                                             &Selection);        
+    }
+
+    if ( NotUsable ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Displaying bad CMOS POST message box...\n" ));
+        Status = AmiPostMgr->DisplayMsgBox( Title, 
+                                             UsableMsg,
+                                             MSGBOX_TYPE_OK, 
+                                             &Selection);
+    } 
+
+    if ( DefaultsLoaded ){
+        CMOS_TRACE_FULL(( CMOS_TRACE_ALWAYS, 
+            "Displaying defaults loaded POST message box...\n" ));
+        Status = AmiPostMgr->DisplayMsgBox( Title, 
+                                            DefaultsMsg,
+                                             MSGBOX_TYPE_OK,
+                                             &Selection);        
+    }
+
+    if ( OldTpl != 0 )
+        gBS->RaiseTPL(OldTpl);
+
+    // free string memory
+
+    if ( Title != NULL )
+        MemFreePointer( (VOID **)&Title );
+    if ( BatteryMsg != NULL )
+        MemFreePointer( (VOID **)&BatteryMsg );
+    if ( ChecksumMsg != NULL )
+        MemFreePointer( (VOID **)&ChecksumMsg );
+    if ( DefaultsMsg != NULL )
+        MemFreePointer( (VOID **)&DefaultsMsg );
+    if ( UsableMsg != NULL )
+        MemFreePointer( (VOID **)&UsableMsg );
+    if ( FirstBootMsg != NULL )
+        MemFreePointer( (VOID **)&FirstBootMsg );
+
+    return FALSE;  // This routine is not used for password
+}
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2010, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosMessages.mak b/Core/EM/CmosManager/CmosMessages.mak
new file mode 100644
index 0000000..4b8fd83
--- /dev/null
+++ b/Core/EM/CmosManager/CmosMessages.mak
@@ -0,0 +1,70 @@
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**             5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093    **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CMOS Messages/CmosMessages.mak 2     6/15/10 2:22p Michaela $
+#
+# $Revision: 2 $
+#
+# $Date: 6/15/10 2:22p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CMOS Messages/CmosMessages.mak $
+# 
+# 2     6/15/10 2:22p Michaela
+# 
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name:	CmosMessages.mak
+#
+# Description: Make file for the CmosMessages.obj
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+
+AMITSEBin :  $(BUILD_DIR)\CmosMessages.obj
+
+$(BUILD_DIR)\CmosMessages.obj : $(PROJECT_DIR)\$(CMOS_MANAGER_DIR)\CmosMessages.c
+	$(CC) $(CFLAGS) -I $(TSEBIN_DIR)\Inc -I $(TSEBIN_DIR) -ICore /Fo$(BUILD_DIR)\ $(PROJECT_DIR)\$(CMOS_MANAGER_DIR)\CmosMessages.c
+
+AMITSESDB : CmosMessagesSDB
+CMOS_MANAGER_MAK_DEPS = \
+    $(CMOS_MANAGER_DIR)\CmosManagerMessages.cif \
+    $(CMOS_MANAGER_DIR)\CmosMessages.mak
+
+$(BUILD_DIR)\CmosMessages.mak : $(CMOS_MANAGER_MAK_DEPS) $(BUILD_RULES)
+	$(CIF2MAK) $(CMOS_MANAGER_DIR)\CmosManagerMessages.cif $(CIF2MAK_DEFAULTS)
+
+CmosMessagesSDB : $(BUILD_DIR)\CmosMessages.mak
+	$(MAKE) /$(MAKEFLAGS) $(BUILD_DEFAULTS)\
+		/f $(BUILD_DIR)\CmosMessages.mak all\
+		"UNI_INCLUDE_PATH=$(TSEBIN_DIR) $(TSE_UNI_INCLUDE_PATH)"\
+		"STRING_CONSUMERS=$(CMOS_MANAGER_DIR)\CmosMessages.c"\
+		TYPE=SDB NAME=CmosMessages
+
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**             5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093    **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
diff --git a/Core/EM/CmosManager/CmosMessages.sdl b/Core/EM/CmosManager/CmosMessages.sdl
new file mode 100644
index 0000000..1c2c6d4
--- /dev/null
+++ b/Core/EM/CmosManager/CmosMessages.sdl
@@ -0,0 +1,100 @@
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
+#
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CMOS Messages/CmosMessages.sdl 2     6/15/10 2:22p Michaela $
+#
+# $Revision: 2 $
+#
+# $Date: 6/15/10 2:22p $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CMOS Messages/CmosMessages.sdl $
+# 
+# 2     6/15/10 2:22p Michaela
+# 
+#**********************************************************************
+#<AMI_FHDR_START>
+#-----------------------------------------------------------------------
+#
+# Name:         CmosMessages.sdl
+#
+# Description:  This AMI SDL file defines CMOS message-related information.
+#
+#-----------------------------------------------------------------------
+#<AMI_FHDR_END>
+#
+
+MODULE
+	Help  = "Includes CmosMessages.mak to Project"
+	File  = "CmosMessages.mak"
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+    Token = "CMOS_MESSAGES_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\CmosMessages.obj"
+	Parent  = "AMITSE_Objects"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+    Token = "CMOS_MESSAGES_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "$(CMOS_MANAGER_DIR)\CmosMessages.c"
+	Parent  = "TSE_STRING_CONSUMERS_LIST"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+    Token = "CMOS_MESSAGES_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "-i $(CMOS_MANAGER_DIR)"
+	Parent  = "TSE_UNI_INCLUDE_PATH"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+    Token = "CMOS_MESSAGES_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\CmosMessages.sdb"
+	Parent  = "TSE_SDBS"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+    Token = "CMOS_MESSAGES_SUPPORT" "=" "1"
+End
+
+ELINK
+	Name  = "CmosMgrProcessConInAvailability,"
+	Parent  = "ProcessConInAvailability,"
+	InvokeOrder = AfterParent
+    Token = "CMOS_SETUP_SUPPORT" "=" "1"
+    Token = "CMOS_MESSAGES_SUPPORT" "=" "1"
+End
+
+
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**         5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093        **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
diff --git a/Core/EM/CmosManager/CmosMessages.uni b/Core/EM/CmosManager/CmosMessages.uni
new file mode 100644
index 0000000..779b9b9
--- /dev/null
+++ b/Core/EM/CmosManager/CmosMessages.uni
diff --git a/Core/EM/CmosManager/CmosSetup.sd b/Core/EM/CmosManager/CmosSetup.sd
new file mode 100644
index 0000000..1046632
--- /dev/null
+++ b/Core/EM/CmosManager/CmosSetup.sd
@@ -0,0 +1,223 @@
+//**********************************************************************
+//**********************************************************************
+//**                                                                  **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.         **
+//**                                                                  **
+//**                       All Rights Reserved.                       **
+//**                                                                  **
+//**     5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093            **
+//**                                                                  **
+//**                       Phone: (770)-246-8600                      **
+//**                                                                  **
+//**********************************************************************
+//**********************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosSetup.sd 2     11/30/11 11:47p Michaela $
+//
+// $Revision: 2 $
+//
+// $Date: 11/30/11 11:47p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Board/CmosSetup.sd $
+// 
+// 2     11/30/11 11:47p Michaela
+// [TAG]         EIP56197
+// [Category]    New Feature
+// [Severity]    Normal
+// [Description] CMOS Manager Support in Runtime Code
+// [Files]       CmosManager.sdl
+//               CmosSetup.uni
+//               CmosMessages.uni
+//               CmosManagerSmm.cif
+//               CmosAccess.h
+//               CmosManagerSmm.c 
+// 
+// 1     6/15/10 2:25p Michaela
+// 
+//**********************************************************************
+
+//**********************************************************************
+//<AMI_FHDR_START>
+//
+// Name:    CmosManager.sd
+//
+// Description:    CMOS Form Template
+//
+//<AMI_FHDR_END>
+//**********************************************************************
+
+#ifdef SETUP_DATA_DEFINITION
+
+/***********************************************************/
+/* Put NVRAM data definitions here.
+/* For example: UINT8 Data1;
+/* These definitions will be converted by the build process
+/* to a definitions of SETUP_DATA fields.
+/***********************************************************/
+    UINT8 CmosNotUsable;            // do not remove   
+    UINT8 CmosFirstBootDetected;    // do not remove   
+    UINT8 CmosDefaultsLoaded;       // do not remove      
+    UINT8 CmosBatteryIsBad;         // do not remove      
+    UINT8 CmosCheckSumIsBad;        // do not remove      
+#endif
+
+
+#ifdef FORM_SET_TYPEDEF
+    // #include 
+
+    #ifndef SUPPRESS_GRAYOUT_ENDIF //old Core
+      #if EFI_SPECIFICATION_VERSION>0x20000
+        #define SUPPRESS_GRAYOUT_ENDIF endif; endif;
+      #else
+        #define SUPPRESS_GRAYOUT_ENDIF endif;
+      #endif
+    #endif
+#endif // FORM_SET_TYPEDEF
+
+//**********************************************************************
+//                  Compatibility Section
+//**********************************************************************
+
+#if defined(VFRCOMPILE) && !defined(CONTROLS_ARE_DEFINED)
+  #define CONTROL_DEFINITION
+#endif
+
+//**********************************************************************
+//                  Controls Section
+//
+// The following section contains control macros that can be overridden
+// in external files.  This allows customization of control content, 
+// while ensuring the control's data is available.
+//**********************************************************************
+
+#ifdef CONTROL_DEFINITION
+
+#define CMOS_MGR_NOT_USABLE \
+    oneof varid =   SETUP_DATA.CmosNotUsable,\
+        prompt = STRING_TOKEN(STR_UNUSABLE_CMOS_PROMPT),\
+        help = STRING_TOKEN(STR_EMPTY),\
+        option text = STRING_TOKEN(STR_FALSE), value = 0, flags = MANUFACTURING | DEFAULT;\
+        option text = STRING_TOKEN(STR_TRUE),  value = 1, flags = 0;\
+    endoneof;
+
+#define CMOS_MGR_BATTERY_IS_BAD \
+    oneof varid =   SETUP_DATA.CmosBatteryIsBad,\
+        prompt = STRING_TOKEN(STR_BAD_CMOS_BATTERY_PROMPT),\
+        help = STRING_TOKEN(STR_EMPTY),\
+        option text = STRING_TOKEN(STR_FALSE), value = 0, flags = MANUFACTURING | DEFAULT;\
+        option text = STRING_TOKEN(STR_TRUE),  value = 1, flags = 0;\
+    endoneof;
+
+#define CMOS_MGR_FIRST_BOOT_DETECTED \
+    oneof varid =   SETUP_DATA.CmosFirstBootDetected,\
+        prompt = STRING_TOKEN(STR_FIRST_BOOT_DETECTED_PROMPT),\
+        help = STRING_TOKEN(STR_EMPTY),\
+        option text = STRING_TOKEN(STR_FALSE), value = 0, flags = MANUFACTURING | DEFAULT;\
+        option text = STRING_TOKEN(STR_TRUE),  value = 1, flags = 0;\
+    endoneof;
+
+#define CMOS_MGR_DEFAULTS_LOADED \
+    oneof varid =   SETUP_DATA.CmosDefaultsLoaded,\
+        prompt = STRING_TOKEN(STR_DEFAULTS_LOADED_PROMPT),\
+        help = STRING_TOKEN(STR_EMPTY),\
+        option text = STRING_TOKEN(STR_FALSE), value = 0, flags = MANUFACTURING | DEFAULT;\
+        option text = STRING_TOKEN(STR_TRUE),  value = 1, flags = 0;\
+    endoneof;
+
+#define CMOS_MGR_CHECKSUM_IS_BAD \
+    oneof varid =   SETUP_DATA.CmosCheckSumIsBad,\
+        prompt = STRING_TOKEN(STR_BAD_CHECKSUM_PROMPT),\
+        help = STRING_TOKEN(STR_EMPTY),\
+        option text = STRING_TOKEN(STR_FALSE), value = 0, flags = MANUFACTURING | DEFAULT;\
+        option text = STRING_TOKEN(STR_TRUE),  value = 1, flags = 0;\
+    endoneof;
+
+#endif //#ifdef CONTROL_DEFINITION
+
+
+#ifdef CONTROLS_WITH_DEFAULTS
+    CMOS_MGR_NOT_USABLE
+    CMOS_MGR_BATTERY_IS_BAD
+    CMOS_MGR_FIRST_BOOT_DETECTED
+    CMOS_MGR_DEFAULTS_LOADED
+    CMOS_MGR_CHECKSUM_IS_BAD
+#endif //#ifdef CONTROLS_WITH_DEFAULTS
+
+
+#ifdef ADVANCED_FORM_SET
+
+    #ifdef FORM_SET_ITEM
+    // Define controls to be added to the main page of the formset
+    #endif
+
+    #ifdef FORM_SET_GOTO
+    // Define goto commands for the forms defined in this file
+        goto CMOS_FORM_ID, 
+        prompt = STRING_TOKEN(STR_CMOS_FORM),
+        help = STRING_TOKEN(STR_CMOS_FORM_HELP);
+    #endif
+
+    #ifdef FORM_SET_FORM
+
+
+      #ifndef CMOS_FORM_DEF
+      #define CMOS_FORM_DEF
+        // Define forms
+        form formid = AUTO_ID(CMOS_FORM_ID),
+
+        title = STRING_TOKEN(STR_CMOS_FORM);
+        SUBTITLE(STRING_TOKEN(STR_CMOS_FORM_HELP))
+    
+        SEPARATOR
+    
+        // grayout (for display only)
+        suppressif ideqval SETUP_DATA.CmosNotUsable == 0;
+        grayoutif ideqval SETUP_DATA.CmosNotUsable == 1;
+            CMOS_MGR_NOT_USABLE
+        SUPPRESS_GRAYOUT_ENDIF
+
+        grayoutif ideqval SETUP_DATA.CmosBatteryIsBad == 1 OR
+                  ideqval SETUP_DATA.CmosBatteryIsBad == 0;
+            CMOS_MGR_BATTERY_IS_BAD
+        endif;
+
+        grayoutif ideqval SETUP_DATA.CmosFirstBootDetected == 1 OR
+                  ideqval SETUP_DATA.CmosFirstBootDetected == 0;
+            CMOS_MGR_FIRST_BOOT_DETECTED
+        endif;
+
+        suppressif ideqval SETUP_DATA.CmosNotUsable == 1;
+        grayoutif ideqval SETUP_DATA.CmosDefaultsLoaded == 1 OR
+                  ideqval SETUP_DATA.CmosDefaultsLoaded == 0;
+            CMOS_MGR_DEFAULTS_LOADED
+        SUPPRESS_GRAYOUT_ENDIF
+
+        suppressif ideqval SETUP_DATA.CmosNotUsable == 1;
+        grayoutif ideqval SETUP_DATA.CmosCheckSumIsBad == 1 OR
+                  ideqval SETUP_DATA.CmosCheckSumIsBad == 0;
+            CMOS_MGR_CHECKSUM_IS_BAD
+        SUPPRESS_GRAYOUT_ENDIF
+
+        endform; 
+      #endif // #ifndef CMOS_FORM_DEF
+
+    #endif // FORM_SET_FORM
+
+#endif  // ADVANCED_FORM_SET
+
+//**********************************************************************
+//**********************************************************************
+//**                                                                  **
+//**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+//**                                                                  **
+//**                       All Rights Reserved.                       **
+//**                                                                  **
+//**     5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093            **
+//**                                                                  **
+//**                       Phone: (770)-246-8600                      **
+//**                                                                  **
+//**********************************************************************
+//**********************************************************************
diff --git a/Core/EM/CmosManager/CmosSetup.uni b/Core/EM/CmosManager/CmosSetup.uni
new file mode 100644
index 0000000..c6b6867
--- /dev/null
+++ b/Core/EM/CmosManager/CmosSetup.uni
diff --git a/Core/EM/CmosManager/CmosTables.c b/Core/EM/CmosManager/CmosTables.c
new file mode 100644
index 0000000..fa0ef32
--- /dev/null
+++ b/Core/EM/CmosManager/CmosTables.c
@@ -0,0 +1,235 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosTables.c 12    6/15/10 2:24p Michaela $
+//
+// $Revision: 12 $
+//
+// $Date: 6/15/10 2:24p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Source/CmosTables.c $
+// 
+// 12    6/15/10 2:24p Michaela
+// 
+// 11    11/10/09 9:14p Michaela
+// 
+// 10    7/29/09 9:59a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 9     6/15/09 5:11p Michaela
+// 
+// 8     6/02/09 3:27p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 7     2/06/09 2:01p Michaela
+// FIRST_CMOS_REGISTER is now generated by AmiSsp2
+// 
+// 6     11/17/08 4:40p Michaela
+// --Removed Token Name strings in debug development code
+// 
+// 5     11/17/08 3:40p Michaela
+// --Removed development debug code
+// 
+// 4     3/07/08 4:07p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 3     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 2     2/26/08 12:49p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 1     2/22/08 2:29p Michaela
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosTables.c
+//
+// Description: Contains the global static data tables that are initialized
+//              from AmiSsp2.exe output during the build process. These
+//              tables are used in the PEI phase and passed, as needed,
+//              to DXE via HOB data structure.
+//
+//              This file must always be included in source form.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+//<AMI_GHDR_START>
+//----------------------------------------------------------------------------
+//
+// Name:    Initialization_Tables
+//
+// Description:        
+//      This page provides links to descriptions of the major tables used in 
+//      initializing/supporting the CMOS Manager module.
+//
+// Fields:  Phase  Name  Description
+// ------------------------------------------------------------------
+// ALL  gCmosTokenTable             all SSP defined tokens
+// ALL  gCmosOptimalDefaultTable    default values for all CMOS registers
+// ALL  gCmosNoCheckSumTable        CMOS addresses that are not checksummed
+//
+//----------------------------------------------------------------------------
+//<AMI_GHDR_END>
+
+
+#include <Efi.h>
+#ifdef PEI_COMPILE
+    #include <Pei.h>
+    #include <AmiPeiLib.h>
+#else
+    #include <AmiDxeLib.h>
+#endif
+#include "CmosManager.h"
+#include "CmosManagerHob.h"
+#include <SspData.h>
+
+CONST UINT8   gFirstManagedRegister = FIRST_CMOS_REGISTER;  
+CONST UINT8   gLastManagedRegister = LAST_CMOS_REGISTER;
+
+//<AMI_THDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:   gCmosTokenTable
+//
+// Description: 
+//      This is a table of CMOS tokens derived from macros defined in 
+//      SspData.h, which is generated by AmiSsp2.exe during the build 
+//      process.
+//
+// Notes:
+//      This is an array of type: CMOS_TOKEN
+//
+//---------------------------------------------------------------------------
+//<AMI_THDR_END>
+
+#define USING_SSP_MACROS
+CMOS_TOKEN  gCmosTokenTable[] = {         // to DXE via HOB
+    {0},                                        // Index starts at 1
+    #define CmosTokenTable(name,val) {val},
+#include <SspData.h>
+};
+CONST UINT16 gCmosTokenTableSize = CMOS_TOKEN_COUNT(gCmosTokenTable);
+
+
+//<AMI_THDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:   gCmosOptimalDefaultTable
+//
+// Description: 
+//      This is a table of default (or optimal) CMOS register values derived 
+//      from macros defined in SspData.h, which is generated by AmiSsp2.exe 
+//      during the build process.
+//
+// Notes:
+//      This is an array of type: CMOS_REGISTER
+//
+//---------------------------------------------------------------------------
+//<AMI_THDR_END>
+
+#define USING_SSP_MACROS
+CMOS_REGISTER  gCmosOptimalDefaultTable[] = {   // to DXE via HOB
+{0},                                                // Index starts at 1
+#define NvramOptimalDataTable(val) {val},
+#include <SspData.h>
+};
+CONST UINT16 gCmosOptimalDefaultTableSize = 
+                    CMOS_REGISTER_COUNT(gCmosOptimalDefaultTable);
+ 
+
+//<AMI_THDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:   gCmosNoCheckSumTable
+//
+// Description: 
+//      This is a table of CMOS registers excluded from checksum 
+//      calculations.  This table is derived from macros defined in 
+//      SspData.h, which is generated by AmiSsp2.exe during the build 
+//      process.
+//
+// Notes:
+//      This is an array of type: CMOS_REGISTER
+//
+//---------------------------------------------------------------------------
+//<AMI_THDR_END>
+
+#define USING_SSP_MACROS
+CONST CMOS_REGISTER  gCmosNoCheckSumTable[] = {   // to DXE via HOB
+{0},                                        // Index starts at 1
+#define NonChecksumTable(val) {val},
+#include <SspData.h>
+};
+CONST UINT16 gCmosNoCheckSumTableSize = 
+                    CMOS_REGISTER_COUNT(gCmosNoCheckSumTable);
+
+
+//<AMI_THDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:   gUnmanagedTable
+//
+// Description: 
+//      This is a table of CMOS registers that are allocated, but otherwise
+//      unmanaged.  The purpose is to provide support for locations that
+//      must be written prior to CMOS Manager, and to provide alternative
+//      mechanisms in situations where CMOS Manager's loading of default 
+//      values would cause major implementation problems.
+//
+// Notes:
+//      This is an array of type: CMOS_REGISTER
+//
+//      It is up to the owner of the SSP CMOS Token to determine whether
+//      or not the value of an un-managed location is valid.
+//
+//---------------------------------------------------------------------------
+//<AMI_THDR_END>
+
+#define USING_SSP_MACROS
+CONST CMOS_REGISTER  gUnmanagedTable[] = {   
+{0},                                        // Index starts at 1
+#define UnmanagedTable(val) {val},
+#include <SspData.h>
+};
+CONST UINT16 gUnmanagedTableSize = 
+                    CMOS_REGISTER_COUNT(gUnmanagedTable);
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/CmosTypes.h b/Core/EM/CmosManager/CmosTypes.h
new file mode 100644
index 0000000..78ce340
--- /dev/null
+++ b/Core/EM/CmosManager/CmosTypes.h
@@ -0,0 +1,431 @@
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+
+//**********************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Includes/CmosTypes.h 18    3/05/10 4:55p Michaela $
+//
+// $Revision: 18 $
+//
+// $Date: 3/05/10 4:55p $
+//**********************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Includes/CmosTypes.h $
+// 
+// 18    3/05/10 4:55p Michaela
+// 
+// 17    12/04/09 7:32p Michaela
+// 
+// 16    12/03/09 6:45p Michaela
+// 1. Added/updated typdefs for BSP test and
+//    cold boot test functions.
+//    
+// 2. Added additional Manager Status bits to
+//    support recovery policy configuration
+//    changes.
+// 
+// 15    11/10/09 9:14p Michaela
+// 
+// 14    7/29/09 10:00a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 13    6/15/09 5:11p Michaela
+// 
+// 12    6/02/09 3:28p Michaela
+// For label: 4.6.3_CMOSMGR_11
+// 
+// 11    2/06/09 2:00p Michaela
+// FIRST_CMOS_REGISTER is now generated from AmiSsp2.exe
+// 
+// 10    1/08/09 12:53p Michaela
+//    >force all structure declarations to be byte packed
+//     as they may be used from Assembly code
+// 
+// 9     11/25/08 3:20p Michaela
+// Updates for Label 4.6.3_CMOSMGR_08
+// - Assembly macro fixes
+// - Added assembly macros
+// - Moved loading defaults into DXE phase
+// - Updated help file example
+// 
+// 8     11/17/08 4:39p Michaela
+// --Removed Token Name strings in debug development code
+// 
+// 7     11/17/08 3:55p Michaela
+// --Port- & register-related constants are moved to SDL tokens
+// --CMOS_ACCESS_TYPE typedef is moved to CmosAccess.h for
+//   client module usage
+// --Added DEFINE_PEI_SERVICES macro for declaring &
+//   initializing a local PeiServices variable, as it must be NULL in
+//   DXE and if the PPI is located in firmware
+// 
+// 6     11/14/08 9:20a Michaela
+// **CMOS register variables are changed from UINT8 to UINT16
+// **CMOS_REGISTER typedef changed from struct to union with
+// a Value and Index member.
+// **Added typedef for EFI_CMOS_BOARD_READ_WRITE board-
+//   specific CMOS access function.
+// **Added typedef for CMOS_PORT_MAP, used for invoking 
+//   board-specific access functions.
+// 
+// 5     3/07/08 4:07p Michaela
+// Label 4.6.3_CMOSMGR_05 fixes:
+// -- write errors to Optimal Defaults buffer before memory detection
+// -- CMOS Token table corruption when name strings are disabled
+// 
+// 4     2/29/08 9:35p Michaela
+// - Added recovery path policy
+// - fixed other minor bugs
+// 
+// 3     2/26/08 12:50p Michaela
+// Added/modified Helpbuilder headers
+// 
+// 2     2/22/08 3:20p Olegi
+// Renamed some of the equates to avoid the naming collisions.
+// 
+// 1     2/04/08 6:00p MichaelA
+// Created
+// 
+//**********************************************************************
+
+//<AMI_FHDR_START>
+//---------------------------------------------------------------------------
+//
+// Name:    CmosTypes.h
+//
+// Description: Contains the constants, data types and declarations 
+//              necessary to support the CMOS manager module.
+//
+//---------------------------------------------------------------------------
+//<AMI_FHDR_END>
+
+#ifndef _CMOS_TYPES_H
+#define _CMOS_TYPES_H
+
+#include <Efi.h>
+
+#define ALL_BITS            0xff    // bits to write mask 
+
+
+// For determination of boot mode
+#define MONOTONIC_VARIABLE  L"MonotonicCounter"
+
+#pragma pack(push, 1) // force byte alignment on all structures
+
+typedef enum _CMOS_DEFAULTS_STATUS_TYPE { 
+    UsingDefaults = 0, 
+    NotUsingDefaults = 1, 
+} CMOS_DEFAULTS_STATUS_TYPE;
+
+// Used in read/write functions
+
+typedef enum _CMOS_BIT_ACCESS_TYPE {
+    SetType = 1,
+    ClearType = 0,
+} CMOS_BIT_ACCESS_TYPE;
+
+typedef UINT16 CMOS_CHECKSUM;
+
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name:   CMOS_BYTE
+//
+// Description: 
+//      This structure type is used to define a generic CMOS byte that,
+//      among other things, can be used to define an array of CMOS addresses 
+//      and values to be read or written.
+//
+// Fields: Type    Name                      Description
+// ----------------------------------------------------------------
+// UINT16  Register CMOS register associated with this byte
+// UINT8   Value    Byte value associated with the specified register
+//
+// Notes: 
+//      None
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+typedef struct _CMOS_BYTE
+{
+    UINT16  Register;       // CMOS Register
+    UINT8   Value;          // CMOS Value
+}CMOS_BYTE;
+
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+//  Name:   CMOS_MANAGER_STATUS
+//
+//  Description: 
+//      This enumerated type is used to define a bitmap that represents the
+//      configuration status of the CMOS manager.  If a bit is set then
+//      the condition is TRUE.  If a bit is clear then the condition it
+//      represents is FALSE.
+//
+//  Fields:  _ Bit  Condition 
+//  ----------------------------------------------------------------
+//  _ CMOS_VALID_MANAGER                The manager is initialized
+//  _ CMOS_INTERFACE_ALREADY_INSTALLED  The access interface has already been installed
+//  _ CMOS_INSTALL_FAILED               The installation of the access interface failed
+//  _ CMOS_VALID_INTERFACE              The access interface is valid, but not necessarily installed
+//  _ CMOS_FIRST_BOOT_DETECTED          Indicates first boot (after progamming the boot device) is detected  
+//  _ CMOS_EXECUTING_IN_MEMORY          The CMOS manager is executing in permanent memory
+//  _ CMOS_BAD_CHECKSUM                 The most recently computed checksum does not equal the saved checksum
+//  _ CMOS_ADDRESS_IS_CHECKSUMMED       The most recently accessed address is included in the checksum
+//  _ CMOS_ERROR_LOADING_DEFAULTS       CMOS could not be updated from the default optimal data table
+//  _ CMOS_FORCE_NO_CHECKSUM            Checksum updating is disabled
+//  _ CMOS_LEGACY_STATUS_ENABLED        Update legacy status registers in CMOS
+//  _ CMOS_BAD_BATTERY                  Bad battery has been detected
+//  _ CMOS_OPTIMAL_DEFAULTS_ENABLED     Optimal Defaults buffer is in use
+//  _ CMOS_DEFAULTS_LOADED              Optimal Defaults buffer has been written to CMOS
+//  _ CMOS_RECOVER_ONLY_CHECKSUMMED     Use Optimal Defaults buffer only for checksummed locations upon incoherency detection
+//  _ CMOS_COLD_BOOT_DETECTED           Cold boot was detected
+//  _ CMOS_BSP_IS_EXECUTING             BSP is executing
+//  _ CMOS_RECOVER_IN_PEI               PEI incoherency recovery (bad checksum & good battery)
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+typedef enum _CMOS_MANAGER_STATUS {    
+    CMOS_VALID_MANAGER                  = BIT0,  // manager is initialized
+    CMOS_INTERFACE_ALREADY_INSTALLED    = BIT1,  // duplicate interface found
+    CMOS_INSTALL_FAILED                 = BIT2,  // 
+    CMOS_VALID_INTERFACE                = BIT3,  // not necessarily installed
+    CMOS_FIRST_BOOT_DETECTED            = BIT4,  
+    CMOS_EXECUTING_IN_MEMORY            = BIT6,  
+    CMOS_BAD_CHECKSUM                   = BIT7,
+    CMOS_ADDRESS_IS_CHECKSUMMED         = BIT8,
+    CMOS_ERROR_LOADING_DEFAULTS         = BIT9, 
+    CMOS_FORCE_NO_CHECKSUM              = BIT10, // internal flag
+    CMOS_BAD_BATTERY                    = BIT12,
+    CMOS_OPTIMAL_DEFAULTS_ENABLED       = BIT13, // recovery enabled
+    CMOS_DEFAULTS_LOADED                = BIT14,
+    CMOS_RECOVER_ONLY_CHECKSUMMED       = BIT15, // limit recovery scope
+    CMOS_COLD_BOOT_DETECTED             = BIT16, // Cold boot was detected
+    CMOS_BSP_IS_EXECUTING               = BIT17, // BSP is executing
+    CMOS_RECOVER_IN_PEI                 = BIT18, // PEI incoherency recovery
+    CMOS_IS_USABLE                      = BIT19, // CMOS can be used 
+                                                 // (battery may be bad)
+} CMOS_MANAGER_STATUS;
+
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+//  Name:   CMOS_CONFIGURATION_SETTING
+//
+//  Description: 
+//      This enumerated type is used to define a bitmap that represents the
+//      requested configuration settings for the CMOS manager.  If a bit is 
+//      set then the associated feature or setting is requested.
+//
+//  Fields:  _ Bit  Requests 
+//  ----------------------------------------------------------------
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+typedef enum _CMOS_CONFIGURATION_SETTING {       
+    CMOS_OPTIMAL_DEFAULTS_ON            = BIT2,  // enable buffer usage
+    CMOS_OPTIMAL_DEFAULTS_OFF           = BIT3,  // disable buffer usage
+} CMOS_CONFIGURATION_SETTING;
+
+
+// These are the PPI that may or may not be installed, depending on
+// configuration settings
+typedef enum _CMOS_PPI_TYPE {    
+    CMOS_DATA_HOB_INSTALLED_PPI_TYPE        = 0, // HOB is installed
+    CMOS_ACCESS_PPI_TYPE                    = 1, // Access interface
+    CMOS_CREATE_HOB_NOTIFY_PPI_TYPE         = 2, // In-memory callback
+} CMOS_PPI_TYPE;
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+// Name:   CMOS_TOKEN
+//
+// Description: 
+//      This structure type is used to define CMOS tokens, which are encoded  
+//      values that define the usage of bits at a particular physical CMOS 
+//      location.
+//
+// Fields: Type    Name                      Description
+// ----------------------------------------------------------------
+// UINT64  Name      A constant string pointer providing the name associated with the token (available only in debug mode)
+// union   Value     Provides access to the encoded information in the token (see Notes below)
+//
+// Notes: 
+// The Value union provides access to all the bits of the token or to
+// a specific token data field:
+//
+// Value.AllBits            All bits of the encoded token data
+// Value.Field              Provides access to a specific token field
+// Value.Field.BitOffset    Offset within the CMOS byte
+// Value.Field.CmosAddress  The actual CMOS location
+// Value.Field.Size         The number of bits consumed by the token
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+typedef struct _CMOS_TOKEN
+{
+    union _Value 
+    {
+        UINT16  AllBits;
+        struct _Field {
+            UINT16  BitOffset   :3;  // [2:0] Bit offset (in the CMOS byte)
+            UINT16  CmosAddress :9;  // [11:3] CMOS register address (0-511)
+            UINT16  Size        :4;  // [15:12] Size (in bits)
+        } Field;
+    } Value;
+}CMOS_TOKEN;
+
+// Gets number of elements in an array of type CMOS_TOKEN
+#define CMOS_TOKEN_COUNT(Buffer) ( sizeof(Buffer) / sizeof(CMOS_TOKEN) )
+
+
+//<AMI_SHDR_START>
+//----------------------------------------------------------------------------
+//  Name:   CMOS_REGISTER
+//
+//  Description: 
+//      This union type is used to define un-encoded register 
+//      values/numbers.  
+//
+//  Fields:  Type  Name Description
+//  ----------------------------------------------------------------
+//  UINT16  Value  The un-encoded value of a register
+//  UINT8   Index  The un-encoded register address
+//
+//----------------------------------------------------------------------------
+//<AMI_SHDR_END>
+
+typedef union _CMOS_REGISTER 
+{
+    UINT8  Value;
+    UINT16 Index;
+}CMOS_REGISTER;
+
+// Gets number of elements in an array of type CMOS_REGISTER
+#define CMOS_REGISTER_COUNT(Buffer) ( sizeof(Buffer) / sizeof(CMOS_REGISTER) )
+
+typedef EFI_STATUS (*EFI_CMOS_BOARD_READ_WRITE) (
+    IN  EFI_PEI_SERVICES      **PeiServices,  // NULL in DXE phase
+    IN  CMOS_ACCESS_TYPE      AccessType,
+    IN  UINT16                CmosRegister,
+    IN  UINT8                 *CmosParameterValue
+);
+
+typedef struct _CMOS_PORT_MAP 
+{
+  UINT16                      Index;            // Index port
+  UINT16                      Data;             // Data Port
+  UINT16                      Low;              // First address in this range
+  UINT16                      High;             // Last address in this range
+  EFI_CMOS_BOARD_READ_WRITE   BoardReadWrite;
+  
+} CMOS_PORT_MAP;
+
+typedef BOOLEAN (*EFI_CMOS_BATTERY_TEST) (
+    IN  EFI_PEI_SERVICES      **PeiServices );
+
+typedef BOOLEAN (*EFI_CMOS_IS_FIRST_BOOT) (
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+typedef BOOLEAN (*EFI_CMOS_IS_BSP) (
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+typedef BOOLEAN (*EFI_CMOS_IS_COLD_BOOT) (
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+typedef BOOLEAN (*EFI_CMOS_IS_CMOS_USABLE) (
+    IN  EFI_PEI_SERVICES        **PeiServices );
+
+#pragma pack(pop)
+
+//----------------------------------------------------------------------------
+// Macros
+//----------------------------------------------------------------------------
+
+// The DEFINE_PEI_SERVICES macro is used to define a local PEI_SERVICES 
+// pointer used for PEI phase only.  In DXE phase a NULL pointer is defined
+// to provide generic ability to call the PEI/BOOT Services wrapper functions.
+// (See CmosManagerAllocatePool() for a usage example.)
+
+#if ( defined(PEI_COMPILE))
+  #define DEFINE_PEI_SERVICES(arg) \
+    EFI_PEI_SERVICES  **PeiServices = (arg); 
+#else
+  #define DEFINE_PEI_SERVICES(arg) \
+    EFI_PEI_SERVICES  **PeiServices = NULL;
+#endif
+
+
+// If PEI mode source
+#if ( defined(PEI_TRACE) )
+  //------------------------------------------------------------------------
+  // Generate a compiler message to help identify the build error if 
+  // PeiServices is not defined in the calling function.
+  //------------------------------------------------------------------------
+  #pragma message("MESSAGE> AMI_TRACE requires identifier definition: \
+    EFI_PEI_SERVICES **PeiServices")
+  #define CMOS_TRACE(args) if (PeiServices != NULL) { PEI_TRACE(args); }
+  #define CMOS_TRACE_ALWAYS TRACE_ALWAYS,PeiServices
+  
+    // CMOS manager-specific
+    #if (FULL_CMOS_MANAGER_DEBUG)
+       #define CMOS_TRACE_FULL(args) \
+         if (PeiServices != NULL) { PEI_TRACE(args); }
+    #else
+       #define CMOS_TRACE_FULL(args)
+    #endif 
+  
+// If DXE mode source
+#elif ( defined(TRACE) )
+    
+  #define CMOS_TRACE(args) TRACE(args)
+  #define CMOS_TRACE_ALWAYS TRACE_ALWAYS
+
+    // CMOS manager-specific
+    #if (FULL_CMOS_MANAGER_DEBUG)
+       #define CMOS_TRACE_FULL(args) TRACE(args)
+    #else
+       #define CMOS_TRACE_FULL(args)
+    #endif 
+    
+#else
+  #define CMOS_TRACE(args)
+  #define CMOS_TRACE_ALWAYS
+  #define CMOS_TRACE_FULL(args)
+  
+#endif
+
+
+#endif  // #ifndef _CMOS_TYPES_H
+
+
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
diff --git a/Core/EM/CmosManager/Template.ssp b/Core/EM/CmosManager/Template.ssp
new file mode 100644
index 0000000..ada4980
--- /dev/null
+++ b/Core/EM/CmosManager/Template.ssp
@@ -0,0 +1,259 @@
+//
+//	TITLE	TEMPLATE.SSP -- SETUP UTILITY CORE TEMPLATE
+//
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************
+// $Header: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Build/Template.ssp 6     6/15/10 2:26p Michaela $
+//
+// $Revision: 6 $
+//
+// $Date: 6/15/10 2:26p $
+//***************************************************************************
+// Revision History
+// ----------------
+// $Log: /Alaska/SOURCE/Modules/CMOS Manager/CMOS Core/CMOS Build/Template.ssp $
+// 
+// 6     6/15/10 2:26p Michaela
+// 
+// 5     9/17/09 10:04a Michaela
+// TokenInclude must be empty string for Aptio projects
+// 
+// 4     7/29/09 10:01a Michaela
+// updates Aptio Enhancement EIP 22205
+// (no code changes)
+// 
+// 3     6/15/09 5:12p Michaela
+// 
+// 2     2/06/09 1:58p Michaela
+// updated to set first managed register location
+// 
+// 1     2/22/08 2:29p Michaela
+//
+// 1     2/04/08 6:00p MichaelA $
+// Added to CmosManager Module from Core8 Implementation
+// -- Removed: Setup Engine Template Language Elements
+// -- Modified: EquInclude and TokenInclude
+//
+//
+//***************************************************************************
+// Previous History:
+//***************************************************************************
+// 1     4/23/03 2:37p Anandj
+// Moved from BSP\SETUP
+// 
+// 2     10/11/01 3:59p Juand
+// Added a word to store the offset of the beginning of the file
+// SETUPDB.ASM after the $MPT signarute for AMIBCP.  This word was deleted
+// accidentally.
+//
+// 7     9/05/01 2:40p Kevinm
+// Removed Q_DISPLAY_TYPE.  This question is not currently supported by
+// the BIOS.
+//
+// 6     8/24/01 3:56p Kevinm
+// Removed Unattended Start functionality.
+//
+// 5     7/17/01 4:51p Kevinm
+//
+// 4     6/12/01 2:37p Chrism
+// Comment out Boot_Speed setup question.  Has no purpose anymore.
+//
+// 3     6/04/01 3:17p Kevinm
+// Modified for BBS 3.1.
+//
+// 2     5/30/01 3:40p Radhikas
+//
+// 1     5/25/01 2:15p Anandj
+// First check in for CORE data base
+//
+// 5     5/16/01 10:37a Davidd
+// Roll back to previous version.
+//
+// 3     5/03/01 1:40p Juand
+// Removed EquInclude "build\\makeflag.equ".  MAKEFLAG.EQU is already
+// included in CORE.SSP.  This was causing the BIOS not to build in some
+// systems.
+//
+// 2     4/09/01 4:01p Juand
+// Changed to new style headers.
+// Moved CPU related setup questions to CPU.SSP
+//
+// 9     8/31/00 4:37p Olegi
+// Q_QUICK_BOOT moved out of MKF_SILENT_BOOT condition
+//
+// 8     8/31/00 11:39a Olegi
+// SIO related group is included only with LEGACY_FREE off.
+//
+// 7     8/25/00 10:26a Olegi
+// Q_EXTERNAL_CACHE has been added
+//
+// 6     8/24/00 6:58p Olegi
+// Q_INITIAL_DISPLAY made dependent on MKF_SILENT_BOOT
+//
+// 5     8/21/00 3:53p Olegi
+// equates.equ is included
+//
+// 2     6/02/00 5:34p Olegi
+// USB related questions appear only if USB_SUPPORT is on,
+// Silent Boot related questions appear only if SILENT_BOOT is on.
+//
+// 3     2/24/00 12:08p Juand
+// BBS related changes.
+//
+// 2     12/01/99 11:26a Debkumar
+// Incorporated changes for BBS (from the BBS development done for other
+// major OEMs). Files changed are CF.ASM, RM.ASM, UI.ASM, INT19.ASM,
+// GS1.ASM, HI.ASM, HD.ASM, INT13ISR.ASM, BOOTEXT.ASM, JMP.ASM, DIM.ASM,
+// BUS.ASM, DIM.DAT, DIM.EQU, BIOSDATA.DAT, CORE.SSP, CORE.ASD,
+// TEMPLATE.SSP, TEMPLATE.ASD. The new files are BBS.DAT, IPLDT.INC.
+// Known Limitations: 1) BOOTEXT.ASM should be made generic to reorganize
+// the available boot options in setup. 2) Runtime BBS functions.
+//
+//***************************************************************************
+
+EquInclude "Build\\Token.equ"
+TokenInclude ""
+
+//---------------------------------------------------------------------------
+// General Language Elements
+//---------------------------------------------------------------------------
+
+Description = "Setup Engine Template Definitions"
+LanguageVersion = 2
+
+
+// Largest supported address is 0xFF, which is 0x100 locations
+NvramSize = MKF_MAX_MANAGED_CMOS_ADDRESS
+
+// First register that CMOS Manager will manage
+// (If not specified, the FirstRegister default value is 0x10)
+FirstRegister = MKF_FIRST_MANAGED_CMOS_ADDRESS
+
+//---------------------------------------------------------------------------
+// Setup Engine Template Language Elements
+//---------------------------------------------------------------------------
+
+
+//---------------------------------------------------------------------------
+// Control Database Language Elements
+//---------------------------------------------------------------------------
+
+// FIRST LEVEL (will contain only menuitems)
+ControlGroup (G_ROOT)
+	// EMPTY (Controls Filled in by respective SSP files in fixed order)
+EndControlGroup
+
+
+//---------------------------------------------------------------------------
+// Control Database Language Elements
+//---------------------------------------------------------------------------
+
+
+
+//---------------------------------------------------------------------------
+// Other Sections
+//---------------------------------------------------------------------------
+
+StartSourceCode ("SETUPDB.ASM")
+" "
+"	TITLE	SETUPDB.ASM -- Setup Database"
+" "
+";----------------------------------------------------------------------------"
+";	INCLUDE FILES"
+";----------------------------------------------------------------------------"
+" "
+"	INCLUDE SETUPEXT.INC"
+"	INCLUDE TOKENEQU.EQU"
+" "
+";----------------------------------------------------------------------------"
+";	SETSVR_CSEG  S E G M E N T  STARTS"
+";----------------------------------------------------------------------------"
+"SETSVR_CSEG SEGMENT PARA PUBLIC 'CODE'"
+"	ASSUME	CS:SETSVR_CSEG"
+";----------------------------------------------------------------------------"
+"	PUBLIC  _SETUPDB_SETSVR_CSEG_STARTS"
+"_SETUPDB_SETSVR_CSEG_STARTS LABEL BYTE"
+";----------------------------------------------------------------------------"
+" "
+"	BYTE '$MPT'			; Signature for the Setup Master"
+"					; Pointer Table"
+"	dw offset _SETUPDB_SETSVR_CSEG_STARTS	;Refernce point."
+" "
+";----------------------------------------------------------------------------"
+" "
+EndSourceCode
+
+StartSourceCode ("TOKENEQU.ASM")
+" "
+"	TITLE	TOKENEQU.ASM -- NVRAM TOKEN VALUES"
+" "
+";----------------------------------------------------------------------------"
+" "
+"	PUBLIC	STR_RESERVED"
+"STR_RESERVED	EQU	0FFFFh"
+" "
+";----------------------------------------------------------------------------"
+";	RUN_CSEG  S E G M E N T  STARTS"
+";----------------------------------------------------------------------------"
+"RUN_CSEG SEGMENT PARA PUBLIC 'CODE'"
+"	ASSUME	CS:RUN_CSEG"
+";----------------------------------------------------------------------------"
+"	PUBLIC  _TOKENEQU_RUN_CSEG_STARTS"
+"_TOKENEQU_RUN_CSEG_STARTS LABEL BYTE"
+";----------------------------------------------------------------------------"
+" "
+EndSourceCode
+
+
+//---------------------------------------------------------------------------
+// Internal CMOS Manager non-volatile status
+//
+//---------------------------------------------------------------------------
+
+NvramField ( CMOS_MGR_BATTERY_BAD )
+	OptionBits  = 1
+	Managed     = NO
+EndNvramField
+
+NvramField ( CMOS_MGR_CHECKSUM_BAD )
+	OptionBits  = 1
+	Managed     = NO
+EndNvramField
+
+NvramField ( CMOS_MGR_DEFAULTS_LOADED )
+	OptionBits  = 1
+	Managed     = NO
+EndNvramField
+
+NvramField ( CMOS_MGR_FIRST_BOOT_DETECTED )
+	OptionBits  = 1
+	Managed     = NO
+EndNvramField
+
+
+
+//---------------------------------------------------------------------------
+//*************************************************************************
+//*************************************************************************
+//**                                                                     **
+//**        (C)Copyright 1985-2009, American Megatrends, Inc.            **
+//**                                                                     **
+//**                       All Rights Reserved.                          **
+//**                                                                     **
+//**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+//**                                                                     **
+//**                       Phone: (770)-246-8600                         **
+//**                                                                     **
+//*************************************************************************
+//*************************************************************************