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author | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
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committer | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
commit | b7c51c9cf4864df6aabb99a1ae843becd577237c (patch) | |
tree | eebe9b0d0ca03062955223097e57da84dd618b9a /EDK/Foundation/Framework/Include/EfiPciCfg.h | |
download | zprj-master.tar.xz |
Diffstat (limited to 'EDK/Foundation/Framework/Include/EfiPciCfg.h')
-rw-r--r-- | EDK/Foundation/Framework/Include/EfiPciCfg.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/EDK/Foundation/Framework/Include/EfiPciCfg.h b/EDK/Foundation/Framework/Include/EfiPciCfg.h new file mode 100644 index 0000000..f65b163 --- /dev/null +++ b/EDK/Foundation/Framework/Include/EfiPciCfg.h @@ -0,0 +1,81 @@ +/*++ + +Copyright (c) 2007 - 2009, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + EfiPciCfg.h + +Abstract: + + Abstract the common fields of PciCfg definition between Framework 0.9x + and PI 1.0. + +--*/ + +#ifndef _EFI_PCI_CFG_H_ +#define _EFI_PCI_CFG_H_ + +// +// Framework specification 0.9x definition. +// +typedef enum { + PeiPciCfgWidthUint8 = 0, + PeiPciCfgWidthUint16 = 1, + PeiPciCfgWidthUint32 = 2, + PeiPciCfgWidthUint64 = 3, + PeiPciCfgWidthMaximum +} PEI_PCI_CFG_PPI_WIDTH; + +#define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \ + (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \ + ) & 0x00000000ffffffff + +// +// PI 1.0 definition. +// +typedef enum { + EfiPeiPciCfgWidthUint8 = 0, + EfiPeiPciCfgWidthUint16 = 1, + EfiPeiPciCfgWidthUint32 = 2, + EfiPeiPciCfgWidthUint64 = 3, + EfiPeiPciCfgWidthMaximum +} EFI_PEI_PCI_CFG_PPI_WIDTH; + +#define EFI_PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) \ + (UINT64) ((((UINTN) (bus)) << 24) | \ + (((UINTN) (dev)) << 16) | \ + (((UINTN) (func)) << 8) | \ + ((reg) < 256 ? ((UINTN) (reg)): ((UINT64) (reg) << 32))) + +#if (PI_SPECIFICATION_VERSION < 0x00010000) + +typedef struct { + UINT8 Register; + UINT8 Function; + UINT8 Device; + UINT8 Bus; + UINT8 Reserved[4]; +} PEI_PCI_CFG_PPI_PCI_ADDRESS; + +typedef PEI_PCI_CFG_PPI_PCI_ADDRESS EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS; + +#else + +typedef struct { + UINT8 Register; + UINT8 Function; + UINT8 Device; + UINT8 Bus; + UINT32 ExtendedRegister; +} EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS; +#endif + +#endif |