diff options
| author | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
|---|---|---|
| committer | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
| commit | b7c51c9cf4864df6aabb99a1ae843becd577237c (patch) | |
| tree | eebe9b0d0ca03062955223097e57da84dd618b9a /EDK/Foundation/Library/EdkIIGlueLib/Include | |
| download | zprj-master.tar.xz | |
Diffstat (limited to 'EDK/Foundation/Library/EdkIIGlueLib/Include')
58 files changed, 20182 insertions, 0 deletions
diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/AutoGen.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/AutoGen.h new file mode 100644 index 0000000..626ffed --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/AutoGen.h @@ -0,0 +1,37 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + AutoGen.h + +Abstract: + + This file is used by .dxe file. To write common .dxs for R8.x and R9, a + header file named AutoGen.h musted be present. Here the AutoGen.h isn't + auto-generated by any tool. + +--*/ + +#ifndef __EDKII_GLUELIB_AUTOGEN_H__ +#define __EDKII_GLUELIB_AUTOGEN_H__ + + +// +// Users can use this macro in .dxs file +// +#ifndef BUILD_WITH_GLUELIB + #define BUILD_WITH_GLUELIB +#endif + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueBaseTypes.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueBaseTypes.h new file mode 100644 index 0000000..81180e9 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueBaseTypes.h @@ -0,0 +1,90 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueBaseTypes.h + +Abstract: + + Defines additional data types for use by Base modules + +--*/ + +#ifndef __EDKII_GLUE_BASE_TYPES_H__ +#define __EDKII_GLUE_BASE_TYPES_H__ + +#include "..\EdkIIGlueConfig.h" + +#define BREAKPOINT EFI_BREAKPOINT +#define DEADLOOP EFI_DEADLOOP + +#define MAX_BIT EFI_MAX_BIT +#define MAX_ADDRESS EFI_MAX_ADDRESS + +#ifndef UINT8_MAX + #define UINT8_MAX 0xff +#endif + +// +// EFI Error Codes common to all execution phases +// + +typedef INTN RETURN_STATUS; + +/// +/// Set the upper bit to indicate EFI Error. +/// +#define ENCODE_ERROR(a) (MAX_BIT | (a)) + +#define ENCODE_WARNING(a) (a) +#define RETURN_ERROR(a) ((a) < 0) + +#define RETURN_SUCCESS 0 +#define RETURN_LOAD_ERROR ENCODE_ERROR (1) +#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2) +#define RETURN_UNSUPPORTED ENCODE_ERROR (3) +#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4) +#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5) +#define RETURN_NOT_READY ENCODE_ERROR (6) +#define RETURN_DEVICE_ERROR ENCODE_ERROR (7) +#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8) +#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9) +#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10) +#define RETURN_VOLUME_FULL ENCODE_ERROR (11) +#define RETURN_NO_MEDIA ENCODE_ERROR (12) +#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13) +#define RETURN_NOT_FOUND ENCODE_ERROR (14) +#define RETURN_ACCESS_DENIED ENCODE_ERROR (15) +#define RETURN_NO_RESPONSE ENCODE_ERROR (16) +#define RETURN_NO_MAPPING ENCODE_ERROR (17) +#define RETURN_TIMEOUT ENCODE_ERROR (18) +#define RETURN_NOT_STARTED ENCODE_ERROR (19) +#define RETURN_ALREADY_STARTED ENCODE_ERROR (20) +#define RETURN_ABORTED ENCODE_ERROR (21) +#define RETURN_ICMP_ERROR ENCODE_ERROR (22) +#define RETURN_TFTP_ERROR ENCODE_ERROR (23) +#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24) +#define RETURN_INCOMPATIBLE_VERSION ENCODE_ERROR (25) +#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26) +#define RETURN_CRC_ERROR ENCODE_ERROR (27) +#define RETURN_END_OF_MEDIA ENCODE_ERROR (28) +#define RETURN_END_OF_FILE ENCODE_ERROR (31) + +#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1) +#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2) +#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3) +#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4) + +typedef UINT64 PHYSICAL_ADDRESS; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesBase.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesBase.h new file mode 100644 index 0000000..aafcdd2 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesBase.h @@ -0,0 +1,118 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDefinitionChangesBase.h + +Abstract: + + Data structure definition changes from EDK to EDKII + +--*/ + +#ifndef __EDKII_GLUE_DEFINITION_CHANGES_BASE_H__ +#define __EDKII_GLUE_DEFINITION_CHANGES_BASE_H__ + +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include "TianoHii.h" +#else +#include "EfiInternalFormRepresentation.h" +#endif +#include "EfiPxe.h" + + +// ---------------------------------------------------------------------------------- +// Data Hub Record GUID Name changes +// ---------------------------------------------------------------------------------- +#define gEfiProcessorSubClassGuid gProcessorSubClassName +#define gEfiCacheSubClassGuid gCacheSubClassName +#define gEfiMiscSubClassGuid gMiscSubClassName +#define gEfiProcessorProducerGuid gProcessorProducerGuid +#define gEfiMemoryProducerGuid gMemoryProducerGuid +#define gEfiMiscProducerGuid gMiscProducerGuid + + +// ---------------------------------------------------------------------------------- +// Hob.h: Get the data and data size field of GUID +// ---------------------------------------------------------------------------------- +#define GET_GUID_HOB_DATA(GuidHob) ((VOID *) (((UINT8 *) &((GuidHob)->Name)) + sizeof (EFI_GUID))) +#define GET_GUID_HOB_DATA_SIZE(GuidHob) (((GuidHob)->Header).HobLength - sizeof (EFI_HOB_GUID_TYPE)) + +// ---------------------------------------------------------------------------------- +// InternalFormRepresentation.h: +// ---------------------------------------------------------------------------------- +#if (EFI_SPECIFICATION_VERSION < 0x0002000A) +typedef struct { + EFI_IFR_OP_HEADER Header; + UINT16 QuestionId; // The ID designating what the question is about...sucked in from a #define, likely in the form of a variable name + UINT8 Width; // The Size of the Data being saved + STRING_REF Prompt; // The String Token for the Prompt + STRING_REF Help; // The string Token for the context-help + UINT8 Flags; // For now, if non-zero, means that it is the default option, - further definition likely + UINT16 Key; // Value to be passed to caller to identify this particular op-code +} EFI_IFR_CHECKBOX; + +typedef struct { + EFI_IFR_OP_HEADER Header; + UINT8 Flags; +} EFI_IFR_GRAY_OUT; + +typedef struct { + EFI_IFR_OP_HEADER Header; +} EFI_IFR_END_EXPR; +#endif + +// ------------------------ +// define GUID as EFI_GUID +// ------------------------ +typedef EFI_GUID GUID; + + +// ------------------- +// EdkII Names - Edk Names +// ------------------- +#define EFI_GLOBAL_VARIABLE EFI_GLOBAL_VARIABLE_GUID +#define MPS_TABLE_GUID EFI_MPS_TABLE_GUID +#define SAL_SYSTEM_TABLE_GUID EFI_SAL_SYSTEM_TABLE_GUID +#define SMBIOS_TABLE_GUID EFI_SMBIOS_TABLE_GUID +#define EFI_OPTIONAL_PTR EFI_OPTIONAL_POINTER +#define PXE_FRAME_TYPE_FILTERED_MULTICAST PXE_FRAME_TYPE_MULTICAST +#define IMAGE_FILE_MACHINE_I386 EFI_IMAGE_MACHINE_IA32 +#define IMAGE_FILE_MACHINE_IA64 EFI_IMAGE_MACHINE_IA64 +#define IMAGE_FILE_MACHINE_EBC EFI_IMAGE_MACHINE_EBC +#define IMAGE_FILE_MACHINE_X64 EFI_IMAGE_MACHINE_X64 +#define EVENT_TIMER EFI_EVENT_TIMER +#define EVENT_RUNTIME EFI_EVENT_RUNTIME +#define EVENT_RUNTIME_CONTEXT EFI_EVENT_RUNTIME_CONTEXT +#define EVENT_NOTIFY_WAIT EFI_EVENT_NOTIFY_WAIT +#define EVENT_NOTIFY_SIGNAL EFI_EVENT_NOTIFY_SIGNAL +#define EVENT_SIGNAL_EXIT_BOOT_SERVICES EFI_EVENT_SIGNAL_EXIT_BOOT_SERVICES +#define EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE EFI_EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE +#define TPL_APPLICATION EFI_TPL_APPLICATION +#define TPL_CALLBACK EFI_TPL_CALLBACK +#define TPL_NOTIFY EFI_TPL_NOTIFY +#define TPL_HIGH_LEVEL EFI_TPL_HIGH_LEVEL + +// +// Typos in R8.x +// +#define gEfiHobMemoryAllocModuleGuid gEfiHobMemeryAllocModuleGuid +#define gEfiHobMemoryAllocStackGuid gEfiHobMemeryAllocStackGuid +#define gEfiHobMemoryAllocBspStoreGuid gEfiHobMemeryAllocBspStoreGuid + +// +// typedef Edk types - EdkII types +// +typedef PXE_CPB_START PXE_CPB_START_30; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesDxe.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesDxe.h new file mode 100644 index 0000000..dcedbe5 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesDxe.h @@ -0,0 +1,95 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDefinitionChangesDxe.h + +Abstract: + + Data structure definition changes from EDK to EDKII + +--*/ + +#ifndef __EDKII_GLUE_DEFINITION_CHANGES_DXE_H__ +#define __EDKII_GLUE_DEFINITION_CHANGES_DXE_H__ + +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include "TianoHii.h" +#else +#include "EfiInternalFormRepresentation.h" +#endif + +#include "EdkIIGlueDefinitionChangesBase.h" + +#if (TIANO_RELEASE_VERSION <= 0x00080005) + #define gEfiStatusCodeRuntimeProtocolGuid gEfiStatusCodeArchProtocolGuid +#endif + +// +// typedef Edk types - EdkII types +// +typedef EFI_MEMORY_ARRAY_START_ADDRESS EFI_MEMORY_ARRAY_START_ADDRESS_DATA; +typedef EFI_MEMORY_DEVICE_START_ADDRESS EFI_MEMORY_DEVICE_START_ADDRESS_DATA; +typedef EFI_MISC_LAST_PCI_BUS EFI_MISC_LAST_PCI_BUS_DATA; +typedef EFI_MISC_BIOS_VENDOR EFI_MISC_BIOS_VENDOR_DATA; +typedef EFI_MISC_SYSTEM_MANUFACTURER EFI_MISC_SYSTEM_MANUFACTURER_DATA; +typedef EFI_MISC_BASE_BOARD_MANUFACTURER EFI_MISC_BASE_BOARD_MANUFACTURER_DATA; +typedef EFI_MISC_CHASSIS_MANUFACTURER EFI_MISC_CHASSIS_MANUFACTURER_DATA; +typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA; +typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA; +typedef EFI_MISC_ONBOARD_DEVICE EFI_MISC_ONBOARD_DEVICE_DATA; +typedef EFI_MISC_ONBOARD_DEVICE_TYPE_DATA EFI_MISC_PORTING_DEVICE_TYPE_DATA; +typedef EFI_MISC_OEM_STRING EFI_MISC_OEM_STRING_DATA; +typedef EFI_MISC_SYSTEM_OPTION_STRING EFI_MISC_SYSTEM_OPTION_STRING_DATA; +typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA; +typedef EFI_MISC_SYSTEM_LANGUAGE_STRING EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA; +typedef EFI_MISC_BIS_ENTRY_POINT EFI_MISC_BIS_ENTRY_POINT_DATA; +typedef EFI_MISC_BOOT_INFORMATION_STATUS EFI_MISC_BOOT_INFORMATION_STATUS_DATA; +typedef EFI_MISC_SYSTEM_POWER_SUPPLY EFI_MISC_SYSTEM_POWER_SUPPLY_DATA ; +typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA; + +// ------------------- +// EdkII Names - Edk Names +// ------------------- +#define gEfiAcpiSupportProtocolGuid gEfiAcpiSupportGuid +#define gEfiLoadPeImageProtocolGuid gEfiLoadPeImageGuid +#if (EFI_SPECIFICATION_VERSION < 0x0002000A) +#define EFI_GLYPH_NON_SPACING GLYPH_NON_SPACING +#define EFI_GLYPH_WIDE GLYPH_NON_BREAKING +#endif +#define BOOT_OBJECT_AUTHORIZATION_PARMSET_GUID BOOT_OBJECT_AUTHORIZATION_PARMSET_GUIDVALUE +#define EFI_EBC_PROTOCOL_GUID EFI_EBC_INTERPRETER_PROTOCOL_GUID +#define EFI_FILE_SYSTEM_VOLUME_LABEL_ID EFI_FILE_SYSTEM_VOLUME_LABEL_INFO_ID_GUID +#define EFI_LOADED_IMAGE_PROTOCOL_REVISION EFI_LOADED_IMAGE_INFORMATION_REVISION +#define EFI_LOAD_FILE_PROTOCOL_GUID LOAD_FILE_PROTOCOL_GUID +#define EFI_PXE_BASE_CODE_PROTOCOL_REVISION EFI_PXE_BASE_CODE_INTERFACE_REVISION +#define EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL_REVISION EFI_PXE_BASE_CODE_CALLBACK_INTERFACE_REVISION +#define EFI_SERIAL_IO_PROTOCOL_REVISION SERIAL_IO_INTERFACE_REVISION +#define EFI_FILE_PROTOCOL_REVISION EFI_FILE_HANDLE_REVISION +#define EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID EFI_SIMPLE_TEXT_IN_PROTOCOL_GUID + + +// +// typedef Edk types - EdkII types +// +typedef EFI_VOLUME_OPEN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME; +typedef EFI_TEXT_OUTPUT_STRING EFI_TEXT_STRING; +#if (EFI_SPECIFICATION_VERSION < 0x0002000A) +typedef SCREEN_DESCRIPTOR EFI_SCREEN_DESCRIPTOR; +#endif +typedef EFI_SIMPLE_TEXT_IN_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL; +typedef EFI_SIMPLE_TEXT_OUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL; +//typedef EFI_TO_LEGACY16_INIT_TABLE EFI_TO_COMPATIBILITY16_INIT_TABLE; +//typedef DISPATCH_OPROM_TABLE EFI_DISPATCH_OPROM_TABLE; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesPeim.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesPeim.h new file mode 100644 index 0000000..373c9b4 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDefinitionChangesPeim.h @@ -0,0 +1,165 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDefinitionChangesPeim.h + +Abstract: + + Data structure definition changes from EDK to EDKII + +--*/ + +#ifndef __EDKII_GLUE_DEFINITION_CHANGES_PEIM_H__ +#define __EDKII_GLUE_DEFINITION_CHANGES_PEIM_H__ + +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include "TianoHii.h" +#else +#include "EfiInternalFormRepresentation.h" +#endif + +#include "EdkIIGlueDefinitionChangesBase.h" + +#include "EfiPciCfg.h" + +// +// typedef Edk types - EdkII types +// +typedef EFI_MEMORY_ARRAY_START_ADDRESS EFI_MEMORY_ARRAY_START_ADDRESS_DATA; +typedef EFI_MEMORY_DEVICE_START_ADDRESS EFI_MEMORY_DEVICE_START_ADDRESS_DATA; +typedef EFI_MISC_LAST_PCI_BUS EFI_MISC_LAST_PCI_BUS_DATA; +typedef EFI_MISC_BIOS_VENDOR EFI_MISC_BIOS_VENDOR_DATA; +typedef EFI_MISC_SYSTEM_MANUFACTURER EFI_MISC_SYSTEM_MANUFACTURER_DATA; +typedef EFI_MISC_BASE_BOARD_MANUFACTURER EFI_MISC_BASE_BOARD_MANUFACTURER_DATA; +typedef EFI_MISC_CHASSIS_MANUFACTURER EFI_MISC_CHASSIS_MANUFACTURER_DATA; +typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA; +typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA; +typedef EFI_MISC_ONBOARD_DEVICE EFI_MISC_ONBOARD_DEVICE_DATA; +typedef EFI_MISC_ONBOARD_DEVICE_TYPE_DATA EFI_MISC_PORTING_DEVICE_TYPE_DATA; +typedef EFI_MISC_OEM_STRING EFI_MISC_OEM_STRING_DATA; +typedef EFI_MISC_SYSTEM_OPTION_STRING EFI_MISC_SYSTEM_OPTION_STRING_DATA; +typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA; +typedef EFI_MISC_SYSTEM_LANGUAGE_STRING EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA; +typedef EFI_MISC_BIS_ENTRY_POINT EFI_MISC_BIS_ENTRY_POINT_DATA; +typedef EFI_MISC_BOOT_INFORMATION_STATUS EFI_MISC_BOOT_INFORMATION_STATUS_DATA; +typedef EFI_MISC_SYSTEM_POWER_SUPPLY EFI_MISC_SYSTEM_POWER_SUPPLY_DATA ; +typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA; + +// ------------------- +// EdkII Names - Edk Names +// ------------------- +#define gEfiPeiCpuIoPpiInServiceTableGuid gPeiCpuIoPpiInServiceTableGuid +#define gEfiEndOfPeiSignalPpiGuid gEndOfPeiSignalPpiGuid +#define gEfiPeiFvFileLoaderPpiGuid gPeiFvFileLoaderPpiGuid +#define gEfiPeiMasterBootModePpiGuid gPeiMasterBootModePpiGuid +#define gEfiPeiMemoryDiscoveredPpiGuid gPeiMemoryDiscoveredPpiGuid +#define gEfiPciCfgPpiInServiceTableGuid gPeiPciCfgPpiInServiceTableGuid +#define gEfiPeiReadOnlyVariablePpiGuid gPeiReadOnlyVariablePpiGuid +#define gEfiPeiRecoveryModulePpiGuid gPeiRecoveryModulePpiGuid +#define gEfiPeiResetPpiGuid gPeiResetPpiGuid +#define gEfiPeiS3ResumePpiGuid gPeiS3ResumePpiGuid +#define gEfiPeiSectionExtractionPpiGuid gPeiSectionExtractionPpiGuid +#define gEfiPeiSecurityPpiGuid gPeiSecurityPpiGuid +#define gEfiPeiStatusCodePpiGuid gPeiStatusCodePpiGuid +#define gEfiPeiBootScriptExecuterPpiGuid gPeiBootScriptExecuterPpiGuid +#define gEfiPeiSmbusPpiGuid gPeiSmbusPpiGuid +#define gEfiPeiBlockIoPpiGuid gPeiBlockIoPpiGuid +#define gEfiPeiDeviceRecoveryModulePpiGuid gPeiDeviceRecoveryModulePpiGuid +#define gEfiPeiStallPpiGuid gPeiStallPpiGuid +#define gEfiPeiPciCfgPpiInServiceTableGuid gPeiPciCfgPpiInServiceTableGuid +#define gEfiPeiAtaControllerPpiGuid gPeiAtaControllerPpiGuid +#define EFI_PEI_CPU_IO_PPI_INSTALLED_GUID PEI_CPU_IO_PPI_GUID +#define EFI_PEI_RESET_PPI_GUID PEI_RESET_PPI_GUID +#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID PEI_PCI_CFG_PPI_GUID +#define EFI_PEI_REPORT_PROGRESS_CODE_PPI_GUID PEI_STATUS_CODE_PPI_GUID +#define EFI_PEI_BOOT_IN_RECOVERY_MODE_PEIM_PPI PEI_BOOT_IN_RECOVERY_MODE_PEIM_PPI +#define EFI_PEI_END_OF_PEI_PHASE_PPI_GUID PEI_END_OF_PEI_PHASE_PPI_GUID +#define EFI_PEI_MASTER_BOOT_MODE_PEIM_PPI PEI_MASTER_BOOT_MODE_PEIM_PPI +#define EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI_GUID PEI_PERMANENT_MEMORY_INSTALLED_PPI_GUID +#define EFI_PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID +#define EFI_PEI_RECOVERY_MODULE_PPI_GUID PEI_RECOVERY_MODULE_INTERFACE_PPI +#define EFI_PEI_S3_RESUME_PPI_GUID PEI_S3_RESUME_PPI_GUID +#define EFI_PEI_SECURITY_PPI_GUID PEI_SECURITY_PPI_GUID +#define EFI_PEI_STALL_PPI_GUID PEI_STALL_PPI_GUID +#define EFI_PEI_SMBUS_PPI_GUID PEI_SMBUS_PPI_GUID +#define EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID +#define EFI_PEI_FIND_FV_PPI_GUID EFI_FIND_FV_PPI_GUID +#define EFI_PEI_VIRTUAL_BLOCK_IO_PPI PEI_BLOCK_IO_PPI_GUID +#define EFI_PEI_DEVICE_RECOVERY_MODULE_PPI_GUID PEI_DEVICE_RECOVERY_MODULE_INTERFACE_PPI + + +// +// typedef Edk types - EdkII types +// +typedef PEI_RECOVERY_MODULE_INTERFACE EFI_PEI_RECOVERY_MODULE_PPI; +typedef PEI_CPU_IO_PPI EFI_PEI_CPU_IO_PPI; +typedef PEI_STALL_PPI EFI_PEI_STALL_PPI; +typedef PEI_SMBUS_PPI EFI_PEI_SMBUS_PPI; +typedef PEI_READ_ONLY_VARIABLE_PPI EFI_PEI_READ_ONLY_VARIABLE_PPI; +typedef PEI_PCI_CFG_PPI EFI_PEI_PCI_CFG_PPI; +typedef PEI_STATUS_CODE_PPI EFI_PEI_PROGRESS_CODE_PPI; +typedef PEI_CPU_IO_PPI_WIDTH EFI_PEI_CPU_IO_PPI_WIDTH; +typedef PEI_CPU_IO_PPI_IO_MEM EFI_PEI_CPU_IO_PPI_IO_MEM; +typedef PEI_CPU_IO_PPI_ACCESS EFI_PEI_CPU_IO_PPI_ACCESS; +typedef PEI_CPU_IO_PPI_IO_READ8 EFI_PEI_CPU_IO_PPI_IO_READ8; +typedef PEI_CPU_IO_PPI_IO_READ16 EFI_PEI_CPU_IO_PPI_IO_READ16; +typedef PEI_CPU_IO_PPI_IO_READ32 EFI_PEI_CPU_IO_PPI_IO_READ32; +typedef PEI_CPU_IO_PPI_IO_READ64 EFI_PEI_CPU_IO_PPI_IO_READ64; +typedef PEI_CPU_IO_PPI_IO_WRITE8 EFI_PEI_CPU_IO_PPI_IO_WRITE8; +typedef PEI_CPU_IO_PPI_IO_WRITE16 EFI_PEI_CPU_IO_PPI_IO_WRITE16; +typedef PEI_CPU_IO_PPI_IO_WRITE32 EFI_PEI_CPU_IO_PPI_IO_WRITE32; +typedef PEI_CPU_IO_PPI_IO_WRITE64 EFI_PEI_CPU_IO_PPI_IO_WRITE64; +typedef PEI_CPU_IO_PPI_MEM_READ8 EFI_PEI_CPU_IO_PPI_MEM_READ8; +typedef PEI_CPU_IO_PPI_MEM_READ16 EFI_PEI_CPU_IO_PPI_MEM_READ16; +typedef PEI_CPU_IO_PPI_MEM_READ32 EFI_PEI_CPU_IO_PPI_MEM_READ32; +typedef PEI_CPU_IO_PPI_MEM_READ64 EFI_PEI_CPU_IO_PPI_MEM_READ64; +typedef PEI_CPU_IO_PPI_MEM_WRITE8 EFI_PEI_CPU_IO_PPI_MEM_WRITE8; +typedef PEI_CPU_IO_PPI_MEM_WRITE16 EFI_PEI_CPU_IO_PPI_MEM_WRITE16; +typedef PEI_CPU_IO_PPI_MEM_WRITE32 EFI_PEI_CPU_IO_PPI_MEM_WRITE32; +typedef PEI_CPU_IO_PPI_MEM_WRITE64 EFI_PEI_CPU_IO_PPI_MEM_WRITE64; +//;;## ...AMI_OVERRIDE... Support PI1.x typedef PEI_PCI_CFG_PPI_WIDTH EFI_PEI_PCI_CFG_PPI_WIDTH; +//;;## ...AMI_OVERRIDE... Support PI1.x typedef PEI_PCI_CFG_PPI_PCI_ADDRESS EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS; +typedef PEI_GET_VARIABLE EFI_PEI_GET_VARIABLE; +typedef PEI_GET_NEXT_VARIABLE_NAME EFI_PEI_GET_NEXT_VARIABLE_NAME; +typedef PEI_LOAD_RECOVERY_CAPSULE EFI_PEI_LOAD_RECOVERY_CAPSULE; +typedef PEI_RESET_PPI EFI_PEI_RESET_PPI; +typedef PEI_S3_RESUME_PPI EFI_PEI_S3_RESUME_PPI; +typedef PEI_S3_RESUME_PPI_RESTORE_CONFIG EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG; +typedef SEC_PLATFORM_INFORMATION EFI_SEC_PLATFORM_INFORMATION; +typedef PEI_SECURITY_PPI EFI_PEI_SECURITY_PPI; +typedef PEI_SECURITY_AUTHENTICATION_STATE EFI_PEI_SECURITY_AUTHENTICATION_STATE; +typedef PEI_STALL EFI_PEI_STALL; +typedef PEI_SMBUS_PPI_EXECUTE_OPERATION EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION; +typedef PEI_SMBUS_NOTIFY_FUNCTION EFI_PEI_SMBUS_NOTIFY_FUNCTION; +typedef PEI_SMBUS_PPI_ARP_DEVICE EFI_PEI_SMBUS_PPI_ARP_DEVICE; +typedef PEI_SMBUS_PPI_GET_ARP_MAP EFI_PEI_SMBUS_PPI_GET_ARP_MAP; +typedef PEI_SMBUS_PPI_NOTIFY EFI_PEI_SMBUS_PPI_NOTIFY; +typedef PEI_BOOT_SCRIPT_EXECUTE EFI_PEI_BOOT_SCRIPT_EXECUTE; +typedef PEI_BOOT_SCRIPT_EXECUTER_PPI EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI; +typedef EFI_FIND_FV_FINDFV EFI_PEI_FIND_FV_FINDFV; +typedef EFI_FIND_FV_PPI EFI_PEI_FIND_FV_PPI; +typedef PEI_RECOVERY_BLOCK_IO_INTERFACE EFI_PEI_RECOVERY_BLOCK_IO_PPI; +typedef PEI_LBA EFI_PEI_LBA; +typedef PEI_BLOCK_IO_MEDIA EFI_PEI_BLOCK_IO_MEDIA; +typedef PEI_BLOCK_DEVICE_TYPE EFI_PEI_BLOCK_DEVICE_TYPE; +typedef PEI_GET_NUMBER_BLOCK_DEVICES EFI_PEI_GET_NUMBER_BLOCK_DEVICES; +typedef PEI_GET_DEVICE_MEDIA_INFORMATION EFI_PEI_GET_DEVICE_MEDIA_INFORMATION; +typedef PEI_READ_BLOCKS EFI_PEI_READ_BLOCKS; +typedef PEI_DEVICE_RECOVERY_MODULE_INTERFACE EFI_PEI_DEVICE_RECOVERY_MODULE_PPI; +typedef PEI_DEVICE_GET_NUMBER_RECOVERY_CAPSULE EFI_PEI_DEVICE_GET_NUMBER_RECOVERY_CAPSULE; +typedef PEI_DEVICE_GET_RECOVERY_CAPSULE_INFO EFI_PEI_DEVICE_GET_RECOVERY_CAPSULE_INFO; +typedef PEI_DEVICE_LOAD_RECOVERY_CAPSULE EFI_PEI_DEVICE_LOAD_RECOVERY_CAPSULE; + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDependencies.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDependencies.h new file mode 100644 index 0000000..3d5aafe --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Common/EdkIIGlueDependencies.h @@ -0,0 +1,698 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDepedencies.h + +Abstract: + + Header file that lists dependency relations among library instances + +--*/ + +#ifndef __EDKII_GLUE_DEPENDENCIES_H__ +#define __EDKII_GLUE_DEPENDENCIES_H__ + + +// +// Declarations of dependencies among EdkII Glue Library instances and R8 Libraries +// Pay attention to the order of following #define structures +// + + +// +// PeiDxeDebugLibReportStatusCode +// Actually almost every module and GlueLib instance needs this library, but GlueLib +// instances don't have to list this library in their own inf files. Module inf +// does this. +// +#if defined(__EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__) || defined(__EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__) + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif +#endif + +// +// BaseDebugLibNull +// +#ifdef __EDKII_GLUE_BASE_DEBUG_LIB_NULL__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_PRINT_LIB__ + #define __EDKII_GLUE_BASE_PRINT_LIB__ + #endif +#endif + +// +// EdkDxeRuntimeDriverLib +// +#ifdef __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__ + #ifndef __EDKII_GLUE_UEFI_LIB__ + #define __EDKII_GLUE_UEFI_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif +#endif + + +// +// BasePciLibCf8 +// +#ifdef __EDKII_GLUE_BASE_PCI_LIB_CF8__ + #ifndef __EDKII_GLUE_BASE_PCI_CF8_LIB__ + #define __EDKII_GLUE_BASE_PCI_CF8_LIB__ + #endif +#endif + +// +// BasePciLibPciExpress +// +#ifdef __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ + #ifndef __EDKII_GLUE_BASE_PCI_EXPRESS_LIB__ + #define __EDKII_GLUE_BASE_PCI_EXPRESS_LIB__ + #endif +#endif + +// +// BasePciCf8Lib +// +#ifdef __EDKII_GLUE_BASE_PCI_CF8_LIB__ + #ifndef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #define __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #endif +#endif + +// BasePciExpressLib +// +#ifdef __EDKII_GLUE_BASE_PCI_EXPRESS_LIB__ + #ifndef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #define __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #endif +#endif + +// +// BaseTimerLibLocalApic +// +#ifdef __EDKII_GLUE_BASE_TIMER_LIB_LOCAL_APIC__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #define __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #endif +#endif + +// +// DxeReportStatusCodeLib +// +#ifdef __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #define __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #endif + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ + #endif +#endif + +// +// SmmRuntimeDxeReportStatusCodeLib - typically used by SMM driver and Runtime driver +// +#ifdef __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ + #endif +#endif + +// +// PeiReportStatusCodeLib +// +#ifdef __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #define __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #endif + #ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #endif + // + // If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ can be + // replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__ + // +#endif + +// +// BasePeCoffLib +// +#ifdef __EDKII_GLUE_BASE_PE_COFF_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif +#endif + +// +// BaseUefiDecompressLib +// +#ifdef __EDKII_GLUE_BASE_UEFI_DECOMPRESS_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif +#endif + +// +// DxeHobLib +// +#ifdef __EDKII_GLUE_DXE_HOB_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_LIB__ + #define __EDKII_GLUE_UEFI_LIB__ + #endif +#endif + +// +// HiiLib +// +#ifdef __EDKII_GLUE_HII_LIB__ + #ifndef __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #define __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #endif +#endif + +// +// UefiDevicePathLib +// +#ifdef __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif + #ifndef __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #define __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #endif +#endif + +// +// DxeServicesTableLib +// +#ifdef __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ + #ifndef __EDKII_GLUE_UEFI_LIB__ + #define __EDKII_GLUE_UEFI_LIB__ + #endif +#endif + +// +// UefiLib +// +#ifdef __EDKII_GLUE_UEFI_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif + #ifndef __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #define __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #endif +#endif + +// +// DxeMemoryAllocationLib +// +#ifdef __EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif +#endif + +// +// DxeSmbusLib +// +#ifdef __EDKII_GLUE_DXE_SMBUS_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif +#endif + +// +// PeiHobLib +// +#ifdef __EDKII_GLUE_PEI_HOB_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_PEI_SERVICES_LIB__ + #define __EDKII_GLUE_PEI_SERVICES_LIB__ + #endif +#endif + +// +// PeiMemoryAllocationLib +// +#ifdef __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #endif + // + // If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ can be + // replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__ + // +#endif + +// +// PeiResourcePublicationLib +// +#ifdef __EDKII_GLUE_PEI_RESOURCE_PUBLICATION_LIB__ + #ifndef __EDKII_GLUE_PEI_SERVICES_LIB__ + #define __EDKII_GLUE_PEI_SERVICES_LIB__ + #endif +#endif + +// +// PeiServicesLib +// +#ifdef __EDKII_GLUE_PEI_SERVICES_LIB__ + #ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #endif + // + // If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ can be + // replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__ + // +#endif + +// +// PeiSmbusLib +// +#ifdef __EDKII_GLUE_PEI_SMBUS_LIB__ + #ifndef __EDKII_GLUE_BASE_MEMORY_LIB__ + #define __EDKII_GLUE_BASE_MEMORY_LIB__ + #endif + #ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #endif + // + // If necessary, __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ can be + // replaced with __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__ + // +#endif + +// +// PeiServicesTablePointerLibMm7 +// +#ifdef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif +#endif + +// +// UefiDriverModelLib +// +#ifdef __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ + #ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ + #endif +#endif + + +// +// UefiBootServicesTableLib +#ifdef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ +#endif + +// +// BasePrintLib +// +#ifdef __EDKII_GLUE_BASE_PRINT_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif +#endif + +// +// BaseMemoryLib +// +#ifdef __EDKII_GLUE_BASE_MEMORY_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif +#endif + +// +// BasePostCodeLibPort80 +// +#ifdef __EDKII_GLUE_BASE_POST_CODE_LIB_PORT_80__ + #ifndef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #define __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #endif +#endif + +// +// BaseIoLibIntrinsic +// +#ifdef __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif +#endif + +// +// BaseCacheMaintenanceLib +// +#ifdef __EDKII_GLUE_BASE_CACHE_MAINTENANCE_LIB__ + #ifndef __EDKII_GLUE_BASE_LIB__ + #define __EDKII_GLUE_BASE_LIB__ + #endif +#endif + +// +// BaseLib +// +#ifdef __EDKII_GLUE_BASE_LIB__ +#endif + +// +// UefiRuntimeServicesTableLib +// +#ifdef __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ + +#endif + +// +// BasePeCoffGetEntryPointLib +// +#ifdef __EDKII_GLUE_BASE_PE_COFF_GET_ENTRY_POINT_LIB__ +#endif + +// +// PeiServicesTablePointerLib +// +#ifdef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__ +#endif + +// +// BasePostCodeLibDebug +// +#ifdef __EDKII_GLUE_BASE_POST_CODE_LIB_DEBUG__ + // + // A DebugLib instance + // Usually either EdkIIGluePeiDebugLibReportStatusCodeLib or EdkIIGlueDxeDebugLibReportStatusCodeLib is listed in module inf + // +#endif + +// +// PeiDxePostCodeLibReportStatusCode +// +#ifdef __EDKII_GLUE_PEI_DXE_POST_CODE_LIB_REPORT_STATUS_CODE__ + // + // PEI or DXE ReportStatusCodeLib instance + // Usually EdkIIGluePei/DxeReportStatusCodeLib is listed in module inf + // +#endif + + +// +// Check against multiple instances of same library class being used +// +#if defined(__EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__) && defined(__EDKII_GLUE_BASE_DEBUG_LIB_NULL__) + #error EdkIIGluePeiDebugLibReportStatusCode and EdkIIGlueBaseDebugLibNull: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__) && defined(__EDKII_GLUE_BASE_DEBUG_LIB_NULL__) + #error EdkIIGlueDxeDebugLibReportStatusCode and EdkIIGlueBaseDebugLibNull: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__) && defined(__EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__) + #error EdkIIGluePeiDebugLibReportStatusCode and EdkIIGlueDxeDebugLibReportStatusCode: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__) && defined(__EDKII_GLUE_BASE_PCI_LIB_CF8__) + #error EdkIIGluePciLibPciExpress and EdkIIGluePciLibCf8: can only be mutual exclusively used. +#endif + +#if defined (__EDKII_GLUE_DXE_HOB_LIB__) && defined(__EDKII_GLUE_PEI_HOB_LIB__) + #error EdkIIGlueDxeHobLib and EdkIIGluePeiHobLib: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_BASE_POST_CODE_LIB_PORT_80__) && defined(__EDKII_GLUE_BASE_POST_CODE_LIB_DEBUG__) + #error EdkIIGlueBasePostCodeLibPort80 and EdkIIGlueBasePostCodeLibDebug: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_BASE_POST_CODE_LIB_PORT_80__) && defined(__EDKII_GLUE_PEI_DXE_POST_CODE_LIB_REPORT_STATUS_CODE__) + #error EdkIIGlueBasePostCodeLibPort80 and EdkIIGluePeiDxePostCodeLibReportStatusCode: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_BASE_POST_CODE_LIB_DEBUG__) && defined(__EDKII_GLUE_PEI_DXE_POST_CODE_LIB_REPORT_STATUS_CODE__) + #error EdkIIGlueBasePostCodeLibDebug and EdkIIGluePeiDxePostCodeLibReportStatusCode: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__) && defined(__EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__) + #error EdkIIGluePeiServicesTablePointerLib and EdkIIGluePeiServicesTablePointerLibMm7: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__) && defined(__EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__) + #error EdkIIGlueDxeReportStatusCodeLib and EdkIIGluePeiReportStatusCodeLib: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__) && defined(__EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__) + #error EdkIIGlueSmmRuntimeDxeReportStatusCodeLib and EdkIIGluePeiReportStatusCodeLib: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__) && defined(__EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__) + #error EdkIIGlueDxeReportStatusCodeLib and EdkIIGlueSmmRuntimeDxeReportStatusCodeLib: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_DXE_MEMORY_ALLOCATION_LIB__) && defined(__EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__) + #error EdkIIGlueDxeMemoryAllocationLib and EdkIIGluePeiMemoryAllocationLib: can only be mutual exclusively used. +#endif + +#if defined(__EDKII_GLUE_DXE_SMBUS_LIB__) && defined(__EDKII_GLUE_PEI_SMBUS_LIB__) + #error EdkIIGlueDxeSmbusLib and EdkIIGluePeiSmbusLib: can only be mutual exclusively used. +#endif + +// +// Some instances must be supplied +// +#ifdef __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ + #if !defined(__EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__) + #error You use EdkIIGluePeiDebugLibReportStatusCode, \ + so EdkIIGluePeiReportStatusCodeLib must be supplied + #endif +#endif + +#ifdef __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ + #if !defined(__EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__) \ + && !defined(__EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__) + #error You use EdkIIGlueDxeDebugLibReportStatusCode, \ + so either EdkIIGlueDxeReportStatusCodeLib, or EdkIIGlueSmmRuntimeDxeReportStatusCodeLib must be supplied + #endif +#endif + +#ifdef __EDKII_GLUE_BASE_POST_CODE_LIB_DEBUG__ + #if !defined(__EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__) \ + && !defined(__EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__) \ + && !defined(__EDKII_GLUE_BASE_DEBUG_LIB_NULL__) + #error You use EdkIIGlueBasePostCodeLibDebug, so either EdkIIGluePeiDebugLibReportStatusCode, EdkIIGlueDxeDebugLibReportStatusCode, \ + or EdkIIGlueBaseDebugLibNull must be supplied + #endif +#endif + +// +// EdkIIGlueUefiDriverModelLib used, but no Driver Binding Protocol defined +// +#ifdef __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ + #ifndef __EDKII_GLUE_DRIVER_BINDING_PROTOCOL_INSTANCE__ + #error "EdkIIGlueUefiDriverModelLib used, but no Driver Binding Protocol defined. Please define __EDKII_GLUE_DRIVER_BINDING_PROTOCOL_INSTANCE__." + #endif +#endif + +// +// EdkII Glue Library Constructors: +// NOTE: the constructors must be called according to dependency order +// +// UefiBootServicesTableLib UefiBootServicesTableLibConstructor() +// UefiRuntimeServicesTableLib UefiRuntimeServicesTableLibConstructor() +// EdkDxeRuntimeDriverLib RuntimeDriverLibConstruct() +// SmmRuntimeDxeReportStatusCodeLib ReportStatusCodeLibConstruct() +// DxeHobLib HobLibConstructor() +// UefiDriverModelLib UefiDriverModelLibConstructor() +// PeiServicesTablePointerLib PeiServicesTablePointerLibConstructor() +// PeiServicesTablePointerLibMm7 PeiServicesTablePointerLibConstructor() +// DxeSmbusLib SmbusLibConstructor() +// DxeServicesTableLib DxeServicesTableLibConstructor() +// + +#ifdef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ +EFI_STATUS +UefiBootServicesTableLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ +EFI_STATUS +UefiRuntimeServicesTableLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__ +EFI_STATUS +RuntimeDriverLibConstruct ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ +EFI_STATUS +EFIAPI +ReportStatusCodeLibConstruct ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_DXE_HOB_LIB__ +EFI_STATUS +HobLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ +EFI_STATUS +UefiDriverModelLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB__ +EFI_STATUS +PeiServicesTablePointerLibConstructor ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); +#endif + +#ifdef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_MM7__ +EFI_STATUS +PeiServicesTablePointerLibConstructor ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); +#endif + +#ifdef __EDKII_GLUE_DXE_SMBUS_LIB__ +EFI_STATUS +EFIAPI +SmbusLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ +EFI_STATUS +DxeServicesTableLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +// +// EdkII Glue Library Destructors: +// NOTE: the destructors must be called according to dependency order +// +// UefiDriverModelLibDestructor UefiDriverModelLibDestructor() +// SmmRuntimeDxeReportStatusCodeLib ReportStatusCodeLibDestruct() +// EdkDxeRuntimeDriverLib RuntimeDriverLibDeconstruct() +// +#ifdef __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ +EFI_STATUS +UefiDriverModelLibDestructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ +EFI_STATUS +EFIAPI +ReportStatusCodeLibDestruct ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); +#endif + +#ifdef __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__ +EFI_STATUS +RuntimeDriverLibDeconstruct ( + VOID + ); +#endif + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/DxeDepex.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/DxeDepex.h new file mode 100644 index 0000000..24d2d07 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/DxeDepex.h @@ -0,0 +1,34 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + DxeDepex.h + +Abstract: + + This file is used by .dxs file. To write common .dxs for R8.x and R9, a + header file named DxeDepex.h musted be present. + +--*/ + + +#ifndef __EDKII_GLUELIB_DXEDEPEX_H__ +#define __EDKII_GLUELIB_DXEDEPEX_H__ + + +// +// this file is used by .dxs file, just a place holder +// + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueBase.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueBase.h new file mode 100644 index 0000000..d24c581 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueBase.h @@ -0,0 +1,98 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueBase.h + +Abstract: + + Root include file for Base modules + +--*/ + +#ifndef __EDKII_GLUE_BASE_H__ +#define __EDKII_GLUE_BASE_H__ + +// +// Using this header means building with EdkIIGlueLib +// +#ifndef BUILD_WITH_EDKII_GLUE_LIB + #define BUILD_WITH_EDKII_GLUE_LIB +#endif + +#ifndef BUILD_WITH_GLUELIB + #define BUILD_WITH_GLUELIB +#endif + +// +// General Type & API definitions +// + +#include "EfiBind.h" +#include "EfiTypes.h" +#include "EfiError.h" +#include "Common\EdkIIGlueBaseTypes.h" +#include "EfiImage.h" +#include "EfiPeOptionalHeader.h" +#include "EfiStdArg.h" +#include "EfiDebug.h" +#include "EdkIIGlueProcessorBind.h" + +// +// Some Status Code data type definitions are in TianoSpecTypes.h in R8.5 +// +#if (TIANO_RELEASE_VERSION <= 0x00080005) +#include "TianoSpecTypes.h" +#endif +#include "EfiStatusCode.h" + +// +// R8.x Library headers used by EdkII Glue Libraries +// +#include "LinkedList.h" +#include "EfiCommonLib.h" + +#include "Common\EdkIIGlueDefinitionChangesBase.h" + +// +// EdkII Glue Library Class headers +// + +#include "Library\EdkIIGlueBaseLib.h" +#include "Library\EdkIIGlueBaseMemoryLib.h" +#include "Library\EdkIIGlueCacheMaintenanceLib.h" +#include "Library\EdkIIGlueIoLib.h" +#include "Library\EdkIIGluePciCf8Lib.h" +#include "Library\EdkIIGluePciExpressLib.h" +#include "Library\EdkIIGluePciLib.h" +#include "Library\EdkIIGluePeCoffGetEntryPointLib.h" +#include "Library\EdkIIGluePeCoffLib.h" +#include "Library\EdkIIGluePostCodeLib.h" +#include "Library\EdkIIGluePrintLib.h" +#include "Library\EdkIIGlueTimerLib.h" +#include "Library\EdkIIGlueUefiDecompressLib.h" +#include "Library\EdkIIGlueDebugLib.h" + +// +// Publish MDE Library PCDs +// +#include "Pcd\EdkIIGluePcdBaseLib.h" +#include "Pcd\EdkIIGluePcdDebugLib.h" +#include "Pcd\EdkIIGluePcdIoLib.h" +#include "Pcd\EdkIIGluePcdPciExpressLib.h" +#include "Pcd\EdkIIGluePcdPostCodeLib.h" +#include "Pcd\EdkIIGluePcdReportStatusCodeLib.h" +#include "Pcd\EdkIIGluePcdTimerLib.h" +#include "Pcd\EdkIIGluePcdPerformanceLib.h" + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueConfig.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueConfig.h new file mode 100644 index 0000000..5dabdff --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueConfig.h @@ -0,0 +1,173 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueConfig.h + +Abstract: + + Configurable items provided by GlueLib + +--*/ + +#ifndef __EDKII_GLUE_CONFIG_H__ +#define __EDKII_GLUE_CONFIG_H__ + +#include "EdkIIGlueProcessorBind.h" + +// +// Glue Library version +// +// 0x3000 - the 3rd release +// 0x5000 - support IPF. Jan, 2007 +// 0x6000 - support EBC. Feb, 2007 +// 0x7000 - size reduction, Jun, 2007 +// 0x7100 - backward compatibility supported, Jun, 2007 +// +// For reference only, don't change the value +// +#define EDKII_GLUE_LIBRARY_VERSION 0x7100 + + +// +// Check to make sure EFI_SPECIFICATION_VERSION and TIANO_RELEASE_VERSION are defined. +// +#if !defined(EFI_SPECIFICATION_VERSION) + #error EFI_SPECIFICATION_VERSION not defined +#elif !defined(TIANO_RELEASE_VERSION) + #error TIANO_RELEASE_VERSION not defined +#elif (TIANO_RELEASE_VERSION == 0) + #error TIANO_RELEASE_VERSION can not be zero +#endif + + +// +// Glue Library debug flag +// +// Controls debug ON/OFF of GlueLib itself, no +// effect on any other libraries or modules +// +// Values: +// FALSE : debug off +// any TRUE value : debug on +// +#define EDKII_GLUE_LIBRARY_DEBUG_ENABLE 0 + + +// +// max unicode string length +// +#define EDKII_GLUE_MaximumUnicodeStringLength 1000000 + +// +// max ascii string length +// +#define EDKII_GLUE_MaximumAsciiStringLength 1000000 + +// +// spin lock timeout +// +#define EDKII_GLUE_SpinLockTimeout 10000000 + +// +// max linked list length +// +#define EDKII_GLUE_MaximumLinkedListLength 1000000 + +// +// debug print level +// +#ifndef EDKII_GLUE_DebugPrintErrorLevel +#define EDKII_GLUE_DebugPrintErrorLevel EFI_D_ERROR +#endif + +// +// debug propery mask +// +#ifndef EDKII_GLUE_DebugPropertyMask +#define EDKII_GLUE_DebugPropertyMask ( DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED \ + | DEBUG_PROPERTY_DEBUG_PRINT_ENABLED \ + | DEBUG_PROPERTY_DEBUG_CODE_ENABLED \ + | DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED \ + | DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED \ + ) +#endif + +// +// clear memory value +// +#define EDKII_GLUE_DebugClearMemoryValue 0xAF + +// +// pci express base address +// +#ifndef EDKII_GLUE_PciExpressBaseAddress +#define EDKII_GLUE_PciExpressBaseAddress 0xE0000000 +#endif + +// +// +// This value is FSB Clock frequency. Its unit is Hz and its +// default value is 200000000, that means FSB frequency is 200Mhz. +// +#ifndef EDKII_GLUE_FSBClock +#define EDKII_GLUE_FSBClock 200000000 +#endif + +// +// This Value is MSR offset for platform information in hex +// +#ifndef EDKII_GLUE_PlatformInfoMsr +#define EDKII_GLUE_PlatformInfoMsr 0xCE +#endif + +// +// This Value is MSR offset for APIC Base in hex +// +#ifndef EDKII_GLUE_XAPICBaseMsr +#define EDKII_GLUE_XAPICBaseMsr 0x1B +#endif + +// +// This Value is MSR offset for EXT XAPIC Logical APIC ID in hex +// +#ifndef EDKII_GLUE_ExtXAPICLogicalAPICIdMsr +#define EDKII_GLUE_ExtXAPICLogicalAPICIdMsr 0x802 +#endif + +// +// post code property mask +// +#define EDKII_GLUE_PostCodePropertyMask ( POST_CODE_PROPERTY_POST_CODE_ENABLED \ + | POST_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED \ + ) + +// +// status code property mask +// +#define EDKII_GLUE_ReportStatusCodePropertyMask ( REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED \ + | REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED \ + | REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED \ + ) + +// +// for IPF only +// The base address of IPF IO Block +// +#ifdef MDE_CPU_IPF +#ifndef EDKII_GLUE_IoBlockBaseAddressForIpf +#define EDKII_GLUE_IoBlockBaseAddressForIpf 0x0ffffc000000 +#endif +#endif + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueDxe.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueDxe.h new file mode 100644 index 0000000..2a631fc --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueDxe.h @@ -0,0 +1,256 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDxe.h + +Abstract: + + Root include file for DXE modules + +--*/ + +#ifndef __EDKII_GLUE_DXE_H__ +#define __EDKII_GLUE_DXE_H__ + + +// +// General Type & API definitions +// + +#include "Tiano.h" +#include "BootMode.h" +#include "EfiBootScript.h" +#include "EfiCapsule.h" +#include "EfiDependency.h" +#include "EfiImageFormat.h" +#include "EfiImage.h" +#include "EfiPeOptionalHeader.h" +#include "EfiFirmwareVolumeHeader.h" +#include "EfiFirmwareFileSystem.h" +#include "PeiHob.h" +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include "TianoHii.h" +#else +#include "EfiInternalFormRepresentation.h" +#endif +#include "EfiStatusCode.h" + +// +// GUID definitions +// + +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +#include EFI_GUID_DEFINITION (EventGroup) +#include EFI_GUID_DEFINITION (EventLegacybios) +#include EFI_GUID_DEFINITION (FrameworkDevicePath) + +#include EFI_PROTOCOL_DEFINITION (EdidActive) +#include EFI_PROTOCOL_DEFINITION (EdidDiscovered) +#include EFI_PROTOCOL_DEFINITION (EdidOverride) +#include EFI_PROTOCOL_DEFINITION (GraphicsOutput) +#include EFI_PROTOCOL_DEFINITION (Hash) +#include EFI_PROTOCOL_DEFINITION (ScsiPassThruExt) +#include EFI_PROTOCOL_DEFINITION (TapeIo) +#endif + +#include EFI_GUID_DEFINITION (Acpi) +#include EFI_GUID_DEFINITION (AcpiTableStorage) +#include EFI_GUID_DEFINITION (Apriori) +#include EFI_GUID_DEFINITION (Capsule) +#include EFI_GUID_DEFINITION (DataHubRecords) +#include EFI_GUID_DEFINITION (DebugImageInfoTable) +#include EFI_GUID_DEFINITION (DxeServices) +#include EFI_GUID_DEFINITION (FirmwareFileSystem) +#include EFI_GUID_DEFINITION (GlobalVariable) +#include EFI_GUID_DEFINITION (Gpt) +#include EFI_GUID_DEFINITION (Hob) +#include EFI_GUID_DEFINITION (MemoryAllocationHob) +#include EFI_GUID_DEFINITION (Mps) +#include EFI_GUID_DEFINITION (PcAnsi) +#include EFI_GUID_DEFINITION (SalSystemTable) +#include EFI_GUID_DEFINITION (Smbios) +//#include EFI_GUID_DEFINITION (SmmCommunicate) +#include EFI_GUID_DEFINITION (SmramMemoryReserve) +// +// *** NOTE ***: StatusCodeDataTypeId definition differences need to be +// resolved when porting a module to real EDK II +// +#include EFI_GUID_DEFINITION (StatusCodeDataTypeId) + +// +// Protocol definitions +// +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include EFI_PROTOCOL_DEFINITION (FormBrowser2) +#include EFI_PROTOCOL_DEFINITION (HiiConfigAccess) +#include EFI_PROTOCOL_DEFINITION (HiiConfigRouting) +#include EFI_PROTOCOL_DEFINITION (HiiDatabase) +#include EFI_PROTOCOL_DEFINITION (HiiFont) +#include EFI_PROTOCOL_DEFINITION (HiiImage) +#include EFI_PROTOCOL_DEFINITION (HiiString) +#endif + +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +#include EFI_PROTOCOL_DEFINITION (DevicePathFromText) +#include EFI_PROTOCOL_DEFINITION (DevicePathToText) +#include EFI_PROTOCOL_DEFINITION (DevicePathUtilities) +#include EFI_PROTOCOL_DEFINITION (Dhcp4) +#include EFI_PROTOCOL_DEFINITION (Ip4) +#include EFI_PROTOCOL_DEFINITION (Ip4Config) +#include EFI_PROTOCOL_DEFINITION (IScsiInitiatorName) +#include EFI_PROTOCOL_DEFINITION (UsbHostController) +#include EFI_PROTOCOL_DEFINITION (ManagedNetwork) +#include EFI_PROTOCOL_DEFINITION (Mtftp4) +#include EFI_PROTOCOL_DEFINITION (ServiceBinding) +#include EFI_PROTOCOL_DEFINITION (Tcp4) +#include EFI_PROTOCOL_DEFINITION (Udp4) +#include EFI_PROTOCOL_DEFINITION (Arp) +// check here: currently not implementated +//#include EFI_PROTOCOL_DEFINITION (AuthenticationInfo) +#endif + +#include EFI_PROTOCOL_DEFINITION (AcpiSupport) +#include EFI_PROTOCOL_DEFINITION (Bis) +#include EFI_PROTOCOL_DEFINITION (BlockIo) +#include EFI_PROTOCOL_DEFINITION (BootScriptSave) +#include EFI_PROTOCOL_DEFINITION (BusSpecificDriverOverride) +#include EFI_PROTOCOL_DEFINITION (ComponentName) +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +#include EFI_PROTOCOL_DEFINITION (ComponentName2) +#endif +#include EFI_PROTOCOL_DEFINITION (CpuIo) +#include EFI_PROTOCOL_DEFINITION (DataHub) +#include EFI_PROTOCOL_DEFINITION (DebugPort) +#include EFI_PROTOCOL_DEFINITION (DebugSupport) +#include EFI_PROTOCOL_DEFINITION (Decompress) +#include EFI_PROTOCOL_DEFINITION (DeviceIo) +#include EFI_PROTOCOL_DEFINITION (DevicePath) +#include EFI_PROTOCOL_DEFINITION (DiskIo) +#include EFI_PROTOCOL_DEFINITION (DriverBinding) +#include EFI_PROTOCOL_DEFINITION (DriverConfiguration) +#include EFI_PROTOCOL_DEFINITION (DriverDiagnostics) +#include EFI_PROTOCOL_DEFINITION (Ebc) +#include EFI_PROTOCOL_DEFINITION (EfiNetworkInterfaceIdentifier) +#include EFI_PROTOCOL_DEFINITION (FileInfo) +#include EFI_PROTOCOL_DEFINITION (FileSystemInfo) +#include EFI_PROTOCOL_DEFINITION (FileSystemVolumeLabelInfo) +#include EFI_PROTOCOL_DEFINITION (FirmwareVolume) +#include EFI_PROTOCOL_DEFINITION (FirmwareVolumeBlock) +#include EFI_PROTOCOL_DEFINITION (FirmwareVolumeDispatch) +#if (EFI_SPECIFICATION_VERSION < 0x0002000A) +#include EFI_PROTOCOL_DEFINITION (FormBrowser) +#include EFI_PROTOCOL_DEFINITION (FormCallback) +#endif +#include EFI_PROTOCOL_DEFINITION (GuidedSectionExtraction) +#if (EFI_SPECIFICATION_VERSION < 0x0002000A) +#include EFI_PROTOCOL_DEFINITION (Hii) +#endif +#include EFI_PROTOCOL_DEFINITION (IdeControllerInit) +#include EFI_PROTOCOL_DEFINITION (IncompatiblePciDeviceSupport) +#include EFI_PROTOCOL_DEFINITION (Legacy8259) +#include EFI_PROTOCOL_DEFINITION (LegacyBios) +#include EFI_PROTOCOL_DEFINITION (LegacyBiosPlatform) +#include EFI_PROTOCOL_DEFINITION (LegacyInterrupt) +#include EFI_PROTOCOL_DEFINITION (LegacyRegion) +#include EFI_PROTOCOL_DEFINITION (LoadedImage) +#include EFI_PROTOCOL_DEFINITION (LoadFile) +#include EFI_PROTOCOL_DEFINITION (PciHostBridgeResourceAllocation) +#include EFI_PROTOCOL_DEFINITION (PciHotplugInit) +#include EFI_PROTOCOL_DEFINITION (PciIo) +#include EFI_PROTOCOL_DEFINITION (PciPlatform) +#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo) +#include EFI_PROTOCOL_DEFINITION (PlatformDriverOverride) +#include EFI_PROTOCOL_DEFINITION (PxeBaseCode) +#include EFI_PROTOCOL_DEFINITION (PxeBaseCodeCallBack) +#include EFI_PROTOCOL_DEFINITION (ScsiIo) +#include EFI_PROTOCOL_DEFINITION (ScsiPassThru) +#include EFI_PROTOCOL_DEFINITION (SectionExtraction) +#include EFI_PROTOCOL_DEFINITION (SerialIo) +#include EFI_PROTOCOL_DEFINITION (SimpleFilesystem) +#include EFI_PROTOCOL_DEFINITION (SimpleNetwork) +#include EFI_PROTOCOL_DEFINITION (SimplePointer) +#include EFI_PROTOCOL_DEFINITION (SimpleTextIn) +#include EFI_PROTOCOL_DEFINITION (SimpleTextOut) +#include EFI_PROTOCOL_DEFINITION (Smbus) +#include EFI_PROTOCOL_DEFINITION (SmmAccess) +#include EFI_PROTOCOL_DEFINITION (SmmBase) +#include EFI_PROTOCOL_DEFINITION (SmmControl) +#include EFI_PROTOCOL_DEFINITION (SmmGpiDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmIchnDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmPeriodicTimerDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmPowerButtonDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmStandbyButtonDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmStatusCode) +#include EFI_PROTOCOL_DEFINITION (SmmSwDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmSxDispatch) +#include EFI_PROTOCOL_DEFINITION (SmmUsbDispatch) +#include EFI_PROTOCOL_DEFINITION (UgaDraw) +#include EFI_PROTOCOL_DEFINITION (UnicodeCollation) +#include EFI_PROTOCOL_DEFINITION (UsbHostController) +#include EFI_PROTOCOL_DEFINITION (UsbIo) +#include EFI_PROTOCOL_DEFINITION (SecurityPolicy) +#include EFI_PROTOCOL_DEFINITION (LoadPe32Image) + +// +// Arch Protocol definitions +// + +#include EFI_ARCH_PROTOCOL_DEFINITION (Bds) +#include EFI_ARCH_PROTOCOL_DEFINITION (Cpu) +#include EFI_ARCH_PROTOCOL_DEFINITION (Metronome) +#include EFI_ARCH_PROTOCOL_DEFINITION (Monotoniccounter) +#include EFI_ARCH_PROTOCOL_DEFINITION (RealTimeClock) +#include EFI_ARCH_PROTOCOL_DEFINITION (Reset) +#include EFI_ARCH_PROTOCOL_DEFINITION (Runtime) +#include EFI_ARCH_PROTOCOL_DEFINITION (Security) +#include EFI_ARCH_PROTOCOL_DEFINITION (StatusCode) +#include EFI_ARCH_PROTOCOL_DEFINITION (Timer) +#include EFI_ARCH_PROTOCOL_DEFINITION (Variable) +#include EFI_ARCH_PROTOCOL_DEFINITION (Variablewrite) +#include EFI_ARCH_PROTOCOL_DEFINITION (WatchdogTimer) + +// +// R8.x Library headers used by EdkII Glue Libraries +// +#include "EfiDriverLib.h" +#include "EfiCapsule.h" + +#include "Common\EdkIIGlueDefinitionChangesDxe.h" + + +// +// EdkII Glue Library Class headers +// + +#include "EdkIIGlueBase.h" +#include "Library\EdkIIGlueDebugLib.h" +#include "Library\EdkIIGluePostCodeLib.h" +#include "Library\EdkIIGlueReportStatusCodeLib.h" +#include "Library\EdkIIGlueHiiLib.h" +#include "Library\EdkIIGlueHobLib.h" +#include "Library\EdkIIGlueMemoryAllocationLib.h" +#include "Library\EdkIIGlueSmbusLib.h" +#include "Library\EdkIIGlueDxeRuntimeDriverLib.h" +#include "Library\EdkIIGlueDxeServicesTableLib.h" +#include "Library\EdkIIGlueDxeSmmDriverEntryPoint.h" +#include "Library\EdkIIGlueDevicePathLib.h" +#include "Library\EdkIIGlueUefiLib.h" +#include "Library\EdkIIGlueUefiDecompressLib.h" +#include "Library\EdkIIGlueUefiDriverModelLib.h" +#include "Library\EdkIIGlueUefiBootServicesTableLib.h" +#include "Library\EdkIIGlueUefiDriverEntryPoint.h" +#include "Library\EdkIIGlueUefiRuntimeServicesTableLib.h" +#include "Library\EdkIIGlueFirmwarePerformanceLib.h" + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueInclude.cif b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueInclude.cif new file mode 100644 index 0000000..f85ea5d --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueInclude.cif @@ -0,0 +1,64 @@ +<component> + name = "EdkIIGlueInclude" + category = ModulePart + LocalRoot = "EDK\Foundation\Library\EdkIIGlueLib\Include\" + RefName = "EdkIIGlueInclude" +[files] +"AutoGen.h" +"DxeDepex.h" +"EdkIIGlueBase.h" +"EdkIIGlueConfig.h" +"EdkIIGlueDxe.h" +"EdkIIGluePeim.h" +"EdkIIGlueUefi.h" +"PeimDepex.h" +"Common\EdkIIGlueBaseTypes.h" +"Common\EdkIIGlueDefinitionChangesBase.h" +"Common\EdkIIGlueDefinitionChangesDxe.h" +"Common\EdkIIGlueDefinitionChangesPeim.h" +"Common\EdkIIGlueDependencies.h" +"Ia32\EdkIIGlueProcessorBind.h" +"Library\EdkIIGlueBaseLib.h" +"Library\EdkIIGlueBaseMemoryLib.h" +"Library\EdkIIGlueCacheMaintenanceLib.h" +"Library\EdkIIGlueDebugLib.h" +"Library\EdkIIGlueDevicePathLib.h" +"Library\EdkIIGlueDxeRuntimeDriverLib.h" +"Library\EdkIIGlueDxeServicesTableLib.h" +"Library\EdkIIGlueDxeSmmDriverEntryPoint.h" +"Library\EdkIIGlueHiiLib.h" +"Library\EdkIIGlueHobLib.h" +"Library\EdkIIGlueIoLib.h" +"Library\EdkIIGlueMemoryAllocationLib.h" +"Library\EdkIIGluePciCf8Lib.h" +"Library\EdkIIGluePciExpressLib.h" +"Library\EdkIIGluePciLib.h" +"Library\EdkIIGluePeCoffGetEntryPointLib.h" +"Library\EdkIIGluePeCoffLib.h" +"Library\EdkIIGluePeimEntryPoint.h" +"Library\EdkIIGluePeiServicesLib.h" +"Library\EdkIIGluePeiServicesTablePointerLib.h" +"Library\EdkIIGluePostCodeLib.h" +"Library\EdkIIGluePrintLib.h" +"Library\EdkIIGlueReportStatusCodeLib.h" +"Library\EdkIIGlueResourcePublicationLib.h" +"Library\EdkIIGlueSmbusLib.h" +"Library\EdkIIGlueTimerLib.h" +"Library\EdkIIGlueUefiBootServicesTableLib.h" +"Library\EdkIIGlueUefiDecompressLib.h" +"Library\EdkIIGlueUefiDriverEntryPoint.h" +"Library\EdkIIGlueUefiDriverModelLib.h" +"Library\EdkIIGlueUefiLib.h" +"Library\EdkIIGlueUefiRuntimeServicesTableLib.h" +"Library\EdkIIGlueFirmwarePerformanceLib.h" +"Pcd\EdkIIGluePcd.h" +"Pcd\EdkIIGluePcdBaseLib.h" +"Pcd\EdkIIGluePcdDebugLib.h" +"Pcd\EdkIIGluePcdPciExpressLib.h" +"Pcd\EdkIIGluePcdPostCodeLib.h" +"Pcd\EdkIIGluePcdReportStatusCodeLib.h" +"x64\EdkIIGlueProcessorBind.h" +"Pcd\EdkIIGluePcdIoLib.h" +"Pcd\EdkIIGluePcdTimerLib.h" +"Pcd\EdkIIGluePcdPerformanceLib.h" +<endComponent> diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGluePeim.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGluePeim.h new file mode 100644 index 0000000..a106568 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGluePeim.h @@ -0,0 +1,114 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePeim.h + +Abstract: + + Root include file for PEI Modules + +**/ + + +#ifndef __EDKII_GLUE_PEIM_H__ +#define __EDKII_GLUE_PEIM_H__ + + +// +// Check to make sure TIANO_RELEASE_VERSION is defined +// +#if !defined(TIANO_RELEASE_VERSION) + #error TIANO_RELEASE_VERSION not defined +#elif (TIANO_RELEASE_VERSION == 0) + #error TIANO_RELEASE_VERSION can not be zero +#endif + +// +// General Type & API definitions +// + +#include "Pei.h" +#include "EfiBootScript.h" +#include "EfiImage.h" +#include "EfiPeOptionalHeader.h" +#include "EfiCapsule.h" +#include EFI_PROTOCOL_DEFINITION (DevicePath) +#include "TianoDevicePath.h" + +// +// GUID definitions +// + +#include EFI_GUID_DEFINITION (Apriori) +#include EFI_GUID_DEFINITION (Capsule) +#include EFI_GUID_DEFINITION (DxeServices) +#include EFI_GUID_DEFINITION (Hob) +#include EFI_GUID_DEFINITION (MemoryAllocationHob) +#include EFI_GUID_DEFINITION (FirmwareFileSystem) +#include EFI_GUID_DEFINITION (SmramMemoryReserve) +#include EFI_GUID_DEFINITION (DataHubRecords) +// +// *** NOTE ***: StatusCodeDataTypeId definition differences need to be +// resolved when porting a module to real EDK II +// +#include EFI_GUID_DEFINITION (StatusCodeDataTypeId) + +// +// Ppi definitions +// + +#include EFI_PPI_DEFINITION (BlockIo) +#include EFI_PPI_DEFINITION (BootInRecoveryMode) +#include EFI_PPI_DEFINITION (BootScriptExecuter) +#include EFI_PPI_DEFINITION (CpuIo) +#include EFI_PPI_DEFINITION (DeviceRecoveryModule) +#include EFI_PPI_DEFINITION (DxeIpl) +#include EFI_PPI_DEFINITION (EndOfPeiSignal) +#include EFI_PPI_DEFINITION (FindFv) +#include EFI_PPI_DEFINITION (LoadFile) +#include EFI_PPI_DEFINITION (BootMode) +#include EFI_PPI_DEFINITION (MemoryDiscovered) +#include EFI_PPI_DEFINITION (PciCfg) +#include EFI_PPI_DEFINITION (Variable) +#include EFI_PPI_DEFINITION (RecoveryModule) +#include EFI_PPI_DEFINITION (Reset) +#include EFI_PPI_DEFINITION (S3Resume) +#include EFI_PPI_DEFINITION (SecPlatforminformation) +#include EFI_PPI_DEFINITION (SectionExtraction) +#include EFI_PPI_DEFINITION (Security) +#include EFI_PPI_DEFINITION (Smbus) +#include EFI_PPI_DEFINITION (Stall) +#include EFI_PPI_DEFINITION (StatusCode) + + +#include "Common\EdkIIGlueDefinitionChangesPeim.h" + +// +// EdkII Glue Library Class headers +// + +#include "EdkIIGlueBase.h" +#include "Library\EdkIIGlueDebugLib.h" +#include "Library\EdkIIGluePostCodeLib.h" +#include "Library\EdkIIGlueReportStatusCodeLib.h" +#include "Library\EdkIIGlueHobLib.h" +#include "Library\EdkIIGlueMemoryAllocationLib.h" +#include "Library\EdkIIGlueSmbusLib.h" +#include "Library\EdkIIGluePeiServicesLib.h" +#include "Library\EdkIIGluePeiServicesTablePointerLib.h" +#include "Library\EdkIIGlueResourcePublicationLib.h" +#include "Library\EdkIIGluePeimEntryPoint.h" +#include "Library\EdkIIGlueFirmwarePerformanceLib.h" + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueUefi.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueUefi.h new file mode 100644 index 0000000..5ed0f1e --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/EdkIIGlueUefi.h @@ -0,0 +1,178 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefi.h + +Abstract: + + Root include file for UEFI modules. + +**/ + + +#ifndef __EDKII_GLUE_UEFI_H__ +#define __EDKII_GLUE_UEFI_H__ + + +// +// Check to make sure EFI_SPECIFICATION_VERSION and TIANO_RELEASE_VERSION are defined. +// also check for legal combinations +// +#if !defined(EFI_SPECIFICATION_VERSION) + #error EFI_SPECIFICATION_VERSION not defined +#elif !defined(TIANO_RELEASE_VERSION) + #error TIANO_RELEASE_VERSION not defined +#elif TIANO_RELEASE_VERSION == 0x00000000 + +// +// UEFI mode with no Tiano extensions is legal +// +#elif (TIANO_RELEASE_VERSION <= 0x00080005) && (EFI_SPECIFICATION_VERSION >= 0x00020000) + #error Illegal combination of EFI_SPECIFICATION_VERSION and EDK_RELEASE_VERSION versions +#endif + +// +// General Type & API definitions +// + +#include "EfiSpec.h" +#include "EfiPxe.h" + + +// +// Protocols from EFI 1.10 that got thier names fixed in UEFI 2.0 +// +#include EFI_PROTOCOL_DEFINITION(LoadedImage) +#include EFI_PROTOCOL_DEFINITION(SimpleTextIn) +#include EFI_PROTOCOL_DEFINITION(SimpleTextOut) +#include EFI_PROTOCOL_DEFINITION(SerialIo) +#include EFI_PROTOCOL_DEFINITION(LoadFile) +#include EFI_PROTOCOL_DEFINITION(SimpleFileSystem) +#include EFI_PROTOCOL_DEFINITION(DiskIo) +#include EFI_PROTOCOL_DEFINITION(BlockIo) +#include EFI_PROTOCOL_DEFINITION(UnicodeCollation) +#include EFI_PROTOCOL_DEFINITION(SimpleNetwork) +#include EFI_PROTOCOL_DEFINITION(EfiNetworkInterfaceIdentifier) +#include EFI_PROTOCOL_DEFINITION(PxeBaseCode) +#include EFI_PROTOCOL_DEFINITION(PxeBaseCodeCallBack) + +// +// EFI 1.10 Protocols +// +#include EFI_PROTOCOL_DEFINITION(Bis) +#include EFI_PROTOCOL_DEFINITION(BusSpecificDriverOverride) +#include EFI_PROTOCOL_DEFINITION(ComponentName) +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +#include EFI_PROTOCOL_DEFINITION (ComponentName2) +#endif +#include EFI_PROTOCOL_DEFINITION(DebugPort) +#include EFI_PROTOCOL_DEFINITION(DebugSupport) +#include EFI_PROTOCOL_DEFINITION(Decompress) +#include EFI_PROTOCOL_DEFINITION(DriverBinding) +#include EFI_PROTOCOL_DEFINITION(DriverConfiguration) +#include EFI_PROTOCOL_DEFINITION(DriverDiagnostics) +#include EFI_PROTOCOL_DEFINITION(Ebc) +#include EFI_PROTOCOL_DEFINITION(EfiNetworkInterfaceIdentifier) +#include EFI_PROTOCOL_DEFINITION(FileInfo) +#include EFI_PROTOCOL_DEFINITION(FileSystemInfo) +#include EFI_PROTOCOL_DEFINITION(FileSystemVolumeLabelInfo) +#include EFI_PROTOCOL_DEFINITION(PciIo) +#include EFI_PROTOCOL_DEFINITION(PciRootBridgeIo) +#include EFI_PROTOCOL_DEFINITION(PlatformDriverOverride) +#include EFI_PROTOCOL_DEFINITION(SimplePointer) +#include EFI_PROTOCOL_DEFINITION(ScsiPassThru) +#include EFI_PROTOCOL_DEFINITION(UsbIo) +#include EFI_PROTOCOL_DEFINITION(UsbHostController) +#include EFI_PROTOCOL_DEFINITION(UgaDraw) + +// +// EFI 1.10 GUIDs +// +#include EFI_GUID_DEFINITION(Acpi) +#include EFI_GUID_DEFINITION(DebugImageInfoTable) +#include EFI_GUID_DEFINITION(GlobalVariable) +#include EFI_GUID_DEFINITION(Gpt) +#include EFI_GUID_DEFINITION(PcAnsi) +#include EFI_GUID_DEFINITION(SmBios) +#include EFI_GUID_DEFINITION(SalSystemTable) + + +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +// +// UEFI 2.0 Protocols and GUIDs +// +// check here: currently not implementated +//#include EFI_PROTOCOL_DEFINITION(AuthenticationInfo) +#include EFI_PROTOCOL_DEFINITION(DevicePathUtilities) +#include EFI_PROTOCOL_DEFINITION(DevicePathToText) +#include EFI_PROTOCOL_DEFINITION(DevicePathFromText) +#include EFI_PROTOCOL_DEFINITION(GraphicsOutput) +#include EFI_PROTOCOL_DEFINITION(EdidDiscovered) +#include EFI_PROTOCOL_DEFINITION(EdidActive) +#include EFI_PROTOCOL_DEFINITION(EdidOverride) +#include EFI_PROTOCOL_DEFINITION(ScsiIo) +#include EFI_PROTOCOL_DEFINITION(ScsiPassThruExt) +#include EFI_PROTOCOL_DEFINITION(IScsiInitiatorName) +#include EFI_PROTOCOL_DEFINITION(UsbHostController) +#include EFI_PROTOCOL_DEFINITION(TapeIo) +#include EFI_PROTOCOL_DEFINITION(ManagedNetwork) +#include EFI_PROTOCOL_DEFINITION(Arp) +#include EFI_PROTOCOL_DEFINITION(Dhcp4) +#include EFI_PROTOCOL_DEFINITION(IP4) +#include EFI_PROTOCOL_DEFINITION(IP4Config) +#include EFI_PROTOCOL_DEFINITION(Tcp4) +#include EFI_PROTOCOL_DEFINITION(Udp4) +#include EFI_PROTOCOL_DEFINITION(Mtftp4) +#include EFI_PROTOCOL_DEFINITION(ServiceBinding) +#include EFI_PROTOCOL_DEFINITION(Hash) +#include EFI_GUID_DEFINITION(EventGroup) +//#include <Guid/WinCertificateUefi.h> +#endif + +#if (TIANO_RELEASE_VERSION > 0x00080005) +// +// Need due to R8.5 Tiano contamination of UEFI enumes. +// There is a UEFI library that does things the new way and the old way +// This is why these definitions are need in Uefi.h +// +#include EFI_GUID_DEFINITION (EventLegacyBios) +#include EFI_GUID_DEFINITION (FrameworkDevicePath) +#endif + +// +// R8.x Library headers used by EdkII Glue Libraries +// +#include "TianoSpecTypes.h" +#include "TianoSpecApi.h" +#include "TianoSpecDevicePath.h" +#include "EfiDriverLib.h" + +#include "Common\EdkIIGlueDefinitionChangesBase.h" + +// +// EdkII Glue Library Class headers +// + +#include "EdkIIGlueBase.h" +#include "Library\EdkIIGlueUefiDecompressLib.h" +#include "Library\EdkIIGlueDevicePathLib.h" +#include "Library\EdkIIGlueUefiBootServicesTableLib.h" +#include "Library\EdkIIGlueUefiDriverEntryPoint.h" +#include "Library\EdkIIGlueUefiDriverModelLib.h" +#include "Library\EdkIIGlueUefiLib.h" +#include "Library\EdkIIGlueUefiRuntimeServicesTableLib.h" + +extern UINT8 _gEdkIIGlueDriverModelProtocolSelection; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Ia32/EdkIIGlueProcessorBind.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Ia32/EdkIIGlueProcessorBind.h new file mode 100644 index 0000000..55a1e96 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Ia32/EdkIIGlueProcessorBind.h @@ -0,0 +1,41 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueProcessorBind.h + +Abstract: + + Processor specific definitions + +--*/ + +#ifndef __EDKII_GLUE_PROCESSOR_BIND_H__ +#define __EDKII_GLUE_PROCESSOR_BIND_H__ + +// +// The Microsoft* C compiler can removed references to unreferenced data items +// if the /OPT:REF linker option is used. We defined a macro as this is a +// a non standard extension +// +#if _MSC_EXTENSIONS + #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany) +#else + #define GLOBAL_REMOVE_IF_UNREFERENCED +#endif + +#ifndef MDE_CPU_IA32 + #define MDE_CPU_IA32 +#endif + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueBaseLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueBaseLib.h new file mode 100644 index 0000000..7eadcf0 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueBaseLib.h @@ -0,0 +1,5109 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueBaseLib.h + +Abstract: + + Memory-only library functions with no library constructor/destructor + +--*/ + +#ifndef __EDKII_GLUE_BASE_LIB_H__ +#define __EDKII_GLUE_BASE_LIB_H__ + + +// +// String Functions +// +#define StrCpy(_Dest, _Source) GlueStrCpy(_Dest, _Source) +#define StrnCpy(_Dest, _Source, _Length) GlueStrnCpy(_Dest, _Source, _Length) +#define StrLen(_String) GlueStrLen(_String) +#define StrSize(_String) GlueStrSize(_String) +#define StrCmp(_FristString, _SecondString) GlueStrCmp(_FristString, _SecondString) +#define StrnCmp(_FirstString, _SecondString, _Length) GlueStrnCmp(_FirstString, _SecondString, _Length) +#define StrCat(_Dest, _Source) GlueStrCat(_Dest, _Source) +#define StrnCat(_Dest, _Source, _Length) GlueStrnCat(_Dest, _Source, _Length) + +// +// Linked List +// +#define InitializeListHead(_ListHead) GlueInitializeListHead(_ListHead) +#define InsertHeadList(_ListHead, _Entry ) GlueInsertHeadList(_ListHead, _Entry) +#define InsertTailList(_ListHead, _Entry) GlueInsertTailList(_ListHead, _Entry) +#define GetFirstNode(_List) GlueGetFirstNode(_List) +#define GetNextNode(_List, _Node) GlueGetNextNode(_List, _Node) +#define IsListEmpty(_ListHead) GlueIsListEmpty(_ListHead) +#define IsNull(_List, _Node) GlueIsNull(_List, _Node) +#define IsNodeAtEnd(_List, _Node) GlueIsNodeAtEnd(_List, _Node) +#define SwapListEntries(_FirstEntry, _SecondEntry) GlueSwapListEntries(_FirstEntry, _SecondEntry) +#define RemoveEntryList(_Entry) GlueRemoveEntryList(_Entry) + +// +// Math Functions +// +#define LShiftU64(_Op, _Count) GlueLShiftU64(_Op, _Count) +#define RShiftU64(_Op, _Count) GlueRShiftU64(_Op, _Count) +#define MultU64x32(_Multiplicand, _Multiplier) GlueMultU64x32(_Multiplicand, _Multiplier) +#define DivU64x32(_Dividend, _Divisor) GlueDivU64x32(_Dividend, _Divisor) + +// +// Others +// +#define GetInterruptState() GlueGetInterruptState() + + +// +// Definitions for architecture specific types +// These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER +// + +// +// SPIN_LOCK +// +typedef VOLATILE UINTN SPIN_LOCK; + +#if defined (MDE_CPU_IA32) +// +// IA32 context buffer used by SetJump() and LongJump() +// +typedef struct { + UINT32 Ebx; + UINT32 Esi; + UINT32 Edi; + UINT32 Ebp; + UINT32 Esp; + UINT32 Eip; +} BASE_LIBRARY_JUMP_BUFFER; + +#elif defined (MDE_CPU_IPF) +// +// IPF context buffer used by SetJump() and LongJump() +// +typedef struct { + UINT64 F2[2]; + UINT64 F3[2]; + UINT64 F4[2]; + UINT64 F5[2]; + UINT64 F16[2]; + UINT64 F17[2]; + UINT64 F18[2]; + UINT64 F19[2]; + UINT64 F20[2]; + UINT64 F21[2]; + UINT64 F22[2]; + UINT64 F23[2]; + UINT64 F24[2]; + UINT64 F25[2]; + UINT64 F26[2]; + UINT64 F27[2]; + UINT64 F28[2]; + UINT64 F29[2]; + UINT64 F30[2]; + UINT64 F31[2]; + UINT64 R4; + UINT64 R5; + UINT64 R6; + UINT64 R7; + UINT64 SP; + UINT64 BR0; + UINT64 BR1; + UINT64 BR2; + UINT64 BR3; + UINT64 BR4; + UINT64 BR5; + UINT64 InitialUNAT; + UINT64 AfterSpillUNAT; + UINT64 PFS; + UINT64 BSP; + UINT64 Predicates; + UINT64 LoopCount; + UINT64 FPSR; +} BASE_LIBRARY_JUMP_BUFFER; + +#elif defined (MDE_CPU_X64) +// +// X64 context buffer used by SetJump() and LongJump() +// +typedef struct { + UINT64 Rbx; + UINT64 Rsp; + UINT64 Rbp; + UINT64 Rdi; + UINT64 Rsi; + UINT64 R12; + UINT64 R13; + UINT64 R14; + UINT64 R15; + UINT64 Rip; +} BASE_LIBRARY_JUMP_BUFFER; + +#elif defined (MDE_CPU_EBC) +// +// EBC context buffer used by SetJump() and LongJump() +// +typedef struct { + UINT64 R0; + UINT64 R1; + UINT64 R2; + UINT64 R3; + UINT64 IP; +} BASE_LIBRARY_JUMP_BUFFER; + +#else +#error Unknown Processor Type +#endif + +// +// String Services +// + +/** + Copies one Null-terminated Unicode string to another Null-terminated Unicode + string and returns the new Unicode string. + + This function copies the contents of the Unicode string Source to the Unicode + string Destination, and returns Destination. If Source and Destination + overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + + @return Destiantion + +**/ +CHAR16 * +EFIAPI +GlueStrCpy ( + OUT CHAR16 *Destination, + IN CONST CHAR16 *Source + ); +/** + Copies one Null-terminated Unicode string with a maximum length to another + Null-terminated Unicode string with a maximum length and returns the new + Unicode string. + + This function copies the contents of the Unicode string Source to the Unicode + string Destination, and returns Destination. At most, Length Unicode + characters are copied from Source to Destination. If Length is 0, then + Destination is returned unmodified. If Length is greater that the number of + Unicode characters in Source, then Destination is padded with Null Unicode + characters. If Source and Destination overlap, then the results are + undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + @param Length Maximum number of Unicode characters to copy. + + @return Destination + +**/ +CHAR16 * +EFIAPI +GlueStrnCpy ( + OUT CHAR16 *Destination, + IN CONST CHAR16 *Source, + IN UINTN Length + ); +/** + Returns the length of a Null-terminated Unicode string. + + This function returns the number of Unicode characters in the Null-terminated + Unicode string specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @return The length of String. + +**/ +UINTN +EFIAPI +GlueStrLen ( + IN CONST CHAR16 *String + ); +/** + Returns the size of a Null-terminated Unicode string in bytes, including the + Null terminator. + + This function returns the size, in bytes, of the Null-terminated Unicode + string specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @return The size of String. + +**/ +UINTN +EFIAPI +GlueStrSize ( + IN CONST CHAR16 *String + ); +/** + Compares two Null-terminated Unicode strings, and returns the difference + between the first mismatched Unicode characters. + + This function compares the Null-terminated Unicode string FirstString to the + Null-terminated Unicode string SecondString. If FirstString is identical to + SecondString, then 0 is returned. Otherwise, the value returned is the first + mismatched Unicode character in SecondString subtracted from the first + mismatched Unicode character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated Unicode string. + @param SecondString Pointer to a Null-terminated Unicode string. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +GlueStrCmp ( + IN CONST CHAR16 *FirstString, + IN CONST CHAR16 *SecondString + ); +/** + Compares two Null-terminated Unicode strings with maximum lengths, and + returns the difference between the first mismatched Unicode characters. + + This function compares the Null-terminated Unicode string FirstString to the + Null-terminated Unicode string SecondString. At most, Length Unicode + characters will be compared. If Length is 0, then 0 is returned. If + FirstString is identical to SecondString, then 0 is returned. Otherwise, the + value returned is the first mismatched Unicode character in SecondString + subtracted from the first mismatched Unicode character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated Unicode string. + @param SecondString Pointer to a Null-terminated Unicode string. + @param Length Maximum number of Unicode characters to compare. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +GlueStrnCmp ( + IN CONST CHAR16 *FirstString, + IN CONST CHAR16 *SecondString, + IN UINTN Length + ); +/** + Concatenates one Null-terminated Unicode string to another Null-terminated + Unicode string, and returns the concatenated Unicode string. + + This function concatenates two Null-terminated Unicode strings. The contents + of Null-terminated Unicode string Source are concatenated to the end of + Null-terminated Unicode string Destination. The Null-terminated concatenated + Unicode String is returned. If Source and Destination overlap, then the + results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Destination contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination + and Source results in a Unicode string with more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + + @return Destination + +**/ +CHAR16 * +EFIAPI +GlueStrCat ( + IN OUT CHAR16 *Destination, + IN CONST CHAR16 *Source + ); +/** + Concatenates one Null-terminated Unicode string with a maximum length to the + end of another Null-terminated Unicode string, and returns the concatenated + Unicode string. + + This function concatenates two Null-terminated Unicode strings. The contents + of Null-terminated Unicode string Source are concatenated to the end of + Null-terminated Unicode string Destination, and Destination is returned. At + most, Length Unicode characters are concatenated from Source to the end of + Destination, and Destination is always Null-terminated. If Length is 0, then + Destination is returned unmodified. If Source and Destination overlap, then + the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Destination contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination + and Source results in a Unicode string with more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + @param Length Maximum number of Unicode characters to concatenate from + Source. + + @return Destination + +**/ +CHAR16 * +EFIAPI +GlueStrnCat ( + IN OUT CHAR16 *Destination, + IN CONST CHAR16 *Source, + IN UINTN Length + ); + +//;;## ...AMI_OVERRIDE... Support Unicode Str To Ascii Str start. +/** + Convert one Null-terminated Unicode string to a Null-terminated + ASCII string and returns the ASCII string. + + This function converts the content of the Unicode string Source + to the ASCII string Destination by copying the lower 8 bits of + each Unicode character. It returns Destination. + + If any Unicode characters in Source contain non-zero value in + the upper 8 bits, then ASSERT(). + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and Source contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + If PcdMaximumAsciiStringLength is not zero, and Source contains more + than PcdMaximumAsciiStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Source Pointer to a Null-terminated Unicode string. + @param Destination Pointer to a Null-terminated ASCII string. + + @reture Destination + +**/ +CHAR8 * +EFIAPI +UnicodeStrToAsciiStr ( + IN CONST CHAR16 *Source, + OUT CHAR8 *Destination + ); +//;;## ...AMI_OVERRIDE... Support Unicode Str To Ascii Str end. + +/** + Copies one Null-terminated ASCII string to another Null-terminated ASCII + string and returns the new ASCII string. + + This function copies the contents of the ASCII string Source to the ASCII + string Destination, and returns Destination. If Source and Destination + overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrCpy ( + OUT CHAR8 *Destination, + IN CONST CHAR8 *Source + ); +/** + Copies one Null-terminated ASCII string with a maximum length to another + Null-terminated ASCII string with a maximum length and returns the new ASCII + string. + + This function copies the contents of the ASCII string Source to the ASCII + string Destination, and returns Destination. At most, Length ASCII characters + are copied from Source to Destination. If Length is 0, then Destination is + returned unmodified. If Length is greater that the number of ASCII characters + in Source, then Destination is padded with Null ASCII characters. If Source + and Destination overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + @param Length Maximum number of ASCII characters to copy. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrnCpy ( + OUT CHAR8 *Destination, + IN CONST CHAR8 *Source, + IN UINTN Length + ); +/** + Returns the length of a Null-terminated ASCII string. + + This function returns the number of ASCII characters in the Null-terminated + ASCII string specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @return The length of String. + +**/ +UINTN +EFIAPI +AsciiStrLen ( + IN CONST CHAR8 *String + ); +/** + Returns the size of a Null-terminated ASCII string in bytes, including the + Null terminator. + + This function returns the size, in bytes, of the Null-terminated ASCII string + specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @return The size of String. + +**/ +UINTN +EFIAPI +AsciiStrSize ( + IN CONST CHAR8 *String + ); +/** + Compares two Null-terminated ASCII strings, and returns the difference + between the first mismatched ASCII characters. + + This function compares the Null-terminated ASCII string FirstString to the + Null-terminated ASCII string SecondString. If FirstString is identical to + SecondString, then 0 is returned. Otherwise, the value returned is the first + mismatched ASCII character in SecondString subtracted from the first + mismatched ASCII character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more + than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated ASCII string. + @param SecondString Pointer to a Null-terminated ASCII string. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +AsciiStrCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString + ); +/** + Performs a case insensitive comparison of two Null-terminated ASCII strings, + and returns the difference between the first mismatched ASCII characters. + + This function performs a case insensitive comparison of the Null-terminated + ASCII string FirstString to the Null-terminated ASCII string SecondString. If + FirstString is identical to SecondString, then 0 is returned. Otherwise, the + value returned is the first mismatched lower case ASCII character in + SecondString subtracted from the first mismatched lower case ASCII character + in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more + than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated ASCII string. + @param SecondString Pointer to a Null-terminated ASCII string. + + @retval 0 FirstString is identical to SecondString using case insensitive + comparisons. + @retval !=0 FirstString is not identical to SecondString using case + insensitive comparisons. + +**/ +INTN +EFIAPI +AsciiStriCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString + ); +/** + Compares two Null-terminated ASCII strings with maximum lengths, and returns + the difference between the first mismatched ASCII characters. + + This function compares the Null-terminated ASCII string FirstString to the + Null-terminated ASCII string SecondString. At most, Length ASCII characters + will be compared. If Length is 0, then 0 is returned. If FirstString is + identical to SecondString, then 0 is returned. Otherwise, the value returned + is the first mismatched ASCII character in SecondString subtracted from the + first mismatched ASCII character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param FirstString Pointer to a Null-terminated ASCII string. + @param SecondString Pointer to a Null-terminated ASCII string. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +AsciiStrnCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString, + IN UINTN Length + ); +/** + Concatenates one Null-terminated ASCII string to another Null-terminated + ASCII string, and returns the concatenated ASCII string. + + This function concatenates two Null-terminated ASCII strings. The contents of + Null-terminated ASCII string Source are concatenated to the end of Null- + terminated ASCII string Destination. The Null-terminated concatenated ASCII + String is returned. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Destination contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and concatenating Destination and + Source results in a ASCII string with more than PcdMaximumAsciiStringLength + ASCII characters, then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrCat ( + IN OUT CHAR8 *Destination, + IN CONST CHAR8 *Source + ); +/** + Concatenates one Null-terminated ASCII string with a maximum length to the + end of another Null-terminated ASCII string, and returns the concatenated + ASCII string. + + This function concatenates two Null-terminated ASCII strings. The contents + of Null-terminated ASCII string Source are concatenated to the end of Null- + terminated ASCII string Destination, and Destination is returned. At most, + Length ASCII characters are concatenated from Source to the end of + Destination, and Destination is always Null-terminated. If Length is 0, then + Destination is returned unmodified. If Source and Destination overlap, then + the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Destination contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and + Source results in a ASCII string with more than PcdMaximumAsciiStringLength + ASCII characters not including the Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + @param Length Maximum number of ASCII characters to concatenate from + Source. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrnCat ( + IN OUT CHAR8 *Destination, + IN CONST CHAR8 *Source, + IN UINTN Length + ); +/** + Converts an 8-bit value to an 8-bit BCD value. + + Converts the 8-bit value specified by Value to BCD. The BCD value is + returned. + + If Value >= 100, then ASSERT(). + + @param Value The 8-bit value to convert to BCD. Range 0..99. + + @return The BCD value + +**/ +UINT8 +EFIAPI +DecimalToBcd8 ( + IN UINT8 Value + ); + +/** + Converts an 8-bit BCD value to an 8-bit value. + + Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit + value is returned. + + If Value >= 0xA0, then ASSERT(). + If (Value & 0x0F) >= 0x0A, then ASSERT(). + + @param Value The 8-bit BCD value to convert to an 8-bit value. + + @return The 8-bit value is returned. + +**/ +UINT8 +EFIAPI +BcdToDecimal8 ( + IN UINT8 Value + ); + +// +// LIST_ENTRY definition +// +typedef struct _LIST_ENTRY LIST_ENTRY; + +struct _LIST_ENTRY { + LIST_ENTRY *ForwardLink; + LIST_ENTRY *BackLink; +}; + +// +// Linked List Functions and Macros +// + +/** + Initializes the head node of a doubly linked list that is declared as a + global variable in a module. + + Initializes the forward and backward links of a new linked list. After + initializing a linked list with this macro, the other linked list functions + may be used to add and remove nodes from the linked list. This macro results + in smaller executables by initializing the linked list in the data section, + instead if calling the InitializeListHead() function to perform the + equivalent operation. + + @param ListHead The head note of a list to initiailize. + +**/ +#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead} + +/** + Initializes the head node of a doubly linked list, and returns the pointer to + the head node of the doubly linked list. + + Initializes the forward and backward links of a new linked list. After + initializing a linked list with this function, the other linked list + functions may be used to add and remove nodes from the linked list. It is up + to the caller of this function to allocate the memory for ListHead. + + If ListHead is NULL, then ASSERT(). + + @param ListHead A pointer to the head node of a new doubly linked list. + + @return ListHead + +**/ +LIST_ENTRY * +EFIAPI +GlueInitializeListHead ( + IN LIST_ENTRY *ListHead + ); + +/** + Adds a node to the beginning of a doubly linked list, and returns the pointer + to the head node of the doubly linked list. + + Adds the node Entry at the beginning of the doubly linked list denoted by + ListHead, and returns ListHead. + + If ListHead is NULL, then ASSERT(). + If Entry is NULL, then ASSERT(). + If ListHead was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number + of nodes in ListHead, including the ListHead node, is greater than or + equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param ListHead A pointer to the head node of a doubly linked list. + @param Entry A pointer to a node that is to be inserted at the beginning + of a doubly linked list. + + @return ListHead + +**/ +LIST_ENTRY * +EFIAPI +GlueInsertHeadList ( + IN LIST_ENTRY *ListHead, + IN LIST_ENTRY *Entry + ); + +/** + Adds a node to the end of a doubly linked list, and returns the pointer to + the head node of the doubly linked list. + + Adds the node Entry to the end of the doubly linked list denoted by ListHead, + and returns ListHead. + + If ListHead is NULL, then ASSERT(). + If Entry is NULL, then ASSERT(). + If ListHead was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number + of nodes in ListHead, including the ListHead node, is greater than or + equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param ListHead A pointer to the head node of a doubly linked list. + @param Entry A pointer to a node that is to be added at the end of the + doubly linked list. + + @return ListHead + +**/ +LIST_ENTRY * +EFIAPI +GlueInsertTailList ( + IN LIST_ENTRY *ListHead, + IN LIST_ENTRY *Entry + ); + +/** + Retrieves the first node of a doubly linked list. + + Returns the first node of a doubly linked list. List must have been + initialized with InitializeListHead(). If List is empty, then NULL is + returned. + + If List is NULL, then ASSERT(). + If List was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + + @return The first node of a doubly linked list. + @retval NULL The list is empty. + +**/ +LIST_ENTRY * +EFIAPI +GlueGetFirstNode ( + IN CONST LIST_ENTRY *List + ); + +/** + Retrieves the next node of a doubly linked list. + + Returns the node of a doubly linked list that follows Node. List must have + been initialized with InitializeListHead(). If List is empty, then List is + returned. + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and List contains more than + PcdMaximumLinkedListLenth nodes, then ASSERT(). + If Node is not a node in List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @return Pointer to the next node if one exists. Otherwise a null value which + is actually List is returned. + +**/ +LIST_ENTRY * +EFIAPI +GlueGetNextNode ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + +/** + Checks to see if a doubly linked list is empty or not. + + Checks to see if the doubly linked list is empty. If the linked list contains + zero nodes, this function returns TRUE. Otherwise, it returns FALSE. + + If ListHead is NULL, then ASSERT(). + If ListHead was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + + @param ListHead A pointer to the head node of a doubly linked list. + + @retval TRUE The linked list is empty. + @retval FALSE The linked list is not empty. + +**/ +BOOLEAN +EFIAPI +GlueIsListEmpty ( + IN CONST LIST_ENTRY *ListHead + ); + +/** + Determines if a node in a doubly linked list is null. + + Returns FALSE if Node is one of the nodes in the doubly linked list specified + by List. Otherwise, TRUE is returned. List must have been initialized with + InitializeListHead(). + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + If Node is not a node in List and Node is not equal to List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @retval TRUE Node is one of the nodes in the doubly linked list. + @retval FALSE Node is not one of the nodes in the doubly linked list. + +**/ +BOOLEAN +EFIAPI +GlueIsNull ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + +/** + Determines if a node the last node in a doubly linked list. + + Returns TRUE if Node is the last node in the doubly linked list specified by + List. Otherwise, FALSE is returned. List must have been initialized with + InitializeListHead(). + + If List is NULL, then ASSERT(). + If Node is NULL, then ASSERT(). + If List was not initialized with InitializeListHead(), then ASSERT(). + If PcdMaximumLinkedListLenth is not zero, and the number of nodes + in List, including the List node, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + If Node is not a node in List, then ASSERT(). + + @param List A pointer to the head node of a doubly linked list. + @param Node A pointer to a node in the doubly linked list. + + @retval TRUE Node is the last node in the linked list. + @retval FALSE Node is not the last node in the linked list. + +**/ +BOOLEAN +EFIAPI +GlueIsNodeAtEnd ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + +/** + Swaps the location of two nodes in a doubly linked list, and returns the + first node after the swap. + + If FirstEntry is identical to SecondEntry, then SecondEntry is returned. + Otherwise, the location of the FirstEntry node is swapped with the location + of the SecondEntry node in a doubly linked list. SecondEntry must be in the + same double linked list as FirstEntry and that double linked list must have + been initialized with InitializeListHead(). SecondEntry is returned after the + nodes are swapped. + + If FirstEntry is NULL, then ASSERT(). + If SecondEntry is NULL, then ASSERT(). + If SecondEntry and FirstEntry are not in the same linked list, then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes in the + linked list containing the FirstEntry and SecondEntry nodes, including + the FirstEntry and SecondEntry nodes, is greater than or equal to + PcdMaximumLinkedListLength, then ASSERT(). + + @param FirstEntry A pointer to a node in a linked list. + @param SecondEntry A pointer to another node in the same linked list. + +**/ +LIST_ENTRY * +EFIAPI +GlueSwapListEntries ( + IN LIST_ENTRY *FirstEntry, + IN LIST_ENTRY *SecondEntry + ); + +/** + Removes a node from a doubly linked list, and returns the node that follows + the removed node. + + Removes the node Entry from a doubly linked list. It is up to the caller of + this function to release the memory used by this node if that is required. On + exit, the node following Entry in the doubly linked list is returned. If + Entry is the only node in the linked list, then the head node of the linked + list is returned. + + If Entry is NULL, then ASSERT(). + If Entry is the head node of an empty list, then ASSERT(). + If PcdMaximumLinkedListLength is not zero, and the number of nodes in the + linked list containing Entry, including the Entry node, is greater than + or equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param Entry A pointer to a node in a linked list + + @return Entry + +**/ +LIST_ENTRY * +EFIAPI +GlueRemoveEntryList ( + IN CONST LIST_ENTRY *Entry + ); + +// +// Math Services +// + +/** + Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled + with zeros. The shifted value is returned. + + This function shifts the 64-bit value Operand to the left by Count bits. The + low Count bits are set to zero. The shifted value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to shift left. + @param Count The number of bits to shift left. + + @return Operand << Count + +**/ +UINT64 +EFIAPI +GlueLShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Shifts a 64-bit integer right between 0 and 63 bits. This high bits are + filled with zeros. The shifted value is returned. + + This function shifts the 64-bit value Operand to the right by Count bits. The + high Count bits are set to zero. The shifted value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to shift right. + @param Count The number of bits to shift right. + + @return Operand >> Count + +**/ +UINT64 +EFIAPI +GlueRShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled + with original integer's bit 63. The shifted value is returned. + + This function shifts the 64-bit value Operand to the right by Count bits. The + high Count bits are set to bit 63 of Operand. The shifted value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to shift right. + @param Count The number of bits to shift right. + + @return Operand >> Count + +**/ +UINT64 +EFIAPI +ARShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits + with the high bits that were rotated. + + This function rotates the 32-bit value Operand to the left by Count bits. The + low Count bits are fill with the high Count bits of Operand. The rotated + value is returned. + + If Count is greater than 31, then ASSERT(). + + @param Operand The 32-bit operand to rotate left. + @param Count The number of bits to rotate left. + + @return Operand <<< Count + +**/ +UINT32 +EFIAPI +LRotU32 ( + IN UINT32 Operand, + IN UINTN Count + ); + +/** + Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits + with the low bits that were rotated. + + This function rotates the 32-bit value Operand to the right by Count bits. + The high Count bits are fill with the low Count bits of Operand. The rotated + value is returned. + + If Count is greater than 31, then ASSERT(). + + @param Operand The 32-bit operand to rotate right. + @param Count The number of bits to rotate right. + + @return Operand >>> Count + +**/ +UINT32 +EFIAPI +RRotU32 ( + IN UINT32 Operand, + IN UINTN Count + ); + +/** + Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits + with the high bits that were rotated. + + This function rotates the 64-bit value Operand to the left by Count bits. The + low Count bits are fill with the high Count bits of Operand. The rotated + value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to rotate left. + @param Count The number of bits to rotate left. + + @return Operand <<< Count + +**/ +UINT64 +EFIAPI +LRotU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits + with the high low bits that were rotated. + + This function rotates the 64-bit value Operand to the right by Count bits. + The high Count bits are fill with the low Count bits of Operand. The rotated + value is returned. + + If Count is greater than 63, then ASSERT(). + + @param Operand The 64-bit operand to rotate right. + @param Count The number of bits to rotate right. + + @return Operand >>> Count + +**/ +UINT64 +EFIAPI +RRotU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Returns the bit position of the lowest bit set in a 32-bit value. + + This function computes the bit position of the lowest bit set in the 32-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 31 is returned. + + @param Operand The 32-bit operand to evaluate. + + @return Position of the lowest bit set in Operand if found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +LowBitSet32 ( + IN UINT32 Operand + ); + +/** + Returns the bit position of the lowest bit set in a 64-bit value. + + This function computes the bit position of the lowest bit set in the 64-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 63 is returned. + + @param Operand The 64-bit operand to evaluate. + + @return Position of the lowest bit set in Operand if found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +LowBitSet64 ( + IN UINT64 Operand + ); + +/** + Returns the bit position of the highest bit set in a 32-bit value. Equivalent + to log2(x). + + This function computes the bit position of the highest bit set in the 32-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 31 is returned. + + @param Operand The 32-bit operand to evaluate. + + @return Position of the highest bit set in Operand if found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +HighBitSet32 ( + IN UINT32 Operand + ); + +/** + Returns the bit position of the highest bit set in a 64-bit value. Equivalent + to log2(x). + + This function computes the bit position of the highest bit set in the 64-bit + value specified by Operand. If Operand is zero, then -1 is returned. + Otherwise, a value between 0 and 63 is returned. + + @param Operand The 64-bit operand to evaluate. + + @return Position of the highest bit set in Operand if found. + @retval -1 Operand is zero. + +**/ +INTN +EFIAPI +HighBitSet64 ( + IN UINT64 Operand + ); + +/** + Returns the value of the highest bit set in a 32-bit value. Equivalent to + 1 << HighBitSet32(x). + + This function computes the value of the highest bit set in the 32-bit value + specified by Operand. If Operand is zero, then zero is returned. + + @param Operand The 32-bit operand to evaluate. + + @return 1 << HighBitSet32(Operand) + @retval 0 Operand is zero. + +**/ +UINT32 +EFIAPI +GetPowerOfTwo32 ( + IN UINT32 Operand + ); + +/** + Returns the value of the highest bit set in a 64-bit value. Equivalent to + 1 << HighBitSet64(x). + + This function computes the value of the highest bit set in the 64-bit value + specified by Operand. If Operand is zero, then zero is returned. + + @param Operand The 64-bit operand to evaluate. + + @return 1 << HighBitSet64(Operand) + @retval 0 Operand is zero. + +**/ +UINT64 +EFIAPI +GetPowerOfTwo64 ( + IN UINT64 Operand + ); + +/** + Switches the endianess of a 16-bit integer. + + This function swaps the bytes in a 16-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Operand A 16-bit unsigned value. + + @return The byte swaped Operand. + +**/ +UINT16 +EFIAPI +SwapBytes16 ( + IN UINT16 Value + ); + +/** + Switches the endianess of a 32-bit integer. + + This function swaps the bytes in a 32-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Operand A 32-bit unsigned value. + + @return The byte swaped Operand. + +**/ +UINT32 +EFIAPI +SwapBytes32 ( + IN UINT32 Value + ); + +/** + Switches the endianess of a 64-bit integer. + + This function swaps the bytes in a 64-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Operand A 64-bit unsigned value. + + @return The byte swaped Operand. + +**/ +UINT64 +EFIAPI +SwapBytes64 ( + IN UINT64 Value + ); + +/** + Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and + generates a 64-bit unsigned result. + + This function multiples the 64-bit unsigned value Multiplicand by the 32-bit + unsigned value Multiplier and generates a 64-bit unsigned result. This 64- + bit unsigned result is returned. + + If the result overflows, then ASSERT(). + + @param Multiplicand A 64-bit unsigned value. + @param Multiplier A 32-bit unsigned value. + + @return Multiplicand * Multiplier + +**/ +UINT64 +EFIAPI +GlueMultU64x32 ( + IN UINT64 Multiplicand, + IN UINT32 Multiplier + ); + +/** + Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and + generates a 64-bit unsigned result. + + This function multiples the 64-bit unsigned value Multiplicand by the 64-bit + unsigned value Multiplier and generates a 64-bit unsigned result. This 64- + bit unsigned result is returned. + + If the result overflows, then ASSERT(). + + @param Multiplicand A 64-bit unsigned value. + @param Multiplier A 64-bit unsigned value. + + @return Multiplicand * Multiplier + +**/ +UINT64 +EFIAPI +MultU64x64 ( + IN UINT64 Multiplicand, + IN UINT64 Multiplier + ); + +/** + Multiples a 64-bit signed integer by a 64-bit signed integer and generates a + 64-bit signed result. + + This function multiples the 64-bit signed value Multiplicand by the 64-bit + signed value Multiplier and generates a 64-bit signed result. This 64-bit + signed result is returned. + + If the result overflows, then ASSERT(). + + @param Multiplicand A 64-bit signed value. + @param Multiplier A 64-bit signed value. + + @return Multiplicand * Multiplier + +**/ +INT64 +EFIAPI +MultS64x64 ( + IN INT64 Multiplicand, + IN INT64 Multiplier + ); + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates + a 64-bit unsigned result. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. This + function returns the 64-bit unsigned quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + + @return Dividend / Divisor + +**/ +UINT64 +EFIAPI +GlueDivU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor + ); + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates + a 32-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 32-bit remainder. This function + returns the 32-bit unsigned remainder. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + + @return Dividend % Divisor + +**/ +UINT32 +EFIAPI +ModU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor + ); + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates + a 64-bit unsigned result and an optional 32-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 32-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + @param Remainder A pointer to a 32-bit unsigned value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor + +**/ +UINT64 +EFIAPI +DivU64x32Remainder ( + IN UINT64 Dividend, + IN UINT32 Divisor, + OUT UINT32 *Remainder OPTIONAL + ); + +/** + Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates + a 64-bit unsigned result and an optional 64-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 64-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 64-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit unsigned value. + @param Divisor A 64-bit unsigned value. + @param Remainder A pointer to a 64-bit unsigned value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor + +**/ +UINT64 +EFIAPI +DivU64x64Remainder ( + IN UINT64 Dividend, + IN UINT64 Divisor, + OUT UINT64 *Remainder OPTIONAL + ); + +/** + Divides a 64-bit signed integer by a 64-bit signed integer and generates a + 64-bit signed result and a optional 64-bit signed remainder. + + This function divides the 64-bit signed value Dividend by the 64-bit signed + value Divisor and generates a 64-bit signed quotient. If Remainder is not + NULL, then the 64-bit signed remainder is returned in Remainder. This + function returns the 64-bit signed quotient. + + If Divisor is 0, then ASSERT(). + + @param Dividend A 64-bit signed value. + @param Divisor A 64-bit signed value. + @param Remainder A pointer to a 64-bit signed value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor + +**/ +INT64 +EFIAPI +DivS64x64Remainder ( + IN INT64 Dividend, + IN INT64 Divisor, + OUT INT64 *Remainder OPTIONAL + ); + +/** + Reads a 16-bit value from memory that may be unaligned. + + This function returns the 16-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 16-bit value that may be unaligned. + + @return *Uint16 + +**/ +UINT16 +EFIAPI +ReadUnaligned16 ( + IN CONST UINT16 *Uint16 + ); + +/** + Writes a 16-bit value to memory that may be unaligned. + + This function writes the 16-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 16-bit value that may be unaligned. + @param Value 16-bit value to write to Buffer. + + @return Value + +**/ +UINT16 +EFIAPI +WriteUnaligned16 ( + OUT UINT16 *Uint16, + IN UINT16 Value + ); + +/** + Reads a 24-bit value from memory that may be unaligned. + + This function returns the 24-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 24-bit value that may be unaligned. + + @return The value read. + +**/ +UINT32 +EFIAPI +ReadUnaligned24 ( + IN CONST UINT32 *Buffer + ); + +/** + Writes a 24-bit value to memory that may be unaligned. + + This function writes the 24-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 24-bit value that may be unaligned. + @param Value 24-bit value to write to Buffer. + + @return The value written. + +**/ +UINT32 +EFIAPI +WriteUnaligned24 ( + OUT UINT32 *Buffer, + IN UINT32 Value + ); + +/** + Reads a 32-bit value from memory that may be unaligned. + + This function returns the 32-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 32-bit value that may be unaligned. + + @return *Uint32 + +**/ +UINT32 +EFIAPI +ReadUnaligned32 ( + IN CONST UINT32 *Uint32 + ); + +/** + Writes a 32-bit value to memory that may be unaligned. + + This function writes the 32-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 32-bit value that may be unaligned. + @param Value 32-bit value to write to Buffer. + + @return Value + +**/ +UINT32 +EFIAPI +WriteUnaligned32 ( + OUT UINT32 *Uint32, + IN UINT32 Value + ); + +/** + Reads a 64-bit value from memory that may be unaligned. + + This function returns the 64-bit value pointed to by Buffer. The function + guarantees that the read operation does not produce an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 64-bit value that may be unaligned. + + @return *Uint64 + +**/ +UINT64 +EFIAPI +ReadUnaligned64 ( + IN CONST UINT64 *Uint64 + ); + +/** + Writes a 64-bit value to memory that may be unaligned. + + This function writes the 64-bit value specified by Value to Buffer. Value is + returned. The function guarantees that the write operation does not produce + an alignment fault. + + If the Buffer is NULL, then ASSERT(). + + @param Buffer Pointer to a 64-bit value that may be unaligned. + @param Value 64-bit value to write to Buffer. + + @return Value + +**/ +UINT64 +EFIAPI +WriteUnaligned64 ( + OUT UINT64 *Uint64, + IN UINT64 Value + ); + +// +// Bit Field Functions +// + +/** + Returns a bit field from an 8-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The bit field read. + +**/ +UINT8 +EFIAPI +BitFieldRead8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an 8-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 8-bit value is + returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldWrite8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + +/** + Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise inclusive OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 8-bit value is returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with the read value from the value + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldOr8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + +/** + Reads a bit field from an 8-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 8-bit value is returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the read value from the value. + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldAnd8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + +/** + Reads a bit field from an 8-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + inclusive OR with value specified by OrData. All other bits in Operand are + preserved. The new 8-bit value is returned. + + If 8-bit operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 8-bit value. + +**/ +UINT8 +EFIAPI +BitFieldAndThenOr8 ( + IN UINT8 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Returns a bit field from a 16-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The bit field read. + +**/ +UINT16 +EFIAPI +BitFieldRead16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a 16-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 16-bit value is + returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldWrite16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + +/** + Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise inclusive OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 16-bit value is returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with the read value from the value + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldOr16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + +/** + Reads a bit field from a 16-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 16-bit value is returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the read value from the value + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldAnd16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + +/** + Reads a bit field from a 16-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + inclusive OR with value specified by OrData. All other bits in Operand are + preserved. The new 16-bit value is returned. + + If 16-bit operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 16-bit value. + +**/ +UINT16 +EFIAPI +BitFieldAndThenOr16 ( + IN UINT16 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Returns a bit field from a 32-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The bit field read. + +**/ +UINT32 +EFIAPI +BitFieldRead32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a 32-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 32-bit value is + returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldWrite32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise inclusive OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 32-bit value is returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the read value from the value + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldOr32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field from a 32-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 32-bit value is returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the value + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldAnd32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field from a 32-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + inclusive OR with value specified by OrData. All other bits in Operand are + preserved. The new 32-bit value is returned. + + If 32-bit operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 32-bit value. + +**/ +UINT32 +EFIAPI +BitFieldAndThenOr32 ( + IN UINT32 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Returns a bit field from a 64-bit value. + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + + @return The bit field read. + +**/ +UINT64 +EFIAPI +BitFieldRead64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a 64-bit value, and returns the result. + + Writes Value to the bit field specified by the StartBit and the EndBit in + Operand. All other bits in Operand are preserved. The new 64-bit value is + returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param Value New value of the bit field. + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldWrite64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 Value + ); + +/** + Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the + result. + + Performs a bitwise inclusive OR between the bit field specified by StartBit + and EndBit in Operand and the value specified by OrData. All other bits in + Operand are preserved. The new 64-bit value is returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param OrData The value to OR with the read value from the value + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldOr64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 OrData + ); + +/** + Reads a bit field from a 64-bit value, performs a bitwise AND, and returns + the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new 64-bit value is returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the value + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldAnd64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData + ); + +/** + Reads a bit field from a 64-bit value, performs a bitwise AND followed by a + bitwise OR, and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData, followed by a bitwise + inclusive OR with value specified by OrData. All other bits in Operand are + preserved. The new 64-bit value is returned. + + If 64-bit operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the value. + @param OrData The value to OR with the result of the AND operation. + + @return The new 64-bit value. + +**/ +UINT64 +EFIAPI +BitFieldAndThenOr64 ( + IN UINT64 Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData, + IN UINT64 OrData + ); + +// +// Base Library Synchronization Functions +// + +/** + Retrieves the architecture specific spin lock alignment requirements for + optimal spin lock performance. + + This function retrieves the spin lock alignment requirements for optimal + performance on a given CPU architecture. The spin lock alignment must be a + power of two and is returned by this function. If there are no alignment + requirements, then 1 must be returned. The spin lock synchronization + functions must function correctly if the spin lock size and alignment values + returned by this function are not used at all. These values are hints to the + consumers of the spin lock synchronization functions to obtain optimal spin + lock performance. + + @return The architecture specific spin lock alignment. + +**/ +UINTN +EFIAPI +GetSpinLockProperties ( + VOID + ); + +/** + Initializes a spin lock to the released state and returns the spin lock. + + This function initializes the spin lock specified by SpinLock to the released + state, and returns SpinLock. Optimal performance can be achieved by calling + GetSpinLockProperties() to determine the size and alignment requirements for + SpinLock. + + If SpinLock is NULL, then ASSERT(). + + @param SpinLock A pointer to the spin lock to initialize to the released + state. + + @return SpinLock + +**/ +SPIN_LOCK * +EFIAPI +InitializeSpinLock ( + IN SPIN_LOCK *SpinLock + ); + +/** + Waits until a spin lock can be placed in the acquired state. + + This function checks the state of the spin lock specified by SpinLock. If + SpinLock is in the released state, then this function places SpinLock in the + acquired state and returns SpinLock. Otherwise, this function waits + indefinitely for the spin lock to be released, and then places it in the + acquired state and returns SpinLock. All state transitions of SpinLock must + be performed using MP safe mechanisms. + + If SpinLock is NULL, then ASSERT(). + If SpinLock was not initialized with InitializeSpinLock(), then ASSERT(). + If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in + PcdSpinLockTimeout microseconds, then ASSERT(). + + @param SpinLock A pointer to the spin lock to place in the acquired state. + + @return SpinLock + +**/ +SPIN_LOCK * +EFIAPI +AcquireSpinLock ( + IN SPIN_LOCK *SpinLock + ); + +/** + Attempts to place a spin lock in the acquired state. + + This function checks the state of the spin lock specified by SpinLock. If + SpinLock is in the released state, then this function places SpinLock in the + acquired state and returns TRUE. Otherwise, FALSE is returned. All state + transitions of SpinLock must be performed using MP safe mechanisms. + + If SpinLock is NULL, then ASSERT(). + If SpinLock was not initialized with InitializeSpinLock(), then ASSERT(). + + @param SpinLock A pointer to the spin lock to place in the acquired state. + + @retval TRUE SpinLock was placed in the acquired state. + @retval FALSE SpinLock could not be acquired. + +**/ +BOOLEAN +EFIAPI +AcquireSpinLockOrFail ( + IN SPIN_LOCK *SpinLock + ); + +/** + Releases a spin lock. + + This function places the spin lock specified by SpinLock in the release state + and returns SpinLock. + + If SpinLock is NULL, then ASSERT(). + If SpinLock was not initialized with InitializeSpinLock(), then ASSERT(). + + @param SpinLock A pointer to the spin lock to release. + + @return SpinLock + +**/ +SPIN_LOCK * +EFIAPI +ReleaseSpinLock ( + IN SPIN_LOCK *SpinLock + ); + +/** + Performs an atomic increment of an 32-bit unsigned integer. + + Performs an atomic increment of the 32-bit unsigned integer specified by + Value and returns the incremented value. The increment operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + If Value is NULL, then ASSERT(). + + @param Value A pointer to the 32-bit value to increment. + + @return The incremented value. + +**/ +UINT32 +EFIAPI +InterlockedIncrement ( + IN UINT32 *Value + ); + +/** + Performs an atomic decrement of an 32-bit unsigned integer. + + Performs an atomic decrement of the 32-bit unsigned integer specified by + Value and returns the decremented value. The decrement operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + If Value is NULL, then ASSERT(). + + @param Value A pointer to the 32-bit value to decrement. + + @return The decremented value. + +**/ +UINT32 +EFIAPI +InterlockedDecrement ( + IN UINT32 *Value + ); + +/** + Performs an atomic compare exchange operation on a 32-bit unsigned integer. + + Performs an atomic compare exchange operation on the 32-bit unsigned integer + specified by Value. If Value is equal to CompareValue, then Value is set to + ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, + then Value is returned. The compare exchange operation must be performed using + MP safe mechanisms. + + If Value is NULL, then ASSERT(). + + @param Value A pointer to the 32-bit value for the compare exchange + operation. + @param CompareValue 32-bit value used in compare operation. + @param ExchangeValue 32-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +UINT32 +EFIAPI +InterlockedCompareExchange32 ( + IN OUT VOLATILE UINT32 *Value, + IN UINT32 CompareValue, + IN UINT32 ExchangeValue + ); + +/** + Performs an atomic compare exchange operation on a 64-bit unsigned integer. + + Performs an atomic compare exchange operation on the 64-bit unsigned integer specified + by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and + CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. + The compare exchange operation must be performed using MP safe mechanisms. + + If Value is NULL, then ASSERT(). + + @param Value A pointer to the 64-bit value for the compare exchange + operation. + @param CompareValue 64-bit value used in compare operation. + @param ExchangeValue 64-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +UINT64 +EFIAPI +InterlockedCompareExchange64 ( + IN OUT VOLATILE UINT64 *Value, + IN UINT64 CompareValue, + IN UINT64 ExchangeValue + ); + +/** + Performs an atomic compare exchange operation on a pointer value. + + Performs an atomic compare exchange operation on the pointer value specified + by Value. If Value is equal to CompareValue, then Value is set to + ExchangeValue and CompareValue is returned. If Value is not equal to + CompareValue, then Value is returned. The compare exchange operation must be + performed using MP safe mechanisms. + + If Value is NULL, then ASSERT(). + + @param Value A pointer to the pointer value for the compare exchange + operation. + @param CompareValue Pointer value used in compare operation. + @param ExchangeValue Pointer value used in exchange operation. + +**/ +VOID * +EFIAPI +InterlockedCompareExchangePointer ( + IN OUT VOLATILE VOID **Value, + IN VOID *CompareValue, + IN VOID *ExchangeValue + ); + +// +// Base Library CPU Functions +// +typedef +VOID +(EFIAPI *SWITCH_STACK_ENTRY_POINT) ( + IN VOID *Context1, OPTIONAL + IN VOID *Context2 OPTIONAL + ); + +/** + Used to serialize load and store operations. + + All loads and stores that proceed calls to this function are guaranteed to be + globally visible when this function returns. + +**/ +VOID +EFIAPI +MemoryFence ( + VOID + ); + +/** + Saves the current CPU context that can be restored with a call to LongJump() + and returns 0. + + Saves the current CPU context in the buffer specified by JumpBuffer and + returns 0. The initial call to SetJump() must always return 0. Subsequent + calls to LongJump() cause a non-zero value to be returned by SetJump(). + + If JumpBuffer is NULL, then ASSERT(). + For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT(). + + @param JumpBuffer A pointer to CPU context buffer. + + @retval 0 Indicates a return from SetJump(). + +**/ +UINTN +EFIAPI +SetJump ( + OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer + ); + +/** + Restores the CPU context that was saved with SetJump(). + + Restores the CPU context from the buffer specified by JumpBuffer. This + function never returns to the caller. Instead is resumes execution based on + the state of JumpBuffer. + + If JumpBuffer is NULL, then ASSERT(). + For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT(). + If Value is 0, then ASSERT(). + + @param JumpBuffer A pointer to CPU context buffer. + @param Value The value to return when the SetJump() context is + restored and must be non-zero. + +**/ +VOID +EFIAPI +LongJump ( + IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, + IN UINTN Value + ); + +/** + Enables CPU interrupts. + + Enables CPU interrupts. + +**/ +VOID +EFIAPI +EnableInterrupts ( + VOID + ); + +/** + Disables CPU interrupts. + + Disables CPU interrupts. + +**/ +VOID +EFIAPI +DisableInterrupts ( + VOID + ); + +/** + Disables CPU interrupts and returns the interrupt state prior to the disable + operation. + + Disables CPU interrupts and returns the interrupt state prior to the disable + operation. + + @retval TRUE CPU interrupts were enabled on entry to this call. + @retval FALSE CPU interrupts were disabled on entry to this call. + +**/ +BOOLEAN +EFIAPI +SaveAndDisableInterrupts ( + VOID + ); + +/** + Enables CPU interrupts for the smallest window required to capture any + pending interrupts. + + Enables CPU interrupts for the smallest window required to capture any + pending interrupts. + +**/ +VOID +EFIAPI +EnableDisableInterrupts ( + VOID + ); + +/** + Retrieves the current CPU interrupt state. + + Retrieves the current CPU interrupt state. Returns TRUE is interrupts are + currently enabled. Otherwise returns FALSE. + + @retval TRUE CPU interrupts are enabled. + @retval FALSE CPU interrupts are disabled. + +**/ +BOOLEAN +EFIAPI +GlueGetInterruptState ( + VOID + ); + +/** + Set the current CPU interrupt state. + + Sets the current CPU interrupt state to the state specified by + InterruptState. If InterruptState is TRUE, then interrupts are enabled. If + InterruptState is FALSE, then interrupts are disabled. InterruptState is + returned. + + @param InterruptState TRUE if interrupts should enabled. FALSE if + interrupts should be disabled. + + @return InterruptState + +**/ +BOOLEAN +EFIAPI +SetInterruptState ( + IN BOOLEAN InterruptState + ); + +/** + Places the CPU in a sleep state until an interrupt is received. + + Places the CPU in a sleep state until an interrupt is received. If interrupts + are disabled prior to calling this function, then the CPU will be placed in a + sleep state indefinitely. + +**/ +VOID +EFIAPI +CpuSleep ( + VOID + ); + +/** + Requests CPU to pause for a short period of time. + + Requests CPU to pause for a short period of time. Typically used in MP + systems to prevent memory starvation while waiting for a spin lock. + +**/ +VOID +EFIAPI +CpuPause ( + VOID + ); + +/** + Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. + + Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. + +**/ +VOID +EFIAPI +CpuFlushTlb ( + VOID + ); + +/** + Transfers control to a function starting with a new stack. + + Transfers control to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + @param EntryPoint A pointer to function to call with the new stack. + @param Context1 A pointer to the context to pass into the EntryPoint + function. + @param Context2 A pointer to the context to pass into the EntryPoint + function. + @param NewStack A pointer to the new stack to use for the EntryPoint + function. + +**/ +VOID +EFIAPI +SwitchStack ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + +/** + Generates a breakpoint on the CPU. + + Generates a breakpoint on the CPU. The breakpoint must be implemented such + that code can resume normal execution after the breakpoint. + +**/ +VOID +EFIAPI +CpuBreakpoint ( + VOID + ); + +/** + Executes an infinite loop. + + Forces the CPU to execute an infinite loop. A debugger may be used to skip + past the loop and the code that follows the loop must execute properly. This + implies that the infinite loop must not cause the code that follow it to be + optimized away. + +**/ +VOID +EFIAPI +CpuDeadLoop ( + VOID + ); + +// +// IA32 and X64 Specific Functions +// +// +// Byte packed structure for 16-bit Real Mode EFLAGS +// +typedef union { + struct { + UINT32 CF:1; // Carry Flag + UINT32 Reserved_0:1; // Reserved + UINT32 PF:1; // Parity Flag + UINT32 Reserved_1:1; // Reserved + UINT32 AF:1; // Auxiliary Carry Flag + UINT32 Reserved_2:1; // Reserved + UINT32 ZF:1; // Zero Flag + UINT32 SF:1; // Sign Flag + UINT32 TF:1; // Trap Flag + UINT32 IF:1; // Interrupt Enable Flag + UINT32 DF:1; // Direction Flag + UINT32 OF:1; // Overflow Flag + UINT32 IOPL:2; // I/O Privilege Level + UINT32 NT:1; // Nested Task + UINT32 Reserved_3:1; // Reserved + } Bits; + UINT16 Uint16; +} IA32_FLAGS16; + +// +// Byte packed structure for EFLAGS/RFLAGS +// 32-bits on IA-32 +// 64-bits on X64. The upper 32-bits on X64 are reserved +// +typedef union { + struct { + UINT32 CF:1; // Carry Flag + UINT32 Reserved_0:1; // Reserved + UINT32 PF:1; // Parity Flag + UINT32 Reserved_1:1; // Reserved + UINT32 AF:1; // Auxiliary Carry Flag + UINT32 Reserved_2:1; // Reserved + UINT32 ZF:1; // Zero Flag + UINT32 SF:1; // Sign Flag + UINT32 TF:1; // Trap Flag + UINT32 IF:1; // Interrupt Enable Flag + UINT32 DF:1; // Direction Flag + UINT32 OF:1; // Overflow Flag + UINT32 IOPL:2; // I/O Privilege Level + UINT32 NT:1; // Nested Task + UINT32 Reserved_3:1; // Reserved + UINT32 RF:1; // Resume Flag + UINT32 VM:1; // Virtual 8086 Mode + UINT32 AC:1; // Alignment Check + UINT32 VIF:1; // Virtual Interrupt Flag + UINT32 VIP:1; // Virtual Interrupt Pending + UINT32 ID:1; // ID Flag + UINT32 Reserved_4:10; // Reserved + } Bits; + UINTN UintN; +} IA32_EFLAGS32; + +// +// Byte packed structure for Control Register 0 (CR0) +// 32-bits on IA-32 +// 64-bits on X64. The upper 32-bits on X64 are reserved +// +typedef union { + struct { + UINT32 PE:1; // Protection Enable + UINT32 MP:1; // Monitor Coprocessor + UINT32 EM:1; // Emulation + UINT32 TS:1; // Task Switched + UINT32 ET:1; // Extension Type + UINT32 NE:1; // Numeric Error + UINT32 Reserved_0:10; // Reserved + UINT32 WP:1; // Write Protect + UINT32 Reserved_1:1; // Reserved + UINT32 AM:1; // Alignment Mask + UINT32 Reserved_2:10; // Reserved + UINT32 NW:1; // Mot Write-through + UINT32 CD:1; // Cache Disable + UINT32 PG:1; // Paging + } Bits; + UINTN UintN; +} IA32_CR0; + +// +// Byte packed structure for Control Register 4 (CR4) +// 32-bits on IA-32 +// 64-bits on X64. The upper 32-bits on X64 are reserved +// +typedef union { + struct { + UINT32 VME:1; // Virtual-8086 Mode Extensions + UINT32 PVI:1; // Protected-Mode Virtual Interrupts + UINT32 TSD:1; // Time Stamp Disable + UINT32 DE:1; // Debugging Extensions + UINT32 PSE:1; // Page Size Extensions + UINT32 PAE:1; // Physical Address Extension + UINT32 MCE:1; // Machine Check Enable + UINT32 PGE:1; // Page Global Enable + UINT32 PCE:1; // Performance Monitoring Counter + // Enable + UINT32 OSFXSR:1; // Operating System Support for + // FXSAVE and FXRSTOR instructions + UINT32 OSXMMEXCPT:1; // Operating System Support for + // Unmasked SIMD Floating Point + // Exceptions + UINT32 Reserved_0:2; // Reserved + UINT32 VMXE:1; // VMX Enable + UINT32 Reserved_1:18; // Reseved + } Bits; + UINTN UintN; +} IA32_CR4; + +// +// Byte packed structure for an IDTR, GDTR, LDTR descriptor +/// @bug How to make this structure byte-packed in a compiler independent way? +// +#pragma pack (1) +typedef struct { + UINT16 Limit; + UINTN Base; +} IA32_DESCRIPTOR; +#pragma pack () + +#define IA32_IDT_GATE_TYPE_TASK 0x85 +#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86 +#define IA32_IDT_GATE_TYPE_TRAP_16 0x87 +#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E +#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F + +// +// Byte packed structure for an Interrupt Gate Descriptor +// +typedef union { + struct { + UINT32 OffsetLow:16; // Offset bits 15..0 + UINT32 Selector:16; // Selector + UINT32 Reserved_0:8; // Reserved + UINT32 GateType:8; // Gate Type. See #defines above + UINT32 OffsetHigh:16; // Offset bits 31..16 + } Bits; + UINT64 Uint64; +} IA32_IDT_GATE_DESCRIPTOR; + +// +// Byte packed structure for an FP/SSE/SSE2 context +// +typedef struct { + UINT8 Buffer[512]; +} IA32_FX_BUFFER; + +// +// Structures for the 16-bit real mode thunks +// +typedef struct { + UINT32 Reserved1; + UINT32 Reserved2; + UINT32 Reserved3; + UINT32 Reserved4; + UINT8 BL; + UINT8 BH; + UINT16 Reserved5; + UINT8 DL; + UINT8 DH; + UINT16 Reserved6; + UINT8 CL; + UINT8 CH; + UINT16 Reserved7; + UINT8 AL; + UINT8 AH; + UINT16 Reserved8; +} IA32_BYTE_REGS; + +typedef struct { + UINT16 DI; + UINT16 Reserved1; + UINT16 SI; + UINT16 Reserved2; + UINT16 BP; + UINT16 Reserved3; + UINT16 SP; + UINT16 Reserved4; + UINT16 BX; + UINT16 Reserved5; + UINT16 DX; + UINT16 Reserved6; + UINT16 CX; + UINT16 Reserved7; + UINT16 AX; + UINT16 Reserved8; +} IA32_WORD_REGS; + +typedef struct { + UINT32 EDI; + UINT32 ESI; + UINT32 EBP; + UINT32 ESP; + UINT32 EBX; + UINT32 EDX; + UINT32 ECX; + UINT32 EAX; + UINT16 DS; + UINT16 ES; + UINT16 FS; + UINT16 GS; + IA32_EFLAGS32 EFLAGS; + UINT32 Eip; + UINT16 CS; + UINT16 SS; +} IA32_DWORD_REGS; + +typedef union { + IA32_DWORD_REGS E; + IA32_WORD_REGS X; + IA32_BYTE_REGS H; +} IA32_REGISTER_SET; + +// +// Byte packed structure for an 16-bit real mode thunks +// +typedef struct { + IA32_REGISTER_SET *RealModeState; + VOID *RealModeBuffer; + UINT32 RealModeBufferSize; + UINT32 ThunkAttributes; +} THUNK_CONTEXT; + +#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001 +#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002 +#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004 + +/** + Retrieves CPUID information. + + Executes the CPUID instruction with EAX set to the value specified by Index. + This function always returns Index. + If Eax is not NULL, then the value of EAX after CPUID is returned in Eax. + If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx. + If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx. + If Edx is not NULL, then the value of EDX after CPUID is returned in Edx. + This function is only available on IA-32 and X64. + + @param Index The 32-bit value to load into EAX prior to invoking the CPUID + instruction. + @param Eax Pointer to the 32-bit EAX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + @param Ebx Pointer to the 32-bit EBX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + @param Ecx Pointer to the 32-bit ECX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + @param Edx Pointer to the 32-bit EDX value returned by the CPUID + instruction. This is an optional parameter that may be NULL. + + @return Index + +**/ +UINT32 +EFIAPI +AsmCpuid ( + IN UINT32 Index, + OUT UINT32 *Eax, OPTIONAL + OUT UINT32 *Ebx, OPTIONAL + OUT UINT32 *Ecx, OPTIONAL + OUT UINT32 *Edx OPTIONAL + ); + +/** + Retrieves CPUID information using an extended leaf identifier. + + Executes the CPUID instruction with EAX set to the value specified by Index + and ECX set to the value specified by SubIndex. This function always returns + Index. This function is only available on IA-32 and x64. + + If Eax is not NULL, then the value of EAX after CPUID is returned in Eax. + If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx. + If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx. + If Edx is not NULL, then the value of EDX after CPUID is returned in Edx. + + @param Index The 32-bit value to load into EAX prior to invoking the + CPUID instruction. + @param SubIndex The 32-bit value to load into ECX prior to invoking the + CPUID instruction. + @param Eax Pointer to the 32-bit EAX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + @param Ebx Pointer to the 32-bit EBX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + @param Ecx Pointer to the 32-bit ECX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + @param Edx Pointer to the 32-bit EDX value returned by the CPUID + instruction. This is an optional parameter that may be + NULL. + + @return Index + +**/ +UINT32 +EFIAPI +AsmCpuidEx ( + IN UINT32 Index, + IN UINT32 SubIndex, + OUT UINT32 *Eax, OPTIONAL + OUT UINT32 *Ebx, OPTIONAL + OUT UINT32 *Ecx, OPTIONAL + OUT UINT32 *Edx OPTIONAL + ); + +/** + Returns the lower 32-bits of a Machine Specific Register(MSR). + + Reads and returns the lower 32-bits of the MSR specified by Index. + No parameter checking is performed on Index, and some Index values may cause + CPU exceptions. The caller must either guarantee that Index is valid, or the + caller must set up exception handlers to catch the exceptions. This function + is only available on IA-32 and X64. + + @param Index The 32-bit MSR index to read. + + @return The lower 32 bits of the MSR identified by Index. + +**/ +UINT32 +EFIAPI +AsmReadMsr32 ( + IN UINT32 Index + ); + +/** + Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR). + + Writes the 32-bit value specified by Value to the MSR specified by Index. The + upper 32-bits of the MSR write are set to zero. The 32-bit value written to + the MSR is returned. No parameter checking is performed on Index or Value, + and some of these may cause CPU exceptions. The caller must either guarantee + that Index and Value are valid, or the caller must establish proper exception + handlers. This function is only available on IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param Value The 32-bit value to write to the MSR. + + @return Value + +**/ +UINT32 +EFIAPI +AsmWriteMsr32 ( + IN UINT32 Index, + IN UINT32 Value + ); + +/** + Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and + writes the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR + between the lower 32-bits of the read result and the value specified by + OrData, and writes the result to the 64-bit MSR specified by Index. The lower + 32-bits of the value written to the MSR is returned. No parameter checking is + performed on Index or OrData, and some of these may cause CPU exceptions. The + caller must either guarantee that Index and OrData are valid, or the caller + must establish proper exception handlers. This function is only available on + IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param OrData The value to OR with the read value from the MSR. + + @return The lower 32-bit value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrOr32 ( + IN UINT32 Index, + IN UINT32 OrData + ); + +/** + Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes + the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + lower 32-bits of the read result and the value specified by AndData, and + writes the result to the 64-bit MSR specified by Index. The lower 32-bits of + the value written to the MSR is returned. No parameter checking is performed + on Index or AndData, and some of these may cause CPU exceptions. The caller + must either guarantee that Index and AndData are valid, or the caller must + establish proper exception handlers. This function is only available on IA-32 + and X64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + + @return The lower 32-bit value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrAnd32 ( + IN UINT32 Index, + IN UINT32 AndData + ); + +/** + Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR + on the lower 32-bits, and writes the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + lower 32-bits of the read result and the value specified by AndData + preserving the upper 32-bits, performs a bitwise inclusive OR between the + result of the AND operation and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Address. The lower 32-bits of the value + written to the MSR is returned. No parameter checking is performed on Index, + AndData, or OrData, and some of these may cause CPU exceptions. The caller + must either guarantee that Index, AndData, and OrData are valid, or the + caller must establish proper exception handlers. This function is only + available on IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + @param OrData The value to OR with the result of the AND operation. + + @return The lower 32-bit value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrAndThenOr32 ( + IN UINT32 Index, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a bit field of an MSR. + + Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. The caller must either guarantee that Index is valid, or the caller + must set up exception handlers to catch the exceptions. This function is only + available on IA-32 and X64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The bit field read from the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldRead32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an MSR. + + Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination MSR are preserved. The lower 32-bits of the MSR written is + returned. Extra left bits in Value are stripped. The caller must either + guarantee that Index and the data written is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and X64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldWrite32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the + result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Index. The lower 32-bits of the value + written to the MSR are returned. Extra left bits in OrData are stripped. The + caller must either guarantee that Index and the data written is valid, or + the caller must set up exception handlers to catch the exceptions. This + function is only available on IA-32 and X64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the read value from the MSR. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldOr32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the + result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + read result and the value specified by AndData, and writes the result to the + 64-bit MSR specified by Index. The lower 32-bits of the value written to the + MSR are returned. Extra left bits in AndData are stripped. The caller must + either guarantee that Index and the data written is valid, or the caller must + set up exception handlers to catch the exceptions. This function is only + available on IA-32 and X64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the MSR. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldAnd32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a + bitwise inclusive OR between the read result and the value specified by + AndData, and writes the result to the 64-bit MSR specified by Index. The + lower 32-bits of the value written to the MSR are returned. Extra left bits + in both AndData and OrData are stripped. The caller must either guarantee + that Index and the data written is valid, or the caller must set up exception + handlers to catch the exceptions. This function is only available on IA-32 + and X64. + + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the MSR. + @param OrData The value to OR with the result of the AND operation. + + @return The lower 32-bit of the value written to the MSR. + +**/ +UINT32 +EFIAPI +AsmMsrBitFieldAndThenOr32 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Returns a 64-bit Machine Specific Register(MSR). + + Reads and returns the 64-bit MSR specified by Index. No parameter checking is + performed on Index, and some Index values may cause CPU exceptions. The + caller must either guarantee that Index is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and X64. + + @param Index The 32-bit MSR index to read. + + @return The value of the MSR identified by Index. + +**/ +UINT64 +EFIAPI +AsmReadMsr64 ( + IN UINT32 Index + ); + +/** + Writes a 64-bit value to a Machine Specific Register(MSR), and returns the + value. + + Writes the 64-bit value specified by Value to the MSR specified by Index. The + 64-bit value written to the MSR is returned. No parameter checking is + performed on Index or Value, and some of these may cause CPU exceptions. The + caller must either guarantee that Index and Value are valid, or the caller + must establish proper exception handlers. This function is only available on + IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param Value The 64-bit value to write to the MSR. + + @return Value + +**/ +UINT64 +EFIAPI +AsmWriteMsr64 ( + IN UINT32 Index, + IN UINT64 Value + ); + +/** + Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result + back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Index. The value written to the MSR is + returned. No parameter checking is performed on Index or OrData, and some of + these may cause CPU exceptions. The caller must either guarantee that Index + and OrData are valid, or the caller must establish proper exception handlers. + This function is only available on IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param OrData The value to OR with the read value from the MSR. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrOr64 ( + IN UINT32 Index, + IN UINT64 OrData + ); + +/** + Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the + 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + read result and the value specified by OrData, and writes the result to the + 64-bit MSR specified by Index. The value written to the MSR is returned. No + parameter checking is performed on Index or OrData, and some of these may + cause CPU exceptions. The caller must either guarantee that Index and OrData + are valid, or the caller must establish proper exception handlers. This + function is only available on IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrAnd64 ( + IN UINT32 Index, + IN UINT64 AndData + ); + +/** + Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive + OR, and writes the result back to the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between read + result and the value specified by AndData, performs a bitwise inclusive OR + between the result of the AND operation and the value specified by OrData, + and writes the result to the 64-bit MSR specified by Index. The value written + to the MSR is returned. No parameter checking is performed on Index, AndData, + or OrData, and some of these may cause CPU exceptions. The caller must either + guarantee that Index, AndData, and OrData are valid, or the caller must + establish proper exception handlers. This function is only available on IA-32 + and X64. + + @param Index The 32-bit MSR index to write. + @param AndData The value to AND with the read value from the MSR. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrAndThenOr64 ( + IN UINT32 Index, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + Reads a bit field of an MSR. + + Reads the bit field in the 64-bit MSR. The bit field is specified by the + StartBit and the EndBit. The value of the bit field is returned. The caller + must either guarantee that Index is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and X64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + + @return The value read from the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldRead64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an MSR. + + Writes Value to a bit field in a 64-bit MSR. The bit field is specified by + the StartBit and the EndBit. All other bits in the destination MSR are + preserved. The MSR written is returned. Extra left bits in Value are + stripped. The caller must either guarantee that Index and the data written is + valid, or the caller must set up exception handlers to catch the exceptions. + This function is only available on IA-32 and X64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param Value New value of the bit field. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldWrite64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 Value + ); + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and + writes the result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit MSR specified by Index. The value written to the MSR is + returned. Extra left bits in OrData are stripped. The caller must either + guarantee that Index and the data written is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and X64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param OrData The value to OR with the read value from the bit field. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldOr64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 OrData + ); + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the + result back to the bit field in the 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND between the + read result and the value specified by AndData, and writes the result to the + 64-bit MSR specified by Index. The value written to the MSR is returned. + Extra left bits in AndData are stripped. The caller must either guarantee + that Index and the data written is valid, or the caller must set up exception + handlers to catch the exceptions. This function is only available on IA-32 + and X64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the bit field. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldAnd64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData + ); + +/** + Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 64-bit MSR. + + Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by + a bitwise inclusive OR between the read result and the value specified by + AndData, and writes the result to the 64-bit MSR specified by Index. The + value written to the MSR is returned. Extra left bits in both AndData and + OrData are stripped. The caller must either guarantee that Index and the data + written is valid, or the caller must set up exception handlers to catch the + exceptions. This function is only available on IA-32 and X64. + + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Index The 32-bit MSR index to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the bit field. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MSR. + +**/ +UINT64 +EFIAPI +AsmMsrBitFieldAndThenOr64 ( + IN UINT32 Index, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + Reads the current value of the EFLAGS register. + + Reads and returns the current value of the EFLAGS register. This function is + only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a + 64-bit value on X64. + + @return EFLAGS on IA-32 or RFLAGS on X64. + +**/ +UINTN +EFIAPI +AsmReadEflags ( + VOID + ); + +/** + Reads the current value of the Control Register 0 (CR0). + + Reads and returns the current value of CR0. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 0 (CR0). + +**/ +UINTN +EFIAPI +AsmReadCr0 ( + VOID + ); + +/** + Reads the current value of the Control Register 2 (CR2). + + Reads and returns the current value of CR2. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 2 (CR2). + +**/ +UINTN +EFIAPI +AsmReadCr2 ( + VOID + ); + +/** + Reads the current value of the Control Register 3 (CR3). + + Reads and returns the current value of CR3. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 3 (CR3). + +**/ +UINTN +EFIAPI +AsmReadCr3 ( + VOID + ); + +/** + Reads the current value of the Control Register 4 (CR4). + + Reads and returns the current value of CR4. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 4 (CR4). + +**/ +UINTN +EFIAPI +AsmReadCr4 ( + VOID + ); + +/** + Writes a value to Control Register 0 (CR0). + + Writes and returns a new value to CR0. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr0 The value to write to CR0. + + @return The value written to CR0. + +**/ +UINTN +EFIAPI +AsmWriteCr0 ( + UINTN Cr0 + ); + +/** + Writes a value to Control Register 2 (CR2). + + Writes and returns a new value to CR2. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr2 The value to write to CR2. + + @return The value written to CR2. + +**/ +UINTN +EFIAPI +AsmWriteCr2 ( + UINTN Cr2 + ); + +/** + Writes a value to Control Register 3 (CR3). + + Writes and returns a new value to CR3. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr3 The value to write to CR3. + + @return The value written to CR3. + +**/ +UINTN +EFIAPI +AsmWriteCr3 ( + UINTN Cr3 + ); + +/** + Writes a value to Control Register 4 (CR4). + + Writes and returns a new value to CR4. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr4 The value to write to CR4. + + @return The value written to CR4. + +**/ +UINTN +EFIAPI +AsmWriteCr4 ( + UINTN Cr4 + ); + +/** + Reads the current value of Debug Register 0 (DR0). + + Reads and returns the current value of DR0. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 0 (DR0). + +**/ +UINTN +EFIAPI +AsmReadDr0 ( + VOID + ); + +/** + Reads the current value of Debug Register 1 (DR1). + + Reads and returns the current value of DR1. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 1 (DR1). + +**/ +UINTN +EFIAPI +AsmReadDr1 ( + VOID + ); + +/** + Reads the current value of Debug Register 2 (DR2). + + Reads and returns the current value of DR2. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 2 (DR2). + +**/ +UINTN +EFIAPI +AsmReadDr2 ( + VOID + ); + +/** + Reads the current value of Debug Register 3 (DR3). + + Reads and returns the current value of DR3. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 3 (DR3). + +**/ +UINTN +EFIAPI +AsmReadDr3 ( + VOID + ); + +/** + Reads the current value of Debug Register 4 (DR4). + + Reads and returns the current value of DR4. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 4 (DR4). + +**/ +UINTN +EFIAPI +AsmReadDr4 ( + VOID + ); + +/** + Reads the current value of Debug Register 5 (DR5). + + Reads and returns the current value of DR5. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 5 (DR5). + +**/ +UINTN +EFIAPI +AsmReadDr5 ( + VOID + ); + +/** + Reads the current value of Debug Register 6 (DR6). + + Reads and returns the current value of DR6. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 6 (DR6). + +**/ +UINTN +EFIAPI +AsmReadDr6 ( + VOID + ); + +/** + Reads the current value of Debug Register 7 (DR7). + + Reads and returns the current value of DR7. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 7 (DR7). + +**/ +UINTN +EFIAPI +AsmReadDr7 ( + VOID + ); + +/** + Writes a value to Debug Register 0 (DR0). + + Writes and returns a new value to DR0. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr0 The value to write to Dr0. + + @return The value written to Debug Register 0 (DR0). + +**/ +UINTN +EFIAPI +AsmWriteDr0 ( + UINTN Dr0 + ); + +/** + Writes a value to Debug Register 1 (DR1). + + Writes and returns a new value to DR1. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr1 The value to write to Dr1. + + @return The value written to Debug Register 1 (DR1). + +**/ +UINTN +EFIAPI +AsmWriteDr1 ( + UINTN Dr1 + ); + +/** + Writes a value to Debug Register 2 (DR2). + + Writes and returns a new value to DR2. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr2 The value to write to Dr2. + + @return The value written to Debug Register 2 (DR2). + +**/ +UINTN +EFIAPI +AsmWriteDr2 ( + UINTN Dr2 + ); + +/** + Writes a value to Debug Register 3 (DR3). + + Writes and returns a new value to DR3. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr3 The value to write to Dr3. + + @return The value written to Debug Register 3 (DR3). + +**/ +UINTN +EFIAPI +AsmWriteDr3 ( + UINTN Dr3 + ); + +/** + Writes a value to Debug Register 4 (DR4). + + Writes and returns a new value to DR4. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr4 The value to write to Dr4. + + @return The value written to Debug Register 4 (DR4). + +**/ +UINTN +EFIAPI +AsmWriteDr4 ( + UINTN Dr4 + ); + +/** + Writes a value to Debug Register 5 (DR5). + + Writes and returns a new value to DR5. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr5 The value to write to Dr5. + + @return The value written to Debug Register 5 (DR5). + +**/ +UINTN +EFIAPI +AsmWriteDr5 ( + UINTN Dr5 + ); + +/** + Writes a value to Debug Register 6 (DR6). + + Writes and returns a new value to DR6. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr6 The value to write to Dr6. + + @return The value written to Debug Register 6 (DR6). + +**/ +UINTN +EFIAPI +AsmWriteDr6 ( + UINTN Dr6 + ); + +/** + Writes a value to Debug Register 7 (DR7). + + Writes and returns a new value to DR7. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr7 The value to write to Dr7. + + @return The value written to Debug Register 7 (DR7). + +**/ +UINTN +EFIAPI +AsmWriteDr7 ( + UINTN Dr7 + ); + +/** + Reads the current value of Code Segment Register (CS). + + Reads and returns the current value of CS. This function is only available on + IA-32 and X64. + + @return The current value of CS. + +**/ +UINT16 +EFIAPI +AsmReadCs ( + VOID + ); + +/** + Reads the current value of Data Segment Register (DS). + + Reads and returns the current value of DS. This function is only available on + IA-32 and X64. + + @return The current value of DS. + +**/ +UINT16 +EFIAPI +AsmReadDs ( + VOID + ); + +/** + Reads the current value of Extra Segment Register (ES). + + Reads and returns the current value of ES. This function is only available on + IA-32 and X64. + + @return The current value of ES. + +**/ +UINT16 +EFIAPI +AsmReadEs ( + VOID + ); + +/** + Reads the current value of FS Data Segment Register (FS). + + Reads and returns the current value of FS. This function is only available on + IA-32 and X64. + + @return The current value of FS. + +**/ +UINT16 +EFIAPI +AsmReadFs ( + VOID + ); + +/** + Reads the current value of GS Data Segment Register (GS). + + Reads and returns the current value of GS. This function is only available on + IA-32 and X64. + + @return The current value of GS. + +**/ +UINT16 +EFIAPI +AsmReadGs ( + VOID + ); + +/** + Reads the current value of Stack Segment Register (SS). + + Reads and returns the current value of SS. This function is only available on + IA-32 and X64. + + @return The current value of SS. + +**/ +UINT16 +EFIAPI +AsmReadSs ( + VOID + ); + +/** + Reads the current value of Task Register (TR). + + Reads and returns the current value of TR. This function is only available on + IA-32 and X64. + + @return The current value of TR. + +**/ +UINT16 +EFIAPI +AsmReadTr ( + VOID + ); + +/** + Reads the current Global Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current GDTR descriptor and returns it in Gdtr. This + function is only available on IA-32 and X64. + + If Gdtr is NULL, then ASSERT(). + + @param Gdtr Pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +AsmReadGdtr ( + OUT IA32_DESCRIPTOR *Gdtr + ); + +/** + Writes the current Global Descriptor Table Register (GDTR) descriptor. + + Writes and the current GDTR descriptor specified by Gdtr. This function is + only available on IA-32 and X64. + + If Gdtr is NULL, then ASSERT(). + + @param Gdtr Pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +AsmWriteGdtr ( + IN CONST IA32_DESCRIPTOR *Gdtr + ); + +/** + Reads the current Interrupt Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current IDTR descriptor and returns it in Idtr. This + function is only available on IA-32 and X64. + + If Idtr is NULL, then ASSERT(). + + @param Idtr Pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +AsmReadIdtr ( + OUT IA32_DESCRIPTOR *Idtr + ); + +/** + Writes the current Interrupt Descriptor Table Register(GDTR) descriptor. + + Writes the current IDTR descriptor and returns it in Idtr. This function is + only available on IA-32 and X64. + + If Idtr is NULL, then ASSERT(). + + @param Idtr Pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +AsmWriteIdtr ( + IN CONST IA32_DESCRIPTOR *Idtr + ); + +/** + Reads the current Local Descriptor Table Register(LDTR) selector. + + Reads and returns the current 16-bit LDTR descriptor value. This function is + only available on IA-32 and X64. + + @return The current selector of LDT. + +**/ +UINT16 +EFIAPI +AsmReadLdtr ( + VOID + ); + +/** + Writes the current Local Descriptor Table Register (GDTR) selector. + + Writes and the current LDTR descriptor specified by Ldtr. This function is + only available on IA-32 and X64. + + @param Ldtr 16-bit LDTR selector value. + +**/ +VOID +EFIAPI +AsmWriteLdtr ( + IN UINT16 Ldtr + ); + +/** + Save the current floating point/SSE/SSE2 context to a buffer. + + Saves the current floating point/SSE/SSE2 state to the buffer specified by + Buffer. Buffer must be aligned on a 16-byte boundary. This function is only + available on IA-32 and X64. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-byte boundary, then ASSERT(). + + @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +AsmFxSave ( + OUT IA32_FX_BUFFER *Buffer + ); + +/** + Restores the current floating point/SSE/SSE2 context from a buffer. + + Restores the current floating point/SSE/SSE2 state from the buffer specified + by Buffer. Buffer must be aligned on a 16-byte boundary. This function is + only available on IA-32 and X64. + + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-byte boundary, then ASSERT(). + If Buffer was not saved with AsmFxSave(), then ASSERT(). + + @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +AsmFxRestore ( + IN CONST IA32_FX_BUFFER *Buffer + ); + +/** + Reads the current value of 64-bit MMX Register #0 (MM0). + + Reads and returns the current value of MM0. This function is only available + on IA-32 and X64. + + @return The current value of MM0. + +**/ +UINT64 +EFIAPI +AsmReadMm0 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #1 (MM1). + + Reads and returns the current value of MM1. This function is only available + on IA-32 and X64. + + @return The current value of MM1. + +**/ +UINT64 +EFIAPI +AsmReadMm1 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #2 (MM2). + + Reads and returns the current value of MM2. This function is only available + on IA-32 and X64. + + @return The current value of MM2. + +**/ +UINT64 +EFIAPI +AsmReadMm2 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #3 (MM3). + + Reads and returns the current value of MM3. This function is only available + on IA-32 and X64. + + @return The current value of MM3. + +**/ +UINT64 +EFIAPI +AsmReadMm3 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #4 (MM4). + + Reads and returns the current value of MM4. This function is only available + on IA-32 and X64. + + @return The current value of MM4. + +**/ +UINT64 +EFIAPI +AsmReadMm4 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #5 (MM5). + + Reads and returns the current value of MM5. This function is only available + on IA-32 and X64. + + @return The current value of MM5. + +**/ +UINT64 +EFIAPI +AsmReadMm5 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #6 (MM6). + + Reads and returns the current value of MM6. This function is only available + on IA-32 and X64. + + @return The current value of MM6. + +**/ +UINT64 +EFIAPI +AsmReadMm6 ( + VOID + ); + +/** + Reads the current value of 64-bit MMX Register #7 (MM7). + + Reads and returns the current value of MM7. This function is only available + on IA-32 and X64. + + @return The current value of MM7. + +**/ +UINT64 +EFIAPI +AsmReadMm7 ( + VOID + ); + +/** + Writes the current value of 64-bit MMX Register #0 (MM0). + + Writes the current value of MM0. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM0. + +**/ +VOID +EFIAPI +AsmWriteMm0 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #1 (MM1). + + Writes the current value of MM1. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM1. + +**/ +VOID +EFIAPI +AsmWriteMm1 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #2 (MM2). + + Writes the current value of MM2. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM2. + +**/ +VOID +EFIAPI +AsmWriteMm2 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #3 (MM3). + + Writes the current value of MM3. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM3. + +**/ +VOID +EFIAPI +AsmWriteMm3 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #4 (MM4). + + Writes the current value of MM4. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM4. + +**/ +VOID +EFIAPI +AsmWriteMm4 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #5 (MM5). + + Writes the current value of MM5. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM5. + +**/ +VOID +EFIAPI +AsmWriteMm5 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #6 (MM6). + + Writes the current value of MM6. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM6. + +**/ +VOID +EFIAPI +AsmWriteMm6 ( + IN UINT64 Value + ); + +/** + Writes the current value of 64-bit MMX Register #7 (MM7). + + Writes the current value of MM7. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM7. + +**/ +VOID +EFIAPI +AsmWriteMm7 ( + IN UINT64 Value + ); + +/** + Reads the current value of Time Stamp Counter (TSC). + + Reads and returns the current value of TSC. This function is only available + on IA-32 and X64. + + @return The current value of TSC + +**/ +UINT64 +EFIAPI +AsmReadTsc ( + VOID + ); + +/** + Reads the current value of a Performance Counter (PMC). + + Reads and returns the current value of performance counter specified by + Index. This function is only available on IA-32 and X64. + + @param Index The 32-bit Performance Counter index to read. + + @return The value of the PMC specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadPmc ( + IN UINT32 Index + ); + +/** + Sets up a monitor buffer that is used by AsmMwait(). + + Executes a MONITOR instruction with the register state specified by Eax, Ecx + and Edx. Returns Eax. This function is only available on IA-32 and X64. + + @param Eax The value to load into EAX or RAX before executing the MONITOR + instruction. + @param Ecx The value to load into ECX or RCX before executing the MONITOR + instruction. + @param Edx The value to load into EDX or RDX before executing the MONITOR + instruction. + + @return Eax + +**/ +UINTN +EFIAPI +AsmMonitor ( + IN UINTN Eax, + IN UINTN Ecx, + IN UINTN Edx + ); + +/** + Executes an MWAIT instruction. + + Executes an MWAIT instruction with the register state specified by Eax and + Ecx. Returns Eax. This function is only available on IA-32 and X64. + + @param Eax The value to load into EAX or RAX before executing the MONITOR + instruction. + @param Ecx The value to load into ECX or RCX before executing the MONITOR + instruction. + + @return Eax + +**/ +UINTN +EFIAPI +AsmMwait ( + IN UINTN Eax, + IN UINTN Ecx + ); + +/** + Executes a WBINVD instruction. + + Executes a WBINVD instruction. This function is only available on IA-32 and + X64. + +**/ +VOID +EFIAPI +AsmWbinvd ( + VOID + ); + +/** + Executes a INVD instruction. + + Executes a INVD instruction. This function is only available on IA-32 and + X64. + +**/ +VOID +EFIAPI +AsmInvd ( + VOID + ); + +/** + Flushes a cache line from all the instruction and data caches within the + coherency domain of the CPU. + + Flushed the cache line specified by LinearAddress, and returns LinearAddress. + This function is only available on IA-32 and X64. + + @param LinearAddress The address of the cache line to flush. If the CPU is + in a physical addressing mode, then LinearAddress is a + physical address. If the CPU is in a virtual + addressing mode, then LinearAddress is a virtual + address. + + @return LinearAddress +**/ +VOID * +EFIAPI +AsmFlushCacheLine ( + IN VOID *LinearAddress + ); + +/** + Enables the 32-bit paging mode on the CPU. + + Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode. This function is + only available on IA-32. After the 32-bit paging mode is enabled, control is + transferred to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + If the current execution mode is not 32-bit protected mode, then ASSERT(). + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit protected mode with flat descriptors. This + means all descriptors must have a base of 0 and a limit of 4GB. + 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat + descriptors. + 4) CR3 must point to valid page tables that will be used once the transition + is complete, and those page tables must guarantee that the pages for this + function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is enabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is enabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is enabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is enabled. + +**/ +VOID +EFIAPI +AsmEnablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + +/** + Disables the 32-bit paging mode on the CPU. + + Disables the 32-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 32-paged protected + mode. This function is only available on IA-32. After the 32-bit paging mode + is disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be NULL. The function EntryPoint must never return. + + If the current execution mode is not 32-bit paged mode, then ASSERT(). + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit paged mode. + 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode. + 4) CR3 must point to valid page tables that guarantee that the pages for + this function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is disabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is disabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is + disabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is disabled. + +**/ +VOID +EFIAPI +AsmDisablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + +/** + Enables the 64-bit paging mode on the CPU. + + Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode with flat + descriptors. This function is only available on IA-32. After the 64-bit + paging mode is enabled, control is transferred to the function specified by + EntryPoint using the new stack specified by NewStack and passing in the + parameters specified by Context1 and Context2. Context1 and Context2 are + optional and may be 0. The function EntryPoint must never return. + + If the current execution mode is not 32-bit protected mode with flat + descriptors, then ASSERT(). + If EntryPoint is 0, then ASSERT(). + If NewStack is 0, then ASSERT(). + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for long mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is enabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is enabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is enabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is enabled. + +**/ +VOID +EFIAPI +AsmEnablePaging64 ( + IN UINT16 CodeSelector, + IN UINT64 EntryPoint, + IN UINT64 Context1, OPTIONAL + IN UINT64 Context2, OPTIONAL + IN UINT64 NewStack + ); + +/** + Disables the 64-bit paging mode on the CPU. + + Disables the 64-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 64-paging mode. + This function is only available on X64. After the 64-bit paging mode is + disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be 0. The function EntryPoint must never return. + + If the current execution mode is not 64-bit paged mode, then ASSERT(). + If EntryPoint is 0, then ASSERT(). + If NewStack is 0, then ASSERT(). + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for 32-bit protected mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is disabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is disabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is disabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is disabled. + +**/ +VOID +EFIAPI +AsmDisablePaging64 ( + IN UINT16 CodeSelector, + IN UINT32 EntryPoint, + IN UINT32 Context1, OPTIONAL + IN UINT32 Context2, OPTIONAL + IN UINT32 NewStack + ); + +// +// 16-bit thunking services +// + +/** + Retrieves the properties for 16-bit thunk functions. + + Computes the size of the buffer and stack below 1MB required to use the + AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This + buffer size is returned in RealModeBufferSize, and the stack size is returned + in ExtraStackSize. If parameters are passed to the 16-bit real mode code, + then the actual minimum stack size is ExtraStackSize plus the maximum number + of bytes that need to be passed to the 16-bit real mode code. + + If RealModeBufferSize is NULL, then ASSERT(). + If ExtraStackSize is NULL, then ASSERT(). + + @param RealModeBufferSize A pointer to the size of the buffer below 1MB + required to use the 16-bit thunk functions. + @param ExtraStackSize A pointer to the extra size of stack below 1MB + that the 16-bit thunk functions require for + temporary storage in the transition to and from + 16-bit real mode. + +**/ +VOID +EFIAPI +AsmGetThunk16Properties ( + OUT UINT32 *RealModeBufferSize, + OUT UINT32 *ExtraStackSize + ); + +/** + Prepares all structures a code required to use AsmThunk16(). + + Prepares all structures and code required to use AsmThunk16(). + + If ThunkContext is NULL, then ASSERT(). + + @param ThunkContext A pointer to the context structure that describes the + 16-bit real mode code to call. + +**/ +VOID +EFIAPI +AsmPrepareThunk16 ( + OUT THUNK_CONTEXT *ThunkContext + ); + +/** + Transfers control to a 16-bit real mode entry point and returns the results. + + Transfers control to a 16-bit real mode entry point and returns the results. + AsmPrepareThunk16() must be called with ThunkContext before this function is + used. + + If ThunkContext is NULL, then ASSERT(). + If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT(). + + @param ThunkContext A pointer to the context structure that describes the + 16-bit real mode code to call. + +**/ +VOID +EFIAPI +AsmThunk16 ( + IN OUT THUNK_CONTEXT *ThunkContext + ); + +/** + Prepares all structures and code for a 16-bit real mode thunk, transfers + control to a 16-bit real mode entry point, and returns the results. + + Prepares all structures and code for a 16-bit real mode thunk, transfers + control to a 16-bit real mode entry point, and returns the results. If the + caller only need to perform a single 16-bit real mode thunk, then this + service should be used. If the caller intends to make more than one 16-bit + real mode thunk, then it is more efficient if AsmPrepareThunk16() is called + once and AsmThunk16() can be called for each 16-bit real mode thunk. + + If ThunkContext is NULL, then ASSERT(). + + @param ThunkContext A pointer to the context structure that describes the + 16-bit real mode code to call. + +**/ +VOID +EFIAPI +AsmPrepareAndThunk16 ( + IN OUT THUNK_CONTEXT *ThunkContext + ); + +/** + Transfers control to a function starting with a new stack. + + Transfers control to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + @param EntryPoint A pointer to function to call with the new stack. + @param Context1 A pointer to the context to pass into the EntryPoint + function. + @param Context2 A pointer to the context to pass into the EntryPoint + function. + @param NewStack A pointer to the new stack to use for the EntryPoint + function. + @param NewBsp A pointer to the new memory location for RSE backing + store. + +**/ +VOID +EFIAPI +AsmSwitchStackAndBackingStore ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack, + IN VOID *NewBsp + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueBaseMemoryLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueBaseMemoryLib.h new file mode 100644 index 0000000..cd9468f --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueBaseMemoryLib.h @@ -0,0 +1,391 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueBaseMemoryLib.h + +Abstract: + + Memory-only library functions with no library constructor/destructor + +--*/ + +#ifndef __EDKII_GLUE_BASE_MEMORY_LIB_H__ +#define __EDKII_GLUE_BASE_MEMORY_LIB_H__ + + +#define CopyMem(_DESTINATIONBUFFER, _SOURCEBUFFER, _LENGTH) GlueCopyMem(_DESTINATIONBUFFER, _SOURCEBUFFER, _LENGTH) +#define ZeroMem(_BUFFER, _LENGTH) GlueZeroMem(_BUFFER, _LENGTH) +#define SetMem(_BUFFER, _LENGTH, _VALUE) GlueSetMem(_BUFFER, _LENGTH, _VALUE) +#define CompareMem(_DESTINATIONBUFFER, _SOURCEBUFFER, _LENGTH) GlueCompareMem(_DESTINATIONBUFFER, _SOURCEBUFFER, _LENGTH) +#define CompareGuid(_GUID1, _GUID2) GlueCompareGuid(_GUID1, _GUID2) + + +/** + Copies a source buffer to a destination buffer, and returns the destination buffer. + + This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns + DestinationBuffer. The implementation must be reentrant, and it must handle the case + where SourceBuffer overlaps DestinationBuffer. + If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). + If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). + + @param DestinationBuffer Pointer to the destination buffer of the memory copy. + @param SourceBuffer Pointer to the source buffer of the memory copy. + @param Length Number of bytes to copy from SourceBuffer to DestinationBuffer. + + @return DestinationBuffer. + +**/ +VOID * +EFIAPI +GlueCopyMem ( + OUT VOID *DestinationBuffer, + IN CONST VOID *SourceBuffer, + IN UINTN Length + ); + +/** + Fills a target buffer with a byte value, and returns the target buffer. + + This function fills Length bytes of Buffer with Value, and returns Buffer. + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Memory to set. + @param Length Number of bytes to set. + @param Value Value of the set operation. + + @return Buffer. + +**/ +VOID * +EFIAPI +GlueSetMem ( + OUT VOID *Buffer, + IN UINTN Length, + IN UINT8 Value + ); + +/** + Fills a target buffer with a 16-bit value, and returns the target buffer. + + This function fills Length bytes of Buffer with the 16-bit value specified by + Value, and returns Buffer. Value is repeated every 16-bits in for Length + bytes of Buffer. + + If Length > 0 and Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + If Buffer is not aligned on a 16-bit boundary, then ASSERT(). + If Length is not aligned on a 16-bit boundary, then ASSERT(). + + @param Buffer Pointer to the target buffer to fill. + @param Length Number of bytes in Buffer to fill. + @param Value Value with which to fill Length bytes of Buffer. + + @return Buffer. + +**/ +VOID * +EFIAPI +SetMem16 ( + OUT VOID *Buffer, + IN UINTN Length, + IN UINT16 Value + ); + +/** + Fills a target buffer with a 32-bit value, and returns the target buffer. + + This function fills Length bytes of Buffer with the 32-bit value specified by + Value, and returns Buffer. Value is repeated every 32-bits in for Length + bytes of Buffer. + + If Length > 0 and Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + If Buffer is not aligned on a 32-bit boundary, then ASSERT(). + If Length is not aligned on a 32-bit boundary, then ASSERT(). + + @param Buffer Pointer to the target buffer to fill. + @param Length Number of bytes in Buffer to fill. + @param Value Value with which to fill Length bytes of Buffer. + + @return Buffer. + +**/ +VOID * +EFIAPI +SetMem32 ( + OUT VOID *Buffer, + IN UINTN Length, + IN UINT32 Value + ); + +/** + Fills a target buffer with a 64-bit value, and returns the target buffer. + + This function fills Length bytes of Buffer with the 64-bit value specified by + Value, and returns Buffer. Value is repeated every 64-bits in for Length + bytes of Buffer. + + If Length > 0 and Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). + If Buffer is not aligned on a 64-bit boundary, then ASSERT(). + If Length is not aligned on a 64-bit boundary, then ASSERT(). + + @param Buffer Pointer to the target buffer to fill. + @param Length Number of bytes in Buffer to fill. + @param Value Value with which to fill Length bytes of Buffer. + + @return Buffer. + +**/ +VOID * +EFIAPI +SetMem64 ( + OUT VOID *Buffer, + IN UINTN Length, + IN UINT64 Value + ); + +/** + Fills a target buffer with zeros, and returns the target buffer. + + This function fills Length bytes of Buffer with zeros, and returns Buffer. + If Length > 0 and Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to fill with zeros. + @param Length Number of bytes in Buffer to fill with zeros. + + @return Buffer. + +**/ +VOID * +EFIAPI +GlueZeroMem ( + OUT VOID *Buffer, + IN UINTN Length + ); + +/** + Compares the contents of two buffers. + + This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer. + If all Length bytes of the two buffers are identical, then 0 is returned. Otherwise, the + value returned is the first mismatched byte in SourceBuffer subtracted from the first + mismatched byte in DestinationBuffer. + If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT(). + If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT(). + If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). + If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). + + @param DestinationBuffer Pointer to the destination buffer to compare. + @param SourceBuffer Pointer to the source buffer to compare. + @param Length Number of bytes to compare. + + @return 0 All Length bytes of the two buffers are identical. + @retval Non-zero The first mismatched byte in SourceBuffer subtracted from the first + mismatched byte in DestinationBuffer. + +**/ +INTN +EFIAPI +GlueCompareMem ( + IN CONST VOID *DestinationBuffer, + IN CONST VOID *SourceBuffer, + IN UINTN Length + ); + +/** + Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value + in the target buffer. + + This function searches target the buffer specified by Buffer and Length from the lowest + address to the highest address for an 8-bit value that matches Value. If a match is found, + then a pointer to the matching byte in the target buffer is returned. If no match is found, + then NULL is returned. If Length is 0, then NULL is returned. + If Length > 0 and Buffer is NULL, then ASSERT(). + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to scan. + @param Length Number of bytes in Buffer to scan. + @param Value Value to search for in the target buffer. + + @return A pointer to the matching byte in the target buffer or NULL otherwise. + +**/ +VOID * +EFIAPI +ScanMem8 ( + IN CONST VOID *Buffer, + IN UINTN Length, + IN UINT8 Value + ); + +/** + Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value + in the target buffer. + + This function searches target the buffer specified by Buffer and Length from the lowest + address to the highest address for a 16-bit value that matches Value. If a match is found, + then a pointer to the matching byte in the target buffer is returned. If no match is found, + then NULL is returned. If Length is 0, then NULL is returned. + If Length > 0 and Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-bit boundary, then ASSERT(). + If Length is not aligned on a 16-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to scan. + @param Length Number of bytes in Buffer to scan. + @param Value Value to search for in the target buffer. + + @return A pointer to the matching byte in the target buffer or NULL otherwise. + +**/ +VOID * +EFIAPI +ScanMem16 ( + IN CONST VOID *Buffer, + IN UINTN Length, + IN UINT16 Value + ); + +/** + Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value + in the target buffer. + + This function searches target the buffer specified by Buffer and Length from the lowest + address to the highest address for a 32-bit value that matches Value. If a match is found, + then a pointer to the matching byte in the target buffer is returned. If no match is found, + then NULL is returned. If Length is 0, then NULL is returned. + If Length > 0 and Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 32-bit boundary, then ASSERT(). + If Length is not aligned on a 32-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to scan. + @param Length Number of bytes in Buffer to scan. + @param Value Value to search for in the target buffer. + + @return A pointer to the matching byte in the target buffer or NULL otherwise. + +**/ +VOID * +EFIAPI +ScanMem32 ( + IN CONST VOID *Buffer, + IN UINTN Length, + IN UINT32 Value + ); + +/** + Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value + in the target buffer. + + This function searches target the buffer specified by Buffer and Length from the lowest + address to the highest address for a 64-bit value that matches Value. If a match is found, + then a pointer to the matching byte in the target buffer is returned. If no match is found, + then NULL is returned. If Length is 0, then NULL is returned. + If Length > 0 and Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 64-bit boundary, then ASSERT(). + If Length is not aligned on a 64-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to scan. + @param Length Number of bytes in Buffer to scan. + @param Value Value to search for in the target buffer. + + @return A pointer to the matching byte in the target buffer or NULL otherwise. + +**/ +VOID * +EFIAPI +ScanMem64 ( + IN CONST VOID *Buffer, + IN UINTN Length, + IN UINT64 Value + ); + +/** + Copies a source GUID to a destination GUID. + + This function copies the contents of the 128-bit GUID specified by SourceGuid to + DestinationGuid, and returns DestinationGuid. + If DestinationGuid is NULL, then ASSERT(). + If SourceGuid is NULL, then ASSERT(). + + @param DestinationGuid Pointer to the destination GUID. + @param SourceGuid Pointer to the source GUID. + + @return DestinationGuid. + +**/ +GUID * +EFIAPI +CopyGuid ( + OUT GUID *DestinationGuid, + IN CONST GUID *SourceGuid + ); + +/** + Compares two GUIDs. + + This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned. + If there are any bit differences in the two GUIDs, then FALSE is returned. + If Guid1 is NULL, then ASSERT(). + If Guid2 is NULL, then ASSERT(). + + @param Guid1 A pointer to a 128 bit GUID. + @param Guid2 A pointer to a 128 bit GUID. + + @retval TRUE Guid1 and Guid2 are identical. + @retval FALSE Guid1 and Guid2 are not identical. + +**/ +BOOLEAN +EFIAPI +GlueCompareGuid ( + IN CONST GUID *Guid1, + IN CONST GUID *Guid2 + ); + +/** + Scans a target buffer for a GUID, and returns a pointer to the matching GUID + in the target buffer. + + This function searches target the buffer specified by Buffer and Length from + the lowest address to the highest address at 128-bit increments for the 128-bit + GUID value that matches Guid. If a match is found, then a pointer to the matching + GUID in the target buffer is returned. If no match is found, then NULL is returned. + If Length is 0, then NULL is returned. + If Length > 0 and Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 32-bit boundary, then ASSERT(). + If Length is not aligned on a 128-bit boundary, then ASSERT(). + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to scan. + @param Length Number of bytes in Buffer to scan. + @param Guid Value to search for in the target buffer. + + @return A pointer to the matching Guid in the target buffer or NULL otherwise. + +**/ +VOID * +EFIAPI +ScanGuid ( + IN CONST VOID *Buffer, + IN UINTN Length, + IN CONST GUID *Guid + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueCacheMaintenanceLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueCacheMaintenanceLib.h new file mode 100644 index 0000000..48c244c --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueCacheMaintenanceLib.h @@ -0,0 +1,224 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueCacheMaintenanceLib.h + +Abstract: + + Cache Maintenance Functions + +--*/ + +#ifndef __EDKII_GLUE_CACHE_MAINTENANCE_LIB_H__ +#define __EDKII_GLUE_CACHE_MAINTENANCE_LIB_H__ + + +#define InvalidateInstructionCache() GlueInvalidateInstructionCache() + + +/** + Invalidates the entire instruction cache in cache coherency domain of the + calling CPU. + + Invalidates the entire instruction cache in cache coherency domain of the + calling CPU. + +**/ +VOID +EFIAPI +GlueInvalidateInstructionCache ( + VOID + ); + +/** + Invalidates a range of instruction cache lines in the cache coherency domain + of the calling CPU. + + Invalidates the instruction cache lines specified by Address and Length. If + Address is not aligned on a cache line boundary, then entire instruction + cache line containing Address is invalidated. If Address + Length is not + aligned on a cache line boundary, then the entire instruction cache line + containing Address + Length -1 is invalidated. This function may choose to + invalidate the entire instruction cache if that is more efficient than + invalidating the specified range. If Length is 0, the no instruction cache + lines are invalidated. Address is returned. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the instruction cache lines to + invalidate. If the CPU is in a physical addressing mode, then + Address is a physical address. If the CPU is in a virtual + addressing mode, then Address is a virtual address. + + @param Length The number of bytes to invalidate from the instruction cache. + + @return Address + +**/ +VOID * +EFIAPI +InvalidateInstructionCacheRange ( + IN VOID *Address, + IN UINTN Length + ); + +/** + Writes Back and Invalidates the entire data cache in cache coherency domain + of the calling CPU. + + Writes Back and Invalidates the entire data cache in cache coherency domain + of the calling CPU. This function guarantees that all dirty cache lines are + written back to system memory, and also invalidates all the data cache lines + in the cache coherency domain of the calling CPU. + +**/ +VOID +EFIAPI +WriteBackInvalidateDataCache ( + VOID + ); + +/** + Writes Back and Invalidates a range of data cache lines in the cache + coherency domain of the calling CPU. + + Writes Back and Invalidate the data cache lines specified by Address and + Length. If Address is not aligned on a cache line boundary, then entire data + cache line containing Address is written back and invalidated. If Address + + Length is not aligned on a cache line boundary, then the entire data cache + line containing Address + Length -1 is written back and invalidated. This + function may choose to write back and invalidate the entire data cache if + that is more efficient than writing back and invalidating the specified + range. If Length is 0, the no data cache lines are written back and + invalidated. Address is returned. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the data cache lines to write back and + invalidate. If the CPU is in a physical addressing mode, then + Address is a physical address. If the CPU is in a virtual + addressing mode, then Address is a virtual address. + @param Length The number of bytes to write back and invalidate from the + data cache. + + @return Address + +**/ +VOID * +EFIAPI +WriteBackInvalidateDataCacheRange ( + IN VOID *Address, + IN UINTN Length + ); + +/** + Writes Back the entire data cache in cache coherency domain of the calling + CPU. + + Writes Back the entire data cache in cache coherency domain of the calling + CPU. This function guarantees that all dirty cache lines are written back to + system memory. This function may also invalidate all the data cache lines in + the cache coherency domain of the calling CPU. + +**/ +VOID +EFIAPI +WriteBackDataCache ( + VOID + ); + +/** + Writes Back a range of data cache lines in the cache coherency domain of the + calling CPU. + + Writes Back the data cache lines specified by Address and Length. If Address + is not aligned on a cache line boundary, then entire data cache line + containing Address is written back. If Address + Length is not aligned on a + cache line boundary, then the entire data cache line containing Address + + Length -1 is written back. This function may choose to write back the entire + data cache if that is more efficient than writing back the specified range. + If Length is 0, the no data cache lines are written back. This function may + also invalidate all the data cache lines in the specified range of the cache + coherency domain of the calling CPU. Address is returned. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the data cache lines to write back. If + the CPU is in a physical addressing mode, then Address is a + physical address. If the CPU is in a virtual addressing + mode, then Address is a virtual address. + @param Length The number of bytes to write back from the data cache. + + @return Address + +**/ +VOID * +EFIAPI +WriteBackDataCacheRange ( + IN VOID *Address, + IN UINTN Length + ); + +/** + Invalidates the entire data cache in cache coherency domain of the calling + CPU. + + Invalidates the entire data cache in cache coherency domain of the calling + CPU. This function must be used with care because dirty cache lines are not + written back to system memory. It is typically used for cache diagnostics. If + the CPU does not support invalidation of the entire data cache, then a write + back and invalidate operation should be performed on the entire data cache. + +**/ +VOID +EFIAPI +InvalidateDataCache ( + VOID + ); + +/** + Invalidates a range of data cache lines in the cache coherency domain of the + calling CPU. + + Invalidates the data cache lines specified by Address and Length. If Address + is not aligned on a cache line boundary, then entire data cache line + containing Address is invalidated. If Address + Length is not aligned on a + cache line boundary, then the entire data cache line containing Address + + Length -1 is invalidated. This function must never invalidate any cache lines + outside the specified range. If Length is 0, the no data cache lines are + invalidated. Address is returned. This function must be used with care + because dirty cache lines are not written back to system memory. It is + typically used for cache diagnostics. If the CPU does not support + invalidation of a data cache range, then a write back and invalidate + operation should be performed on the data cache range. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the data cache lines to invalidate. If + the CPU is in a physical addressing mode, then Address is a + physical address. If the CPU is in a virtual addressing mode, + then Address is a virtual address. + @param Length The number of bytes to invalidate from the data cache. + + @return Address + +**/ +VOID * +EFIAPI +InvalidateDataCacheRange ( + IN VOID *Address, + IN UINTN Length + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDebugLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDebugLib.h new file mode 100644 index 0000000..b7cd4a9 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDebugLib.h @@ -0,0 +1,575 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDebugLib.h + +Abstract: + + Public include file for the Debug Library + +--*/ + +#ifndef __EDKII_GLUE_DEBUG_LIB_H__ +#define __EDKII_GLUE_DEBUG_LIB_H__ + +// +// To use EdkII code, these R8.x macros are undefined +// +#undef ASSERT +#undef DEBUG +#undef ASSERT_EFI_ERROR +#undef ASSERT_PROTOCOL_ALREADY_INSTALLED +#undef DEBUG_CODE +#undef CR + +// +// Declare bits for PcdDebugPropertyMask +// +#define DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED 0x01 +#define DEBUG_PROPERTY_DEBUG_PRINT_ENABLED 0x02 +#define DEBUG_PROPERTY_DEBUG_CODE_ENABLED 0x04 +#define DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED 0x08 +#define DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED 0x10 +#define DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED 0x20 + +// +// Declare bits for PcdDebugPrintErrorLevel and the ErrorLevel parameter of DebugPrint() +// +#define EFI_D_INIT 0x00000001 // Initialization style messages +#define EFI_D_WARN 0x00000002 // Warnings +#define EFI_D_LOAD 0x00000004 // Load events +#define EFI_D_FS 0x00000008 // EFI File system +#define EFI_D_POOL 0x00000010 // Alloc & Free's +#define EFI_D_PAGE 0x00000020 // Alloc & Free's +#define EFI_D_INFO 0x00000040 // Informational debug messages +#define EFI_D_VARIABLE 0x00000100 // Variable +#define EFI_D_BM 0x00000400 // Boot Manager (BDS) +#define EFI_D_BLKIO 0x00001000 // BlkIo Driver +#define EFI_D_NET 0x00004000 // SNI Driver +#define EFI_D_UNDI 0x00010000 // UNDI Driver +#define EFI_D_LOADFILE 0x00020000 // UNDI Driver +#define EFI_D_EVENT 0x00080000 // Event messages +#define EFI_D_VERBOSE 0x00400000 // Detailed debug messages that may significantly impact boot performance +#define EFI_D_ERROR 0x80000000 // Error + +/** + + Gets the error level. + + If DebugMaskInterface is not NULL, return the error level from DebugMaskInterface. + + If DebugMaskInterface is NULL, return the default define DebugPrintErrorLevel error level. + + @retval Debug Message Error Level + +**/ +UINTN +EFIAPI +EdkIIGlueGetDebugPrintErrorLevel ( + VOID + ); + +/** + + Prints a debug message to the debug output device if the specified error level is enabled. + + If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print + the message specified by Format and the associated variable argument list to + the debug output device. + + If Format is NULL, then ASSERT(). + + @param ErrorLevel The error level of the debug message. + @param Format Format string for the debug message to print. + +**/ +VOID +EFIAPI +DebugPrint ( + IN UINTN ErrorLevel, + IN CONST CHAR8 *Format, + ... + ); + + +/** + + Prints an assert message containing a filename, line number, and description. + This may be followed by a breakpoint or a dead loop. + + Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n" + to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of + PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if + DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then + CpuDeadLoop() is called. If neither of these bits are set, then this function + returns immediately after the message is printed to the debug output device. + DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while + processing another DebugAssert(), then DebugAssert() must return immediately. + + If FileName is NULL, then a <FileName> string of ?NULL) Filename?is printed. + + If Description is NULL, then a <Description> string of ?NULL) Description?is printed. + + @param FileName Pointer to the name of the source file that generated the assert condition. + @param LineNumber The line number in the source file that generated the assert condition + @param Description Pointer to the description of the assert condition. + +**/ +VOID +EFIAPI +DebugAssert ( + IN CONST CHAR8 *FileName, + IN UINTN LineNumber, + IN CONST CHAR8 *Description + ); + + +/** + + Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer. + + This function fills Length bytes of Buffer with the value specified by + PcdDebugClearMemoryValue, and returns Buffer. + + If Buffer is NULL, then ASSERT(). + + If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue. + @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue. + + @return Buffer + +**/ +VOID * +EFIAPI +DebugClearMemory ( + OUT VOID *Buffer, + IN UINTN Length + ); + + +/** + + Returns TRUE if ASSERT() macros are enabled. + + This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of + PcdDebugProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +DebugAssertEnabled ( + VOID + ); + + +/** + + Returns TRUE if DEBUG()macros are enabled. + + This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of + PcdDebugProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +DebugPrintEnabled ( + VOID + ); + + +/** + + Returns TRUE if DEBUG_CODE()macros are enabled. + + This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of + PcdDebugProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +DebugCodeEnabled ( + VOID + ); + + +/** + + Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled. + + This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of + PcdDebugProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +DebugClearMemoryEnabled ( + VOID + ); + + +/** + + Internal worker macro that calls DebugAssert(). + + This macro calls DebugAssert() passing in the filename, line number, and + expression that evailated to FALSE. + + @param Expression Boolean expression that evailated to FALSE + +**/ +#ifdef EFI_DEBUG +#define _ASSERT(Expression) DebugAssert (__FILE__, __LINE__, #Expression) +#else +#define _ASSERT(Expression) + +#endif + +/** + + Internal worker macro that calls DebugPrint(). + + This macro calls DebugPrint() passing in the debug error level, a format + string, and a variable argument list. + + @param Expression Expression containing an error level, a format string, + and a variable argument list based on the format string. + +**/ +#ifdef EFI_DEBUG +#define _DEBUG(Expression) DebugPrint Expression +#else +#define _DEBUG(Expression) + +#endif + +/** + + Macro that calls DebugAssert() if a expression evaluates to FALSE. + + If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, + then this macro evaluates the Boolean expression specified by Expression. If + Expression evaluates to FALSE, then DebugAssert() is called passing in the + source filename, source line number, and Expression. + + @param Expression Boolean expression + +**/ +#ifdef EDKII_GLUE_LIBRARY_IMPLEMENTATION + // Glue Library internal + + #if EDKII_GLUE_LIBRARY_DEBUG_ENABLE + #ifdef EFI_DEBUG + #define ASSERT(Expression) \ + do { \ + if (DebugAssertEnabled ()) { \ + if (!(Expression)) { \ + _ASSERT (Expression); \ + } \ + } \ + } while (FALSE) + #endif + #else + #define ASSERT(Expression) do{} while(0) + #endif + +#else + // External usage + + #ifdef EFI_DEBUG + #define ASSERT(Expression) \ + do { \ + if (DebugAssertEnabled ()) { \ + if (!(Expression)) { \ + _ASSERT (Expression); \ + } \ + } \ + } while (FALSE) + #else + #define ASSERT(Expression) do{} while(0) + #endif + +#endif + +/** + + Macro that calls DebugPrint(). + + If the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set, + then this macro passes Expression to DebugPrint(). + + @param Expression Expression containing an error level, a format string, + and a variable argument list based on the format string. + + +**/ +#ifdef EDKII_GLUE_LIBRARY_IMPLEMENTATION + // Glue Library internal + + #if EDKII_GLUE_LIBRARY_DEBUG_ENABLE + #ifdef EFI_DEBUG + #define DEBUG(Expression) \ + do { \ + if (DebugPrintEnabled ()) { \ + _DEBUG (Expression); \ + } \ + } while (FALSE) + #endif + #else + #define DEBUG(Expression) do{} while(0) + #endif + +#else + // External usage + + #ifdef EFI_DEBUG + #define DEBUG(Expression) \ + do { \ + if (DebugPrintEnabled ()) { \ + _DEBUG (Expression); \ + } \ + } while (FALSE) + #else + #define DEBUG(Expression) do{} while(0) + #endif + +#endif + + +/** + + Macro that calls DebugAssert() if an EFI_STATUS evaluates to an error code. + + If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, + then this macro evaluates the EFI_STATUS value specified by StatusParameter. + If StatusParameter is an error code, then DebugAssert() is called passing in + the source filename, source line number, and StatusParameter. + + @param StatusParameter EFI_STATUS value to evaluate. + +**/ +#ifdef EDKII_GLUE_LIBRARY_IMPLEMENTATION + // Glue Library internal + + #if EDKII_GLUE_LIBRARY_DEBUG_ENABLE + #ifdef EFI_DEBUG + #define ASSERT_EFI_ERROR(StatusParameter) \ + do { \ + if (DebugAssertEnabled ()) { \ + if (EFI_ERROR (StatusParameter)) { \ + DEBUG ((EFI_D_ERROR, "\nASSERT_EFI_ERROR, Status = %r (0x%08X)\n", \ + StatusParameter, StatusParameter)); \ + _ASSERT (!EFI_ERROR (StatusParameter)); \ + } \ + } \ + } while (FALSE) + #endif + #else + #define ASSERT_EFI_ERROR(Expression) do{} while(0) + #endif + +#else + // External usage + + #ifdef EFI_DEBUG + #define ASSERT_EFI_ERROR(StatusParameter) \ + do { \ + if (DebugAssertEnabled ()) { \ + if (EFI_ERROR (StatusParameter)) { \ + DEBUG ((EFI_D_ERROR, "\nASSERT_EFI_ERROR, Status = %r (0x%08X)\n", \ + StatusParameter, StatusParameter)); \ + _ASSERT (!EFI_ERROR (StatusParameter)); \ + } \ + } \ + } while (FALSE) + #else + #define ASSERT_EFI_ERROR(Expression) do{} while(0) + #endif + +#endif + + +/** + + Macro that calls DebugAssert() if a protocol is already installed in the + handle database. + + If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear, + then return. + + If Handle is NULL, then a check is made to see if the protocol specified by Guid + is present on any handle in the handle database. If Handle is not NULL, then + a check is made to see if the protocol specified by Guid is present on the + handle specified by Handle. If the check finds the protocol, then DebugAssert() + is called passing in the source filename, source line number, and Guid. + + If Guid is NULL, then ASSERT(). + + @param Handle The handle to check for the protocol. This is an optional + parameter that may be NULL. If it is NULL, then the entire + handle database is searched. + + @param Guid Pointer to a protocol GUID. + +**/ +#ifdef EFI_DEBUG +#define ASSERT_PROTOCOL_ALREADY_INSTALLED(Handle, Guid) \ + do { \ + if (DebugAssertEnabled ()) { \ + VOID *Instance; \ + ASSERT (Guid != NULL); \ + if (Handle == NULL) { \ + if (!EFI_ERROR (gBS->LocateProtocol ((EFI_GUID *)Guid, NULL, &Instance))) { \ + _ASSERT (Guid already installed in database); \ + } \ + } else { \ + if (!EFI_ERROR (gBS->HandleProtocol (Handle, (EFI_GUID *)Guid, &Instance))) { \ + _ASSERT (Guid already installed on Handle); \ + } \ + } \ + } \ + } while (FALSE) +#else +#define ASSERT_PROTOCOL_ALREADY_INSTALLED(Handle, Guid) \ + do {} while(0); +#endif + + +/** + Macro that marks the beginning of debug source code. + + If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set, + then this macro marks the beginning of source code that is included in a module. + Otherwise, the source lines between DEBUG_CODE_BEGIN() and DEBUG_CODE_END() + are not included in a module. + +**/ +#define DEBUG_CODE_BEGIN() do { if (DebugCodeEnabled ()) { UINT8 __DebugCodeLocal + + +/** + + Macro that marks the end of debug source code. + + If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set, + then this macro marks the end of source code that is included in a module. + Otherwise, the source lines between DEBUG_CODE_BEGIN() and DEBUG_CODE_END() + are not included in a module. + +**/ +#define DEBUG_CODE_END() __DebugCodeLocal = 0; } } while (FALSE) + + +/** + + Macro that declares a section of debug source code. + + If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set, + then the source code specified by Expression is included in a module. + Otherwise, the source specified by Expression is not included in a module. + +**/ +#define DEBUG_CODE(Expression) \ + DEBUG_CODE_BEGIN (); \ + Expression \ + DEBUG_CODE_END () + + +/** + + Macro that calls DebugClearMemory() to clear a buffer to a default value. + + If the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set, + then this macro calls DebugClearMemory() passing in Address and Length. + + @param Address Pointer to a buffer. + @param Length The number of bytes in the buffer to set. + +**/ +#define DEBUG_CLEAR_MEMORY(Address, Length) \ + do { \ + if (DebugClearMemoryEnabled ()) { \ + DebugClearMemory (Address, Length); \ + } \ + } while (FALSE) + + +/** + + Macro that calls DebugAssert() if the containing record does not have a + matching signature. If the signatures matches, then a pointer to the data + structure that contains a specified field of that data structure is returned. + This is a light weight method hide information by placing a public data + structure inside a larger private data structure and using a pointer to the + public data structure to retrieve a pointer to the private data structure. + + If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear, + then this macro computes the offset, in bytes, of field specified by Field + from the beginning of the data structure specified by TYPE. This offset is + subtracted from Record, and is used to return a pointer to a data structure + of the type specified by TYPE. + + If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, + then this macro computes the offset, in bytes, of field specified by Field from + the beginning of the data structure specified by TYPE. This offset is + subtracted from Record, and is used to compute a pointer to a data structure of + the type specified by TYPE. The Signature field of the data structure specified + by TYPE is compared to TestSignature. If the signatures match, then a pointer + to the pointer to a data structure of the type specified by TYPE is returned. + If the signatures do not match, then DebugAssert() is called with a description + of "CR has a bad signature" and Record is returned. + + If the data type specified by TYPE does not contain the field specified by Field, + then the module will not compile. + + If TYPE does not contain a field called Signature, then the module will not + compile. + + @param Record Pointer to the field specified by Field within a data + structure of type TYPE. + + @param TYPE The name of the data structure type to return This + data structure must contain the field specified by Field. + + @param Field The name of the field in the data structure specified + by TYPE to which Record points. + + @param TestSignature The 32-bit signature value to match. + +**/ +#ifdef EFI_DEBUG + #define CR(Record, TYPE, Field, TestSignature) \ + (DebugAssertEnabled () && (_CR (Record, TYPE, Field)->Signature != TestSignature)) ? \ + (TYPE *) (_ASSERT (CR has Bad Signature), Record) : \ + _CR (Record, TYPE, Field) +#else + #define CR(Record, TYPE, Field, TestSignature) \ + _CR (Record, TYPE, Field) +#endif + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDevicePathLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDevicePathLib.h new file mode 100644 index 0000000..2c2a730 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDevicePathLib.h @@ -0,0 +1,269 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDevicePathLib.h + +Abstract: + + Public header file for Device Path Lib + +--*/ + +#ifndef __EDKII_GLUE_DEVICE_PATH_LIB_H__ +#define __EDKII_GLUE_DEVICE_PATH_LIB_H__ + + +#define GetDevicePathSize(_DEVICEPATH) GlueGetDevicePathSize(_DEVICEPATH) +#define DuplicateDevicePath(_DEVICEPATH) GlueDuplicateDevicePath(_DEVICEPATH) +#define AppendDevicePath(_FIRSTPATH, _SECONDPATH) GlueAppendDevicePath(_FIRSTPATH, _SECONDPATH) +#define AppendDevicePathNode(_DEVICEPATH, _DEVICEPATHNODE) GlueAppendDevicePathNode(_DEVICEPATH, _DEVICEPATHNODE) +#define AppendDevicePathInstance(_SOURCE, _INSTANCE) GlueAppendDevicePathInstance(_SOURCE,_INSTANCE) +#define GetNextDevicePathInstance(_DEVICEPATH, _SIZE) GlueGetNextDevicePathInstance(_DEVICEPATH, _SIZE) +#define IsDevicePathMultiInstance(_DEVICEPATH) GlueIsDevicePathMultiInstance(_DEVICEPATH) +#define DevicePathFromHandle(_HANDLE) GlueDevicePathFromHandle(_HANDLE) +#define FileDevicePath(_DEVICE, _FILENAME) GlueFileDevicePath(_DEVICE, _FILENAME) + + +/** + Returns the size of a device path in bytes. + + This function returns the size, in bytes, of the device path data structure specified by + DevicePath including the end of device path node. If DevicePath is NULL, then 0 is returned. + + @param DevicePath A pointer to a device path data structure. + + @return The size of a device path in bytes. + +**/ +UINTN +EFIAPI +GlueGetDevicePathSize ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath + ); + +/** + Creates a new device path by appending a second device path to a first device path. + + This function allocates space for a new copy of the device path specified by DevicePath. If + DevicePath is NULL, then NULL is returned. If the memory is successfully allocated, then the + contents of DevicePath are copied to the newly allocated buffer, and a pointer to that buffer + is returned. Otherwise, NULL is returned. + + @param DevicePath A pointer to a device path data structure. + + @return A pointer to the duplicated device path. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueDuplicateDevicePath ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath + ); + +/** + Creates a new device path by appending a second device path to a first device path. + + This function creates a new device path by appending a copy of SecondDevicePath to a copy of + FirstDevicePath in a newly allocated buffer. Only the end-of-device-path device node from + SecondDevicePath is retained. The newly created device path is returned. + If FirstDevicePath is NULL, then it is ignored, and a duplicate of SecondDevicePath is returned. + If SecondDevicePath is NULL, then it is ignored, and a duplicate of FirstDevicePath is returned. + If both FirstDevicePath and SecondDevicePath are NULL, then NULL is returned. + If there is not enough memory for the newly allocated buffer, then NULL is returned. + The memory for the new device path is allocated from EFI boot services memory. It is the + responsibility of the caller to free the memory allocated. + + @param FirstDevicePath A pointer to a device path data structure. + @param SecondDevicePath A pointer to a device path data structure. + + @return A pointer to the new device path. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueAppendDevicePath ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath, OPTIONAL + IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath OPTIONAL + ); + +/** + Creates a new path by appending the device node to the device path. + + This function creates a new device path by appending a copy of the device node specified by + DevicePathNode to a copy of the device path specified by DevicePath in an allocated buffer. + The end-of-device-path device node is moved after the end of the appended device node. + If DevicePath is NULL, then NULL is returned. + If DevicePathNode is NULL, then NULL is returned. + If there is not enough memory to allocate space for the new device path, then NULL is returned. + The memory is allocated from EFI boot services memory. It is the responsibility of the caller to + free the memory allocated. + + @param DevicePath A pointer to a device path data structure. + @param DevicePathNode A pointer to a single device path node. + + @return A pointer to the new device path. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueAppendDevicePathNode ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath, OPTIONAL + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePathNode OPTIONAL + ); + +/** + Creates a new device path by appending the specified device path instance to the specified device + path. + + This function creates a new device path by appending a copy of the device path instance specified + by DevicePathInstance to a copy of the device path secified by DevicePath in a allocated buffer. + The end-of-device-path device node is moved after the end of the appended device path instance + and a new end-of-device-path-instance node is inserted between. + If DevicePath is NULL, then a copy if DevicePathInstance is returned. + If DevicePathInstance is NULL, then NULL is returned. + If there is not enough memory to allocate space for the new device path, then NULL is returned. + The memory is allocated from EFI boot services memory. It is the responsibility of the caller to + free the memory allocated. + + @param DevicePath A pointer to a device path data structure. + @param DevicePathInstance A pointer to a device path instance. + + @return A pointer to the new device path. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueAppendDevicePathInstance ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath, OPTIONAL + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePathInstance OPTIONAL + ); + +/** + Creates a copy of the current device path instance and returns a pointer to the next device path + instance. + + This function creates a copy of the current device path instance. It also updates DevicePath to + point to the next device path instance in the device path (or NULL if no more) and updates Size + to hold the size of the device path instance copy. + If DevicePath is NULL, then NULL is returned. + If there is not enough memory to allocate space for the new device path, then NULL is returned. + The memory is allocated from EFI boot services memory. It is the responsibility of the caller to + free the memory allocated. + If Size is NULL, then ASSERT(). + + @param DevicePath On input, this holds the pointer to the current device path + instance. On output, this holds the pointer to the next device + path instance or NULL if there are no more device path + instances in the device path pointer to a device path data + structure. + @param Size On output, this holds the size of the device path instance, in + bytes or zero, if DevicePath is NULL. + + @return A pointer to the current device path instance. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueGetNextDevicePathInstance ( + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath, + OUT UINTN *Size + ); + +/** + Creates a copy of the current device path instance and returns a pointer to the next device path + instance. + + This function creates a new device node in a newly allocated buffer of size NodeLength and + initializes the device path node header with NodeType and NodeSubType. The new device path node + is returned. + If NodeLength is smaller than a device path header, then NULL is returned. + If there is not enough memory to allocate space for the new device path, then NULL is returned. + The memory is allocated from EFI boot services memory. It is the responsibility of the caller to + free the memory allocated. + + @param NodeType The device node type for the new device node. + @param NodeSubType The device node sub-type for the new device node. + @param NodeLength The length of the new device node. + + @return The new device path. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +CreateDeviceNode ( + IN UINT8 NodeType, + IN UINT8 NodeSubType, + IN UINT16 NodeLength + ); + +/** + Determines if a device path is single or multi-instance. + + This function returns TRUE if the device path specified by DevicePath is multi-instance. + Otherwise, FALSE is returned. If DevicePath is NULL, then FALSE is returned. + + @param DevicePath A pointer to a device path data structure. + + @retval TRUE DevicePath is multi-instance. + @retval FALSE DevicePath is not multi-instance or DevicePath is NULL. + +**/ +BOOLEAN +EFIAPI +GlueIsDevicePathMultiInstance ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath + ); + +/** + Retrieves the device path protocol from a handle. + + This function returns the device path protocol from the handle specified by Handle. If Handle is + NULL or Handle does not contain a device path protocol, then NULL is returned. + + @param Handle The handle from which to retrieve the device path protocol. + + @return The device path protocol from the handle specified by Handle. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueDevicePathFromHandle ( + IN EFI_HANDLE Handle + ); + +/** + Allocates a device path for a file and appends it to an existing device path. + + If Device is a valid device handle that contains a device path protocol, then a device path for + the file specified by FileName is allocated and appended to the device path associated with the + handle Device. The allocated device path is returned. If Device is NULL or Device is a handle + that does not support the device path protocol, then a device path containing a single device + path node for the file specified by FileName is allocated and returned. + If FileName is NULL, then ASSERT(). + + @param Device A pointer to a device handle. This parameter is optional and + may be NULL. + @param FileName A pointer to a Null-terminated Unicode string. + + @return The allocated device path. + +**/ +EFI_DEVICE_PATH_PROTOCOL * +EFIAPI +GlueFileDevicePath ( + IN EFI_HANDLE Device, OPTIONAL + IN CONST CHAR16 *FileName + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeRuntimeDriverLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeRuntimeDriverLib.h new file mode 100644 index 0000000..2ec3f4f --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeRuntimeDriverLib.h @@ -0,0 +1,451 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDxeRuntimeDriverLib.h + +Abstract: + + Library that abstracts runtime services + +--*/ + +#ifndef __EDKII_GLUE_DXE_RUNTIME_DRIVER_LIB_H__ +#define __EDKII_GLUE_DXE_RUNTIME_DRIVER_LIB_H__ + +#if (EFI_SPECIFICATION_VERSION < 0x00020000) + +typedef struct { + EFI_GUID CapsuleGuid; + UINT32 HeaderSize; + UINT32 Flags; + UINT32 CapsuleImageSize; +} UEFI_CAPSULE_HEADER; + +#else + +typedef EFI_CAPSULE_HEADER UEFI_CAPSULE_HEADER; + +#endif + +extern const EFI_EVENT_NOTIFY _gDriverExitBootServicesEvent[]; + +extern const EFI_EVENT_NOTIFY _gDriverSetVirtualAddressMapEvent[]; + +/** + Check to see if the execute context is in Runtime phase or not. + + @param None. + + @retval TRUE The driver is in SMM. + @retval FALSE The driver is not in SMM. + +**/ +BOOLEAN +EFIAPI +EfiAtRuntime ( + VOID + ); + +/** + Check to see if the SetVirtualAddressMsp() is invoked or not. + + @retval TRUE SetVirtualAddressMsp() has been called. + @retval FALSE SetVirtualAddressMsp() has not been called. + +**/ +BOOLEAN +EFIAPI +EfiGoneVirtual ( + VOID + ); + +/** + Return current time and date information, and time-keeping + capabilities of hardware platform. + + @param Time A pointer to storage to receive a snapshot of the current time. + @param Capabilities An optional pointer to a buffer to receive the real time clock device¡¯s + capabilities. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiGetTime ( + OUT EFI_TIME *Time, + OUT EFI_TIME_CAPABILITIES *Capabilities + ); + +/** + Set current time and date information. + + @param Time A pointer to cache of time setting. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to execute the function. + +**/ +EFI_STATUS +EFIAPI +EfiSetTime ( + IN EFI_TIME *Time + ); + +/** + Return current wakeup alarm clock setting. + + @param Enabled Indicate if the alarm clock is enabled or disabled. + @param Pending Indicate if the alarm signal is pending and requires acknowledgement. + @param Time Current alarm clock setting. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiGetWakeupTime ( + OUT BOOLEAN *Enabled, + OUT BOOLEAN *Pending, + OUT EFI_TIME *Time + ); + +/** + Set current wakeup alarm clock. + + @param Enable Enable or disable current alarm clock.. + @param Time Point to alarm clock setting. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiSetWakeupTime ( + IN BOOLEAN Enable, + IN EFI_TIME *Time + ); + +/** + Return value of variable. + + @param VariableName the name of the vendor's variable, it's a + Null-Terminated Unicode String + @param VendorGuid Unify identifier for vendor. + @param Attributes Point to memory location to return the attributes of variable. If the point + is NULL, the parameter would be ignored. + @param DataSize As input, point to the maxinum size of return Data-Buffer. + As output, point to the actual size of the returned Data-Buffer. + @param Data Point to return Data-Buffer. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiGetVariable ( + IN CHAR16 *VariableName, + IN EFI_GUID *VendorGuid, + OUT UINT32 *Attributes, + IN OUT UINTN *DataSize, + OUT VOID *Data + ) +; + +/** + Enumerates variable's name. + + @param VariableNameSize As input, point to maxinum size of variable name. + As output, point to actual size of varaible name. + @param VariableName As input, supplies the last VariableName that was returned by + GetNextVariableName(). + As output, returns the name of variable. The name + string is Null-Terminated Unicode string. + @param VendorGuid As input, supplies the last VendorGuid that was returned by + GetNextVriableName(). + As output, returns the VendorGuid of the current variable. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiGetNextVariableName ( + IN OUT UINTN *VariableNameSize, + IN OUT CHAR16 *VariableName, + IN OUT EFI_GUID *VendorGuid + ); + +/** + Sets value of variable. + + @param VariableName the name of the vendor's variable, it's a + Null-Terminated Unicode String + @param VendorGuid Unify identifier for vendor. + @param Attributes Point to memory location to return the attributes of variable. If the point + is NULL, the parameter would be ignored. + @param DataSize The size in bytes of Data-Buffer. + @param Data Point to the content of the variable. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiSetVariable ( + IN CHAR16 *VariableName, + IN EFI_GUID *VendorGuid, + IN UINT32 Attributes, + IN UINTN DataSize, + IN VOID *Data + ); + +/** + Returns the next high 32 bits of platform's monotonic counter. + + @param HighCount Pointer to returned value. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiGetNextHighMonotonicCount ( + OUT UINT32 *HighCount + ); + +/** + Resets the entire platform. + + @param ResetType The type of reset to perform. + @param ResetStatus The status code for reset. + @param DataSize The size in bytes of reset data. + @param ResetData Pointer to data buffer that includes + Null-Terminated Unicode string. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +VOID +EfiResetSystem ( + IN EFI_RESET_TYPE ResetType, + IN EFI_STATUS ResetStatus, + IN UINTN DataSize, + IN CHAR16 *ResetData + ); + +/** + Determines the new virtual address that is to be used on subsequent memory accesses. + + @param DebugDisposition Supplies type information for the pointer being converted. + @param Address The pointer to a pointer that is to be fixed to be the + value needed for the new virtual address mapping being + applied. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiConvertPointer ( + IN UINTN DebugDisposition, + IN OUT VOID *Address + ); + + +/** + Change the runtime addressing mode of EFI firmware from physical to virtual. + + @param MemoryMapSize The size in bytes of VirtualMap. + @param DescriptorSize The size in bytes of an entry in the VirtualMap. + @param DescriptorVersion The version of the structure entries in VirtualMap. + @param VirtualMap An array of memory descriptors which contain new virtual + address mapping information for all runtime ranges. Type + EFI_MEMORY_DESCRIPTOR is defined in the + GetMemoryMap() function description. + + @retval EFI_SUCCESS The virtual address map has been applied. + @retval EFI_UNSUPPORTED EFI firmware is not at runtime, or the EFI firmware is already in + virtual address mapped mode. + @retval EFI_INVALID_PARAMETER DescriptorSize or DescriptorVersion is + invalid. + @retval EFI_NO_MAPPING A virtual address was not supplied for a range in the memory + map that requires a mapping. + @retval EFI_NOT_FOUND A virtual address was supplied for an address that is not found + in the memory map. +**/ +EFI_STATUS +EFIAPI +EfiSetVirtualAddressMap ( + IN UINTN MemoryMapSize, + IN UINTN DescriptorSize, + IN UINT32 DescriptorVersion, + IN CONST EFI_MEMORY_DESCRIPTOR *VirtualMap + ); + + +/** + Conver the standard Lib double linked list to a virtual mapping. + + @param DebugDisposition Supplies type information for the pointer being converted. + @param ListHead Head of linked list to convert. + + @retval EFI_SUCCESS Success to execute the function. + @retval !EFI_SUCCESS Failed to e3xecute the function. + +**/ +EFI_STATUS +EFIAPI +EfiConvertList ( + IN UINTN DebugDisposition, + IN OUT LIST_ENTRY *ListHead + ); + + +/** + + Passes capsules to the firmware with both virtual and physical mapping. + Depending on the intended consumption, the firmware may + process the capsule immediately. If the payload should persist across a + system reset, the reset value returned from EFI_QueryCapsuleCapabilities must + be passed into ResetSystem() and will cause the capsule to be processed by + the firmware as part of the reset process. + + @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules + being passed into update capsule. Each capsules is assumed to + stored in contiguous virtual memory. The capsules in the + CapsuleHeaderArray must be the same capsules as the + ScatterGatherList. The CapsuleHeaderArray must + have the capsules in the same order as the ScatterGatherList. + @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in + CaspuleHeaderArray. + @param ScatterGatherList Physical pointer to a set of + EFI_CAPSULE_BLOCK_DESCRIPTOR that describes the + location in physical memory of a set of capsules. See Related + Definitions for an explanation of how more than one capsule is + passed via this interface. The capsules in the + ScatterGatherList must be in the same order as the + CapsuleHeaderArray. This parameter is only referenced if + the capsules are defined to persist across system reset. + + @retval EFI_SUCCESS Valid capsule was passed. I Valid capsule was passed. If + CAPSULE_FLAGS_PERSIT_ACROSS_RESET is not set, the + capsule has been successfully processed by the firmware. + @retval EFI_INVALID_PARAMETER CapsuleSize is NULL or ResetTye is NULL. + @retval EFI_DEVICE_ERROR The capsule update was started, but failed due to a device error. + +**/ +EFI_STATUS +EFIAPI +EfiUpdateCapsule ( + IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray, + IN UINTN CapsuleCount, + IN EFI_PHYSICAL_ADDRESS ScatterGatherList + ); + + +/** + + The QueryCapsuleCapabilities() function allows a caller to test to see if a capsule or + capsules can be updated via UpdateCapsule(). The Flags values in the capsule header and + size of the entire capsule is checked. + If the caller needs to query for generic capsule capability a fake EFI_CAPSULE_HEADER can be + constructed where CapsuleImageSize is equal to HeaderSize that is equal to sizeof + (EFI_CAPSULE_HEADER). To determine reset requirements, + CAPSULE_FLAGS_PERSIST_ACROSS_RESET should be set in the Flags field of the + EFI_CAPSULE_HEADER. + The firmware must support any capsule that has the + CAPSULE_FLAGS_PERSIST_ACROSS_RESET flag set in EFI_CAPSULE_HEADER. The + firmware sets the policy for what capsules are supported that do not have the + CAPSULE_FLAGS_PERSIST_ACROSS_RESET flag set. + + @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules + being passed into update capsule. The capsules are assumed to + stored in contiguous virtual memory. + @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in + CaspuleHeaderArray. + @param MaxiumCapsuleSize On output the maximum size that UpdateCapsule() can + support as an argument to UpdateCapsule() via + CapsuleHeaderArray and ScatterGatherList. + Undefined on input. + @param ResetType Returns the type of reset required for the capsule update. + + @retval EFI_SUCCESS Valid answer returned.. + @retval EFI_INVALID_PARAMETER MaximumCapsuleSize is NULL. + @retval EFI_UNSUPPORTED The capsule type is not supported on this platform, and + MaximumCapsuleSize and ResetType are undefined. + +**/ +EFI_STATUS +EFIAPI +EfiQueryCapsuleCapabilities ( + IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray, + IN UINTN CapsuleCount, + OUT UINT64 *MaximumCapsuleSize, + OUT EFI_RESET_TYPE *ResetType + ); + + +/** + + The QueryVariableInfo() function allows a caller to obtain the information about the + maximum size of the storage space available for the EFI variables, the remaining size of the storage + space available for the EFI variables and the maximum size of each individual EFI variable, + associated with the attributes specified. + The returned MaximumVariableStorageSize, RemainingVariableStorageSize, + MaximumVariableSize information may change immediately after the call based on other + runtime activities including asynchronous error events. Also, these values associated with different + attributes are not additive in nature. + + @param Attributes Attributes bitmask to specify the type of variables on + which to return information. Refer to the + GetVariable() function description. + @param MaximumVariableStorageSize + On output the maximum size of the storage space + available for the EFI variables associated with the + attributes specified. + @param RemainingVariableStorageSize + Returns the remaining size of the storage space + available for the EFI variables associated with the + attributes specified.. + @param MaximumVariableSize Returns the maximum size of the individual EFI + variables associated with the attributes specified. + + @retval EFI_SUCCESS Valid answer returned. + @retval EFI_INVALID_PARAMETER An invalid combination of attribute bits was supplied. + @retval EFI_UNSUPPORTED EFI_UNSUPPORTED The attribute is not supported on this platform, and the + MaximumVariableStorageSize, + RemainingVariableStorageSize, MaximumVariableSize + are undefined. +**/ +EFI_STATUS +EFIAPI +EfiQueryVariableInfo ( + IN UINT32 Attrubutes, + OUT UINT64 *MaximumVariableStorageSize, + OUT UINT64 *RemainingVariableStorageSize, + OUT UINT64 *MaximumVariableSize + ); + +#endif + diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeServicesTableLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeServicesTableLib.h new file mode 100644 index 0000000..4660dc6 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeServicesTableLib.h @@ -0,0 +1,32 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueDxeServicesTableLib.h + +Abstract: + + Library that provides a global pointer to the DXE Services Table + +--*/ + +#ifndef __EDKII_GLUE_DXE_SERVICES_TABLE_LIB_H__ +#define __EDKII_GLUE_DXE_SERVICES_TABLE_LIB_H__ + +// +// Cache copy of the DXE Services Table +// +extern EFI_DXE_SERVICES *gDS; + +#endif + diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeSmmDriverEntryPoint.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeSmmDriverEntryPoint.h new file mode 100644 index 0000000..2592afc --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueDxeSmmDriverEntryPoint.h @@ -0,0 +1,147 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + EdkIIGlueDxeSmmDriverEntryPoint.h + +Abstract: + + Public header file for DXE SMM Driver Entry Point Lib + +--*/ + +#ifndef __EDKII_GLUE_MODULE_ENTRY_POINT_H__ +#define __EDKII_GLUE_MODULE_ENTRY_POINT_H__ + +// +// Declare the EFI/UEFI Specification Revision to which this driver is implemented +// +extern const UINT32 _gUefiDriverRevision; + +// +// Declare the number of entry points in the image. +// +extern const UINT8 _gDriverEntryPointCount; + +// +// Declare the number of unload handler in the image. +// +extern const UINT8 _gDriverUnloadImageCount; + +/** + Enrty point to DXE SMM Driver. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + + @retval EFI_SUCCESS One or more of the drivers returned a success code. + @retval !EFI_SUCESS The return status from the last driver entry point in the list. + +**/ +EFI_STATUS +EFIAPI +_ModuleEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +/** + Enrty point wrapper of DXE SMM Driver. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + + @retval EFI_SUCCESS One or more of the drivers returned a success code. + @retval !EFI_SUCESS The return status from the last driver entry point in the list. + +**/ +EFI_STATUS +EFIAPI +EfiMain ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +/** + Computes the cummulative return status for the driver entry point and perform + a long jump back into DriverEntryPoint(). + + @param Status Status returned by the driver that is exiting. + +**/ +VOID +EFIAPI +ExitDriver ( + IN EFI_STATUS Status + ); + +/** + Call constructs for all libraries. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + +**/ +VOID +EFIAPI +ProcessLibraryConstructorList ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +/** + Call destructors for all libraries. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + +**/ +VOID +EFIAPI +ProcessLibraryDestructorList ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + + +/** + Call the list of driver entry points. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + + @return Status returned by entry points of drivers. + +**/ +EFI_STATUS +EFIAPI +ProcessModuleEntryPointList ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + + +/** + Call the unload handlers for all the modules. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + + @return Status returned by unload handlers of drivers. + +**/ +EFI_STATUS +EFIAPI +ProcessModuleUnloadList ( + IN EFI_HANDLE ImageHandle + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueFirmwarePerformanceLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueFirmwarePerformanceLib.h new file mode 100644 index 0000000..668599e --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueFirmwarePerformanceLib.h @@ -0,0 +1,155 @@ +/*++ + +Copyright (c) 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + EdkIIGluePerformanceLib.h + +Abstract: + + Public header file for Firmware Performance Lib + + +--*/ + +#ifndef __EDKII_GLUE_FIRMWARE_PERFORMANCE_LIB_H_ +#define __EDKII_GLUE_FIRMWARE_PERFORMANCE_LIB_H_ + +EFI_STATUS +StartMeasure ( + IN VOID *Handle, + IN UINT16 *Token, + IN UINT16 *Module, + IN UINT64 TimeStamp + ) +/*++ + +Routine Description: + + Start measurement according to token field and insert into pre-allocated buffer + +Arguments: + + Handle - Handle to measure + Token - Token to measure + Module - Module to measure + Timestamp - Ticker as start tick + +Returns: + + EFI_SUCCESS - Located protocol successfully, and buffer is updated with new record + EFI_NOT_FOUND - Failure in update + +--*/ +; + +EFI_STATUS +EndMeasure ( + IN VOID *Handle, + IN UINT16 *Token, + IN UINT16 *Module, + IN UINT64 TimeStamp + ) +/*++ + +Routine Description: + + End measurement according to token field and insert into pre-allocated buffer + +Arguments: + + Handle - Handle to stop + Token - Token to stop + Module - Module to stop + Timestamp - Ticker as end tick + +Returns: + + EFI_SUCCESS - Located protocol successfully, and buffer is updated with new record + EFI_NOT_FOUND - Failure in update + +--*/ +; + +EFI_STATUS +StartMeasureEx ( + IN VOID *Handle, + IN UINT16 *Token, + IN UINT16 *Module, + IN UINT64 TimeStamp, + IN UINT16 Identifier + ) +/*++ + +Routine Description: + + Start extended measurement according to token field and insert into pre-allocated buffer + +Arguments: + + Handle - Handle to stop + Token - Token to stop + Module - Module to stop + Timestamp - Ticker as end tick + Identifier - Identifier for a given record +Returns: + + EFI_SUCCESS - Located protocol successfully, and buffer is updated with new record + EFI_NOT_FOUND - Failure in update + +--*/ +; + +EFI_STATUS +EndMeasureEx ( + IN VOID *Handle, + IN UINT16 *Token, + IN UINT16 *Module, + IN UINT64 TimeStamp, + IN UINT16 Identifier + ) +/*++ + +Routine Description: + + End extended measurement according to token field and insert into pre-allocated buffer + +Arguments: + + Handle - Handle to stop + Token - Token to stop + Module - Module to stop + Timestamp - Ticker as end tick + Identifier - Identifier for a given record + +Returns: + + EFI_SUCCESS - Located protocol successfully, and buffer is updated with new record + EFI_NOT_FOUND - Failure in update + +--*/ +; + +#ifdef FIRMWARE_PERFORMANCE +#define PERF_START(Handle, Token, Module, TimeStamp) StartMeasure (Handle, Token, Module, TimeStamp) +#define PERF_END(Handle, Token, Module, TimeStamp) EndMeasure (Handle, Token, Module, TimeStamp) +#define PERF_START_EX(Handle, Token, Module, TimeStamp, Identifier) StartMeasureEx (Handle, Token, Module, TimeStamp, Identifier) +#define PERF_END_EX(Handle, Token, Module, TimeStamp, Identifier) EndMeasureEx (Handle, Token, Module, TimeStamp, Identifier) +#define PERF_CODE(code) code +#else +#define PERF_START(Handle, Token, Module, TimeStamp) +#define PERF_END(Handle, Token, Module, TimeStamp) +#define PERF_START_EX(Handle, Token, Module, TimeStamp, Identifier) +#define PERF_END_EX(Handle, Token, Module, TimeStamp, Identifier) +#define PERF_CODE(code) +#endif + +#endif
\ No newline at end of file diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueHiiLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueHiiLib.h new file mode 100644 index 0000000..fb9ce47 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueHiiLib.h @@ -0,0 +1,55 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueHiiLib.h + +Abstract: + + Public header file for Hii Lib + +--*/ + +#ifndef __EDKII_GLUE_HII_LIB_H__ +#define __EDKII_GLUE_HII_LIB_H__ + +#if (EFI_SPECIFICATION_VERSION < 0x0002000A) + +#define PreparePackages GluePreparePackages + + +/** + This function allocates pool for an EFI_HII_PACKAGES structure + with enough space for the variable argument list of package pointers. + The allocated structure is initialized using NumberOfPackages, Guid, + and the variable length argument list of package pointers. + + @param NumberOfPackages The number of HII packages to prepare. + @param Guid Package GUID. + + @return + The allocated and initialized packages. + +**/ +EFI_HII_PACKAGES * +EFIAPI +GluePreparePackages ( + IN UINTN NumberOfPackages, + IN CONST EFI_GUID *Guid OPTIONAL, + ... + ) +; + +#endif + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueHobLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueHobLib.h new file mode 100644 index 0000000..6c03086 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueHobLib.h @@ -0,0 +1,384 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueHobLib.h + +Abstract: + + Public header file for Hob Lib + +--*/ + +#ifndef __EDKII_GLUE_HOB_LIB_H__ +#define __EDKII_GLUE_HOB_LIB_H__ + + +#define GetFirstGuidHob(_GUID) GlueGetFirstGuidHob(_GUID) +#define GetNextGuidHob(_GUID, _HobStart) GlueGetNextGuidHob(_GUID, _HobStart) +#define BuildModuleHob(_MODULENAME, _MEMORYALLOCATIONMODULE, _MODULELENGTH, _ENTRYPOINT) GlueBuildModuleHob(_MODULENAME, _MEMORYALLOCATIONMODULE, _MODULELENGTH, _ENTRYPOINT) +#define BuildMemoryAllocationHob(_BASEADDRESS, _LENGTH, _MEMORYTYPE) GlueBuildMemoryAllocationHob(_BASEADDRESS, _LENGTH, _MEMORYTYPE) + + +/** + Returns the pointer to the HOB list. + + This function returns the pointer to first HOB in the list. + + @return The pointer to the HOB list. + +**/ +VOID * +EFIAPI +GetHobList ( + VOID + ) +; + +/** + Returns the next instance of a HOB type from the starting HOB. + + This function searches the first instance of a HOB type from the starting HOB pointer. + If there does not exist such HOB type from the starting HOB pointer, it will return NULL. + In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer + unconditionally: it returns HobStart back if HobStart itself meets the requirement; + caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart. + If HobStart is NULL, then ASSERT(). + + @param Type The HOB type to return. + @param HobStart The starting HOB pointer to search from. + + @return The next instance of a HOB type from the starting HOB. + +**/ +VOID * +EFIAPI +GetNextHob ( + IN UINT16 Type, + IN CONST VOID *HobStart + ) +; + +/** + Returns the first instance of a HOB type among the whole HOB list. + + This function searches the first instance of a HOB type among the whole HOB list. + If there does not exist such HOB type in the HOB list, it will return NULL. + + @param Type The HOB type to return. + + @return The next instance of a HOB type from the starting HOB. + +**/ +VOID * +EFIAPI +GetFirstHob ( + IN UINT16 Type + ) +; + +/** + This function searches the first instance of a HOB from the starting HOB pointer. + Such HOB should satisfy two conditions: + its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid. + If there does not exist such HOB from the starting HOB pointer, it will return NULL. + Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE () + to extract the data section and its size info respectively. + In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer + unconditionally: it returns HobStart back if HobStart itself meets the requirement; + caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart. + If Guid is NULL, then ASSERT(). + If HobStart is NULL, then ASSERT(). + + @param Guid The GUID to match with in the HOB list. + @param HobStart A pointer to a Guid. + + @return The next instance of the matched GUID HOB from the starting HOB. + +**/ +VOID * +EFIAPI +GlueGetNextGuidHob ( + IN CONST EFI_GUID *Guid, + IN CONST VOID *HobStart + ) +; + +/** + This function searches the first instance of a HOB among the whole HOB list. + Such HOB should satisfy two conditions: + its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid. + If there does not exist such HOB from the starting HOB pointer, it will return NULL. + Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE () + to extract the data section and its size info respectively. + If Guid is NULL, then ASSERT(). + + @param Guid The GUID to match with in the HOB list. + + @return The first instance of the matched GUID HOB among the whole HOB list. + +**/ +VOID * +EFIAPI +GlueGetFirstGuidHob ( + IN CONST EFI_GUID *Guid + ) +; + +/** + Get the Boot Mode from the HOB list. + + This function returns the system boot mode information from the + PHIT HOB in HOB list. + + @param VOID + + @return The Boot Mode. + +**/ +EFI_BOOT_MODE +EFIAPI +GetBootModeHob ( + VOID + ) +; + +/** + Builds a HOB for a loaded PE32 module. + + This function builds a HOB for a loaded PE32 module. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If ModuleName is NULL, then ASSERT(). + If there is no additional space for HOB creation, then ASSERT(). + + @param ModuleName The GUID File Name of the module. + @param MemoryAllocationModule The 64 bit physical address of the module. + @param ModuleLength The length of the module in bytes. + @param EntryPoint The 64 bit physical address of the module entry point. + +**/ +VOID +EFIAPI +GlueBuildModuleHob ( + IN CONST EFI_GUID *ModuleName, + IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule, + IN UINT64 ModuleLength, + IN EFI_PHYSICAL_ADDRESS EntryPoint + ) +; + +/** + Builds a HOB that describes a chunk of system memory. + + This function builds a HOB that describes a chunk of system memory. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param ResourceType The type of resource described by this HOB. + @param ResourceAttribute The resource attributes of the memory described by this HOB. + @param PhysicalStart The 64 bit physical address of memory described by this HOB. + @param NumberOfBytes The length of the memory described by this HOB in bytes. + +**/ +VOID +EFIAPI +BuildResourceDescriptorHob ( + IN EFI_RESOURCE_TYPE ResourceType, + IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute, + IN EFI_PHYSICAL_ADDRESS PhysicalStart, + IN UINT64 NumberOfBytes + ) +; + +/** + Builds a GUID HOB with a certain data length. + + This function builds a customized HOB tagged with a GUID for identification + and returns the start address of GUID HOB data so that caller can fill the customized data. + The HOB Header and Name field is already stripped. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If Guid is NULL, then ASSERT(). + If there is no additional space for HOB creation, then ASSERT(). + If DataLength >= (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT(). + + @param Guid The GUID to tag the customized HOB. + @param DataLength The size of the data payload for the GUID HOB. + + @return The start address of GUID HOB data. + +**/ +VOID * +EFIAPI +BuildGuidHob ( + IN CONST EFI_GUID *Guid, + IN UINTN DataLength + ) +; + +/** + Copies a data buffer to a newly-built HOB. + + This function builds a customized HOB tagged with a GUID for identification, + copies the input data to the HOB data field and returns the start address of the GUID HOB data. + The HOB Header and Name field is already stripped. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If Guid is NULL, then ASSERT(). + If Data is NULL and DataLength > 0, then ASSERT(). + If there is no additional space for HOB creation, then ASSERT(). + If DataLength >= (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT(). + + @param Guid The GUID to tag the customized HOB. + @param Data The data to be copied into the data field of the GUID HOB. + @param DataLength The size of the data payload for the GUID HOB. + + @return The start address of GUID HOB data. + +**/ +VOID * +EFIAPI +BuildGuidDataHob ( + IN CONST EFI_GUID *Guid, + IN VOID *Data, + IN UINTN DataLength + ) +; + +/** + Builds a Firmware Volume HOB. + + This function builds a Firmware Volume HOB. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param BaseAddress The base address of the Firmware Volume. + @param Length The size of the Firmware Volume in bytes. + +**/ +VOID +EFIAPI +BuildFvHob ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +; + +/** + Builds a Capsule Volume HOB. + + This function builds a Capsule Volume HOB. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param BaseAddress The base address of the Capsule Volume. + @param Length The size of the Capsule Volume in bytes. + +**/ +VOID +EFIAPI +BuildCvHob ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +; + +/** + Builds a HOB for the CPU. + + This function builds a HOB for the CPU. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param SizeOfMemorySpace The maximum physical memory addressability of the processor. + @param SizeOfIoSpace The maximum physical I/O addressability of the processor. + +**/ +VOID +EFIAPI +BuildCpuHob ( + IN UINT8 SizeOfMemorySpace, + IN UINT8 SizeOfIoSpace + ) +; + +/** + Builds a HOB for the Stack. + + This function builds a HOB for the stack. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param BaseAddress The 64 bit physical address of the Stack. + @param Length The length of the stack in bytes. + +**/ +VOID +EFIAPI +BuildStackHob ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +; + +/** + Builds a HOB for the BSP store. + + This function builds a HOB for BSP store. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param BaseAddress The 64 bit physical address of the BSP. + @param Length The length of the BSP store in bytes. + @param MemoryType Type of memory allocated by this HOB. + +**/ +VOID +EFIAPI +BuildBspStoreHob ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length, + IN EFI_MEMORY_TYPE MemoryType + ) +; + +/** + Builds a HOB for the memory allocation. + + This function builds a HOB for the memory allocation. + It can only be invoked during PEI phase; + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase. + If there is no additional space for HOB creation, then ASSERT(). + + @param BaseAddress The 64 bit physical address of the memory. + @param Length The length of the memory allocation in bytes. + @param MemoryType Type of memory allocated by this HOB. + +**/ +VOID +EFIAPI +GlueBuildMemoryAllocationHob ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length, + IN EFI_MEMORY_TYPE MemoryType + ) +; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueIoLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueIoLib.h new file mode 100644 index 0000000..73f1df2 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueIoLib.h @@ -0,0 +1,2326 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueIoLib.h + +Abstract: + + Public header file for IO Lib + +--*/ + +#ifndef __EDKII_GLUE_IO_LIB_H__ +#define __EDKII_GLUE_IO_LIB_H__ + + +#define IoRead8(_PORT) GlueIoRead8(_PORT) +#define IoWrite8(_PORT,_VALUE) GlueIoWrite8(_PORT,_VALUE) +#define IoRead16(_PORT) GlueIoRead16(_PORT) +#define IoWrite16(_PORT,_VALUE) GlueIoWrite16(_PORT,_VALUE) +#define IoRead32(_PORT) GlueIoRead32(_PORT) +#define IoWrite32(_PORT,_VALUE) GlueIoWrite32(_PORT,_VALUE) + + +#define IO_LIB_ADDRESS(Segment,Port) \ + ( ((Port) & 0xffff) | (((Segment) & 0xffff) << 16) ) + +/** + Reads an 8-bit I/O port. + + Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +UINT8 +EFIAPI +GlueIoRead8 ( + IN UINTN Port + ); + +/** + Writes an 8-bit I/O port. + + Writes the 8-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +UINT8 +EFIAPI +GlueIoWrite8 ( + IN UINTN Port, + IN UINT8 Value + ); + +/** + Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the + result back to the 8-bit I/O port. + + Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 8-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoOr8 ( + IN UINTN Port, + IN UINT8 OrData + ); + +/** + Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back + to the 8-bit I/O port. + + Reads the 8-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 8-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoAnd8 ( + IN UINTN Port, + IN UINT8 AndData + ); + +/** + Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 8-bit I/O port. + + Reads the 8-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, performs a bitwise OR + between the result of the AND operation and the value specified by OrData, + and writes the result to the 8-bit I/O port specified by Port. The value + written to the I/O port is returned. This function must guarantee that all + I/O read and write operations are serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoAndThenOr8 ( + IN UINTN Port, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a bit field of an I/O register. + + Reads the bit field in an 8-bit I/O register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 8-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The value read. + +**/ +UINT8 +EFIAPI +IoBitFieldRead8 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an I/O register. + + Writes Value to the bit field of the I/O register. The bit field is specified + by the StartBit and the EndBit. All other bits in the destination I/O + register are preserved. The value written to the I/O port is returned. Extra + left bits in Value are stripped. + + If 8-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoBitFieldWrite8 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + +/** + Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the + result back to the bit field in the 8-bit port. + + Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 8-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. Extra left bits in OrData are stripped. + + If 8-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoBitFieldOr8 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + +/** + Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the + result back to the bit field in the 8-bit port. + + Reads the 8-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 8-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. Extra left bits in AndData are stripped. + + If 8-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoBitFieldAnd8 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + +/** + Reads a bit field in an 8-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 8-bit port. + + Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed + by a bitwise inclusive OR between the read result and the value specified by + AndData, and writes the result to the 8-bit I/O port specified by Port. The + value written to the I/O port is returned. This function must guarantee that + all I/O read and write operations are serialized. Extra left bits in both + AndData and OrData are stripped. + + If 8-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT8 +EFIAPI +IoBitFieldAndThenOr8 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a 16-bit I/O port. + + Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +UINT16 +EFIAPI +GlueIoRead16 ( + IN UINTN Port + ); + +/** + Writes a 16-bit I/O port. + + Writes the 16-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +UINT16 +EFIAPI +GlueIoWrite16 ( + IN UINTN Port, + IN UINT16 Value + ); + +/** + Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the + result back to the 16-bit I/O port. + + Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 16-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoOr16 ( + IN UINTN Port, + IN UINT16 OrData + ); + +/** + Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back + to the 16-bit I/O port. + + Reads the 16-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 16-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoAnd16 ( + IN UINTN Port, + IN UINT16 AndData + ); + +/** + Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 16-bit I/O port. + + Reads the 16-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, performs a bitwise OR + between the result of the AND operation and the value specified by OrData, + and writes the result to the 16-bit I/O port specified by Port. The value + written to the I/O port is returned. This function must guarantee that all + I/O read and write operations are serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoAndThenOr16 ( + IN UINTN Port, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a bit field of an I/O register. + + Reads the bit field in a 16-bit I/O register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The value read. + +**/ +UINT16 +EFIAPI +IoBitFieldRead16 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an I/O register. + + Writes Value to the bit field of the I/O register. The bit field is specified + by the StartBit and the EndBit. All other bits in the destination I/O + register are preserved. The value written to the I/O port is returned. Extra + left bits in Value are stripped. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoBitFieldWrite16 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + +/** + Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the + result back to the bit field in the 16-bit port. + + Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 16-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. Extra left bits in OrData are stripped. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoBitFieldOr16 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + +/** + Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the + result back to the bit field in the 16-bit port. + + Reads the 16-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 16-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. Extra left bits in AndData are stripped. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoBitFieldAnd16 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + +/** + Reads a bit field in a 16-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 16-bit port. + + Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed + by a bitwise inclusive OR between the read result and the value specified by + AndData, and writes the result to the 16-bit I/O port specified by Port. The + value written to the I/O port is returned. This function must guarantee that + all I/O read and write operations are serialized. Extra left bits in both + AndData and OrData are stripped. + + If 16-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT16 +EFIAPI +IoBitFieldAndThenOr16 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a 32-bit I/O port. + + Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +UINT32 +EFIAPI +GlueIoRead32 ( + IN UINTN Port + ); + +/** + Writes a 32-bit I/O port. + + Writes the 32-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +UINT32 +EFIAPI +GlueIoWrite32 ( + IN UINTN Port, + IN UINT32 Value + ); + +/** + Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the + result back to the 32-bit I/O port. + + Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 32-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoOr32 ( + IN UINTN Port, + IN UINT32 OrData + ); + +/** + Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back + to the 32-bit I/O port. + + Reads the 32-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 32-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoAnd32 ( + IN UINTN Port, + IN UINT32 AndData + ); + +/** + Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 32-bit I/O port. + + Reads the 32-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, performs a bitwise OR + between the result of the AND operation and the value specified by OrData, + and writes the result to the 32-bit I/O port specified by Port. The value + written to the I/O port is returned. This function must guarantee that all + I/O read and write operations are serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoAndThenOr32 ( + IN UINTN Port, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a bit field of an I/O register. + + Reads the bit field in a 32-bit I/O register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The value read. + +**/ +UINT32 +EFIAPI +IoBitFieldRead32 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an I/O register. + + Writes Value to the bit field of the I/O register. The bit field is specified + by the StartBit and the EndBit. All other bits in the destination I/O + register are preserved. The value written to the I/O port is returned. Extra + left bits in Value are stripped. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoBitFieldWrite32 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the + result back to the bit field in the 32-bit port. + + Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 32-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. Extra left bits in OrData are stripped. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoBitFieldOr32 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the + result back to the bit field in the 32-bit port. + + Reads the 32-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 32-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. Extra left bits in AndData are stripped. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoBitFieldAnd32 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field in a 32-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 32-bit port. + + Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed + by a bitwise inclusive OR between the read result and the value specified by + AndData, and writes the result to the 32-bit I/O port specified by Port. The + value written to the I/O port is returned. This function must guarantee that + all I/O read and write operations are serialized. Extra left bits in both + AndData and OrData are stripped. + + If 32-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT32 +EFIAPI +IoBitFieldAndThenOr32 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a 64-bit I/O port. + + Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned. + This function must guarantee that all I/O read and write operations are + serialized. + + If 64-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + + @return The value read. + +**/ +UINT64 +EFIAPI +IoRead64 ( + IN UINTN Port + ); + +/** + Writes a 64-bit I/O port. + + Writes the 64-bit I/O port specified by Port with the value specified by Value + and returns Value. This function must guarantee that all I/O read and write + operations are serialized. + + If 64-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Value The value to write to the I/O port. + + @return The value written the I/O port. + +**/ +UINT64 +EFIAPI +IoWrite64 ( + IN UINTN Port, + IN UINT64 Value + ); + +/** + Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the + result back to the 64-bit I/O port. + + Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. + + If 64-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoOr64 ( + IN UINTN Port, + IN UINT64 OrData + ); + +/** + Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back + to the 64-bit I/O port. + + Reads the 64-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 64-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. + + If 64-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoAnd64 ( + IN UINTN Port, + IN UINT64 AndData + ); + +/** + Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 64-bit I/O port. + + Reads the 64-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, performs a bitwise OR + between the result of the AND operation and the value specified by OrData, + and writes the result to the 64-bit I/O port specified by Port. The value + written to the I/O port is returned. This function must guarantee that all + I/O read and write operations are serialized. + + If 64-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoAndThenOr64 ( + IN UINTN Port, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + Reads a bit field of an I/O register. + + Reads the bit field in a 64-bit I/O register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 64-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + + @return The value read. + +**/ +UINT64 +EFIAPI +IoBitFieldRead64 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to an I/O register. + + Writes Value to the bit field of the I/O register. The bit field is specified + by the StartBit and the EndBit. All other bits in the destination I/O + register are preserved. The value written to the I/O port is returned. Extra + left bits in Value are stripped. + + If 64-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param Value New value of the bit field. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoBitFieldWrite64 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 Value + ); + +/** + Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the + result back to the bit field in the 64-bit port. + + Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR + between the read result and the value specified by OrData, and writes the + result to the 64-bit I/O port specified by Port. The value written to the I/O + port is returned. This function must guarantee that all I/O read and write + operations are serialized. Extra left bits in OrData are stripped. + + If 64-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param OrData The value to OR with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoBitFieldOr64 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 OrData + ); + +/** + Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the + result back to the bit field in the 64-bit port. + + Reads the 64-bit I/O port specified by Port, performs a bitwise AND between + the read result and the value specified by AndData, and writes the result to + the 64-bit I/O port specified by Port. The value written to the I/O port is + returned. This function must guarantee that all I/O read and write operations + are serialized. Extra left bits in AndData are stripped. + + If 64-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the I/O port. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoBitFieldAnd64 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData + ); + +/** + Reads a bit field in a 64-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 64-bit port. + + Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed + by a bitwise inclusive OR between the read result and the value specified by + AndData, and writes the result to the 64-bit I/O port specified by Port. The + value written to the I/O port is returned. This function must guarantee that + all I/O read and write operations are serialized. Extra left bits in both + AndData and OrData are stripped. + + If 64-bit I/O port operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Port The I/O port to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with the read value from the I/O port. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the I/O port. + +**/ +UINT64 +EFIAPI +IoBitFieldAndThenOr64 ( + IN UINTN Port, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + Reads an 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address. The 8-bit read value is + returned. This function must guarantee that all MMIO read and write + operations are serialized. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT8 +EFIAPI +MmioRead8 ( + IN UINTN Address + ); + +/** + Writes an 8-bit MMIO register. + + Writes the 8-bit MMIO register specified by Address with the value specified + by Value and returns Value. This function must guarantee that all MMIO read + and write operations are serialized. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioWrite8 ( + IN UINTN Address, + IN UINT8 Value + ); + +/** + Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the + result back to the 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 8-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioOr8 ( + IN UINTN Address, + IN UINT8 OrData + ); + +/** + Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result + back to the 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 8-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioAnd8 ( + IN UINTN Address, + IN UINT8 AndData + ); + +/** + Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, performs a + bitwise OR between the result of the AND operation and the value specified by + OrData, and writes the result to the 8-bit MMIO register specified by + Address. The value written to the MMIO register is returned. This function + must guarantee that all MMIO read and write operations are serialized. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioAndThenOr8 ( + IN UINTN Address, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a bit field of a MMIO register. + + Reads the bit field in an 8-bit MMIO register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The value read. + +**/ +UINT8 +EFIAPI +MmioBitFieldRead8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a MMIO register. + + Writes Value to the bit field of the MMIO register. The bit field is + specified by the StartBit and the EndBit. All other bits in the destination + MMIO register are preserved. The new value of the 8-bit register is returned. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioBitFieldWrite8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + +/** + Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and + writes the result back to the bit field in the 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 8-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. Extra left bits in OrData + are stripped. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioBitFieldOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + +/** + Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and + writes the result back to the bit field in the 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 8-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. Extra left bits in AndData are + stripped. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioBitFieldAnd8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + +/** + Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed + by a bitwise inclusive OR, and writes the result back to the bit field in the + 8-bit MMIO register. + + Reads the 8-bit MMIO register specified by Address, performs a bitwise AND + followed by a bitwise inclusive OR between the read result and the value + specified by AndData, and writes the result to the 8-bit MMIO register + specified by Address. The value written to the MMIO register is returned. + This function must guarantee that all MMIO read and write operations are + serialized. Extra left bits in both AndData and OrData are stripped. + + If 8-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT8 +EFIAPI +MmioBitFieldAndThenOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address. The 16-bit read value is + returned. This function must guarantee that all MMIO read and write + operations are serialized. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT16 +EFIAPI +MmioRead16 ( + IN UINTN Address + ); + +/** + Writes a 16-bit MMIO register. + + Writes the 16-bit MMIO register specified by Address with the value specified + by Value and returns Value. This function must guarantee that all MMIO read + and write operations are serialized. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioWrite16 ( + IN UINTN Address, + IN UINT16 Value + ); + +/** + Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the + result back to the 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 16-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioOr16 ( + IN UINTN Address, + IN UINT16 OrData + ); + +/** + Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result + back to the 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 16-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ); + +/** + Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, performs a + bitwise OR between the result of the AND operation and the value specified by + OrData, and writes the result to the 16-bit MMIO register specified by + Address. The value written to the MMIO register is returned. This function + must guarantee that all MMIO read and write operations are serialized. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a bit field of a MMIO register. + + Reads the bit field in a 16-bit MMIO register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The value read. + +**/ +UINT16 +EFIAPI +MmioBitFieldRead16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a MMIO register. + + Writes Value to the bit field of the MMIO register. The bit field is + specified by the StartBit and the EndBit. All other bits in the destination + MMIO register are preserved. The new value of the 16-bit register is returned. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioBitFieldWrite16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + +/** + Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and + writes the result back to the bit field in the 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 16-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. Extra left bits in OrData + are stripped. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioBitFieldOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + +/** + Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and + writes the result back to the bit field in the 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 16-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. Extra left bits in AndData are + stripped. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioBitFieldAnd16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + +/** + Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed + by a bitwise inclusive OR, and writes the result back to the bit field in the + 16-bit MMIO register. + + Reads the 16-bit MMIO register specified by Address, performs a bitwise AND + followed by a bitwise inclusive OR between the read result and the value + specified by AndData, and writes the result to the 16-bit MMIO register + specified by Address. The value written to the MMIO register is returned. + This function must guarantee that all MMIO read and write operations are + serialized. Extra left bits in both AndData and OrData are stripped. + + If 16-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +MmioBitFieldAndThenOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address. The 32-bit read value is + returned. This function must guarantee that all MMIO read and write + operations are serialized. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT32 +EFIAPI +MmioRead32 ( + IN UINTN Address + ); + +/** + Writes a 32-bit MMIO register. + + Writes the 32-bit MMIO register specified by Address with the value specified + by Value and returns Value. This function must guarantee that all MMIO read + and write operations are serialized. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioWrite32 ( + IN UINTN Address, + IN UINT32 Value + ); + +/** + Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the + result back to the 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 32-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioOr32 ( + IN UINTN Address, + IN UINT32 OrData + ); + +/** + Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result + back to the 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 32-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ); + +/** + Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, performs a + bitwise OR between the result of the AND operation and the value specified by + OrData, and writes the result to the 32-bit MMIO register specified by + Address. The value written to the MMIO register is returned. This function + must guarantee that all MMIO read and write operations are serialized. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a bit field of a MMIO register. + + Reads the bit field in a 32-bit MMIO register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The value read. + +**/ +UINT32 +EFIAPI +MmioBitFieldRead32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a MMIO register. + + Writes Value to the bit field of the MMIO register. The bit field is + specified by the StartBit and the EndBit. All other bits in the destination + MMIO register are preserved. The new value of the 32-bit register is returned. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioBitFieldWrite32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and + writes the result back to the bit field in the 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 32-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. Extra left bits in OrData + are stripped. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioBitFieldOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and + writes the result back to the bit field in the 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 32-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. Extra left bits in AndData are + stripped. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioBitFieldAnd32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed + by a bitwise inclusive OR, and writes the result back to the bit field in the + 32-bit MMIO register. + + Reads the 32-bit MMIO register specified by Address, performs a bitwise AND + followed by a bitwise inclusive OR between the read result and the value + specified by AndData, and writes the result to the 32-bit MMIO register + specified by Address. The value written to the MMIO register is returned. + This function must guarantee that all MMIO read and write operations are + serialized. Extra left bits in both AndData and OrData are stripped. + + If 32-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +MmioBitFieldAndThenOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address. The 64-bit read value is + returned. This function must guarantee that all MMIO read and write + operations are serialized. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT64 +EFIAPI +MmioRead64 ( + IN UINTN Address + ); + +/** + Writes a 64-bit MMIO register. + + Writes the 64-bit MMIO register specified by Address with the value specified + by Value and returns Value. This function must guarantee that all MMIO read + and write operations are serialized. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioWrite64 ( + IN UINTN Address, + IN UINT64 Value + ); + +/** + Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the + result back to the 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 64-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioOr64 ( + IN UINTN Address, + IN UINT64 OrData + ); + +/** + Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result + back to the 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 64-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioAnd64 ( + IN UINTN Address, + IN UINT64 AndData + ); + +/** + Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise + inclusive OR, and writes the result back to the 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, performs a + bitwise OR between the result of the AND operation and the value specified by + OrData, and writes the result to the 64-bit MMIO register specified by + Address. The value written to the MMIO register is returned. This function + must guarantee that all MMIO read and write operations are serialized. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioAndThenOr64 ( + IN UINTN Address, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + Reads a bit field of a MMIO register. + + Reads the bit field in a 64-bit MMIO register. The bit field is specified by + the StartBit and the EndBit. The value of the bit field is returned. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + + @return The value read. + +**/ +UINT64 +EFIAPI +MmioBitFieldRead64 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a MMIO register. + + Writes Value to the bit field of the MMIO register. The bit field is + specified by the StartBit and the EndBit. All other bits in the destination + MMIO register are preserved. The new value of the 64-bit register is returned. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param Value New value of the bit field. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioBitFieldWrite64 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 Value + ); + +/** + Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and + writes the result back to the bit field in the 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address, performs a bitwise + inclusive OR between the read result and the value specified by OrData, and + writes the result to the 64-bit MMIO register specified by Address. The value + written to the MMIO register is returned. This function must guarantee that + all MMIO read and write operations are serialized. Extra left bits in OrData + are stripped. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param OrData The value to OR with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioBitFieldOr64 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 OrData + ); + +/** + Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and + writes the result back to the bit field in the 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address, performs a bitwise AND + between the read result and the value specified by AndData, and writes the + result to the 64-bit MMIO register specified by Address. The value written to + the MMIO register is returned. This function must guarantee that all MMIO + read and write operations are serialized. Extra left bits in AndData are + stripped. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioBitFieldAnd64 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData + ); + +/** + Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed + by a bitwise inclusive OR, and writes the result back to the bit field in the + 64-bit MMIO register. + + Reads the 64-bit MMIO register specified by Address, performs a bitwise AND + followed by a bitwise inclusive OR between the read result and the value + specified by AndData, and writes the result to the 64-bit MMIO register + specified by Address. The value written to the MMIO register is returned. + This function must guarantee that all MMIO read and write operations are + serialized. Extra left bits in both AndData and OrData are stripped. + + If 64-bit MMIO register operations are not supported, then ASSERT(). + If StartBit is greater than 63, then ASSERT(). + If EndBit is greater than 63, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address MMIO register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..63. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..63. + @param AndData The value to AND with read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +MmioBitFieldAndThenOr64 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT64 AndData, + IN UINT64 OrData + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueMemoryAllocationLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueMemoryAllocationLib.h new file mode 100644 index 0000000..395ee4a --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueMemoryAllocationLib.h @@ -0,0 +1,637 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueMemoryAllocationLib.h + +Abstract: + + Public header file for Memory Allocation Lib + +--*/ + +#ifndef __EDKII_GLUE_MEMORY_ALLOCATION_LIB_H__ +#define __EDKII_GLUE_MEMORY_ALLOCATION_LIB_H__ + + +#define AllocatePages(_PAGES) GlueAllocatePages(_PAGES) +#define FreePages(_BUFFER, _PAGES) GlueFreePages(_BUFFER, _PAGES) +#define AllocatePool(_SIZE) GlueAllocatePool(_SIZE) +#define AllocateZeroPool(_ALLOCATIONSIZE) GlueAllocateZeroPool(_ALLOCATIONSIZE) +#define AllocateCopyPool(_ALLOCATIONSIZE, _BUFFER) GlueAllocateCopyPool(_ALLOCATIONSIZE, _BUFFER) +#define FreePool(_BUFFER) GlueFreePool(_BUFFER) + + +/** + Allocates one or more 4KB pages of type EfiBootServicesData. + + Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the + allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL + is returned. If there is not enough memory remaining to satisfy the request, then NULL is + returned. + + @param Pages The number of 4 KB pages to allocate. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +GlueAllocatePages ( + IN UINTN Pages + ); + +/** + Allocates one or more 4KB pages of type EfiRuntimeServicesData. + + Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the + allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL + is returned. If there is not enough memory remaining to satisfy the request, then NULL is + returned. + + @param Pages The number of 4 KB pages to allocate. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateRuntimePages ( + IN UINTN Pages + ); + +/** + Allocates one or more 4KB pages of type EfiReservedMemoryType. + + Allocates the number of 4KB pages of type EfiReservedMemoryType and returns a pointer to the + allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL + is returned. If there is not enough memory remaining to satisfy the request, then NULL is + returned. + + @param Pages The number of 4 KB pages to allocate. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateReservedPages ( + IN UINTN Pages + ); + +/** + Frees one or more 4KB pages that were previously allocated with one of the page allocation + functions in the Memory Allocation Library. + + Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer + must have been allocated on a previous call to the page allocation services of the Memory + Allocation Library. + If Buffer was not allocated with a page allocation function in the Memory Allocation Library, + then ASSERT(). + If Pages is zero, then ASSERT(). + + @param Buffer Pointer to the buffer of pages to free. + @param Pages The number of 4 KB pages to free. + +**/ +VOID +EFIAPI +GlueFreePages ( + IN VOID *Buffer, + IN UINTN Pages + ); + +/** + Allocates one or more 4KB pages of type EfiBootServicesData at a specified alignment. + + Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData with an + alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is + returned. If there is not enough memory at the specified alignment remaining to satisfy the + request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param Pages The number of 4 KB pages to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedPages ( + IN UINTN Pages, + IN UINTN Alignment + ); + +/** + Allocates one or more 4KB pages of type EfiRuntimeServicesData at a specified alignment. + + Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData with an + alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is + returned. If there is not enough memory at the specified alignment remaining to satisfy the + request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param Pages The number of 4 KB pages to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedRuntimePages ( + IN UINTN Pages, + IN UINTN Alignment + ); + +/** + Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment. + + Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType with an + alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is + returned. If there is not enough memory at the specified alignment remaining to satisfy the + request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param Pages The number of 4 KB pages to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedReservedPages ( + IN UINTN Pages, + IN UINTN Alignment + ); + +/** + Frees one or more 4KB pages that were previously allocated with one of the aligned page + allocation functions in the Memory Allocation Library. + + Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer + must have been allocated on a previous call to the aligned page allocation services of the Memory + Allocation Library. + If Buffer was not allocated with an aligned page allocation function in the Memory Allocation + Library, then ASSERT(). + If Pages is zero, then ASSERT(). + + @param Buffer Pointer to the buffer of pages to free. + @param Pages The number of 4 KB pages to free. + +**/ +VOID +EFIAPI +FreeAlignedPages ( + IN VOID *Buffer, + IN UINTN Pages + ); + +/** + Allocates a buffer of type EfiBootServicesData. + + Allocates the number bytes specified by AllocationSize of type EfiBootServicesData and returns a + pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is + returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. + + @param AllocationSize The number of bytes to allocate. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +GlueAllocatePool ( + IN UINTN AllocationSize + ); + +/** + Allocates a buffer of type EfiRuntimeServicesData. + + Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData and returns + a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is + returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. + + @param AllocationSize The number of bytes to allocate. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateRuntimePool ( + IN UINTN AllocationSize + ); + +/** + Allocates a buffer of type EfieservedMemoryType. + + Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType and returns + a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is + returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. + + @param AllocationSize The number of bytes to allocate. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateReservedPool ( + IN UINTN AllocationSize + ); + +/** + Allocates and zeros a buffer of type EfiBootServicesData. + + Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the + buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a + valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the + request, then NULL is returned. + + @param AllocationSize The number of bytes to allocate and zero. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +GlueAllocateZeroPool ( + IN UINTN AllocationSize + ); + +/** + Allocates and zeros a buffer of type EfiRuntimeServicesData. + + Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, clears the + buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a + valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the + request, then NULL is returned. + + @param AllocationSize The number of bytes to allocate and zero. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateRuntimeZeroPool ( + IN UINTN AllocationSize + ); + +/** + Allocates and zeros a buffer of type EfiReservedMemoryType. + + Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, clears the + buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a + valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the + request, then NULL is returned. + + @param AllocationSize The number of bytes to allocate and zero. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateReservedZeroPool ( + IN UINTN AllocationSize + ); + +/** + Copies a buffer to an allocated buffer of type EfiBootServicesData. + + Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, copies + AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the + allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there + is not enough memory remaining to satisfy the request, then NULL is returned. + If Buffer is NULL, then ASSERT(). + If AllocationSize is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param AllocationSize The number of bytes to allocate and zero. + @param Buffer The buffer to copy to the allocated buffer. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +GlueAllocateCopyPool ( + IN UINTN AllocationSize, + IN CONST VOID *Buffer + ); + +/** + Copies a buffer to an allocated buffer of type EfiRuntimeServicesData. + + Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, copies + AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the + allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there + is not enough memory remaining to satisfy the request, then NULL is returned. + If Buffer is NULL, then ASSERT(). + If AllocationSize is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param AllocationSize The number of bytes to allocate and zero. + @param Buffer The buffer to copy to the allocated buffer. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateRuntimeCopyPool ( + IN UINTN AllocationSize, + IN CONST VOID *Buffer + ); + +/** + Copies a buffer to an allocated buffer of type EfiReservedMemoryType. + + Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, copies + AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the + allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there + is not enough memory remaining to satisfy the request, then NULL is returned. + If Buffer is NULL, then ASSERT(). + If AllocationSize is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). + + @param AllocationSize The number of bytes to allocate and zero. + @param Buffer The buffer to copy to the allocated buffer. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateReservedCopyPool ( + IN UINTN AllocationSize, + IN CONST VOID *Buffer + ); + +/** + Frees a buffer that was previously allocated with one of the pool allocation functions in the + Memory Allocation Library. + + Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the + pool allocation services of the Memory Allocation Library. + If Buffer was not allocated with a pool allocation function in the Memory Allocation Library, + then ASSERT(). + + @param Buffer Pointer to the buffer to free. + +**/ +VOID +EFIAPI +GlueFreePool ( + IN VOID *Buffer + ); + +/** + Allocates a buffer of type EfiBootServicesData at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an + alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, + then a valid buffer of 0 size is returned. If there is not enough memory at the specified + alignment remaining to satisfy the request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedPool ( + IN UINTN AllocationSize, + IN UINTN Alignment + ); + +/** + Allocates a buffer of type EfiRuntimeServicesData at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an + alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, + then a valid buffer of 0 size is returned. If there is not enough memory at the specified + alignment remaining to satisfy the request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedRuntimePool ( + IN UINTN AllocationSize, + IN UINTN Alignment + ); + +/** + Allocates a buffer of type EfieservedMemoryType at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an + alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, + then a valid buffer of 0 size is returned. If there is not enough memory at the specified + alignment remaining to satisfy the request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedReservedPool ( + IN UINTN AllocationSize, + IN UINTN Alignment + ); + +/** + Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an + alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the + allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there + is not enough memory at the specified alignment remaining to satisfy the request, then NULL is + returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedZeroPool ( + IN UINTN AllocationSize, + IN UINTN Alignment + ); + +/** + Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an + alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the + allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there + is not enough memory at the specified alignment remaining to satisfy the request, then NULL is + returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedRuntimeZeroPool ( + IN UINTN AllocationSize, + IN UINTN Alignment + ); + +/** + Allocates and zeros a buffer of type EfieservedMemoryType at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an + alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the + allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there + is not enough memory at the specified alignment remaining to satisfy the request, then NULL is + returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedReservedZeroPool ( + IN UINTN AllocationSize, + IN UINTN Alignment + ); + +/** + Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiBootServicesData type with an + alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, + then a valid buffer of 0 size is returned. If there is not enough memory at the specified + alignment remaining to satisfy the request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Buffer The buffer to copy to the allocated buffer. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedCopyPool ( + IN UINTN AllocationSize, + IN CONST VOID *Buffer, + IN UINTN Alignment + ); + +/** + Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData type with an + alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, + then a valid buffer of 0 size is returned. If there is not enough memory at the specified + alignment remaining to satisfy the request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Buffer The buffer to copy to the allocated buffer. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedRuntimeCopyPool ( + IN UINTN AllocationSize, + IN CONST VOID *Buffer, + IN UINTN Alignment + ); + +/** + Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment. + + Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType type with an + alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, + then a valid buffer of 0 size is returned. If there is not enough memory at the specified + alignment remaining to satisfy the request, then NULL is returned. + If Alignment is not a power of two and Alignment is not zero, then ASSERT(). + + @param AllocationSize The number of bytes to allocate. + @param Buffer The buffer to copy to the allocated buffer. + @param Alignment The requested alignment of the allocation. Must be a power of two. + If Alignment is zero, then byte alignment is used. + + @return A pointer to the allocated buffer or NULL if allocation fails. + +**/ +VOID * +EFIAPI +AllocateAlignedReservedCopyPool ( + IN UINTN AllocationSize, + IN CONST VOID *Buffer, + IN UINTN Alignment + ); + +/** + Frees a buffer that was previously allocated with one of the aligned pool allocation functions + in the Memory Allocation Library. + + Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the + aligned pool allocation services of the Memory Allocation Library. + If Buffer was not allocated with an aligned pool allocation function in the Memory Allocation + Library, then ASSERT(). + + @param Buffer Pointer to the buffer to free. + +**/ +VOID +EFIAPI +FreeAlignedPool ( + IN VOID *Buffer + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciCf8Lib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciCf8Lib.h new file mode 100644 index 0000000..7bd22ab --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciCf8Lib.h @@ -0,0 +1,1055 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePciCf8Lib.h + +Abstract: + + Public header file for Pci Cf8 Lib + +--*/ + +#ifndef __EDKII_GLUE_PCI_CF8_LIB_H__ +#define __EDKII_GLUE_PCI_CF8_LIB_H__ + + +/** + Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an + address that can be passed to the PCI Library functions. + + Computes an address that is compatible with the PCI Library functions. The + unused upper bits of Bus, Device, Function and Register are stripped prior to + the generation of the address. + + @param Bus PCI Bus number. Range 0..255. + @param Device PCI Device number. Range 0..31. + @param Function PCI Function number. Range 0..7. + @param Register PCI Register number. Range 0..255. + + @return The encode PCI address. + +**/ +#define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \ + (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) + +/** + Reads an 8-bit PCI configuration register. + + Reads and returns the 8-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8Read8 ( + IN UINTN Address + ); + +/** + Writes an 8-bit PCI configuration register. + + Writes the 8-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8Write8 ( + IN UINTN Address, + IN UINT8 Data + ); + +/** + Performs a bitwise inclusive OR of an 8-bit PCI configuration register with + an 8-bit value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 8-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8Or8 ( + IN UINTN Address, + IN UINT8 OrData + ); + +/** + Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit + value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 8-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8And8 ( + IN UINTN Address, + IN UINT8 AndData + ); + +/** + Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit + value, followed a bitwise inclusive OR with another 8-bit value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 8-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8AndThenOr8 ( + IN UINTN Address, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in an 8-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8BitFieldRead8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 8-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8BitFieldWrite8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + +/** + Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 8-bit port. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 8-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8BitFieldOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + +/** + Reads a bit field in an 8-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 8-bit register. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 8-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8BitFieldAnd8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + +/** + Reads a bit field in an 8-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 8-bit port. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 8-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciCf8BitFieldAndThenOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a 16-bit PCI configuration register. + + Reads and returns the 16-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8Read16 ( + IN UINTN Address + ); + +/** + Writes a 16-bit PCI configuration register. + + Writes the 16-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8Write16 ( + IN UINTN Address, + IN UINT16 Data + ); + +/** + Performs a bitwise inclusive OR of a 16-bit PCI configuration register with + a 16-bit value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8Or16 ( + IN UINTN Address, + IN UINT16 OrData + ); + +/** + Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit + value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8And16 ( + IN UINTN Address, + IN UINT16 AndData + ); + +/** + Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit + value, followed a bitwise inclusive OR with another 16-bit value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 16-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8AndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in a 16-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8BitFieldRead16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 16-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8BitFieldWrite16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + +/** + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8BitFieldOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + +/** + Reads a bit field in a 16-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 16-bit register. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8BitFieldAnd16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + +/** + Reads a bit field in a 16-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 16-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciCf8BitFieldAndThenOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a 32-bit PCI configuration register. + + Reads and returns the 32-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8Read32 ( + IN UINTN Address + ); + +/** + Writes a 32-bit PCI configuration register. + + Writes the 32-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8Write32 ( + IN UINTN Address, + IN UINT32 Data + ); + +/** + Performs a bitwise inclusive OR of a 32-bit PCI configuration register with + a 32-bit value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 32-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8Or32 ( + IN UINTN Address, + IN UINT32 OrData + ); + +/** + Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit + value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 32-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8And32 ( + IN UINTN Address, + IN UINT32 AndData + ); + +/** + Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit + value, followed a bitwise inclusive OR with another 32-bit value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 32-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8AndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in a 32-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8BitFieldRead32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 32-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8BitFieldWrite32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 32-bit port. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 32-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8BitFieldOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field in a 32-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 32-bit register. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 32-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8BitFieldAnd32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field in a 32-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 32-bit port. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 32-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciCf8BitFieldAndThenOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a range of PCI configuration registers into a caller supplied buffer. + + Reads the range of PCI configuration registers specified by StartAddress and + Size into the buffer specified by Buffer. This function only allows the PCI + configuration registers from a single PCI function to be read. Size is + returned. When possible 32-bit PCI configuration read cycles are used to read + from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit + and 16-bit PCI configuration read cycles may be used at the beginning and the + end of the range. + + If StartAddress > 0x0FFFFFFF, then ASSERT(). + If the register specified by StartAddress >= 0x100, then ASSERT(). + If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT(). + If Size > 0 and Buffer is NULL, then ASSERT(). + + @param StartAddress Starting address that encodes the PCI Bus, Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer receiving the data read. + + @return Size + +**/ +UINTN +EFIAPI +PciCf8ReadBuffer ( + IN UINTN StartAddress, + IN UINTN Size, + OUT VOID *Buffer + ); + +/** + Copies the data in a caller supplied buffer to a specified range of PCI + configuration space. + + Writes the range of PCI configuration registers specified by StartAddress and + Size from the buffer specified by Buffer. This function only allows the PCI + configuration registers from a single PCI function to be written. Size is + returned. When possible 32-bit PCI configuration write cycles are used to + write from StartAdress to StartAddress + Size. Due to alignment restrictions, + 8-bit and 16-bit PCI configuration write cycles may be used at the beginning + and the end of the range. + + If StartAddress > 0x0FFFFFFF, then ASSERT(). + If the register specified by StartAddress >= 0x100, then ASSERT(). + If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT(). + If Size > 0 and Buffer is NULL, then ASSERT(). + + @param StartAddress Starting address that encodes the PCI Bus, Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer containing the data to write. + + @return Size + +**/ +UINTN +EFIAPI +PciCf8WriteBuffer ( + IN UINTN StartAddress, + IN UINTN Size, + IN VOID *Buffer + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciExpressLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciExpressLib.h new file mode 100644 index 0000000..4fe4668 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciExpressLib.h @@ -0,0 +1,1023 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePciExpressLib.h + +Abstract: + + Public header file for Pci Express Lib + +--*/ + +#ifndef __EDKII_GLUE_PCI_EXPRESS_LIB_H__ +#define __EDKII_GLUE_PCI_EXPRESS_LIB_H__ + + +/** + Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an + address that can be passed to the PCI Library functions. + + Computes an address that is compatible with the PCI Library functions. The + unused upper bits of Bus, Device, Function and Register are stripped prior to + the generation of the address. + + @param Bus PCI Bus number. Range 0..255. + @param Device PCI Device number. Range 0..31. + @param Function PCI Function number. Range 0..7. + @param Register PCI Register number. Range 0..4095. + + @return The encode PCI address. + +**/ +#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \ + (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) + +/** + Reads an 8-bit PCI configuration register. + + Reads and returns the 8-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressRead8 ( + IN UINTN Address + ); + +/** + Writes an 8-bit PCI configuration register. + + Writes the 8-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressWrite8 ( + IN UINTN Address, + IN UINT8 Data + ); + +/** + Performs a bitwise inclusive OR of an 8-bit PCI configuration register with + an 8-bit value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 8-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressOr8 ( + IN UINTN Address, + IN UINT8 OrData + ); + +/** + Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit + value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 8-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressAnd8 ( + IN UINTN Address, + IN UINT8 AndData + ); + +/** + Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit + value, followed a bitwise inclusive OR with another 8-bit value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 8-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressAndThenOr8 ( + IN UINTN Address, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in an 8-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressBitFieldRead8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 8-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressBitFieldWrite8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + +/** + Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 8-bit port. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 8-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressBitFieldOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + +/** + Reads a bit field in an 8-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 8-bit register. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 8-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressBitFieldAnd8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + +/** + Reads a bit field in an 8-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 8-bit port. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 8-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciExpressBitFieldAndThenOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a 16-bit PCI configuration register. + + Reads and returns the 16-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressRead16 ( + IN UINTN Address + ); + +/** + Writes a 16-bit PCI configuration register. + + Writes the 16-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressWrite16 ( + IN UINTN Address, + IN UINT16 Data + ); + +/** + Performs a bitwise inclusive OR of a 16-bit PCI configuration register with + a 16-bit value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressOr16 ( + IN UINTN Address, + IN UINT16 OrData + ); + +/** + Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit + value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ); + +/** + Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit + value, followed a bitwise inclusive OR with another 16-bit value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 16-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in a 16-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressBitFieldRead16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 16-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressBitFieldWrite16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + +/** + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressBitFieldOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + +/** + Reads a bit field in a 16-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 16-bit register. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressBitFieldAnd16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + +/** + Reads a bit field in a 16-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 16-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciExpressBitFieldAndThenOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a 32-bit PCI configuration register. + + Reads and returns the 32-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressRead32 ( + IN UINTN Address + ); + +/** + Writes a 32-bit PCI configuration register. + + Writes the 32-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressWrite32 ( + IN UINTN Address, + IN UINT32 Data + ); + +/** + Performs a bitwise inclusive OR of a 32-bit PCI configuration register with + a 32-bit value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 32-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressOr32 ( + IN UINTN Address, + IN UINT32 OrData + ); + +/** + Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit + value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 32-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ); + +/** + Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit + value, followed a bitwise inclusive OR with another 32-bit value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 32-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in a 32-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressBitFieldRead32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 32-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressBitFieldWrite32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 32-bit port. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 32-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressBitFieldOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field in a 32-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 32-bit register. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 32-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressBitFieldAnd32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field in a 32-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 32-bit port. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 32-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciExpressBitFieldAndThenOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a range of PCI configuration registers into a caller supplied buffer. + + Reads the range of PCI configuration registers specified by StartAddress and + Size into the buffer specified by Buffer. This function only allows the PCI + configuration registers from a single PCI function to be read. Size is + returned. When possible 32-bit PCI configuration read cycles are used to read + from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit + and 16-bit PCI configuration read cycles may be used at the beginning and the + end of the range. + + If StartAddress > 0x0FFFFFFF, then ASSERT(). + If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). + If Size > 0 and Buffer is NULL, then ASSERT(). + + @param StartAddress Starting address that encodes the PCI Bus, Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer receiving the data read. + + @return Size + +**/ +UINTN +EFIAPI +PciExpressReadBuffer ( + IN UINTN StartAddress, + IN UINTN Size, + OUT VOID *Buffer + ); + +/** + Copies the data in a caller supplied buffer to a specified range of PCI + configuration space. + + Writes the range of PCI configuration registers specified by StartAddress and + Size from the buffer specified by Buffer. This function only allows the PCI + configuration registers from a single PCI function to be written. Size is + returned. When possible 32-bit PCI configuration write cycles are used to + write from StartAdress to StartAddress + Size. Due to alignment restrictions, + 8-bit and 16-bit PCI configuration write cycles may be used at the beginning + and the end of the range. + + If StartAddress > 0x0FFFFFFF, then ASSERT(). + If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). + If Size > 0 and Buffer is NULL, then ASSERT(). + + @param StartAddress Starting address that encodes the PCI Bus, Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer containing the data to write. + + @return Size + +**/ +UINTN +EFIAPI +PciExpressWriteBuffer ( + IN UINTN StartAddress, + IN UINTN Size, + IN VOID *Buffer + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciLib.h new file mode 100644 index 0000000..26193dd --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePciLib.h @@ -0,0 +1,1019 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePciLib.h + +Abstract: + + Public header file for Pci Lib + +--*/ + +#ifndef __EDKII_GLUE_PCI_LIB_H__ +#define __EDKII_GLUE_PCI_LIB_H__ + +/** + Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an + address that can be passed to the PCI Library functions. + + @param Bus PCI Bus number. Range 0..255. + @param Device PCI Device number. Range 0..31. + @param Function PCI Function number. Range 0..7. + @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 + for PCI Express. + + @return The encoded PCI address. + +**/ +#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset) \ + (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) + +/** + Reads an 8-bit PCI configuration register. + + Reads and returns the 8-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciRead8 ( + IN UINTN Address + ); + +/** + Writes an 8-bit PCI configuration register. + + Writes the 8-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciWrite8 ( + IN UINTN Address, + IN UINT8 Data + ); + +/** + Performs a bitwise inclusive OR of an 8-bit PCI configuration register with + an 8-bit value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 8-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciOr8 ( + IN UINTN Address, + IN UINT8 OrData + ); + +/** + Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit + value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 8-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciAnd8 ( + IN UINTN Address, + IN UINT8 AndData + ); + +/** + Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit + value, followed a bitwise inclusive OR with another 8-bit value. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 8-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciAndThenOr8 ( + IN UINTN Address, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in an 8-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciBitFieldRead8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 8-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciBitFieldWrite8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value + ); + +/** + Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 8-bit port. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 8-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciBitFieldOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData + ); + +/** + Reads a bit field in an 8-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 8-bit register. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 8-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciBitFieldAnd8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData + ); + +/** + Reads a bit field in an 8-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 8-bit port. + + Reads the 8-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 8-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If StartBit is greater than 7, then ASSERT(). + If EndBit is greater than 7, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..7. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..7. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT8 +EFIAPI +PciBitFieldAndThenOr8 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData + ); + +/** + Reads a 16-bit PCI configuration register. + + Reads and returns the 16-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciRead16 ( + IN UINTN Address + ); + +/** + Writes a 16-bit PCI configuration register. + + Writes the 16-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciWrite16 ( + IN UINTN Address, + IN UINT16 Data + ); + +/** + Performs a bitwise inclusive OR of a 16-bit PCI configuration register with + a 16-bit value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciOr16 ( + IN UINTN Address, + IN UINT16 OrData + ); + +/** + Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit + value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ); + +/** + Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit + value, followed a bitwise inclusive OR with another 16-bit value. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 16-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in a 16-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciBitFieldRead16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 16-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciBitFieldWrite16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value + ); + +/** + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciBitFieldOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData + ); + +/** + Reads a bit field in a 16-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 16-bit register. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciBitFieldAnd16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData + ); + +/** + Reads a bit field in a 16-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 16-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 16-bit boundary, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..15. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT16 +EFIAPI +PciBitFieldAndThenOr16 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + Reads a 32-bit PCI configuration register. + + Reads and returns the 32-bit PCI configuration register specified by Address. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @return The read value from the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciRead32 ( + IN UINTN Address + ); + +/** + Writes a 32-bit PCI configuration register. + + Writes the 32-bit PCI configuration register specified by Address with the + value specified by Value. Value is returned. This function must guarantee + that all PCI read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param Value The value to write. + + @return The value written to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciWrite32 ( + IN UINTN Address, + IN UINT32 Data + ); + +/** + Performs a bitwise inclusive OR of a 32-bit PCI configuration register with + a 32-bit value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 32-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciOr32 ( + IN UINTN Address, + IN UINT32 OrData + ); + +/** + Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit + value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 32-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ); + +/** + Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit + value, followed a bitwise inclusive OR with another 32-bit value. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, + performs a bitwise inclusive OR between the result of the AND operation and + the value specified by OrData, and writes the result to the 32-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a bit field of a PCI configuration register. + + Reads the bit field in a 32-bit PCI configuration register. The bit field is + specified by the StartBit and the EndBit. The value of the bit field is + returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to read. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + + @return The value of the bit field read from the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciBitFieldRead32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit + ); + +/** + Writes a bit field to a PCI configuration register. + + Writes Value to the bit field of the PCI configuration register. The bit + field is specified by the StartBit and the EndBit. All other bits in the + destination PCI configuration register are preserved. The new value of the + 32-bit register is returned. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param Value New value of the bit field. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciBitFieldWrite32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value + ); + +/** + Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and + writes the result back to the bit field in the 32-bit port. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise inclusive OR between the read result and the value specified by + OrData, and writes the result to the 32-bit PCI configuration register + specified by Address. The value written to the PCI configuration register is + returned. This function must guarantee that all PCI read and write operations + are serialized. Extra left bits in OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param OrData The value to OR with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciBitFieldOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData + ); + +/** + Reads a bit field in a 32-bit PCI configuration register, performs a bitwise + AND, and writes the result back to the bit field in the 32-bit register. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND between the read result and the value specified by AndData, and + writes the result to the 32-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the PCI configuration register. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciBitFieldAnd32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData + ); + +/** + Reads a bit field in a 32-bit port, performs a bitwise AND followed by a + bitwise inclusive OR, and writes the result back to the bit field in the + 32-bit port. + + Reads the 32-bit PCI configuration register specified by Address, performs a + bitwise AND followed by a bitwise inclusive OR between the read result and + the value specified by AndData, and writes the result to the 32-bit PCI + configuration register specified by Address. The value written to the PCI + configuration register is returned. This function must guarantee that all PCI + read and write operations are serialized. Extra left bits in both AndData and + OrData are stripped. + + If Address > 0x0FFFFFFF, then ASSERT(). + If Address is not aligned on a 32-bit boundary, then ASSERT(). + If StartBit is greater than 31, then ASSERT(). + If EndBit is greater than 31, then ASSERT(). + If EndBit is less than StartBit, then ASSERT(). + + @param Address PCI configuration register to write. + @param StartBit The ordinal of the least significant bit in the bit field. + Range 0..31. + @param EndBit The ordinal of the most significant bit in the bit field. + Range 0..31. + @param AndData The value to AND with the PCI configuration register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the PCI configuration register. + +**/ +UINT32 +EFIAPI +PciBitFieldAndThenOr32 ( + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + Reads a range of PCI configuration registers into a caller supplied buffer. + + Reads the range of PCI configuration registers specified by StartAddress and + Size into the buffer specified by Buffer. This function only allows the PCI + configuration registers from a single PCI function to be read. Size is + returned. When possible 32-bit PCI configuration read cycles are used to read + from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit + and 16-bit PCI configuration read cycles may be used at the beginning and the + end of the range. + + If StartAddress > 0x0FFFFFFF, then ASSERT(). + If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). + If Size > 0 and Buffer is NULL, then ASSERT(). + + @param StartAddress Starting address that encodes the PCI Bus, Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer receiving the data read. + + @return Size + +**/ +UINTN +EFIAPI +PciReadBuffer ( + IN UINTN StartAddress, + IN UINTN Size, + OUT VOID *Buffer + ); + +/** + Copies the data in a caller supplied buffer to a specified range of PCI + configuration space. + + Writes the range of PCI configuration registers specified by StartAddress and + Size from the buffer specified by Buffer. This function only allows the PCI + configuration registers from a single PCI function to be written. Size is + returned. When possible 32-bit PCI configuration write cycles are used to + write from StartAdress to StartAddress + Size. Due to alignment restrictions, + 8-bit and 16-bit PCI configuration write cycles may be used at the beginning + and the end of the range. + + If StartAddress > 0x0FFFFFFF, then ASSERT(). + If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). + If Size > 0 and Buffer is NULL, then ASSERT(). + + @param StartAddress Starting address that encodes the PCI Bus, Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer containing the data to write. + + @return Size + +**/ +UINTN +EFIAPI +PciWriteBuffer ( + IN UINTN StartAddress, + IN UINTN Size, + IN VOID *Buffer + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeCoffGetEntryPointLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeCoffGetEntryPointLib.h new file mode 100644 index 0000000..a82ea3c --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeCoffGetEntryPointLib.h @@ -0,0 +1,93 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePeCoffGetEntryPointLib.h + +Abstract: + + Public header file for PeCoff Get Entry Point Lib + +--*/ + +#ifndef __EDKII_GLUE_PE_COFF_GET_ENTRY_POINT_LIB_H__ +#define __EDKII_GLUE_PE_COFF_GET_ENTRY_POINT_LIB_H__ + +/** + Retrieves and returns a pointer to the entry point to a PE/COFF image that has been loaded + into system memory with the PE/COFF Loader Library functions. + + Retrieves the entry point to the PE/COFF image specified by Pe32Data and returns this entry + point in EntryPoint. If the entry point could not be retrieved from the PE/COFF image, then + return RETURN_INVALID_PARAMETER. Otherwise return RETURN_SUCCESS. + If Pe32Data is NULL, then ASSERT(). + If EntryPoint is NULL, then ASSERT(). + + @param Pe32Data Pointer to the PE/COFF image that is loaded in system memory. + @param EntryPoint Pointer to entry point to the PE/COFF image to return. + + @retval RETURN_SUCCESS EntryPoint was returned. + @retval RETURN_INVALID_PARAMETER The entry point could not be found in the PE/COFF image. + +**/ +RETURN_STATUS +EFIAPI +PeCoffLoaderGetEntryPoint ( + IN VOID *Pe32Data, + OUT VOID **EntryPoint + ); + +/** + Returns the machine type of a PE/COFF image. + + Returns the machine type from the PE/COFF image specified by Pe32Data. + If Pe32Data is NULL, then ASSERT(). + + @param Pe32Data Pointer to the PE/COFF image that is loaded in system + memory. + + @return Machine type or zero if not a valid iamge. + +**/ +UINT16 +EFIAPI +PeCoffLoaderGetMachineType ( + IN VOID *Pe32Data + ); + +/** + Returns a pointer to the PDB file name for a PE/COFF image that has been + loaded into system memory with the PE/COFF Loader Library functions. + + Returns the PDB file name for the PE/COFF image specified by Pe32Data. If + the PE/COFF image specified by Pe32Data is not a valid, then NULL is + returned. If the PE/COFF image specified by Pe32Data does not contain a + debug directory entry, then NULL is returned. If the debug directory entry + in the PE/COFF image specified by Pe32Data does not contain a PDB file name, + then NULL is returned. + If Pe32Data is NULL, then ASSERT(). + + @param Pe32Data Pointer to the PE/COFF image that is loaded in system + memory. + + @return The PDB file name for the PE/COFF image specified by Pe32Data or NULL + if it cannot be retrieved. + +**/ +VOID * +EFIAPI +PeCoffLoaderGetPdbPointer ( + IN VOID *Pe32Data + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeCoffLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeCoffLib.h new file mode 100644 index 0000000..4c1f59f --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeCoffLib.h @@ -0,0 +1,227 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePeCoffLib.h + +Abstract: + + Public header file for PeCoff Lib + +--*/ + +#ifndef __EDKII_GLUE_BASE_PE_COFF_LIB_H__ +#define __EDKII_GLUE_BASE_PE_COFF_LIB_H__ + + +#define PeCoffLoaderGetImageInfo(_IMAGECONTEXT) GluePeCoffLoaderGetImageInfo(_IMAGECONTEXT) +#define PeCoffLoaderRelocateImage(_IMAGECONTEXT) GluePeCoffLoaderRelocateImage(_IMAGECONTEXT) +#define PeCoffLoaderLoadImage(_IMAGECONTEXT) GluePeCoffLoaderLoadImage(_IMAGECONTEXT) +#define PeCoffLoaderGetPeHeader(_IMAGECONTEXT, _HDR) GluePeCoffLoaderGetPeHeader(_IMAGECONTEXT, _HDR) +#define PeCoffLoaderImageAddress(_IMAGECONTEXT, _ADR) GluePeCoffLoaderImageAddress(_IMAGECONTEXT, _ADR) +#define PeCoffLoaderRelocateImage(_IMAGECONTEXT) GluePeCoffLoaderRelocateImage(_IMAGECONTEXT) +#define PeCoffLoaderRelocateImageEx(_RELOC, _FIXUP, _FIXUPDATA, _ADJUST) \ + GluePeCoffLoaderRelocateImageEx(_RELOC, _FIXUP, _FIXUPDATA, _ADJUST) +#define PeHotRelocateImageEx(_RELOC, _FIXUP, _FIXUPDATA, _ADJUST) \ + GluePeHotRelocateImageEx(_RELOC, _FIXUP, _FIXUPDATA, _ADJUST) + + +// +// Return status codes from the PE/COFF Loader services +// BUGBUG: Find where used and see if can be replaced by RETURN_STATUS codes +// +#define IMAGE_ERROR_SUCCESS 0 +#define IMAGE_ERROR_IMAGE_READ 1 +#define IMAGE_ERROR_INVALID_PE_HEADER_SIGNATURE 2 +#define IMAGE_ERROR_INVALID_MACHINE_TYPE 3 +#define IMAGE_ERROR_INVALID_SUBSYSTEM 4 +#define IMAGE_ERROR_INVALID_IMAGE_ADDRESS 5 +#define IMAGE_ERROR_INVALID_IMAGE_SIZE 6 +#define IMAGE_ERROR_INVALID_SECTION_ALIGNMENT 7 +#define IMAGE_ERROR_SECTION_NOT_LOADED 8 +#define IMAGE_ERROR_FAILED_RELOCATION 9 +#define IMAGE_ERROR_FAILED_ICACHE_FLUSH 10 + +// +// PE/COFF Loader Read Function passed in by caller +// +typedef +RETURN_STATUS +(EFIAPI *PE_COFF_LOADER_READ_FILE) ( + IN VOID *FileHandle, + IN UINTN FileOffset, + IN OUT UINTN *ReadSize, + OUT VOID *Buffer + ); + +// +// Context structure used while PE/COFF image is being loaded and relocated +// +typedef struct { + PHYSICAL_ADDRESS ImageAddress; + UINT64 ImageSize; + PHYSICAL_ADDRESS DestinationAddress; + PHYSICAL_ADDRESS EntryPoint; + PE_COFF_LOADER_READ_FILE ImageRead; + VOID *Handle; + VOID *FixupData; + UINT32 SectionAlignment; + UINT32 PeCoffHeaderOffset; + UINT32 DebugDirectoryEntryRva; + VOID *CodeView; + CHAR8 *PdbPointer; + UINTN SizeOfHeaders; + UINT32 ImageCodeMemoryType; + UINT32 ImageDataMemoryType; + UINT32 ImageError; + UINTN FixupDataSize; + UINT16 Machine; + UINT16 ImageType; + BOOLEAN RelocationsStripped; + BOOLEAN IsTeImage; +} PE_COFF_LOADER_IMAGE_CONTEXT; + + +/** + Retrieves information about a PE/COFF image. + + Computes the PeCoffHeaderOffset, ImageAddress, ImageSize, DestinationAddress, CodeView, + PdbPointer, RelocationsStripped, SectionAlignment, SizeOfHeaders, and DebugDirectoryEntryRva + fields of the ImageContext structure. If ImageContext is NULL, then return RETURN_INVALID_PARAMETER. + If the PE/COFF image accessed through the ImageRead service in the ImageContext structure is not + a supported PE/COFF image type, then return RETURN_UNSUPPORTED. If any errors occur while + computing the fields of ImageContext, then the error status is returned in the ImageError field of + ImageContext. + + @param ImageContext Pointer to the image context structure that describes the PE/COFF + image that needs to be examined by this function. + + @retval RETURN_SUCCESS The information on the PE/COFF image was collected. + @retval RETURN_INVALID_PARAMETER ImageContext is NULL. + @retval RETURN_UNSUPPORTED The PE/COFF image is not supported. + +**/ +RETURN_STATUS +EFIAPI +GluePeCoffLoaderGetImageInfo ( + IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext + ) +; + +/** + Applies relocation fixups to a PE/COFF image that was loaded with PeCoffLoaderLoadImage(). + + If the DestinationAddress field of ImageContext is 0, then use the ImageAddress field of + ImageContext as the relocation base address. Otherwise, use the DestinationAddress field + of ImageContext as the relocation base address. The caller must allocate the relocation + fixup log buffer and fill in the FixupData field of ImageContext prior to calling this function. + If ImageContext is NULL, then ASSERT(). + + @param ImageContext Pointer to the image context structure that describes the PE/COFF + image that is being relocated. + + @retval RETURN_SUCCESS The PE/COFF image was relocated. + Extended status information is in the ImageError field of ImageContext. + @retval RETURN_LOAD_ERROR The image in not a valid PE/COFF image. + Extended status information is in the ImageError field of ImageContext. + @retval RETURN_UNSUPPORTED A relocation record type is not supported. + Extended status information is in the ImageError field of ImageContext. + +**/ +RETURN_STATUS +EFIAPI +GluePeCoffLoaderRelocateImage ( + IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext + ) +; + +/** + Loads a PE/COFF image into memory. + + Loads the PE/COFF image accessed through the ImageRead service of ImageContext into the buffer + specified by the ImageAddress and ImageSize fields of ImageContext. The caller must allocate + the load buffer and fill in the ImageAddress and ImageSize fields prior to calling this function. + The EntryPoint, FixupDataSize, CodeView, and PdbPointer fields of ImageContext are computed. + If ImageContext is NULL, then ASSERT(). + + @param ImageContext Pointer to the image context structure that describes the PE/COFF + image that is being loaded. + + @retval RETURN_SUCCESS The PE/COFF image was loaded into the buffer specified by + the ImageAddress and ImageSize fields of ImageContext. + Extended status information is in the ImageError field of ImageContext. + @retval RETURN_BUFFER_TOO_SMALL The caller did not provide a large enough buffer. + Extended status information is in the ImageError field of ImageContext. + @retval RETURN_LOAD_ERROR The PE/COFF image is an EFI Runtime image with no relocations. + Extended status information is in the ImageError field of ImageContext. + @retval RETURN_INVALID_PARAMETER The image address is invalid. + Extended status information is in the ImageError field of ImageContext. + +**/ +RETURN_STATUS +EFIAPI +GluePeCoffLoaderLoadImage ( + IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext + ) +; + + +/** + ImageRead function that operates on a memory buffer whos base is passed into + FileHandle. + + @param FileHandle Ponter to baes of the input stream + @param FileOffset Offset to the start of the buffer + @param ReadSize Number of bytes to copy into the buffer + @param Buffer Location to place results of read + + @retval RETURN_SUCCESS Data is read from FileOffset from the Handle into + the buffer. +**/ +RETURN_STATUS +EFIAPI +PeCoffLoaderImageReadFromMemory ( + IN VOID *FileHandle, + IN UINTN FileOffset, + IN OUT UINTN *ReadSize, + OUT VOID *Buffer + ) +; + + +/** + Reapply fixups on a fixed up PE32/PE32+ image to allow virutal calling at EFI + runtime. + + PE_COFF_LOADER_IMAGE_CONTEXT.FixupData stores information needed to reapply + the fixups with a virtual mapping. + + + @param ImageBase Base address of relocated image + @param VirtImageBase Virtual mapping for ImageBase + @param ImageSize Size of the image to relocate + @param RelocationData Location to place results of read + +**/ +VOID +EFIAPI +PeCoffLoaderRelocateImageForRuntime ( + IN PHYSICAL_ADDRESS ImageBase, + IN PHYSICAL_ADDRESS VirtImageBase, + IN UINTN ImageSize, + IN VOID *RelocationData + ) +; + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeiServicesLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeiServicesLib.h new file mode 100644 index 0000000..32e6574 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeiServicesLib.h @@ -0,0 +1,361 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePeiServicesLib.h + +Abstract: + + Public header file for PEI Services Lib + +--*/ + +#ifndef __EDKII_GLUE_PEI_SERVICES_LIB_H__ +#define __EDKII_GLUE_PEI_SERVICES_LIB_H__ + +/** + This service enables a given PEIM to register an interface into the PEI Foundation. + + @param PpiList A pointer to the list of interfaces that the caller shall install. + + @retval EFI_SUCCESS The interface was successfully installed. + @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL. + @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have the + EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field. + @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database. + +**/ +EFI_STATUS +EFIAPI +PeiServicesInstallPpi ( + IN EFI_PEI_PPI_DESCRIPTOR *PpiList + ); + +/** + This service enables PEIMs to replace an entry in the PPI database with an alternate entry. + + @param OldPpi Pointer to the old PEI PPI Descriptors. + @param NewPpi Pointer to the new PEI PPI Descriptors. + + @retval EFI_SUCCESS The interface was successfully installed. + @retval EFI_INVALID_PARAMETER The OldPpi or NewPpi is NULL. + @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have the + EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field. + @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database. + @retval EFI_NOT_FOUND The PPI for which the reinstallation was requested has not been + installed. + +**/ +EFI_STATUS +EFIAPI +PeiServicesReInstallPpi ( + IN EFI_PEI_PPI_DESCRIPTOR *OldPpi, + IN EFI_PEI_PPI_DESCRIPTOR *NewPpi + ); + +/** + This service enables PEIMs to discover a given instance of an interface. + + @param Guid A pointer to the GUID whose corresponding interface needs to be + found. + @param Instance The N-th instance of the interface that is required. + @param PpiDescriptor A pointer to instance of the EFI_PEI_PPI_DESCRIPTOR. + @param Ppi A pointer to the instance of the interface. + + @retval EFI_SUCCESS The interface was successfully returned. + @retval EFI_NOT_FOUND The PPI descriptor is not found in the database. + +**/ +EFI_STATUS +EFIAPI +PeiServicesLocatePpi ( + IN EFI_GUID *Guid, + IN UINTN Instance, + IN OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor, + IN OUT VOID **Ppi + ); + +/** + This service enables PEIMs to register a given service to be invoked when another service is + installed or reinstalled. + + @param NotifyList A pointer to the list of notification interfaces that the caller + shall install. + + @retval EFI_SUCCESS The interface was successfully installed. + @retval EFI_INVALID_PARAMETER The NotifyList pointer is NULL. + @retval EFI_INVALID_PARAMETER Any of the PEI notify descriptors in the list do not have the + EFI_PEI_PPI_DESCRIPTOR_NOTIFY_TYPES bit set in the Flags field. + @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database. + +**/ +EFI_STATUS +EFIAPI +PeiServicesNotifyPpi ( + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList + ); + +/** + This service enables PEIMs to ascertain the present value of the boot mode. + + @param BootMode A pointer to contain the value of the boot mode. + + @retval EFI_SUCCESS The boot mode was returned successfully. + @retval EFI_INVALID_PARAMETER BootMode is NULL. + +**/ +EFI_STATUS +EFIAPI +PeiServicesGetBootMode ( + IN OUT EFI_BOOT_MODE *BootMode + ); + +/** + This service enables PEIMs to update the boot mode variable. + + @param BootMode The value of the boot mode to set. + + @retval EFI_SUCCESS The value was successfully updated + +**/ +EFI_STATUS +EFIAPI +PeiServicesSetBootMode ( + IN EFI_BOOT_MODE BootMode + ); + +/** + This service enables a PEIM to ascertain the address of the list of HOBs in memory. + + @param HobList A pointer to the list of HOBs that the PEI Foundation will initialize. + + @retval EFI_SUCCESS The list was successfully returned. + @retval EFI_NOT_AVAILABLE_YET The HOB list is not yet published. + +**/ +EFI_STATUS +EFIAPI +PeiServicesGetHobList ( + IN OUT VOID **HobList + ); + +/** + This service enables PEIMs to create various types of HOBs. + + @param Type The type of HOB to be installed. + @param Length The length of the HOB to be added. + @param Hob The address of a pointer that will contain the HOB header. + + @retval EFI_SUCCESS The HOB was successfully created. + @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation. + +**/ +EFI_STATUS +EFIAPI +PeiServicesCreateHob ( + IN UINT16 Type, + IN UINT16 Length, + IN OUT VOID **Hob + ); + +//;;## ...AMI_OVERRIDE... Support PI1.x +#if (PI_SPECIFICATION_VERSION < 0x00010000) +/** + This service enables PEIMs to discover additional firmware volumes. + + @param Instance This instance of the firmware volume to find. The value 0 is the + Boot Firmware Volume (BFV). + @param FwVolHeader Pointer to the firmware volume header of the volume to return. + + @retval EFI_SUCCESS The volume was found. + @retval EFI_NOT_FOUND The volume was not found. + @retval EFI_INVALID_PARAMETER FwVolHeader is NULL. + +**/ +EFI_STATUS +EFIAPI +PeiServicesFfsFindNextVolume ( + IN UINTN Instance, + IN OUT EFI_FIRMWARE_VOLUME_HEADER **FwVolHeader + ); + +/** + This service enables PEIMs to discover additional firmware files. + + @param SearchType A filter to find files only of this type. + @param FwVolHeader Pointer to the firmware volume header of the volume to search. + This parameter must point to a valid FFS volume. + @param FileHeader Pointer to the current file from which to begin searching. + + @retval EFI_SUCCESS The file was found. + @retval EFI_NOT_FOUND The file was not found. + @retval EFI_NOT_FOUND The header checksum was not zero. + +**/ +EFI_STATUS +EFIAPI +PeiServicesFfsFindNextFile ( + IN EFI_FV_FILETYPE SearchType, + IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader, + IN OUT EFI_FFS_FILE_HEADER **FileHeader + ); + +/** + This service enables PEIMs to discover sections of a given type within a valid FFS file. + + @param SearchType The value of the section type to find. + @param FfsFileHeader A pointer to the file header that contains the set of sections to + be searched. + @param SectionData A pointer to the discovered section, if successful. + + @retval EFI_SUCCESS The section was found. + @retval EFI_NOT_FOUND The section was not found. + +**/ +EFI_STATUS +EFIAPI +PeiServicesFfsFindSectionData ( + IN EFI_SECTION_TYPE SectionType, + IN EFI_FFS_FILE_HEADER *FfsFileHeader, + IN OUT VOID **SectionData + ); +#endif + +/** + This service enables PEIMs to register the permanent memory configuration + that has been initialized with the PEI Foundation. + + @param MemoryBegin The value of a region of installed memory. + @param MemoryLength The corresponding length of a region of installed memory. + + @retval EFI_SUCCESS The region was successfully installed in a HOB. + @retval EFI_INVALID_PARAMETER MemoryBegin and MemoryLength are illegal for this system. + @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation. + +**/ +EFI_STATUS +EFIAPI +PeiServicesInstallPeiMemory ( + IN EFI_PHYSICAL_ADDRESS MemoryBegin, + IN UINT64 MemoryLength + ); + +/** + This service enables PEIMs to allocate memory after the permanent memory has been installed by a + PEIM. + + @param MemoryType Type of memory to allocate. + @param Pages Number of pages to allocate. + @param Memory Pointer of memory allocated. + + @retval EFI_SUCCESS The memory range was successfully allocated. + @retval EFI_INVALID_PARAMETER Type is not equal to AllocateAnyPages. + @retval EFI_NOT_AVAILABLE_YET Called with permanent memory not available. + @retval EFI_OUT_OF_RESOURCES The pages could not be allocated. + +**/ +EFI_STATUS +EFIAPI +PeiServicesAllocatePages ( + IN EFI_MEMORY_TYPE MemoryType, + IN UINTN Pages, + IN OUT EFI_PHYSICAL_ADDRESS *Memory + ); + +/** + This service allocates memory from the Hand-Off Block (HOB) heap. + + @param Size The number of bytes to allocate from the pool. + @param Buffer If the call succeeds, a pointer to a pointer to the allocate + buffer; undefined otherwise. + + @retval EFI_SUCCESS The allocation was successful + @retval EFI_OUT_OF_RESOURCES There is not enough heap to allocate the requested size. + +**/ +EFI_STATUS +EFIAPI +PeiServicesAllocatePool ( + IN UINTN Size, + OUT VOID **Buffer + ); + +/** + This service resets the entire platform, including all processors and devices, and reboots the + system. + + @retval EFI_NOT_AVAILABLE_YET The service has not been installed yet. + +**/ +EFI_STATUS +EFIAPI +PeiServicesResetSystem ( + VOID + ); + +/** + PCI read-modify-write operations. + + PIWG's PI specification replaces Inte's EFI Specification 1.10. + EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by + EFI_PEI_PCI_CFG2_PPI in PI 1.0. "Modify" function in these two PPI are not + compatibile with each other. + + For Framework code that make the following call: + PciCfg->Modify ( + PeiServices, + PciCfg, + Width, + Address, + SetBits, + ClearBits + ); + it will be updated to the following code which call this library API: + PeiLibPciCfgModify ( + PeiServices, + PciCfg, + Width, + Address, + SetBits, + ClearBits + ); + + @param PeiServices An indirect pointer to the PEI Services Table + published by the PEI Foundation. + @param PciCfg A pointer to the this pointer of EFI_PEI_PCI_CFG_PPI. + This parameter is unused as a place holder to make + the parameter list identical to PEI_PCI_CFG_PPI_RW. + @param Width The width of the access. Enumerated in bytes. Type + EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read(). + @param Address The physical address of the access. + @param SetBits Points to value to bitwise-OR with the read configuration value. + The size of the value is determined by Width. + @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value. + The size of the value is determined by Width. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_DEVICE_ERROR There was a problem with the transaction. +**/ +EFI_STATUS +EFIAPI +PeiLibPciCfgModify ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_PCI_CFG_PPI *PciCfg, + IN PEI_PCI_CFG_PPI_WIDTH Width, + IN UINT64 Address, + IN UINTN SetBits, + IN UINTN ClearBits + ) +; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeiServicesTablePointerLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeiServicesTablePointerLib.h new file mode 100644 index 0000000..7214558 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeiServicesTablePointerLib.h @@ -0,0 +1,41 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePeiServicesTablePointerLib.h + +Abstract: + + Public header file for PEI Services Table Pointer Lib + +--*/ + +#ifndef __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_H__ +#define __EDKII_GLUE_PEI_SERVICES_TABLE_POINTER_LIB_H__ + +/** + The function returns the pointer to PEI services. + + The function returns the pointer to PEI services. + It will ASSERT() if the pointer to PEI services is NULL. + + @retval The pointer to PeiServices. + +**/ +EFI_PEI_SERVICES ** +GetPeiServicesTablePointer ( + VOID + ); + +#endif + diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeimEntryPoint.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeimEntryPoint.h new file mode 100644 index 0000000..6febd76 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePeimEntryPoint.h @@ -0,0 +1,111 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePeimEntryPoint.h + +Abstract: + + Public header file for PEIM Entry Point Lib + +--*/ + +#ifndef __EDKII_GLUE_PEIM_ENTRY_POINT_H__ +#define __EDKII_GLUE_PEIM_ENTRY_POINT_H__ + +// +// Declare the EFI/UEFI Specification Revision to which this driver is implemented +// +extern const UINT32 _gPeimRevision; + +/** + Image entry point of Peim. + + @param FfsHeader Pointer to FFS header the loaded driver. + @param PeiServices Pointer to the PEI services. + + @return Status returned by entry points of Peims. + +**/ +EFI_STATUS +EFIAPI +_ModuleEntryPoint ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + + +/** + Wrapper of Peim image entry point. + + @param FfsHeader Pointer to FFS header the loaded driver. + @param PeiServices Pointer to the PEI services. + + @return Status returned by entry points of Peims. + +**/ +EFI_STATUS +EFIAPI +EfiMain ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + + +/** + Call constructs for all libraries. Automatics Generated by tool. + + @param FfsHeader Pointer to FFS header the loaded driver. + @param PeiServices Pointer to the PEI services. + +**/ +VOID +EFIAPI +ProcessLibraryConstructorList ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + + +/** + Call destructors for all libraries. Automatics Generated by tool. + + @param FfsHeader Pointer to FFS header the loaded driver. + @param PeiServices Pointer to the PEI services. + +**/ +VOID +EFIAPI +ProcessLibraryDestructorList ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + + +/** + Call the list of driver entry points. Automatics Generated by tool. + + @param FfsHeader Pointer to FFS header the loaded driver. + @param PeiServices Pointer to the PEI services. + + @return Status returned by entry points of drivers. + +**/ +EFI_STATUS +EFIAPI +ProcessModuleEntryPointList ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePostCodeLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePostCodeLib.h new file mode 100644 index 0000000..2f561db --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePostCodeLib.h @@ -0,0 +1,165 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePostCodeLib.h + +Abstract: + + Public header file for Post Code Lib + +--*/ + +#ifndef __EDKII_GLUE_POST_CODE_LIB_H__ +#define __EDKII_GLUE_POST_CODE_LIB_H__ + + +#define PostCode(_VALUE) GluePostCode(_VALUE) +#define PostCodeWithDescription(_VALUE, _DESC) GluePostCodeWithDescription(_VALUE, _DESC) +#define PostCodeEnabled() GluePostCodeEnabled() +#define PostCodeDescriptionEnabled() GluePostCodeDescriptionEnabled() + + +#define POST_CODE_PROPERTY_POST_CODE_ENABLED 0x00000008 +#define POST_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED 0x00000010 + +/** + Sends an 32-bit value to a POST card. + + Sends the 32-bit value specified by Value to a POST card, and returns Value. + Some implementations of this library function may perform I/O operations + directly to a POST card device. Other implementations may send Value to + ReportStatusCode(), and the status code reporting mechanism will eventually + display the 32-bit value on the status reporting device. + + PostCode() must actively prevent recursion. If PostCode() is called while + processing another any other Report Status Code Library function, then + PostCode() must return Value immediately. + + @param Value The 32-bit value to write to the POST card. + + @return Value + +**/ +UINT32 +EFIAPI +GluePostCode ( + IN UINT32 Value + ); + + +/** + Sends an 32-bit value to a POST and associated ASCII string. + + Sends the 32-bit value specified by Value to a POST card, and returns Value. + If Description is not NULL, then the ASCII string specified by Description is + also passed to the handler that displays the POST card value. Some + implementations of this library function may perform I/O operations directly + to a POST card device. Other implementations may send Value to ReportStatusCode(), + and the status code reporting mechanism will eventually display the 32-bit + value on the status reporting device. + + PostCodeWithDescription()must actively prevent recursion. If + PostCodeWithDescription() is called while processing another any other Report + Status Code Library function, then PostCodeWithDescription() must return Value + immediately. + + @param Value The 32-bit value to write to the POST card. + @param Description Pointer to an ASCII string that is a description of the + POST code value. This is an optional parameter that may + be NULL. + + @return Value + +**/ +UINT32 +EFIAPI +GluePostCodeWithDescription ( + IN UINT32 Value, + IN CONST CHAR8 *Description OPTIONAL + ); + + +/** + Returns TRUE if POST Codes are enabled. + + This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED + bit of PcdPostCodePropertyMask is set. Otherwise FALSE is returned. + + @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of + PcdPostCodeProperyMask is set. + @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of + PcdPostCodeProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +GluePostCodeEnabled ( + VOID + ); + + +/** + Returns TRUE if POST code descriptions are enabled. + + This function returns TRUE if the + POST_CODE_PROPERTY_POST_CODE_ENABLED bit of + PcdPostCodePropertyMask is set. Otherwise FALSE is returned. + + @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED + bit of PcdPostCodeProperyMask is set. + @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED + bit of PcdPostCodeProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +GluePostCodeDescriptionEnabled ( + VOID + ); + + +/** + Sends an 32-bit value to a POST card. + + If POST codes are enabled in PcdPostCodeProperyMask, then call PostCode() + passing in Value. Value is returned. + + @param Value The 32-bit value to write to the POST card. + + @return Value + +**/ +#define POST_CODE(Value) PostCodeEnabled() ? PostCode(Value) : Value + +/** + Sends an 32-bit value to a POST and associated ASCII string. + + If POST codes and POST code descriptions are enabled in + PcdPostCodeProperyMask, then call PostCodeWithDescription() passing in + Value and Description. If only POST codes are enabled, then call PostCode() + passing in Value. Value is returned. + + @param Value The 32-bit value to write to the POST card. + @param Description Pointer to an ASCII string that is a description of the + POST code value. + +**/ +#define POST_CODE_WITH_DESCRIPTION(Value,Description) \ + PostCodeEnabled() ? \ + (PostCodeDescriptionEnabled() ? \ + PostCodeWithDescription(Value,Description) : \ + PostCode(Value)) : \ + Value + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePrintLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePrintLib.h new file mode 100644 index 0000000..314f578 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGluePrintLib.h @@ -0,0 +1,481 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePrintLib.h + +Abstract: + + Public header file Print Lib + +--*/ + +#ifndef __EDKII_GLUE_PRINT_LIB_H__ +#define __EDKII_GLUE_PRINT_LIB_H__ + +/// +/// Define the maximum number of characters that are required to +/// encode a decimal, hexidecimal, GUID, or TIME value with a NULL +/// terminator. +/// +/// Maximum Length Decimal String = 28 +/// "-9,223,372,036,854,775,808" +/// Maximum Length Hexidecimal String = 17 +/// "FFFFFFFFFFFFFFFF" +/// Maximum Length GUID = 37 +/// "00000000-0000-0000-0000-000000000000" +/// Maximum Length TIME = 18 +/// "12/12/2006 12:12" +/// +#define MAXIMUM_VALUE_CHARACTERS 38 + +/// +/// Flags bitmask values use in UnicodeValueToString() and +/// AsciiValueToString() +/// +#define LEFT_JUSTIFY 0x01 +#define COMMA_TYPE 0x08 +#define PREFIX_ZERO 0x20 +#define RADIX_HEX 0x80 + +/** + Produces a Null-terminated Unicode string in an output buffer based on + a Null-terminated Unicode format string and a VA_LIST argument list + + Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer + and BufferSize. + The Unicode string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list specified by Marker based on the + contents of the format string. + The number of Unicode characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned. + + If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT(). + If BufferSize > 1 and FormatString is NULL, then ASSERT(). + If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string + contains more than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + Unicode string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + @param Marker VA_LIST marker for the variable argument list. + + @return The number of Unicode characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +UnicodeVSPrint ( + OUT CHAR16 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR16 *FormatString, + IN VA_LIST Marker + ); + +/** + Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated + Unicode format string and variable argument list. + + Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer + and BufferSize. + The Unicode string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list based on the contents of the format string. + The number of Unicode characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned. + + If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT(). + If BufferSize > 1 and FormatString is NULL, then ASSERT(). + If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string + contains more than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + Unicode string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + + @return The number of Unicode characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +UnicodeSPrint ( + OUT CHAR16 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR16 *FormatString, + ... + ); + +/** + Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated + ASCII format string and a VA_LIST argument list + + Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer + and BufferSize. + The Unicode string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list specified by Marker based on the + contents of the format string. + The number of Unicode characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned. + + If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT(). + If BufferSize > 1 and FormatString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string + contains more than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + Unicode string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + @param Marker VA_LIST marker for the variable argument list. + + @return The number of Unicode characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +UnicodeVSPrintAsciiFormat ( + OUT CHAR16 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR8 *FormatString, + IN VA_LIST Marker + ); + +/** + Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated + ASCII format string and variable argument list. + + Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer + and BufferSize. + The Unicode string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list based on the contents of the + format string. + The number of Unicode characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned. + + If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT(). + If BufferSize > 1 and FormatString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string + contains more than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + Unicode string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + + @return The number of Unicode characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +UnicodeSPrintAsciiFormat ( + OUT CHAR16 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR8 *FormatString, + ... + ); + +/** + Converts a decimal value to a Null-terminated Unicode string. + + Converts the decimal number specified by Value to a Null-terminated Unicode + string specified by Buffer containing at most Width characters. No padding of spaces + is ever performed. If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed. + The number of Unicode characters in Buffer is returned not including the Null-terminator. + If the conversion contains more than Width characters, then only the first + Width characters are returned, and the total number of characters + required to perform the conversion is returned. + Additional conversion parameters are specified in Flags. + + The Flags bit LEFT_JUSTIFY is always ignored. + All conversions are left justified in Buffer. + If Width is 0, PREFIX_ZERO is ignored in Flags. + If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas + are inserted every 3rd digit starting from the right. + If HEX_RADIX is set in Flags, then the output buffer will be + formatted in hexadecimal format. + If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'. + If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored, + then Buffer is padded with '0' characters so the combination of the optional '-' + sign character, '0' characters, digit characters for Value, and the Null-terminator + add up to Width characters. + If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT(). + If Buffer is NULL, then ASSERT(). + If Buffer is not aligned on a 16-bit boundary, then ASSERT(). + If unsupported bits are set in Flags, then ASSERT(). + If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT(). + If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT() + + @param Buffer Pointer to the output buffer for the produced Null-terminated + Unicode string. + @param Flags The bitmask of flags that specify left justification, zero pad, and commas. + @param Value The 64-bit signed value to convert to a string. + @param Width The maximum number of Unicode characters to place in Buffer, not including + the Null-terminator. + + @return The number of Unicode characters in Buffer not including the Null-terminator. + +**/ +UINTN +EFIAPI +UnicodeValueToString ( + IN OUT CHAR16 *Buffer, + IN UINTN Flags, + IN INT64 Value, + IN UINTN Width + ); + +/** + Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated + ASCII format string and a VA_LIST argument list. + + Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer + and BufferSize. + The ASCII string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list specified by Marker based on + the contents of the format string. + The number of ASCII characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0, then no output buffer is produced and 0 is returned. + + If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 0 and FormatString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string + contains more than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + ASCII string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + @param Marker VA_LIST marker for the variable argument list. + + @return The number of ASCII characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +AsciiVSPrint ( + OUT CHAR8 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR8 *FormatString, + IN VA_LIST Marker + ); + +/** + Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated + ASCII format string and variable argument list. + + Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer + and BufferSize. + The ASCII string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list based on the contents of the + format string. + The number of ASCII characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0, then no output buffer is produced and 0 is returned. + + If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 0 and FormatString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string + contains more than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + ASCII string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + + @return The number of ASCII characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +AsciiSPrint ( + OUT CHAR8 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR8 *FormatString, + ... + ); + +/** + Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated + ASCII format string and a VA_LIST argument list. + + Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer + and BufferSize. + The ASCII string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list specified by Marker based on + the contents of the format string. + The number of ASCII characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0, then no output buffer is produced and 0 is returned. + + If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 0 and FormatString is NULL, then ASSERT(). + If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string + contains more than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + ASCII string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + @param Marker VA_LIST marker for the variable argument list. + + @return The number of ASCII characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +AsciiVSPrintUnicodeFormat ( + OUT CHAR8 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR16 *FormatString, + IN VA_LIST Marker + ); + +/** + Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated + ASCII format string and variable argument list. + + Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer + and BufferSize. + The ASCII string is produced by parsing the format string specified by FormatString. + Arguments are pulled from the variable argument list based on the contents of the + format string. + The number of ASCII characters in the produced output buffer is returned not including + the Null-terminator. + If BufferSize is 0, then no output buffer is produced and 0 is returned. + + If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT(). + If BufferSize > 0 and FormatString is NULL, then ASSERT(). + If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then + ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string + contains more than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated + ASCII string. + @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer. + @param FormatString Null-terminated Unicode format string. + + @return The number of ASCII characters in the produced output buffer not including the + Null-terminator. + +**/ +UINTN +EFIAPI +AsciiSPrintUnicodeFormat ( + OUT CHAR8 *StartOfBuffer, + IN UINTN BufferSize, + IN CONST CHAR16 *FormatString, + ... + ); + +/** + Converts a decimal value to a Null-terminated ASCII string. + + Converts the decimal number specified by Value to a Null-terminated ASCII string + specified by Buffer containing at most Width characters. No padding of spaces + is ever performed. + If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed. + The number of ASCII characters in Buffer is returned not including the Null-terminator. + If the conversion contains more than Width characters, then only the first Width + characters are returned, and the total number of characters required to perform + the conversion is returned. + Additional conversion parameters are specified in Flags. + The Flags bit LEFT_JUSTIFY is always ignored. + All conversions are left justified in Buffer. + If Width is 0, PREFIX_ZERO is ignored in Flags. + If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas + are inserted every 3rd digit starting from the right. + If HEX_RADIX is set in Flags, then the output buffer will be + formatted in hexadecimal format. + If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'. + If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored, + then Buffer is padded with '0' characters so the combination of the optional '-' + sign character, '0' characters, digit characters for Value, and the Null-terminator + add up to Width characters. + + If Buffer is NULL, then ASSERT(). + If unsupported bits are set in Flags, then ASSERT(). + If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT(). + If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT() + + @param Buffer Pointer to the output buffer for the produced Null-terminated + ASCII string. + @param Flags The bitmask of flags that specify left justification, zero pad, and commas. + @param Value The 64-bit signed value to convert to a string. + @param Width The maximum number of ASCII characters to place in Buffer, not including + the Null-terminator. + + @return The number of ASCII characters in Buffer not including the Null-terminator. + +**/ +UINTN +EFIAPI +AsciiValueToString ( + IN OUT CHAR8 *Buffer, + IN UINTN Flags, + IN INT64 Value, + IN UINTN Width + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueReportStatusCodeLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueReportStatusCodeLib.h new file mode 100644 index 0000000..aaad1a0 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueReportStatusCodeLib.h @@ -0,0 +1,659 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueReportStatusCodeLib.h + +Abstract: + + Public header file for Report Status Code Lib + +--*/ + +#ifndef __EDKII_GLUE_REPORT_STATUS_CODE_LIB_H__ +#define __EDKII_GLUE_REPORT_STATUS_CODE_LIB_H__ + + + +#define CodeTypeToPostCode(_CODETYPE, _VALUE, _POSTCODE) GlueCodeTypeToPostCode(_CODETYPE, _VALUE, _POSTCODE) +#define ReportStatusCodeExtractAssertInfo(_CODETYPE, _VALUE, _DATA, _FILENAME, _DESC, _LINENUMBER) \ + GlueReportStatusCodeExtractAssertInfo(_CODETYPE, _VALUE, _DATA, _FILENAME, _DESC, _LINENUMBER) +#define ReportStatusCodeExtractDebugInfo(_DATA, _ERRORLEVEL, _MARKER, _FORMAT) \ + GlueReportStatusCodeExtractDebugInfo(_DATA, _ERRORLEVEL, _MARKER, _FORMAT) +#define ReportStatusCode(_TYPE, _VALUE) GlueReportStatusCode(_TYPE, _VALUE) +#define ReportStatusCodeWithDevicePath(_TYPE, _VALUE, _DEVICEPATH) \ + GlueReportStatusCodeWithDevicePath(_TYPE, _VALUE, _DEVICEPATH) +#define ReportStatusCodeWithExtendedData(_TYPE, _VALUE, _EXDATA, _EXDATASIZE) \ + GlueReportStatusCodeWithExtendedData(_TYPE, _VALUE, _EXDATA, _EXDATASIZE) +#define ReportStatusCodeEx(_TYPE, _VALUE, _INSTANCE, _CALLERID, _EXDATAGUID, _EXDATA, _EXDATASIZE) \ + GlueReportStatusCodeEx(_TYPE, _VALUE, _INSTANCE, _CALLERID, _EXDATAGUID, _EXDATA, _EXDATASIZE) +#define ReportProgressCodeEnabled() GlueReportProgressCodeEnabled() +#define ReportErrorCodeEnabled() GlueReportErrorCodeEnabled() +#define ReportDebugCodeEnabled() GlueReportDebugCodeEnabled() + + +// +// Declare bits for PcdReportStatusCodePropertyMask +// +#define REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED 0x00000001 +#define REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED 0x00000002 +#define REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED 0x00000004 + +// +// Extended Data structure definitions with EFI_STATUS_CODE_DATA headers removed +// + +/// +/// Voltage Extended Error Data +/// +typedef struct { + EFI_EXP_BASE10_DATA Voltage; + EFI_EXP_BASE10_DATA Threshold; +} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_VOLTAGE_ERROR_DATA; + +/// +/// Microcode Update Extended Error Data +/// +typedef struct { + UINT32 Version; +} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA; + +/// +/// Asynchronous Timer Extended Error Data +/// +typedef struct { + EFI_EXP_BASE10_DATA TimerLimit; +} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA; + +/// +/// Host Processor Mismatch Extended Error Data +/// +typedef struct { + UINT32 Instance; + UINT16 Attributes; +} REPORT_STATUS_CODE_LIBRARY_HOST_PROCESSOR_MISMATCH_ERROR_DATA; + +/// +/// Thermal Extended Error Data +/// +typedef struct { + EFI_EXP_BASE10_DATA Temperature; + EFI_EXP_BASE10_DATA Threshold; +} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_THERMAL_ERROR_DATA; + +/// +/// Processor Disabled Extended Error Data +/// +typedef struct { + UINT32 Cause; + BOOLEAN SoftwareDisabled; +} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA; + +/// +/// Embedded cache init extended data +/// +typedef struct { + UINT32 Level; + EFI_INIT_CACHE_TYPE Type; +} REPORT_STATUS_CODE_LIBRARY_CACHE_INIT_DATA; + +/// +/// Memory Extended Error Data +/// +typedef struct { + EFI_MEMORY_ERROR_GRANULARITY Granularity; + EFI_MEMORY_ERROR_OPERATION Operation; + UINTN Syndrome; + EFI_PHYSICAL_ADDRESS Address; + UINTN Resolution; +} REPORT_STATUS_CODE_LIBRARY_MEMORY_EXTENDED_ERROR_DATA; + +/// +/// DIMM number +/// +typedef struct { + UINT16 Array; + UINT16 Device; +} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_DIMM_NUMBER; + +/// +/// Memory Module Mismatch Extended Error Data +/// +typedef struct { + EFI_STATUS_CODE_DIMM_NUMBER Instance; +} REPORT_STATUS_CODE_LIBRARY_MEMORY_MODULE_MISMATCH_ERROR_DATA; + +/// +/// Memory Range Extended Data +/// +typedef struct { + EFI_PHYSICAL_ADDRESS Start; + EFI_PHYSICAL_ADDRESS Length; +} REPORT_STATUS_CODE_LIBRARY_MEMORY_RANGE_EXTENDED_DATA; + +/// +/// Device handle Extended Data. Used for many +/// errors and progress codes to point to the device. +/// +typedef struct { + EFI_HANDLE Handle; +} REPORT_STATUS_CODE_LIBRARY_DEVICE_HANDLE_EXTENDED_DATA; + +typedef struct { + UINT8 *DevicePath; +} REPORT_STATUS_CODE_LIBRARY_DEVICE_PATH_EXTENDED_DATA; + +typedef struct { + EFI_HANDLE ControllerHandle; + EFI_HANDLE DriverBindingHandle; + UINT16 DevicePathSize; + UINT8 *RemainingDevicePath; +} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_START_EXTENDED_DATA; + +/// +/// Resource Allocation Failure Extended Error Data +/// +typedef struct { + UINT32 Bar; + UINT16 DevicePathSize; + UINT16 ReqResSize; + UINT16 AllocResSize; + UINT8 *DevicePath; + UINT8 *ReqRes; + UINT8 *AllocRes; +} REPORT_STATUS_CODE_LIBRARY_RESOURCE_ALLOC_FAILURE_ERROR_DATA; + +/// +/// Extended Error Data for Assert +/// +typedef struct { + UINT32 LineNumber; + UINT32 FileNameSize; + EFI_STATUS_CODE_STRING_DATA *FileName; +} REPORT_STATUS_CODE_LIBRARY_DEBUG_ASSERT_DATA; + +/// +/// System Context Data EBC/IA32/IPF +/// +typedef struct { + EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context; +} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_EXCEP_EXTENDED_DATA; + +/// +/// Legacy Oprom extended data +/// +typedef struct { + EFI_HANDLE DeviceHandle; + EFI_PHYSICAL_ADDRESS RomImageBase; +} REPORT_STATUS_CODE_LIBRARY_LEGACY_OPROM_EXTENDED_DATA; + +// +// Extern for the modules Caller ID GUID +// +extern EFI_GUID gEfiCallerIdGuid; + +/** + Converts a status code to an 8-bit POST code value. + + Converts the status code specified by CodeType and Value to an 8-bit POST code + and returns the 8-bit POST code in PostCode. If CodeType is an + EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode + are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits + 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned. + + If PostCode is NULL, then ASSERT(). + + @param CodeType The type of status code being converted. + @param Value The status code value being converted. + @param PostCode A pointer to the 8-bit POST code value to return. + + @retval TRUE The status code specified by CodeType and Value was converted + to an 8-bit POST code and returned in PostCode. + @retval FALSE The status code specified by CodeType and Value could not be + converted to an 8-bit POST code value. + +**/ +BOOLEAN +EFIAPI +GlueCodeTypeToPostCode ( + IN EFI_STATUS_CODE_TYPE CodeType, + IN EFI_STATUS_CODE_VALUE Value, + OUT UINT8 *PostCode + ); + + +/** + Extracts ASSERT() information from a status code structure. + + Converts the status code specified by CodeType, Value, and Data to the ASSERT() + arguments specified by Filename, Description, and LineNumber. If CodeType is + an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and + Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract + Filename, Description, and LineNumber from the optional data area of the + status code buffer specified by Data. The optional data area of Data contains + a Null-terminated ASCII string for the FileName, followed by a Null-terminated + ASCII string for the Description, followed by a 32-bit LineNumber. If the + ASSERT() information could be extracted from Data, then return TRUE. + Otherwise, FALSE is returned. + + If Data is NULL, then ASSERT(). + If Filename is NULL, then ASSERT(). + If Description is NULL, then ASSERT(). + If LineNumber is NULL, then ASSERT(). + + @param CodeType The type of status code being converted. + @param Value The status code value being converted. + @param Data Pointer to status code data buffer. + @param Filename Pointer to the source file name that generated the ASSERT(). + @param Description Pointer to the description of the ASSERT(). + @param LineNumber Pointer to source line number that generated the ASSERT(). + + @retval TRUE The status code specified by CodeType, Value, and Data was + converted ASSERT() arguments specified by Filename, Description, + and LineNumber. + @retval FALSE The status code specified by CodeType, Value, and Data could + not be converted to ASSERT() arguments. + +**/ +BOOLEAN +EFIAPI +GlueReportStatusCodeExtractAssertInfo ( + IN EFI_STATUS_CODE_TYPE CodeType, + IN EFI_STATUS_CODE_VALUE Value, + IN CONST EFI_STATUS_CODE_DATA *Data, + OUT CHAR8 **Filename, + OUT CHAR8 **Description, + OUT UINT32 *LineNumber + ); + + +/** + Extracts DEBUG() information from a status code structure. + + Converts the status code specified by Data to the DEBUG() arguments specified + by ErrorLevel, Marker, and Format. If type GUID in Data is + EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and + Format from the optional data area of the status code buffer specified by Data. + The optional data area of Data contains a 32-bit ErrorLevel followed by Marker + which is 12 UINTN parameters, followed by a Null-terminated ASCII string for + the Format. If the DEBUG() information could be extracted from Data, then + return TRUE. Otherwise, FALSE is returned. + + If Data is NULL, then ASSERT(). + If ErrorLevel is NULL, then ASSERT(). + If Marker is NULL, then ASSERT(). + If Format is NULL, then ASSERT(). + + @param Data Pointer to status code data buffer. + @param ErrorLevel Pointer to error level mask for a debug message. + @param Marker Pointer to the variable argument list associated with Format. + @param Format Pointer to a Null-terminated ASCII format string of a + debug message. + + @retval TRUE The status code specified by Data was converted DEBUG() arguments + specified by ErrorLevel, Marker, and Format. + @retval FALSE The status code specified by Data could not be converted to + DEBUG() arguments. + +**/ +BOOLEAN +EFIAPI +GlueReportStatusCodeExtractDebugInfo ( + IN CONST EFI_STATUS_CODE_DATA *Data, + OUT UINT32 *ErrorLevel, + OUT VA_LIST *Marker, + OUT CHAR8 **Format + ); + + +/** + Reports a status code. + + Reports the status code specified by the parameters Type and Value. Status + code also require an instance, caller ID, and extended data. This function + passed in a zero instance, NULL extended data, and a caller ID of + gEfiCallerIdGuid, which is the GUID for the module. + + ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode() + is called while processing another any other Report Status Code Library function, + then ReportStatusCode() must return immediately. + + @param Type Status code type. + @param Value Status code value. + + @retval EFI_SUCCESS The status code was reported. + @retval EFI_DEVICE_ERROR There status code could not be reported due to a + device error. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +EFI_STATUS +EFIAPI +GlueReportStatusCode ( + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value + ); + + +/** + Reports a status code with a Device Path Protocol as the extended data. + + Allocates and fills in the extended data section of a status code with the + Device Path Protocol specified by DevicePath. This function is responsible + for allocating a buffer large enough for the standard header and the device + path. The standard header is filled in with a GUID of + gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero + instance and a caller ID of gEfiCallerIdGuid. + + ReportStatusCodeWithDevicePath()must actively prevent recursion. If + ReportStatusCodeWithDevicePath() is called while processing another any other + Report Status Code Library function, then ReportStatusCodeWithDevicePath() + must return EFI_DEVICE_ERROR immediately. + + If DevicePath is NULL, then ASSERT(). + + @param Type Status code type. + @param Value Status code value. + @param DevicePath Pointer to the Device Path Protocol to be reported. + + @retval EFI_SUCCESS The status code was reported with the extended + data specified by DevicePath. + @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the + extended data section. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +EFI_STATUS +EFIAPI +GlueReportStatusCodeWithDevicePath ( + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath + ); + + +/** + Reports a status code with an extended data buffer. + + Allocates and fills in the extended data section of a status code with the + extended data specified by ExtendedData and ExtendedDataSize. ExtendedData + is assumed to be one of the data structures specified in Related Definitions. + These data structure do not have the standard header, so this function is + responsible for allocating a buffer large enough for the standard header and + the extended data passed into this function. The standard header is filled + in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported + with a zero instance and a caller ID of gEfiCallerIdGuid. + + ReportStatusCodeWithExtendedData()must actively prevent recursion. If + ReportStatusCodeWithExtendedData() is called while processing another any other + Report Status Code Library function, then ReportStatusCodeWithExtendedData() + must return EFI_DEVICE_ERROR immediately. + + If ExtendedData is NULL, then ASSERT(). + If ExtendedDataSize is 0, then ASSERT(). + + @param Type Status code type. + @param Value Status code value. + @param ExtendedData Pointer to the extended data buffer to be reported. + @param ExtendedDataSize The size, in bytes, of the extended data buffer to + be reported. + + @retval EFI_SUCCESS The status code was reported with the extended + data specified by ExtendedData and ExtendedDataSize. + @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the + extended data section. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +EFI_STATUS +EFIAPI +GlueReportStatusCodeWithExtendedData ( + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN CONST VOID *ExtendedData, + IN UINTN ExtendedDataSize + ); + + +/** + Reports a status code with full parameters. + + The function reports a status code. If ExtendedData is NULL and ExtendedDataSize + is 0, then an extended data buffer is not reported. If ExtendedData is not + NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated. + ExtendedData is assumed not have the standard status code header, so this function + is responsible for allocating a buffer large enough for the standard header and + the extended data passed into this function. The standard header is filled in + with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a + GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with + an instance specified by Instance and a caller ID specified by CallerId. If + CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used. + + ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx() + is called while processing another any other Report Status Code Library function, + then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately. + + If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT(). + If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT(). + + @param Type Status code type. + @param Value Status code value. + @param Instance Status code instance number. + @param CallerId Pointer to a GUID that identifies the caller of this + function. If this parameter is NULL, then a caller + ID of gEfiCallerIdGuid is used. + @param ExtendedDataGuid Pointer to the GUID for the extended data buffer. + If this parameter is NULL, then a the status code + standard header is filled in with + gEfiStatusCodeSpecificDataGuid. + @param ExtendedData Pointer to the extended data buffer. This is an + optional parameter that may be NULL. + @param ExtendedDataSize The size, in bytes, of the extended data buffer. + + @retval EFI_SUCCESS The status code was reported. + @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate + the extended data section if it was specified. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +EFI_STATUS +EFIAPI +GlueReportStatusCodeEx ( + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN CONST EFI_GUID *CallerId OPTIONAL, + IN CONST EFI_GUID *ExtendedDataGuid OPTIONAL, + IN CONST VOID *ExtendedData OPTIONAL, + IN UINTN ExtendedDataSize + ); + + +/** + Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled + + This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED + bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of + PcdReportStatusCodeProperyMask is set. + @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of + PcdReportStatusCodeProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +GlueReportProgressCodeEnabled ( + VOID + ); + + +/** + Returns TRUE if status codes of type EFI_ERROR_CODE are enabled + + This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED + bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of + PcdReportStatusCodeProperyMask is set. + @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of + PcdReportStatusCodeProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +GlueReportErrorCodeEnabled ( + VOID + ); + + +/** + Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled + + This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED + bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned. + + @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of + PcdReportStatusCodeProperyMask is set. + @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of + PcdReportStatusCodeProperyMask is clear. + +**/ +BOOLEAN +EFIAPI +GlueReportDebugCodeEnabled ( + VOID + ); + + +/** + Reports a status code with minimal parameters if the status code type is enabled. + + If the status code type specified by Type is enabled in + PcdReportStatusCodeProperyMask, then call ReportStatusCode() passing in Type + and Value. + + @param Type Status code type. + @param Value Status code value. + + @retval EFI_SUCCESS The status code was reported. + @retval EFI_DEVICE_ERROR There status code could not be reported due to a device error. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +#define REPORT_STATUS_CODE(Type,Value) \ + (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \ + ReportStatusCode(Type,Value) : \ + (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \ + ReportStatusCode(Type,Value) : \ + (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \ + ReportStatusCode(Type,Value) : \ + EFI_UNSUPPORTED + + +/** + Reports a status code with a Device Path Protocol as the extended data if the + status code type is enabled. + + If the status code type specified by Type is enabled in + PcdReportStatusCodeProperyMask, then call ReportStatusCodeWithDevicePath() + passing in Type, Value, and DevicePath. + + @param Type Status code type. + @param Value Status code value. + @param DevicePath Pointer to the Device Path Protocol to be reported. + + @retval EFI_SUCCESS The status code was reported with the extended + data specified by DevicePath. + @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the + extended data section. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +#define REPORT_STATUS_CODE_WITH_DEVICE_PATH(Type,Value,DevicePathParameter) \ + (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \ + ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \ + (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \ + ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \ + (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \ + ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \ + EFI_UNSUPPORTED + + +/** + Reports a status code with an extended data buffer if the status code type + is enabled. + + If the status code type specified by Type is enabled in + PcdReportStatusCodeProperyMask, then call ReportStatusCodeWithExtendedData() + passing in Type, Value, ExtendedData, and ExtendedDataSize. + + @param Type Status code type. + @param Value Status code value. + @param ExtendedData Pointer to the extended data buffer to be reported. + @param ExtendedDataSize The size, in bytes, of the extended data buffer to + be reported. + + @retval EFI_SUCCESS The status code was reported with the extended + data specified by ExtendedData and ExtendedDataSize. + @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the + extended data section. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +#define REPORT_STATUS_CODE_WITH_EXTENDED_DATA(Type,Value,ExtendedData,ExtendedDataSize) \ + (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \ + ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \ + (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \ + ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \ + (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \ + ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \ + EFI_UNSUPPORTED + +/** + Reports a status code specifying all parameters if the status code type is enabled. + + If the status code type specified by Type is enabled in + PcdReportStatusCodeProperyMask, then call ReportStatusCodeEx() passing in Type, + Value, Instance, CallerId, ExtendedDataGuid, ExtendedData, and ExtendedDataSize. + + @param Type Status code type. + @param Value Status code value. + @param Instance Status code instance number. + @param CallerId Pointer to a GUID that identifies the caller of this + function. If this parameter is NULL, then a caller + ID of gEfiCallerIdGuid is used. + @param ExtendedDataGuid Pointer to the GUID for the extended data buffer. + If this parameter is NULL, then a the status code + standard header is filled in with + gEfiStatusCodeSpecificDataGuid. + @param ExtendedData Pointer to the extended data buffer. This is an + optional parameter that may be NULL. + @param ExtendedDataSize The size, in bytes, of the extended data buffer. + + @retval EFI_SUCCESS The status code was reported. + @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the + extended data section if it was specified. + @retval EFI_UNSUPPORTED Report status code is not supported + +**/ +#define REPORT_STATUS_CODE_EX(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) \ + (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \ + ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \ + (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \ + ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \ + (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \ + ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \ + EFI_UNSUPPORTED + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueResourcePublicationLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueResourcePublicationLib.h new file mode 100644 index 0000000..36b78db --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueResourcePublicationLib.h @@ -0,0 +1,50 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueResourcePublicationLib.h + +Abstract: + + Public header file for Resource Publication Lib + +--*/ + +#ifndef __EDKII_GLUE_RESOURCE_PUBLICATION_LIB_H__ +#define __EDKII_GLUE_RESOURCE_PUBLICATION_LIB_H__ + +/** + + Declares the presence of permanent system memory in the platform. + + Declares that the system memory buffer specified by MemoryBegin and MemoryLength + as permanent memory that may be used for general purpose use by software. + The amount of memory available to software may be less than MemoryLength + if published memory has alignment restrictions. + + @param MemoryBegin The start address of the memory being declared. + @param MemoryLength The number of bytes of memory being declared. + + @retval RETURN_SUCCESS The memory buffer was published. + @retval RETURN_OUT_OF_RESOURCES There are not enough resources to publish the memory buffer + +**/ +RETURN_STATUS +EFIAPI +PublishSystemMemory ( + IN PHYSICAL_ADDRESS MemoryBegin, + IN UINT64 MemoryLength + ) +; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueSmbusLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueSmbusLib.h new file mode 100644 index 0000000..8fd2f33 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueSmbusLib.h @@ -0,0 +1,394 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueSmbusLib.h + +Abstract: + + Public header file for Smbus Lib + +--*/ + +#ifndef __EDKII_GLUE_SMBUS_LIB_H__ +#define __EDKII_GLUE_SMBUS_LIB_H__ + +// +// PEC BIT is bit 22 in SMBUS address +// +#define SMBUS_LIB_PEC_BIT (1 << 22) + +/** + Macro that converts SMBUS slave address, SMBUS command, SMBUS data length, + and PEC to a value that can be passed to the SMBUS Library functions. + + Computes an address that is compatible with the SMBUS Library functions. + The unused upper bits of SlaveAddress, Command, and Length are stripped + prior to the generation of the address. + + @param SlaveAddress SMBUS Slave Address. Range 0..127. + @param Command SMBUS Command. Range 0..255. + @param Length SMBUS Data Length. Range 0..32. + @param Pec TRUE if Packet Error Checking is enabled. Otherwise FALSE. + +**/ +#define SMBUS_LIB_ADDRESS(SlaveAddress,Command,Length,Pec) \ + ( ((Pec) ? SMBUS_LIB_PEC_BIT: 0) | \ + (((SlaveAddress) & 0x7f) << 1) | \ + (((Command) & 0xff) << 8) | \ + (((Length) & 0x3f) << 16) \ + ) + +/** + Executes an SMBUS quick read command. + + Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress. + Only the SMBUS slave address field of SmBusAddress is required. + If Status is not NULL, then the status of the executed command is returned in Status. + If PEC is set in SmBusAddress, then ASSERT(). + If Command in SmBusAddress is not zero, then ASSERT(). + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + +**/ +VOID +EFIAPI +SmBusQuickRead ( + IN UINTN SmBusAddress, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS quick write command. + + Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress. + Only the SMBUS slave address field of SmBusAddress is required. + If Status is not NULL, then the status of the executed command is returned in Status. + If PEC is set in SmBusAddress, then ASSERT(). + If Command in SmBusAddress is not zero, then ASSERT(). + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + +**/ +VOID +EFIAPI +SmBusQuickWrite ( + IN UINTN SmBusAddress, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS receive byte command. + + Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress. + Only the SMBUS slave address field of SmBusAddress is required. + The byte received from the SMBUS is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Command in SmBusAddress is not zero, then ASSERT(). + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The byte received from the SMBUS. + +**/ +UINT8 +EFIAPI +SmBusReceiveByte ( + IN UINTN SmBusAddress, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS send byte command. + + Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress. + The byte specified by Value is sent. + Only the SMBUS slave address field of SmBusAddress is required. Value is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Command in SmBusAddress is not zero, then ASSERT(). + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Value The 8-bit value to send. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The parameter of Value. + +**/ +UINT8 +EFIAPI +SmBusSendByte ( + IN UINTN SmBusAddress, + IN UINT8 Value, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS read data byte command. + + Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress. + Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required. + The 8-bit value read from the SMBUS is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The byte read from the SMBUS. + +**/ +UINT8 +EFIAPI +SmBusReadDataByte ( + IN UINTN SmBusAddress, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS write data byte command. + + Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress. + The 8-bit value specified by Value is written. + Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required. + Value is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Value The 8-bit value to write. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The parameter of Value. + +**/ +UINT8 +EFIAPI +SmBusWriteDataByte ( + IN UINTN SmBusAddress, + IN UINT8 Value, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS read data word command. + + Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress. + Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required. + The 16-bit value read from the SMBUS is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The byte read from the SMBUS. + +**/ +UINT16 +EFIAPI +SmBusReadDataWord ( + IN UINTN SmBusAddress, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS write data word command. + + Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress. + The 16-bit value specified by Value is written. + Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required. + Value is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Value The 16-bit value to write. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The parameter of Value. + +**/ +UINT16 +EFIAPI +SmBusWriteDataWord ( + IN UINTN SmBusAddress, + IN UINT16 Value, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS process call command. + + Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress. + The 16-bit value specified by Value is written. + Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required. + The 16-bit value returned by the process call command is returned. + If Status is not NULL, then the status of the executed command is returned in Status. + If Length in SmBusAddress is not zero, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Value The 16-bit value to write. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The 16-bit value returned by the process call command. + +**/ +UINT16 +EFIAPI +SmBusProcessCall ( + IN UINTN SmBusAddress, + IN UINT16 Value, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS read block command. + + Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress. + Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required. + Bytes are read from the SMBUS and stored in Buffer. + The number of bytes read is returned, and will never return a value larger than 32-bytes. + If Status is not NULL, then the status of the executed command is returned in Status. + It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read. + SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes. + If Length in SmBusAddress is not zero, then ASSERT(). + If Buffer is NULL, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Buffer Pointer to the buffer to store the bytes read from the SMBUS. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The number of bytes read. + +**/ +UINTN +EFIAPI +SmBusReadBlock ( + IN UINTN SmBusAddress, + OUT VOID *Buffer, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS write block command. + + Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress. + The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required. + Bytes are written to the SMBUS from Buffer. + The number of bytes written is returned, and will never return a value larger than 32-bytes. + If Status is not NULL, then the status of the executed command is returned in Status. + If Length in SmBusAddress is zero or greater than 32, then ASSERT(). + If Buffer is NULL, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param Buffer Pointer to the buffer to store the bytes read from the SMBUS. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The number of bytes written. + +**/ +UINTN +EFIAPI +SmBusWriteBlock ( + IN UINTN SmBusAddress, + OUT VOID *Buffer, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + +/** + Executes an SMBUS block process call command. + + Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress. + The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required. + Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer. + If Status is not NULL, then the status of the executed command is returned in Status. + It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read. + SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes. + If Length in SmBusAddress is zero or greater than 32, then ASSERT(). + If WriteBuffer is NULL, then ASSERT(). + If ReadBuffer is NULL, then ASSERT(). + If any reserved bits of SmBusAddress are set, then ASSERT(). + + @param SmBusAddress Address that encodes the SMBUS Slave Address, + SMBUS Command, SMBUS Data Length, and PEC. + @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS. + @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS. + @param Status Return status for the executed command. + This is an optional parameter and may be NULL. + + @return The number of bytes written. + +**/ +UINTN +EFIAPI +SmBusBlockProcessCall ( + IN UINTN SmBusAddress, + IN VOID *WriteBuffer, + OUT VOID *ReadBuffer, + OUT RETURN_STATUS *Status OPTIONAL + ) +; + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueTimerLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueTimerLib.h new file mode 100644 index 0000000..822ad5f --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueTimerLib.h @@ -0,0 +1,130 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueTimerLib.h + +Abstract: + + Public header file for Timer Lib + +--*/ + +#ifndef __EDKII_GLUE_TIMER_LIB_H__ +#define __EDKII_GLUE_TIMER_LIB_H__ + +/** + Stalls the CPU for at least the given number of microseconds. + + Stalls the CPU for the number of microseconds specified by MicroSeconds. + + @param MicroSeconds The minimum number of microseconds to delay. + + @return MicroSeconds + +**/ +UINTN +EFIAPI +MicroSecondDelay ( + IN UINTN MicroSeconds + ); + +/** + Stalls the CPU for at least the given number of nanoseconds. + + Stalls the CPU for the number of nanoseconds specified by NanoSeconds. + + @param NanoSeconds The minimum number of nanoseconds to delay. + + @return NanoSeconds + +**/ +UINTN +EFIAPI +NanoSecondDelay ( + IN UINTN NanoSeconds + ); + +/** + Retrieves the current value of a 64-bit free running performance counter. + + Retrieves the current value of a 64-bit free running performance counter. The + counter can either count up by 1 or count down by 1. If the physical + performance counter counts by a larger increment, then the counter values + must be translated. The properties of the counter can be retrieved from + GetPerformanceCounterProperties(). + + @return The current value of the free running performance counter. + +**/ +UINT64 +EFIAPI +GetPerformanceCounter ( + VOID + ); + +/** + Retrieves the 64-bit frequency in Hz and the range of performance counter + values. + + If StartValue is not NULL, then the value that the performance counter starts + with immediately after is it rolls over is returned in StartValue. If + EndValue is not NULL, then the value that the performance counter end with + immediately before it rolls over is returned in EndValue. The 64-bit + frequency of the performance counter in Hz is always returned. If StartValue + is less than EndValue, then the performance counter counts up. If StartValue + is greater than EndValue, then the performance counter counts down. For + example, a 64-bit free running counter that counts up would have a StartValue + of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter + that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0. + + @param StartValue The value the performance counter starts with when it + rolls over. + @param EndValue The value that the performance counter ends with before + it rolls over. + + @return The frequency in Hz. + +**/ +UINT64 +EFIAPI +GetPerformanceCounterProperties ( + IN UINT64 *StartValue, OPTIONAL + IN UINT64 *EndValue OPTIONAL + ); + +/** + Converts TSC value into nano second value. + + @param TimeStamp - TSC timer ticker + + @return UINT64 value in naosecond unit converted from TSC ticker + +**/ +UINT64 +GetTimeInNanoSec ( + UINT64 Timestamp + ); + +/** + Retrieves current APIC ID. + + @return UINT32 value of APIC ID + +**/ +UINT32 +GetApicId ( + VOID + ); + +#endif
\ No newline at end of file diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiBootServicesTableLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiBootServicesTableLib.h new file mode 100644 index 0000000..d7b8c0e --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiBootServicesTableLib.h @@ -0,0 +1,41 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefiBootServicesTableLib.h + +Abstract: + + Public header file for UEFI Boot Services Table Lib + +--*/ + +#ifndef __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB_H__ +#define __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB_H__ + +// +// Cache the Image Handle +// +extern EFI_HANDLE gImageHandle; + +// +// Cache pointer to the EFI System Table +// +extern EFI_SYSTEM_TABLE *gST; + +// +// Cache pointer to the EFI Boot Services Table +// +extern EFI_BOOT_SERVICES *gBS; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDecompressLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDecompressLib.h new file mode 100644 index 0000000..2f23b6b --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDecompressLib.h @@ -0,0 +1,113 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefiDecompressLib.h + +Abstract: + + Public header file for UEFI Decompress Lib + +--*/ + +#ifndef __EDKII_GLUE_UEFI_DECPOMPRESS_LIB_H__ +#define __EDKII_GLUE_UEFI_DECPOMPRESS_LIB_H__ + +#define FillBuf(_SD, _NUMOFBITS) GlueFillBuf(_SD, _NUMOFBITS) +#define GetBits(_SD, _NUMOFBITS) GlueGetBits(_SD, _NUMOFBITS) +#define MakeTable(_SD, _NUMOFCHAR, _BITLEN, _TABLEBITS, _TABLE) GlueMakeTable(_SD, _NUMOFCHAR, _BITLEN, _TABLEBITS, _TABLE) +#define DecodeP(_SD) GlueDecodeP(_SD) +#define ReadPTLen( _SD, _NN, _NBIT, _SPECIAL) GlueReadPTLen( _SD, _NN, _NBIT, _SPECIAL) +#define ReadCLen(_SD) GlueReadCLen(_SD) +#define DecodeC(_SD) GlueDecodeC(_SD) +#define Decode(_SD) GlueDecode(_SD) + + + +/** + Retrieves the size of the uncompressed buffer and the size of the scratch buffer. + + Retrieves the size of the uncompressed buffer and the temporary scratch buffer + required to decompress the buffer specified by Source and SourceSize. + If the size of the uncompressed buffer or the size of the scratch buffer cannot + be determined from the compressed data specified by Source and SourceData, + then RETURN_INVALID_PARAMETER is returned. Otherwise, the size of the uncompressed + buffer is returned in DestinationSize, the size of the scratch buffer is returned + in ScratchSize, and RETURN_SUCCESS is returned. + This function does not have scratch buffer available to perform a thorough + checking of the validity of the source data. It just retrieves the "Original Size" + field from the beginning bytes of the source data and output it as DestinationSize. + And ScratchSize is specific to the decompression implementation. + + If Source is NULL, then ASSERT(). + If DestinationSize is NULL, then ASSERT(). + If ScratchSize is NULL, then ASSERT(). + + @param Source The source buffer containing the compressed data. + @param SourceSize The size, in bytes, of the source buffer. + @param DestinationSize A pointer to the size, in bytes, of the uncompressed buffer + that will be generated when the compressed buffer specified + by Source and SourceSize is decompressed.. + @param ScratchSize A pointer to the size, in bytes, of the scratch buffer that + is required to decompress the compressed buffer specified + by Source and SourceSize. + + @retval RETURN_SUCCESS The size of destination buffer and the size of scratch + buffer are successull retrieved. + @retval RETURN_INVALID_PARAMETER The source data is corrupted + +**/ +RETURN_STATUS +EFIAPI +UefiDecompressGetInfo ( + IN CONST VOID *Source, + IN UINT32 SourceSize, + OUT UINT32 *DestinationSize, + OUT UINT32 *ScratchSize + ); + +/** + Decompresses a compressed source buffer. + + This function is designed so that the decompression algorithm can be implemented + without using any memory services. As a result, this function is not allowed to + call any memory allocation services in its implementation. It is the caller¡¯s r + esponsibility to allocate and free the Destination and Scratch buffers. + If the compressed source data specified by Source is sucessfully decompressed + into Destination, then RETURN_SUCCESS is returned. If the compressed source data + specified by Source is not in a valid compressed data format, + then RETURN_INVALID_PARAMETER is returned. + + If Source is NULL, then ASSERT(). + If Destination is NULL, then ASSERT(). + If the required scratch buffer size > 0 and Scratch is NULL, then ASSERT(). + + @param Source The source buffer containing the compressed data. + @param Destination The destination buffer to store the decompressed data + @param Scratch A temporary scratch buffer that is used to perform the decompression. + This is an optional parameter that may be NULL if the + required scratch buffer size is 0. + + @retval RETURN_SUCCESS Decompression is successfull + @retval RETURN_INVALID_PARAMETER The source data is corrupted + +**/ +RETURN_STATUS +EFIAPI +UefiDecompress ( + IN CONST VOID *Source, + IN OUT VOID *Destination, + IN OUT VOID *Scratch + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDriverEntryPoint.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDriverEntryPoint.h new file mode 100644 index 0000000..edc195b --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDriverEntryPoint.h @@ -0,0 +1,162 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefiDriverEntryPoint.h + +Abstract: + + Public header file for UEFI Driver Entry Point Lib + +--*/ + +#ifndef __EDKII_GLUE_UEFI_DRIVER_ENTRY_POINT_H__ +#define __EDKII_GLUE_UEFI_DRIVER_ENTRY_POINT_H__ + +// +// Declare the EFI/UEFI Specification Revision to which this driver is implemented +// +extern const UINT32 _gUefiDriverRevision; + +// +// Declare the number of entry points in the image. +// +extern const UINT8 _gDriverEntryPointCount; + +// +// Declare the number of unload handler in the image. +// +extern const UINT8 _gDriverUnloadImageCount; + +// +// Declare the arrary of Boot Sevice Exit Event callbacks . +// +extern const EFI_EVENT_NOTIFY _gDriverExitBootServicesEvent[]; + +// +// Declare the arrary of Virtual Address Change Event callbacks . +// +extern const EFI_EVENT_NOTIFY _gDriverSetVirtualAddressMapEvent[]; + +/** + Enrty point to DXE SMM Driver. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + + @retval EFI_SUCCESS One or more of the drivers returned a success code. + @retval !EFI_SUCESS The return status from the last driver entry point in the list. + +**/ +EFI_STATUS +EFIAPI +_ModuleEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + + +/** + Enrty point wrapper of DXE Driver. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + + @retval EFI_SUCCESS One or more of the drivers returned a success code. + @retval !EFI_SUCESS The return status from the last driver entry point in the list. + +**/ +EFI_STATUS +EFIAPI +EfiMain ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + + +/** + Computes the cummulative return status for the driver entry point and perform + a long jump back into DriverEntryPoint(). + + @param Status Status returned by the driver that is exiting. + +**/ +VOID +EFIAPI +ExitDriver ( + IN EFI_STATUS Status + ); + + +/** + Call constructs for all libraries. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + +**/ +VOID +EFIAPI +ProcessLibraryConstructorList ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + + +/** + Call destructors for all libraries. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + +**/ +VOID +EFIAPI +ProcessLibraryDestructorList ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +/** + Call the list of driver entry points. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + @param SystemTable Pointer to the EFI System Table. + + @return Status returned by entry points of drivers. + +**/ + +EFI_STATUS +EFIAPI +ProcessModuleEntryPointList ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + + +/** + Call the unload handlers for all the modules. Automatics Generated by tool. + + @param ImageHandle ImageHandle of the loaded driver. + + @return Status returned by unload handlers of drivers. + +**/ +EFI_STATUS +EFIAPI +ProcessModuleUnloadList ( + IN EFI_HANDLE ImageHandle + ); + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDriverModelLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDriverModelLib.h new file mode 100644 index 0000000..0fa33ea --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiDriverModelLib.h @@ -0,0 +1,52 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefiDriverModelLib.h + +Abstract: + + Public header file for UEFI Driver Model Lib + +--*/ + +#ifndef __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB_H__ +#define __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB_H__ + +// +// Declare bitmask values for the protocols that are enabled +// +#define UEFI_DRIVER_MODEL_LIBRARY_COMPONENT_NAME_PROTOCOL_ENABLED 0x01 +#define UEFI_DRIVER_MODEL_LIBRARY_DRIVER_DIAGNOSTICS_PROTOCOL_ENABLED 0x02 +#define UEFI_DRIVER_MODEL_LIBRARY_DRIVER_CONFIGURATION_PROTOCOL_ENABLED 0x04 + +// +// Data structure that declares pointers to the Driver Model +// Protocols. +// +typedef struct { + const EFI_DRIVER_BINDING_PROTOCOL *DriverBinding; + const EFI_COMPONENT_NAME_PROTOCOL *ComponentName; + const EFI_DRIVER_CONFIGURATION_PROTOCOL *DriverConfiguration; + const EFI_DRIVER_DIAGNOSTICS_PROTOCOL *DriverDiagnostics; + const EFI_COMPONENT_NAME2_PROTOCOL *ComponentName2; + const EFI_DRIVER_CONFIGURATION2_PROTOCOL *DriverConfiguration2; + const EFI_DRIVER_DIAGNOSTICS2_PROTOCOL *DriverDiagnostics2; +} EFI_DRIVER_MODEL_PROTOCOL_LIST; + +// +// UEFI Driver Model Protocols arrary +// +extern const EFI_DRIVER_MODEL_PROTOCOL_LIST _gDriverModelProtocolList[]; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiLib.h new file mode 100644 index 0000000..946fabd --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiLib.h @@ -0,0 +1,590 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefiLib.h + +Abstract: + + Public header file for UEFI Lib + +--*/ + +#ifndef __EDKII_GLUE_UEFI_LIB_H__ +#define __EDKII_GLUE_UEFI_LIB_H__ + + +#define EfiInitializeLock(_LOCK, _PRIORITY) GlueEfiInitializeLock(_LOCK, _PRIORITY) +#define EfiAcquireLock(_LOCK) GlueEfiAcquireLock(_LOCK) +#define EfiAcquireLockOrFail(_LOCK) GlueEfiAcquireLockOrFail(_LOCK) +#define EfiReleaseLock(_LOCK) GlueEfiReleaseLock(_LOCK) +#define GetGlyphWidth(_UNICODECHAR) GlueGetGlyphWidth(_UNICODECHAR) +#define EfiCreateEventLegacyBoot(_LEGACYBOOT) GlueEfiCreateEventLegacyBoot(_LEGACYBOOT) +#define EfiCreateEventReadyToBoot(_READYTOBOOTEVENT) GlueEfiCreateEventReadyToBoot(_READYTOBOOTEVENT) +#define EfiGetNameGuidFromFwVolDevicePathNode(_FVDEVICEPATHNODE) GlueEfiGetNameGuidFromFwVolDevicePathNode(_FVDEVICEPATHNODE) +#define EfiInitializeFwVolDevicepathNode(_FVDEVICEPATHNODE, _NAMEGUID) GlueEfiInitializeFwVolDevicepathNode(_FVDEVICEPATHNODE, _NAMEGUID) + + +// +// Unicode String Table +// +typedef struct { + CHAR8 *Language; + CHAR16 *UnicodeString; +} GLUE_EFI_UNICODE_STRING_TABLE; + +// +// EFI Lock Status +// +typedef enum { + EfiLockUninitialized = 0, + EfiLockReleased = 1, + EfiLockAcquired = 2 +} EFI_LOCK_STATE; + +// +// EFI Lock +// +typedef struct { + EFI_TPL Tpl; + EFI_TPL OwnerTpl; + EFI_LOCK_STATE Lock; +} GLUE_EFI_LOCK; + +/** + This function searches the list of configuration tables stored in the EFI System + Table for a table with a GUID that matches TableGuid. If a match is found, + then a pointer to the configuration table is returned in Table, and EFI_SUCCESS + is returned. If a matching GUID is not found, then EFI_NOT_FOUND is returned. + + @param TableGuid Pointer to table's GUID type.. + @param Table Pointer to the table associated with TableGuid in the EFI System Table. + + @retval EFI_SUCCESS A configuration table matching TableGuid was found. + @retval EFI_NOT_FOUND A configuration table matching TableGuid could not be found. + +**/ +EFI_STATUS +EFIAPI +EfiGetSystemConfigurationTable ( + IN EFI_GUID *TableGuid, + OUT VOID **Table + ); + +/** + This function causes the notification function to be executed for every protocol + of type ProtocolGuid instance that exists in the system when this function is + invoked. In addition, every time a protocol of type ProtocolGuid instance is + installed or reinstalled, the notification function is also executed. + + @param ProtocolGuid Supplies GUID of the protocol upon whose installation the event is fired. + @param NotifyTpl Supplies the task priority level of the event notifications. + @param NotifyFunction Supplies the function to notify when the event is signaled. + @param NotifyContext The context parameter to pass to NotifyFunction. + @param Registration A pointer to a memory location to receive the registration value. + + @return The notification event that was created. + +**/ +EFI_EVENT +EFIAPI +EfiCreateProtocolNotifyEvent( + IN EFI_GUID *ProtocolGuid, + IN EFI_TPL NotifyTpl, + IN EFI_EVENT_NOTIFY NotifyFunction, + IN VOID *NotifyContext, OPTIONAL + OUT VOID **Registration + ); + +/** + This function creates an event using NotifyTpl, NoifyFunction, and NotifyContext. + This event is signaled with EfiNamedEventSignal(). This provide the ability for + one or more listeners on the same event named by the GUID specified by Name. + + @param Name Supplies GUID name of the event. + @param NotifyTpl Supplies the task priority level of the event notifications. + @param NotifyFunction Supplies the function to notify when the event is signaled. + @param NotifyContext The context parameter to pass to NotifyFunction. + @param Registration A pointer to a memory location to receive the registration value. + + @retval EFI_SUCCESS A named event was created. + @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event. + +**/ +EFI_STATUS +EFIAPI +EfiNamedEventListen ( + IN CONST EFI_GUID *Name, + IN EFI_TPL NotifyTpl, + IN EFI_EVENT_NOTIFY NotifyFunction, + IN CONST VOID *NotifyContext, OPTIONAL + OUT VOID *Registration OPTIONAL + ); + +/** + This function signals the named event specified by Name. The named event must + have been created with EfiNamedEventListen(). + + @param Name Supplies GUID name of the event. + + @retval EFI_SUCCESS A named event was signaled. + @retval EFI_OUT_OF_RESOURCES There are not enough resource to signal the named event. + +**/ +EFI_STATUS +EFIAPI +EfiNamedEventSignal ( + IN CONST EFI_GUID *Name + ); + +/** + This function initializes a basic mutual exclusion lock to the released state + and returns the lock. Each lock provides mutual exclusion access at its task + priority level. Since there is no preemption or multiprocessor support in EFI, + acquiring the lock only consists of raising to the locks TPL. + + @param Lock A pointer to the lock data structure to initialize. + @param Priority EFI TPL associated with the lock. + + @return The lock. + +**/ +EFI_LOCK * +EFIAPI +GlueEfiInitializeLock ( + IN OUT EFI_LOCK *Lock, + IN EFI_TPL Priority + ); + +/** + This macro initializes the contents of a basic mutual exclusion lock to the + released state. Each lock provides mutual exclusion access at its task + priority level. Since there is no preemption or multiprocessor support in EFI, + acquiring the lock only consists of raising to the locks TPL. + + @param Lock A pointer to the lock data structure to initialize. + @param Priority The task priority level of the lock. + + @return The lock. + +**/ +#ifdef EFI_INITIALIZE_LOCK_VARIABLE +#undef EFI_INITIALIZE_LOCK_VARIABLE +#endif + +#define EFI_INITIALIZE_LOCK_VARIABLE(Priority) \ + {Priority, EFI_TPL_APPLICATION, EfiLockReleased } + + +/** + + Macro that calls DebugAssert() if an EFI_LOCK structure is not in the locked state. + + If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, + then this macro evaluates the EFI_LOCK structure specified by Lock. If Lock + is not in the locked state, then DebugAssert() is called passing in the source + filename, source line number, and Lock. + + If Lock is NULL, then ASSERT(). + + @param LockParameter A pointer to the lock to acquire. + +**/ +#ifdef ASSERT_LOCKED +#undef ASSERT_LOCKED +#endif + +#define ASSERT_LOCKED(LockParameter) \ + do { \ + if (DebugAssertEnabled ()) { \ + ASSERT (LockParameter != NULL); \ + if ((LockParameter)->Lock != EfiLockAcquired) { \ + _ASSERT (LockParameter not locked); \ + } \ + } \ + } while (FALSE) + + +/** + This function raises the system¡¯s current task priority level to the task + priority level of the mutual exclusion lock. Then, it places the lock in the + acquired state. + + @param Priority The task priority level of the lock. + +**/ +VOID +EFIAPI +GlueEfiAcquireLock ( + IN EFI_LOCK *Lock + ); + +/** + This function raises the system¡¯s current task priority level to the task + priority level of the mutual exclusion lock. Then, it attempts to place the + lock in the acquired state. + + @param Lock A pointer to the lock to acquire. + + @retval EFI_SUCCESS The lock was acquired. + @retval EFI_ACCESS_DENIED The lock could not be acquired because it is already owned. + +**/ +EFI_STATUS +EFIAPI +GlueEfiAcquireLockOrFail ( + IN EFI_LOCK *Lock + ); + +/** + This function transitions a mutual exclusion lock from the acquired state to + the released state, and restores the system¡¯s task priority level to its + previous level. + + @param Lock A pointer to the lock to release. + +**/ +VOID +EFIAPI +GlueEfiReleaseLock ( + IN EFI_LOCK *Lock + ); + +/** + This function looks up a Unicode string in UnicodeStringTable. If Language is + a member of SupportedLanguages and a Unicode string is found in UnicodeStringTable + that matches the language code specified by Language, then it is returned in + UnicodeString. + + @param Language A pointer to the ISO 639-2 language code for the + Unicode string to look up and return. + @param SupportedLanguages A pointer to the set of ISO 639-2 language codes + that the Unicode string table supports. Language + must be a member of this set. + @param UnicodeStringTable A pointer to the table of Unicode strings. + @param UnicodeString A pointer to the Unicode string from UnicodeStringTable + that matches the language specified by Language. + + @retval EFI_SUCCESS The Unicode string that matches the language + specified by Language was found + in the table of Unicoide strings UnicodeStringTable, + and it was returned in UnicodeString. + @retval EFI_INVALID_PARAMETER Language is NULL. + @retval EFI_INVALID_PARAMETER UnicodeString is NULL. + @retval EFI_UNSUPPORTED SupportedLanguages is NULL. + @retval EFI_UNSUPPORTED UnicodeStringTable is NULL. + @retval EFI_UNSUPPORTED The language specified by Language is not a + member of SupportedLanguages. + @retval EFI_UNSUPPORTED The language specified by Language is not + supported by UnicodeStringTable. + +**/ +EFI_STATUS +EFIAPI +LookupUnicodeString ( + IN CONST CHAR8 *Language, + IN CONST CHAR8 *SupportedLanguages, + IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable, + OUT CHAR16 **UnicodeString + ); + +/** + This function adds a Unicode string to UnicodeStringTable. + If Language is a member of SupportedLanguages then UnicodeString is added to + UnicodeStringTable. New buffers are allocated for both Language and + UnicodeString. The contents of Language and UnicodeString are copied into + these new buffers. These buffers are automatically freed when + FreeUnicodeStringTable() is called. + + @param Language A pointer to the ISO 639-2 language code for the Unicode + string to add. + @param SupportedLanguages A pointer to the set of ISO 639-2 language codes + that the Unicode string table supports. + Language must be a member of this set. + @param UnicodeStringTable A pointer to the table of Unicode strings. + @param UnicodeString A pointer to the Unicode string to add. + + @retval EFI_SUCCESS The Unicode string that matches the language + specified by Language was found in the table of + Unicode strings UnicodeStringTable, and it was + returned in UnicodeString. + @retval EFI_INVALID_PARAMETER Language is NULL. + @retval EFI_INVALID_PARAMETER UnicodeString is NULL. + @retval EFI_INVALID_PARAMETER UnicodeString is an empty string. + @retval EFI_UNSUPPORTED SupportedLanguages is NULL. + @retval EFI_ALREADY_STARTED A Unicode string with language Language is + already present in UnicodeStringTable. + @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another + Unicode string to UnicodeStringTable. + @retval EFI_UNSUPPORTED The language specified by Language is not a + member of SupportedLanguages. + +**/ +EFI_STATUS +EFIAPI +AddUnicodeString ( + IN CONST CHAR8 *Language, + IN CONST CHAR8 *SupportedLanguages, + IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable, + IN CONST CHAR16 *UnicodeString + ); + +/** + This function frees the table of Unicode strings in UnicodeStringTable. + If UnicodeStringTable is NULL, then EFI_SUCCESS is returned. + Otherwise, each language code, and each Unicode string in the Unicode string + table are freed, and EFI_SUCCESS is returned. + + @param UnicodeStringTable A pointer to the table of Unicode strings. + + @retval EFI_SUCCESS The Unicode string table was freed. + +**/ +EFI_STATUS +EFIAPI +FreeUnicodeStringTable ( + IN EFI_UNICODE_STRING_TABLE *UnicodeStringTable + ); + +/** + This function computes and returns the width of the Unicode character + specified by UnicodeChar. + + @param UnicodeChar A Unicode character. + + @retval 0 The width if UnicodeChar could not be determined. + @retval 1 UnicodeChar is a narrow glyph. + @retval 2 UnicodeChar is a wide glyph. + +**/ + +EFI_GUID * +GetGuidFromHandle ( + EFI_HANDLE Handle + ); +/*++ + +Routine Description: + + retrieves GUID name from Handle + +Arguments: + + Handle - Handle of image + +Returns: + + Pointer to GUID name + +--*/ + +UINTN +EFIAPI +GlueGetGlyphWidth ( + IN CHAR16 UnicodeChar + ); + +/** + This function computes and returns the display length of + the Null-terminated Unicode string specified by String. + If String is NULL, then 0 is returned. + If any of the widths of the Unicode characters in String + can not be determined, then 0 is returned. + + @param String A pointer to a Null-terminated Unicode string. + + @return The display length of the Null-terminated Unicode string specified by String. + +**/ +UINTN +EFIAPI +UnicodeStringDisplayLength ( + IN CONST CHAR16 *String + ); + +// +// Functions that abstract early Framework contamination of UEFI. +// +/** + Signal a Ready to Boot Event. + + Create a Ready to Boot Event. Signal it and close it. This causes other + events of the same event group to be signaled in other modules. + +**/ +VOID +EFIAPI +EfiSignalEventReadyToBoot ( + VOID + ); + +/** + Signal a Legacy Boot Event. + + Create a legacy Boot Event. Signal it and close it. This causes other + events of the same event group to be signaled in other modules. + +**/ +VOID +EFIAPI +EfiSignalEventLegacyBoot ( + VOID + ); + +/** + Create a Legacy Boot Event. + + Tiano extended the CreateEvent Type enum to add a legacy boot event type. + This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was + added and now it's possible to not voilate the UEFI specification by + declaring a GUID for the legacy boot event class. This library supports + the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to + work both ways. + + @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex). + + @retval EFI_SUCCESS Event was created. + @retval Other Event was not created. + +**/ +EFI_STATUS +EFIAPI +GlueEfiCreateEventLegacyBoot ( + OUT EFI_EVENT *LegacyBootEvent + ); + +/** + Create an EFI event in the Legacy Boot Event Group and allows + the caller to specify a notification function. + + This function abstracts the creation of the Legacy Boot Event. + The Framework moved from a proprietary to UEFI 2.0 based mechanism. + This library abstracts the caller from how this event is created to prevent + to code form having to change with the version of the specification supported. + If LegacyBootEvent is NULL, then ASSERT(). + + @param NotifyTpl The task priority level of the event. + @param NotifyFunction The notification function to call when the event is signaled. + @param NotifyContext The content to pass to NotifyFunction when the event is signaled. + @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex). + + @retval EFI_SUCCESS Event was created. + @retval Other Event was not created. + +**/ +EFI_STATUS +EFIAPI +EfiCreateEventLegacyBootEx ( + IN EFI_TPL NotifyTpl, + IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL + IN VOID *NotifyContext, OPTIONAL + OUT EFI_EVENT *LegacyBootEvent + ); + +/** + Create a Read to Boot Event. + + Tiano extended the CreateEvent Type enum to add a ready to boot event type. + This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was + added and now it's possible to not voilate the UEFI specification and use + the ready to boot event class defined in UEFI 2.0. This library supports + the EDK/EFI 1.10 form and EDKII/UEFI 2.0 form and allows common code to + work both ways. + + @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex). + + @retval EFI_SUCCESS Event was created. + @retval Other Event was not created. + +**/ +EFI_STATUS +EFIAPI +GlueEfiCreateEventReadyToBoot ( + OUT EFI_EVENT *ReadyToBootEvent + ); + +/** + Create an EFI event in the Ready To Boot Event Group and allows + the caller to specify a notification function. + + This function abstracts the creation of the Ready to Boot Event. + The Framework moved from a proprietary to UEFI 2.0 based mechanism. + This library abstracts the caller from how this event is created to prevent + to code form having to change with the version of the specification supported. + If ReadyToBootEvent is NULL, then ASSERT(). + + @param NotifyTpl The task priority level of the event. + @param NotifyFunction The notification function to call when the event is signaled. + @param NotifyContext The content to pass to NotifyFunction when the event is signaled. + @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex). + + @retval EFI_SUCCESS Event was created. + @retval Other Event was not created. + +**/ +EFI_STATUS +EFIAPI +EfiCreateEventReadyToBootEx ( + IN EFI_TPL NotifyTpl, + IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL + IN VOID *NotifyContext, OPTIONAL + OUT EFI_EVENT *ReadyToBootEvent + ); + +/** + Initialize a Firmware Volume (FV) Media Device Path node. + + Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum + so as we move to UEFI 2.0 support we must use a mechanism that conforms with + the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed + device path is defined for Tiano extensions of device path. If the code + is compiled to conform with the UEFI 2.0 specification use the new device path + else use the old form for backwards compatability. + + @param FvDevicePathNode Pointer to a FV device path node to initialize + @param NameGuid FV file name to use in FvDevicePathNode + +**/ +VOID +EFIAPI +GlueEfiInitializeFwVolDevicepathNode ( + IN OUT MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode, + IN CONST EFI_GUID *NameGuid + ); + +/** + Check to see if the Firmware Volume (FV) Media Device Path is valid + + Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum + so as we move to UEFI 2.0 support we must use a mechanism that conforms with + the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed + device path is defined for Tiano extensions of device path. If the code + is compiled to conform with the UEFI 2.0 specification use the new device path + else use the old form for backwards compatability. The return value to this + function points to a location in FvDevicePathNode and it does not allocate + new memory for the GUID pointer that is returned. + + @param FvDevicePathNode Pointer to FV device path to check. + + @retval NULL FvDevicePathNode is not valid. + @retval Other FvDevicePathNode is valid and pointer to NameGuid was returned. + +**/ +EFI_GUID * +EFIAPI +GlueEfiGetNameGuidFromFwVolDevicePathNode ( + IN CONST MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode + ); + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiRuntimeServicesTableLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiRuntimeServicesTableLib.h new file mode 100644 index 0000000..6fb2ea3 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Library/EdkIIGlueUefiRuntimeServicesTableLib.h @@ -0,0 +1,31 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueUefiRuntimeServicesTableLib.h + +Abstract: + + Library that provides a global pointer to the UEFI Runtime Services Tables + +--*/ + +#ifndef __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB_H__ +#define __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB_H__ + +// +// Cached copy of the EFI Runtime Services Table +// +extern EFI_RUNTIME_SERVICES *gRT; + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcd.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcd.h new file mode 100644 index 0000000..238d37e --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcd.h @@ -0,0 +1,42 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcd.h + +Abstract: + + Fixed-at-build PCD macro expansion definitions + +--*/ + +#ifndef __EDKII_GLUE_PCD_H__ +#define __EDKII_GLUE_PCD_H__ + +// +// Redefine Pcd functions into compile time hardcoded values +// +#define FixedPcdGet8(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define FixedPcdGet16(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define FixedPcdGet32(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define FixedPcdGet64(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define FixedPcdGetBool(TokenName) __EDKII_GLUE_PCD_##TokenName##__ + +#define PcdGet8(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define PcdGet16(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define PcdGet32(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define PcdGet64(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define PcdGetPtr(TokenName) __EDKII_GLUE_PCD_##TokenName##__ +#define PcdGetBool(TokenName) __EDKII_GLUE_PCD_##TokenName##__ + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdBaseLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdBaseLib.h new file mode 100644 index 0000000..3047ae2 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdBaseLib.h @@ -0,0 +1,52 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdBaseLib.h + +Abstract: + + PCD vadues for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_BASE_LIB_H__ +#define __EDKII_GLUE_PCD_BASE_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + +#ifndef __EDKII_GLUE_PCD_PcdMaximumUnicodeStringLength__ +#define __EDKII_GLUE_PCD_PcdMaximumUnicodeStringLength__ EDKII_GLUE_MaximumUnicodeStringLength +#endif + +#ifndef __EDKII_GLUE_PCD_PcdMaximumAsciiStringLength__ +#define __EDKII_GLUE_PCD_PcdMaximumAsciiStringLength__ EDKII_GLUE_MaximumAsciiStringLength +#endif + +// +// SpinLock Pcds +// +#ifndef __EDKII_GLUE_PCD_PcdSpinLockTimeout__ +#define __EDKII_GLUE_PCD_PcdSpinLockTimeout__ EDKII_GLUE_SpinLockTimeout +#endif + +// Linked List +#ifndef __EDKII_GLUE_PCD_PcdMaximumLinkedListLength__ +#define __EDKII_GLUE_PCD_PcdMaximumLinkedListLength__ EDKII_GLUE_MaximumLinkedListLength +#endif + +#include "Pcd/EdkIIGluePcd.h" +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdDebugLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdDebugLib.h new file mode 100644 index 0000000..44431c4 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdDebugLib.h @@ -0,0 +1,50 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdDebugLib.h + +Abstract: + + PCD values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_DEBUG_LIB_H__ +#define __EDKII_GLUE_PCD_DEBUG_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + + +// +// Debug Pcds +// +#ifndef __EDKII_GLUE_PCD_PcdDebugPrintErrorLevel__ +#define __EDKII_GLUE_PCD_PcdDebugPrintErrorLevel__ EdkIIGlueGetDebugPrintErrorLevel() +#endif + + +#ifndef __EDKII_GLUE_PCD_PcdDebugPropertyMask__ +#define __EDKII_GLUE_PCD_PcdDebugPropertyMask__ EDKII_GLUE_DebugPropertyMask +#endif + + +#ifndef __EDKII_GLUE_PCD_PcdDebugClearMemoryValue__ +#define __EDKII_GLUE_PCD_PcdDebugClearMemoryValue__ EDKII_GLUE_DebugClearMemoryValue +#endif + +#include "Pcd/EdkIIGluePcd.h" +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdIoLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdIoLib.h new file mode 100644 index 0000000..320073d --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdIoLib.h @@ -0,0 +1,42 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdIoLib.h + +Abstract: + + PCD values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_IO_LIB_H__ +#define __EDKII_GLUE_PCD_IO_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + + +// +// IoBlockBaseAddressForIpf Pcd +// +#ifdef MDE_CPU_IPF +#ifndef __EDKII_GLUE_PCD_PcdIoBlockBaseAddressForIpf__ +#define __EDKII_GLUE_PCD_PcdIoBlockBaseAddressForIpf__ EDKII_GLUE_IoBlockBaseAddressForIpf +#endif +#endif + +#include "Pcd/EdkIIGluePcd.h" +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPciExpressLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPciExpressLib.h new file mode 100644 index 0000000..3d7392d --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPciExpressLib.h @@ -0,0 +1,40 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdPciExpressLib.h + +Abstract: + + PCD values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_PCI_EXPRESS_LIB_H__ +#define __EDKII_GLUE_PCD_PCI_EXPRESS_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + + +// +// PciExpress Pcds +// +#ifndef __EDKII_GLUE_PCD_PcdPciExpressBaseAddress__ +#define __EDKII_GLUE_PCD_PcdPciExpressBaseAddress__ EDKII_GLUE_PciExpressBaseAddress +#endif + +#include "Pcd/EdkIIGluePcd.h" +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPerformanceLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPerformanceLib.h new file mode 100644 index 0000000..d2599ea --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPerformanceLib.h @@ -0,0 +1,47 @@ +/*++ + +Copyright (c) 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdPerformanceLib.h + +Abstract: + + PCD values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_PERFORMANCE_LIB_H__ +#define __EDKII_GLUE_PCD_PERFORMANCE_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + +// +// Performance Lib Pcds +// +#ifndef __EDKII_GLUE_PCD_PlatformInfoMsr__ +#define __EDKII_GLUE_PCD_PlatformInfoMsr__ EDKII_GLUE_PlatformInfoMsr +#endif + +#ifndef __EDKII_GLUE_PCD_XAPICBaseMsr__ +#define __EDKII_GLUE_PCD_XAPICBaseMsr__ EDKII_GLUE_XAPICBaseMsr +#endif + +#ifndef __EDKII_GLUE_PCD_ExtXAPICLogicalAPICIdMsr__ +#define __EDKII_GLUE_PCD_ExtXAPICLogicalAPICIdMsr__ EDKII_GLUE_ExtXAPICLogicalAPICIdMsr +#endif + +#include "Pcd/EdkIIGluePcd.h" +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPostCodeLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPostCodeLib.h new file mode 100644 index 0000000..6314f3d --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdPostCodeLib.h @@ -0,0 +1,40 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdPostCodeLib.h + +Abstract: + + PCD values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_POST_CODE_LIB_H__ +#define __EDKII_GLUE_PCD_POST_CODE_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + +// +// PostCode Pcds +// +#ifndef __EDKII_GLUE_PCD_PcdPostCodePropertyMask__ +#define __EDKII_GLUE_PCD_PcdPostCodePropertyMask__ EDKII_GLUE_PostCodePropertyMask +#endif + +#include "Pcd/EdkIIGluePcd.h" + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdReportStatusCodeLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdReportStatusCodeLib.h new file mode 100644 index 0000000..25481a4 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdReportStatusCodeLib.h @@ -0,0 +1,40 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdReportStatusCodeLib.h + +Abstract: + + Pcd values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_REPORT_STATUS_CODE_LIB_H__ +#define __EDKII_GLUE_PCD_REPORT_STATUS_CODE_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + +// +// ReportStatusCode Pcds +// +#ifndef __EDKII_GLUE_PCD_PcdReportStatusCodePropertyMask__ +#define __EDKII_GLUE_PCD_PcdReportStatusCodePropertyMask__ EDKII_GLUE_ReportStatusCodePropertyMask +#endif + +#include "Pcd/EdkIIGluePcd.h" + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdTimerLib.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdTimerLib.h new file mode 100644 index 0000000..2cc6ac3 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/Pcd/EdkIIGluePcdTimerLib.h @@ -0,0 +1,40 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGluePcdTimerLib.h + +Abstract: + + PCD values for library customization + +--*/ + +#ifndef __EDKII_GLUE_PCD_TIMER_LIB_H__ +#define __EDKII_GLUE_PCD_TIMER_LIB_H__ + +// +// Following Pcd values are hard coded at compile time. +// Override these through compiler option "/D" in PlatformTools.env if needed +// + + +// +// Timer Lib Pcds +// +#ifndef __EDKII_GLUE_PCD_PcdFSBClock__ +#define __EDKII_GLUE_PCD_PcdFSBClock__ EDKII_GLUE_FSBClock +#endif + +#include "Pcd/EdkIIGluePcd.h" +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/PeimDepex.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/PeimDepex.h new file mode 100644 index 0000000..f27d5ec --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/PeimDepex.h @@ -0,0 +1,34 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + PeimDepex.h + +Abstract: + + This file is used by .dxs file. To write common .dxs for R8.x and R9, a + header file named PeimDepex.h musted be present. + +--*/ + + +#ifndef __EDKII_GLUELIB_PEIMDEPEX_H__ +#define __EDKII_GLUELIB_PEIMDEPEX_H__ + + +// +// this file is used by .dxs file, just a place holder +// + + +#endif diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Include/x64/EdkIIGlueProcessorBind.h b/EDK/Foundation/Library/EdkIIGlueLib/Include/x64/EdkIIGlueProcessorBind.h new file mode 100644 index 0000000..4363dda --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Include/x64/EdkIIGlueProcessorBind.h @@ -0,0 +1,41 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + EdkIIGlueProcessorBind.h + +Abstract: + + Processor specific definitions + +--*/ + +#ifndef __EDKII_GLUE_PROCESSOR_BIND_H__ +#define __EDKII_GLUE_PROCESSOR_BIND_H__ + +// +// The Microsoft* C compiler can removed references to unreferenced data items +// if the /OPT:REF linker option is used. We defined a macro as this is a +// a non standard extension +// +#if _MSC_EXTENSIONS + #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany) +#else + #define GLOBAL_REMOVE_IF_UNREFERENCED +#endif + +#ifndef MDE_CPU_X64 + #define MDE_CPU_X64 +#endif + +#endif |