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authorraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
committerraywu <raywu0301@gmail.com>2018-06-15 00:00:50 +0800
commitb7c51c9cf4864df6aabb99a1ae843becd577237c (patch)
treeeebe9b0d0ca03062955223097e57da84dd618b9a /ReferenceCode/Chipset/LynxPoint/SmmControl/Pei
downloadzprj-b7c51c9cf4864df6aabb99a1ae843becd577237c.tar.xz
init. 1AQQW051HEADmaster
Diffstat (limited to 'ReferenceCode/Chipset/LynxPoint/SmmControl/Pei')
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.cif13
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.mak93
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.sdl24
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.dxs35
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.inf76
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.c282
-rw-r--r--ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.h95
7 files changed, 618 insertions, 0 deletions
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.cif b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.cif
new file mode 100644
index 0000000..4d83025
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.cif
@@ -0,0 +1,13 @@
+<component>
+ name = "PeiSmmControl"
+ category = ModulePart
+ LocalRoot = "ReferenceCode\Chipset\LynxPoint\SmmControl\Pei\"
+ RefName = "PeiSmmControl"
+[files]
+"PeiSmmControl.sdl"
+"PeiSmmControl.mak"
+"SmmControl.dxs"
+"SmmControl.inf"
+"SmmControlDriver.c"
+"SmmControlDriver.h"
+<endComponent>
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.mak b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.mak
new file mode 100644
index 0000000..5199538
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.mak
@@ -0,0 +1,93 @@
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#**********************************************************************
+
+#**********************************************************************
+# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PeiSmmControl/PeiSmmControl.mak 1 9/26/12 3:34a Victortu $
+#
+# $Revision: 1 $
+#
+# $Date: 9/26/12 3:34a $
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PeiSmmControl/PeiSmmControl.mak $
+#
+# 1 9/26/12 3:34a Victortu
+# Lynx Point PCH Chipset Framework Reference Code Beta 0.7.0
+#
+# 6 1/13/10 2:13p Felixp
+#
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name: PeiSmmControl.mak
+#
+# Description:
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+EDK : PeiSmmControl
+
+PeiSmmControl : $(BUILD_DIR)\PeiSmmControl.mak PeiSmmControlBin
+
+$(BUILD_DIR)\PeiSmmControl.mak : $(PeiSmmControl_DIR)\$(@B).cif $(PeiSmmControl_DIR)\$(@B).mak $(BUILD_RULES)
+ $(CIF2MAK) $(PeiSmmControl_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+PeiSmmControl_INCLUDES=\
+ $(EDK_INCLUDES)\
+ $(EdkIIGlueLib_INCLUDES)\
+ $(INTEL_PCH_INCLUDES)\
+
+PeiSmmControl_DEFINES = $(MY_DEFINES)\
+ /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=SmmControlPeiDriverEntryInit"\
+ /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ /D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__
+
+PeiSmmControl_LIB_LINKS =\
+ $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+ $(EdkIIGlueBaseMemoryLib_LIB)\
+ $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\
+ $(EdkIIGluePeiReportStatusCodeLib_LIB)\
+ $(EdkIIGluePeiServicesLib_LIB)\
+ $(EdkIIGlueBasePciLibPciExpress_LIB)\
+
+PeiSmmControlBin : $(PeiSmmControl_LIB_LINKS)
+ $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+ /f $(BUILD_DIR)\PeiSmmControl.mak all\
+ "MY_INCLUDES=$(PeiSmmControl_INCLUDES)" \
+ "MY_DEFINES=$(PeiSmmControl_DEFINES)" \
+ GUID=FF456B9C-0DC7-4682-9E92-0DE84B6E4067\
+ ENTRY_POINT=_ModuleEntryPoint \
+ TYPE=PEIM \
+ EDKIIModule=PEIM\
+ DEPEX1=$(PeiSmmControl_DIR)\SmmControl.dxs\
+ DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\
+ COMPRESS=0
+#**********************************************************************
+#**********************************************************************
+#** **
+#** (C)Copyright 1985-2010, American Megatrends, Inc. **
+#** **
+#** All Rights Reserved. **
+#** **
+#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
+#** **
+#** Phone: (770)-246-8600 **
+#** **
+#**********************************************************************
+#********************************************************************** \ No newline at end of file
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.sdl b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.sdl
new file mode 100644
index 0000000..8470880
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/PeiSmmControl.sdl
@@ -0,0 +1,24 @@
+TOKEN
+ Name = PeiSmmControl_SUPPORT
+ Value = 1
+ TokenType = Boolean
+ TargetEQU = Yes
+ TargetMAK = Yes
+ Master = Yes
+ Help = "Main switch to enable PeiSmmControl support in Project"
+End
+
+MODULE
+ Help = "Includes PeiSmmControl.mak to Project"
+ File = "PeiSmmControl.mak"
+End
+
+PATH
+ Name = "PeiSmmControl_DIR"
+End
+
+ELINK
+ Name = "$(BUILD_DIR)\PeiSmmControl.ffs"
+ Parent = "FV_BB"
+ InvokeOrder = AfterParent
+End \ No newline at end of file
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.dxs b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.dxs
new file mode 100644
index 0000000..2ff2cf2
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.dxs
@@ -0,0 +1,35 @@
+/** @file
+ @todo ADD DESCRIPTION
+
+@copyright
+ Copyright (c) 2005 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains a 'Sample Driver' and is licensed as such
+ under the terms of your license agreement with Intel or your
+ vendor. This file may be modified by the user, subject to
+ the additional terms of the license agreement
+
+**/
+
+//
+// Same for R8 and R9 codebase
+//
+#include "AutoGen.h"
+#include "PeimDepex.h"
+//
+// For R8 only
+//
+#ifdef BUILD_WITH_EDKII_GLUE_LIB
+#include "EfiDepex.h"
+
+#endif
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.inf b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.inf
new file mode 100644
index 0000000..f65db70
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControl.inf
@@ -0,0 +1,76 @@
+## @file
+# Component description file for SmmControl module
+#
+#@copyright
+# Copyright (c) 1999 - 2013 Intel Corporation. All rights reserved
+# This software and associated documentation (if any) is furnished
+# under a license and may only be used or copied in accordance
+# with the terms of the license. Except as permitted by such
+# license, no part of this software or documentation may be
+# reproduced, stored in a retrieval system, or transmitted in any
+# form or by any means without the express written consent of
+# Intel Corporation.
+#
+# This file contains a 'Sample Driver' and is licensed as such
+# under the terms of your license agreement with Intel or your
+# vendor. This file may be modified by the user, subject to
+# the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME = SmmControl
+FILE_GUID = FF456B9C-0DC7-4682-9E92-0DE84B6E4067
+COMPONENT_TYPE = PE32_PEIM
+
+[sources.common]
+ SmmControlDriver.h
+ SmmControlDriver.c
+#
+# Edk II Glue Driver Entry Point
+#
+ EdkIIGluePeimEntryPoint.c
+
+[includes.common]
+ .
+ $(EDK_SOURCE)/Foundation/Efi
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EDK_SOURCE)/Foundation/Include/Pei
+ $(EDK_SOURCE)/Foundation/Library/Pei/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include
+ $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library
+ $(EFI_SOURCE)/Library/Include
+ $(EFI_SOURCE)/Include
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EFI_SOURCE)
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+
+[libraries.common]
+ EdkIIGlueBaseIoLibIntrinsic
+ EdkIIGlueBaseMemoryLib
+ EdkIIGluePeiDebugLibReportStatusCode
+ EdkIIGluePeiReportStatusCodeLib
+ EdkIIGluePeiServicesLib
+ EdkIIGlueBasePciLibPciExpress
+
+[nmake.common]
+ IMAGE_ENTRY_POINT=_ModuleEntryPoint
+ DPX_SOURCE=SmmControl.dxs
+#
+# Module Entry Point
+#
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=SmmControlPeiDriverEntryInit
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+ -D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+ -D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \
+ -D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \
+ -D __EDKII_GLUE_PEI_SERVICES_LIB__ \
+ -D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.c b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.c
new file mode 100644
index 0000000..a4638e8
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.c
@@ -0,0 +1,282 @@
+/** @file
+ This is the driver that publishes the SMM Control Ppi.
+
+@copyright
+ Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#include "SmmControlDriver.h"
+
+EFI_GUID mPeiSmmControlPpiGuid = PEI_SMM_CONTROL_PPI_GUID;
+
+STATIC PEI_SMM_CONTROL_PPI mSmmControlPpi = {
+ PeiActivate,
+ PeiDeactivate
+};
+
+STATIC EFI_PEI_PPI_DESCRIPTOR mPpiList = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &mPeiSmmControlPpiGuid,
+ &mSmmControlPpi
+};
+
+EFI_PEIM_ENTRY_POINT (SmmControlPeiDriverEntryInit)
+
+/**
+ This is the constructor for the SMM Control ppi
+
+ @param[in] FfsHeader FfsHeader.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_STATUS Results of the installation of the SMM Control Ppi
+**/
+EFI_STATUS
+EFIAPI
+SmmControlPeiDriverEntryInit (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+
+ Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Trigger the software SMI
+
+ @param[in] Data The value to be set on the software SMI data port
+
+ @retval EFI_SUCCESS Function completes successfully
+**/
+EFI_STATUS
+EFIAPI
+SmmTrigger (
+ IN UINT8 Data
+ )
+{
+ UINT32 OutputData;
+ UINT32 OutputPort;
+ UINT32 PmBase;
+
+ PmBase = MmioRead32 (
+ MmPciAddress (0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LPC,
+ PCI_FUNCTION_NUMBER_PCH_LPC,
+ R_PCH_LPC_ACPI_BASE)
+ ) & B_PCH_LPC_ACPI_BASE_BAR;
+
+ ///
+ /// Enable the APMC SMI
+ ///
+ OutputPort = PmBase + R_PCH_SMI_EN;
+ OutputData = IoRead32 ((UINTN) OutputPort);
+ OutputData |= (B_PCH_SMI_EN_APMC | B_PCH_SMI_EN_GBL_SMI);
+ DEBUG (
+ (EFI_D_INFO,
+ "The SMI Control Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+ );
+ IoWrite32 (
+ (UINTN) OutputPort,
+ (UINT32) (OutputData)
+ );
+
+ OutputPort = R_PCH_APM_CNT;
+ OutputData = Data;
+
+ ///
+ /// Generate the APMC SMI
+ ///
+ IoWrite8 (
+ (UINTN) OutputPort,
+ (UINT8) (OutputData)
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Clear the SMI status
+
+ @param[in] None
+
+ @retval EFI_SUCCESS The function completes successfully
+ @retval EFI_DEVICE_ERROR Something error occurred
+**/
+EFI_STATUS
+EFIAPI
+SmmClear (
+ VOID
+ )
+{
+ UINT32 OutputData;
+ UINT32 OutputPort;
+ UINT32 PmBase;
+
+ PmBase = MmioRead32 (
+ MmPciAddress (0,
+ DEFAULT_PCI_BUS_NUMBER_PCH,
+ PCI_DEVICE_NUMBER_PCH_LPC,
+ PCI_FUNCTION_NUMBER_PCH_LPC,
+ R_PCH_LPC_ACPI_BASE)
+ ) & B_PCH_LPC_ACPI_BASE_BAR;
+
+ ///
+ /// Clear the Power Button Override Status Bit, it gates EOS from being set.
+ ///
+ OutputPort = PmBase + R_PCH_ACPI_PM1_STS;
+ OutputData = B_PCH_ACPI_PM1_STS_PRBTNOR;
+ DEBUG (
+ (EFI_D_INFO,
+ "The PM1 Status Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+ );
+ IoWrite16 (
+ (UINTN) OutputPort,
+ (UINT16) (OutputData)
+ );
+
+ ///
+ /// Clear the APM SMI Status Bit
+ ///
+ OutputPort = PmBase + R_PCH_SMI_STS;
+ OutputData = B_PCH_SMI_STS_APM;
+ DEBUG (
+ (EFI_D_INFO,
+ "The SMI Status Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+ );
+ IoWrite32 (
+ (UINTN) OutputPort,
+ (UINT32) (OutputData)
+ );
+
+ ///
+ /// Set the EOS Bit
+ ///
+ OutputPort = PmBase + R_PCH_SMI_EN;
+ OutputData = IoRead32 ((UINTN) OutputPort);
+ OutputData |= B_PCH_SMI_EN_EOS;
+ DEBUG (
+ (EFI_D_INFO,
+ "The SMI Control Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+ );
+ IoWrite32 (
+ (UINTN) OutputPort,
+ (UINT32) (OutputData)
+ );
+
+ ///
+ /// If the EOS bit did not get set, then we've got a problem.
+ ///
+ DEBUG_CODE (
+ OutputData = IoRead32 ((UINTN) OutputPort);
+ if ((OutputData & B_PCH_SMI_EN_EOS) != B_PCH_SMI_EN_EOS) {
+ DEBUG ((EFI_D_ERROR, "Bugger, EOS did not get set!\n"));
+ return EFI_DEVICE_ERROR;
+ }
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This routine generates an SMI
+
+ @param[in] PeiServices General purpose services available to every PEIM.
+ @param[in] This The EFI SMM Control ppi instance
+ @param[in, out] ArgumentBuffer The buffer of argument
+ @param[in, out] ArgumentBufferSize The size of the argument buffer
+ @param[in] Periodic Periodic or not
+ @param[in] ActivationInterval Interval of periodic SMI
+
+ @retval EFI Status Describing the result of the operation
+ @retval EFI_INVALID_PARAMETER Some parameter value passed is not supported
+**/
+EFI_STATUS
+EFIAPI
+PeiActivate (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_CONTROL_PPI *This,
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,
+ IN BOOLEAN Periodic OPTIONAL,
+ IN UINTN ActivationInterval OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ UINT8 Data;
+
+ if (Periodic) {
+ DEBUG ((EFI_D_WARN, "Invalid parameter\n"));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (ArgumentBuffer == NULL) {
+ Data = 0xFF;
+ } else {
+ if (ArgumentBufferSize == NULL || *ArgumentBufferSize != 1) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Data = *ArgumentBuffer;
+ }
+ ///
+ /// Clear any pending the APM SMI
+ ///
+ Status = SmmClear ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ return SmmTrigger (Data);
+}
+
+/**
+ This routine clears an SMI
+
+ @param[in] PeiServices General purpose services available to every PEIM.
+ @param[in] This The EFI SMM Control ppi instance
+ @param[in] Periodic Periodic or not
+
+ @retval EFI Status Describing the result of the operation
+ @retval EFI_INVALID_PARAMETER Some parameter value passed is not supported
+**/
+EFI_STATUS
+EFIAPI
+PeiDeactivate (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_CONTROL_PPI *This,
+ IN BOOLEAN Periodic OPTIONAL
+ )
+{
+ if (Periodic) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ return SmmClear ();
+}
+
diff --git a/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.h b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.h
new file mode 100644
index 0000000..1cc28b3
--- /dev/null
+++ b/ReferenceCode/Chipset/LynxPoint/SmmControl/Pei/SmmControlDriver.h
@@ -0,0 +1,95 @@
+/** @file
+ Header file for SMM Control Driver.
+
+@copyright
+ Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+ This software and associated documentation (if any) is furnished
+ under a license and may only be used or copied in accordance
+ with the terms of the license. Except as permitted by such
+ license, no part of this software or documentation may be
+ reproduced, stored in a retrieval system, or transmitted in any
+ form or by any means without the express written consent of
+ Intel Corporation.
+
+ This file contains an 'Intel Peripheral Driver' and uniquely
+ identified as "Intel Reference Module" and is
+ licensed for Intel CPUs and chipsets under the terms of your
+ license agreement with Intel or your vendor. This file may
+ be modified by the user, subject to additional terms of the
+ license agreement
+**/
+#ifndef _EFI_PEI_SMM_CONTROL_DRIVER_H_
+#define _EFI_PEI_SMM_CONTROL_DRIVER_H_
+
+#include "EdkIIGluePeim.h"
+#include "Pci22.h"
+
+//
+// Driver private data
+//
+#include EFI_PPI_DEFINITION (SmmControl)
+#include "PchAccess.h"
+#include "PchPlatformLib.h"
+
+//
+// Prototypes
+//
+
+/**
+ This is the constructor for the SMM Control ppi
+
+ @param[in] FfsHeader FfsHeader.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_STATUS Results of the installation of the SMM Control Ppi
+**/
+EFI_STATUS
+EFIAPI
+SmmControlPeiDriverEntryInit (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ This routine generates an SMI
+
+ @param[in] PeiServices General purpose services available to every PEIM.
+ @param[in] This The EFI SMM Control ppi instance
+ @param[in, out] ArgumentBuffer The buffer of argument
+ @param[in, out] ArgumentBufferSize The size of the argument buffer
+ @param[in] Periodic Periodic or not
+ @param[in] ActivationInterval Interval of periodic SMI
+
+ @retval EFI Status Describing the result of the operation
+ @retval EFI_INVALID_PARAMETER Some parameter value passed is not supported
+**/
+EFI_STATUS
+EFIAPI
+PeiActivate (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_CONTROL_PPI *This,
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,
+ IN BOOLEAN Periodic OPTIONAL,
+ IN UINTN ActivationInterval OPTIONAL
+ );
+
+/**
+ This routine clears an SMI
+
+ @param[in] PeiServices General purpose services available to every PEIM.
+ @param[in] This The EFI SMM Control ppi instance
+ @param[in] Periodic Periodic or not
+
+ @retval EFI Status Describing the result of the operation
+ @retval EFI_INVALID_PARAMETER Some parameter value passed is not supported
+**/
+EFI_STATUS
+EFIAPI
+PeiDeactivate (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SMM_CONTROL_PPI *This,
+ IN BOOLEAN Periodic OPTIONAL
+ );
+
+#endif