diff options
| author | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
|---|---|---|
| committer | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
| commit | b7c51c9cf4864df6aabb99a1ae843becd577237c (patch) | |
| tree | eebe9b0d0ca03062955223097e57da84dd618b9a /ReferenceCode/ME/ActiveManagement | |
| download | zprj-b7c51c9cf4864df6aabb99a1ae843becd577237c.tar.xz | |
Diffstat (limited to 'ReferenceCode/ME/ActiveManagement')
52 files changed, 10823 insertions, 0 deletions
diff --git a/ReferenceCode/ME/ActiveManagement/ActiveManagement.cif b/ReferenceCode/ME/ActiveManagement/ActiveManagement.cif new file mode 100644 index 0000000..9730d82 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/ActiveManagement.cif @@ -0,0 +1,14 @@ +<component> + name = "ActiveManagement" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\" + RefName = "ActiveManagement" +[files] +"ActiveManagement.sdl" +[parts] +"AmtBootOptions" +"AlertStandardFormat" +"IdeRController" +"PciSerial" +"StartWatchDog" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/ActiveManagement.sdl b/ReferenceCode/ME/ActiveManagement/ActiveManagement.sdl new file mode 100644 index 0000000..7f4c373 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/ActiveManagement.sdl @@ -0,0 +1,16 @@ +TOKEN + Name = "iAMT_SUPPORT" + Value = "1" + Help = "Main switch to enable iAMT support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + TargetH = Yes + Master = Yes + Token = "iME_SUPPORT" "=" "1" +End + +PATH + Name = "AMT_DIR" + Help = "iAMT Driver files source directory" +End diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/AlertStandardFormat.cif b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/AlertStandardFormat.cif new file mode 100644 index 0000000..ad65d2c --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/AlertStandardFormat.cif @@ -0,0 +1,12 @@ +<component> + name = "AlertStandardFormat" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\AlertStandardFormat\Heci\" + RefName = "AlertStandardFormat" +[files] +"AlertStandardFormat.sdl" +[parts] +"AlertStandardFormatCommon" +"AlertStandardFormatDxe" +"AlertStandardFormatPei" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/AlertStandardFormat.sdl b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/AlertStandardFormat.sdl new file mode 100644 index 0000000..d02eb68 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/AlertStandardFormat.sdl @@ -0,0 +1,19 @@ +TOKEN + Name = AlertStandardFormat_SUPPORT + Value = 1 + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable AlertStandardFormat support in Project" +End + +PATH + Name = "AlertStandardFormat_SOURCE" + Help = "AlertStandardFormat Driver files source directory" +End + +ELINK + Name = "AlertStandardFormat_INCLUDES" + InvokeOrder = ReplaceParent +End diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.c b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.c new file mode 100644 index 0000000..7f5bf69 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.c @@ -0,0 +1,1561 @@ +/** @file + Processes ASF messages + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +EFI_ASF_DATA_HUB_MAP mAsfProgressDataHubMap[] = { + { + EfiAsfMessageBiosPresent, + EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_POWER_ON_INIT + }, + { + EfiAsfMessageMemInit, + EFI_COMPUTING_UNIT_MEMORY | EFI_CU_HP_PC_RAM_INIT + }, + { + EfiAsfMessageMemInitDone, + EFI_COMPUTING_UNIT_MEMORY | EFI_CU_PC_INIT_END + }, + { + EfiAsfMessageCacheInit, + EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_CACHE_INIT + }, + { + EfiAsfMessageSmbusInit, + EFI_IO_BUS_SMBUS | EFI_P_PC_ENABLE + }, + { + EfiAsfMessageOSWakeVector, + EFI_SOFTWARE_PEI_MODULE | EFI_SW_DXE_RT_PC_S3 + }, + { + EfiAsfMessageMotherBoardInit, + EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PC_INIT_BEGIN + }, + { + EfiAsfMessageBspInit, + EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_BSP_SELECT + }, +#ifndef ASF_PEI + { + EfiAsfMessageHddInit, + EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_ENABLE + }, + { + EfiAsfMessageApInit, + EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_AP_INIT + }, + { + EfiAsfMessageUserAuthentication, + EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_AUTHENTICATE_BEGIN + }, + { + EfiAsfMessageUserInitSetup, + EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_USER_SETUP + }, + { + EfiAsfMessageUsbResourceConfig, + EFI_IO_BUS_USB | EFI_P_PC_ENABLE + }, + { + EfiAsfMessagePciResourceConfig, + EFI_IO_BUS_PCI | EFI_IOB_PCI_PC_BUS_ENUM + }, + { + EfiAsfMessageOptionRomInit, + EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT + }, + { + EfiAsfMessageVideoInit, + EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_PC_ENABLE + }, + { + EfiAsfMessageKbcInit, + EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_ENABLE + }, + { + EfiAsfMessageEmControllerInit, + EFI_PERIPHERAL_EMBEDDED_CONTROLLER | EFI_P_PC_INIT + }, + { + EfiAsfMessageDockAttached, + EFI_PERIPHERAL_DOCK | EFI_P_PC_INIT + }, + { + EfiAsfMessageEnableDock, + EFI_PERIPHERAL_DOCK | EFI_P_PC_ENABLE + }, + { + EfiAsfMessageDockEject, + EFI_PERIPHERAL_DOCK | EFI_P_PC_RESET + }, + { + EfiAsfMessageDisableDock, + EFI_PERIPHERAL_DOCK | EFI_P_PC_DISABLE + }, + { + EfiAsfMessageFdcInit, + EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_ENABLE + }, + { + EfiAsfMessageKeyboardTest, + EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_PC_SELF_TEST + }, + { + EfiAsfMessageMouseTest, + EFI_PERIPHERAL_MOUSE | EFI_P_MOUSE_PC_SELF_TEST + }, + { + EfiAsfMessageAmtBxDone, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_OPROM_DONE + }, + { + EfiAsfMessageBatteryPresenceDetected, + EFI_PERIPHERAL_BATTERY | EFI_P_PC_PRESENCE_DETECT + }, +#endif +}; + +EFI_ASF_DATA_HUB_MAP mAsfErrorDataHubMap[] = { + { + EfiAsfMessageNoMemory, + EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_DETECTED + }, + { + EfiAsfMessageMemoryFailure, + EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_USEFUL + }, + { + EfiAsfMessageBoardFailure, + EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_EC_NOT_CONFIGURED + }, + { + EfiAsfMessageFirmwareCorruption, + EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_CORE_EC_DXE_CORRUPT + }, + { + EfiAsfMessageChassisIntrusion, + EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CHIPSET_PC_INTRUDER_DETECT + }, +#ifndef ASF_PEI + { + EfiAsfMessageHddFailure, + EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_NOT_DETECTED + }, + { + EfiAsfMessageFdcFailure, + EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_CONTROLLER_ERROR + }, + { + EfiAsfMessageHdcFailure, + EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_CONTROLLER_ERROR + }, + { + EfiAsfMessageKbdFailure, + EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED + }, + { + EfiAsfMessageNoFdd, + EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_NOT_DETECTED + }, + { + EfiAsfMessageVideoControllerFailure, + EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_CONTROLLER_ERROR + }, + { + EfiAsfMessageNoVideo, + EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_DETECTED + }, + { + EfiAsfMessageCpuVidMismatch, + EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_VID_MISMATCH + }, + { + EfiAsfMessageCpuSpeedMatchingFailure, + EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SPEED_MATCHING_FAILURE + }, + { + EfiAsfMessageNoBootMedia, + EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_NO_BOOT_MEDIA + }, + { + EfiAsfMessageUserAuthenticationInvalid, + EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_AUTHENTICATE_USER_INVALID + }, + { + EfiAsfMessageHddAuthenticationInvalid, + EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_AUTHENTICATE_HDD_INVALID, + }, + { + EfiAsfMessageTemperatureGenericCritical, + EFI_PERIPHERAL_TEMPERATURE | EFI_P_TEMERATURE_EC_GENERIC_CRITICAL + }, + { + EfiAsfMessageTemperatureOverCritical, + EFI_PERIPHERAL_TEMPERATURE | EFI_P_TEMERATURE_EC_OVER_CRITICAL + }, + { + EfiAsfMessageTemperatureUnderCritical, + EFI_PERIPHERAL_TEMPERATURE | EFI_P_TEMERATURE_EC_UNDER_CRITICAL + }, + { + EfiAsfMessageVoltageGenericCritical, + EFI_PERIPHERAL_VOLTAGE | EFI_P_VOLTAGE_EC_GENERIC_CRITICAL + }, + { + EfiAsfMessageVoltageOverCritical, + EFI_PERIPHERAL_VOLTAGE | EFI_P_VOLTAGE_EC_OVER_CRITICAL + }, + { + EfiAsfMessageVoltageUnderCritical, + EFI_PERIPHERAL_VOLTAGE | EFI_P_VOLTAGE_EC_UNDER_CRITICAL + }, + { + EfiAsfMessageFanGenericCritical, + EFI_PERIPHERAL_FAN | EFI_P_FAN_EC_GENERIC_CRITICAL + }, + { + EfiAsfMessageFanPredictiveFailure, + EFI_PERIPHERAL_FAN | EFI_P_FAN_EC_PREDICTIVE_FAILURE + }, + { + EfiAsfMessageFanLowSpeedCritical, + EFI_PERIPHERAL_FAN | EFI_P_FAN_EC_LOW_SPEED_CRITICAL + }, + { + EfiAsfMessageBatteryLowCritical, + EFI_PERIPHERAL_BATTERY | EFI_P_BATTERY_EC_LOW_CRITICAL + }, + { + EfiAsfMessageTemperatureGenericWarning, + EFI_PERIPHERAL_TEMPERATURE | EFI_P_TEMERATURE_PC_GENERIC_WARNING + }, + { + EfiAsfMessageTemperatureOverWarning, + EFI_PERIPHERAL_TEMPERATURE | EFI_P_TEMERATURE_PC_OVER_WARNING + }, + { + EfiAsfMessageTemperatureUnderWarning, + EFI_PERIPHERAL_TEMPERATURE | EFI_P_TEMERATURE_PC_UNDER_WARNING + }, + { + EfiAsfMessageFanLowSpeedWarning, + EFI_PERIPHERAL_FAN | EFI_P_FAN_PC_LOW_SPEED_WARNING + }, + { + EfiAsfMessageBatteryLowWarning, + EFI_PERIPHERAL_BATTERY | EFI_P_BATTERY_PC_LOW_WARNING + }, + { + EfiAsfMessagePowerFailure, + EFI_PERIPHERAL_POWER_SUPPLY | EFI_P_BATTERY_PC_LOW_WARNING + }, + { + EfiAsfMessageAmtBxNotStarted, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_OPROM_NOT_STARTED + }, + { + EfiAsfMessageAmtBxSleepS4ReportedNotTaken, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_SLEEP_S4_NOT_TAKEN + }, + { + EfiAsfMessageAmtBxSleepS5ReportedNotTaken, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_SLEEP_S5_NOT_TAKEN + }, + { + EfiAsfMessageAmtBxSleepUnspecifiedReportedNotTaken, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_SLEEP_UNSPECD_NOT_TAKEN + }, + { + EfiAsfMessageAmtBxErrActionIntF, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_ERROR_ACTION_INTF + }, + { + EfiAsfMessageAmtBxErrActionInv, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_ERROR_ACTION_INV + }, + { + EfiAsfMessageAmtBxErrActionSetup, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_ERROR_ACTION_SETUP + }, + { + EfiAsfMessageAmtBxErrActionFailure, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_ERROR_ACTION_FAIL + }, + { + EfiAsfMessageAmtBxErrActionUnspecified, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_ERROR_ACTION_UNSPECD + }, + { + EfiAsfMessageAmtBxOtherUnspecified, + EFI_SOFTWARE_UNSPECIFIED | EFI_SW_DXE_AMTBX_OTHER_UNSPECD + }, +#endif +}; + +EFI_ASF_FRAMEWORK_MESSAGE mAsfFrameworkMessage[] = { + { + EfiAsfMessageBiosPresent, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_ENTITY_PRESENCE, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_BIOS, + 0, + 0x40, + EFI_ASF_FP_BOARD_INIT + } + }, + { + EfiAsfMessageMemInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_MEMORY, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_MEMORY_INIT + } + }, + { + EfiAsfMessageMemInitDone, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS | 0x80, // Exit + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_MEMORY, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_MEMORY_INIT + } + }, + { + EfiAsfMessageCacheInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_PROCESSOR, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_CACHE_INIT + } + }, + { + EfiAsfMessageSmbusInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_SMBUS_INIT + } + }, + { + EfiAsfMessageOSWakeVector, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_UNSPECIFIED, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_WAKE_OS + } + }, + { + EfiAsfMessageMotherBoardInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_BOARD_INIT + } + }, + // + // Error Event + // + { + EfiAsfMessageNoMemory, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_MEMORY, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_NO_MEMORY + } + }, + { + EfiAsfMessageMemoryFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_MEMORY, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_MEMORY_FAILURE + } + }, + { + EfiAsfMessageBoardFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_BOARD_FAILURE + } + }, + { + EfiAsfMessageFirmwareCorruption, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Insnce + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_ROM_CORRUPTED + } + }, + // + // Chassis Intrusion + // + { + EfiAsfMessageChassisIntrusion, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_CHASSIS_INTRUSION, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_CHASSIS_INTRUSION_GENERIC, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, +#ifndef ASF_PEI + // + // Progress Event + // + { + EfiAsfMessageHddInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_HDD_INIT + } + }, + { + EfiAsfMessageApInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_PROCESSOR, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_AP_INIT + } + }, + { + EfiAsfMessageUserAuthentication, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_BIOS, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_USER_AUTHENTICATION + } + }, + { + EfiAsfMessageUserInitSetup, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_BIOS, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_USER_SETUP + } + }, + { + EfiAsfMessageUsbResourceConfig, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_BIOS, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_USB_RESOURCE_CONFIG + } + }, + { + EfiAsfMessagePciResourceConfig, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_BIOS, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_PCI_RESOURCE_CONFIG + } + }, + { + EfiAsfMessageOptionRomInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_ADDIN_CARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_OPTION_ROM_INIT + } + }, + { + EfiAsfMessageVideoInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_VIDEO_INIT + } + }, + { + EfiAsfMessageKbcInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_KBC_INIT + } + }, + { + EfiAsfMessageEmControllerInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_EC_INIT + } + }, + { + EfiAsfMessageDockAttached, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_ATTACH_DOCK + } + }, + { + EfiAsfMessageEnableDock, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_ENABLE_DOCK + } + }, + { + EfiAsfMessageDockEject, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_EJECT_DOCK + } + }, + { + EfiAsfMessageDisableDock, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_DISABLE_DOCK + } + }, + { + EfiAsfMessageFdcInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_FDC_INIT + } + }, + { + EfiAsfMessageKeyboardTest, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_KBD_TEST + } + }, + { + EfiAsfMessageMouseTest, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_MOUSE_TEST + } + }, + { + EfiAsfMessageBspInit, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_PROCESSOR, + 0, // Instance + EFI_ASF_FP_EVENT_DATA0, + EFI_ASF_FP_BSP_INIT + } + }, + // + // Error Event + // + { + EfiAsfMessageHddFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_HDD_FAILURE + } + }, + { + EfiAsfMessageFdcFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_FDC_FAILURE + } + }, + { + EfiAsfMessageHdcFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_HDC_FAILURE + } + }, + { + EfiAsfMessageKbdFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_KBD_FAILURE + } + }, + { + EfiAsfMessageNoFdd, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_REMOVABLE_BOOT_MEDIA_NOT_FOUND + } + }, + { + EfiAsfMessageVideoControllerFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_VIDEO_CONTROLLER_FAILURE + } + }, + { + EfiAsfMessageNoVideo, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_VIDEO_DEVICE_NOT_FOUND + } + }, + { + EfiAsfMessageCpuVidMismatch, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_PROCESSOR, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_CPU_VOLTAGE_FAILURE + } + }, + { + EfiAsfMessageCpuSpeedMatchingFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_PROCESSOR, + 0, // Instance + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_CPU_MISMATCH_FAILURE + } + }, + { + EfiAsfMessageUserAuthenticationInvalid, + { + EFI_ASF_MESSAGE_SUBCOMMAND_RETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SECURITY_VIOLATION, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_USER_PASSWORD, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_BIOS, + 0, // Instance + } + }, + { + EfiAsfMessageHddAuthenticationInvalid, + { + EFI_ASF_MESSAGE_SUBCOMMAND_RETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SECURITY_VIOLATION, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_OTHER_PASSWORD, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_BIOS, + 0, // Instance + } + }, + // + // Boot Error + // + { + EfiAsfMessageNoBootMedia, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_DISK, + 0, // Insnce + EFI_ASF_FE_EVENT_DATA0, + EFI_ASF_FE_REMOVABLE_BOOT_MEDIA_NOT_FOUND + } + }, + { + EfiAsfMessageAmtBxDone, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FP_AMTBX_INIT + } + }, + { + EfiAsfMessageAmtBxNotStarted, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxSleepS4ReportedNotTaken, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxSleepS5ReportedNotTaken, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxSleepUnspecifiedReportedNotTaken, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxErrActionIntF, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxErrActionInv, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxErrActionSetup, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxErrActionFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxErrActionUnspecified, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + { + EfiAsfMessageAmtBxOtherUnspecified, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + 0xFF, + 0xFF, + EFI_ASF_ENTITY_INTEL_AMT, + 0, + 0x40, + EFI_ASF_FE_AMTBX_FAILURE + } + }, + // + // Temperature + // + { + EfiAsfMessageTemperatureGenericCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE, + EFI_ASF_EVENT_TYPE_SEVERITY_STATE, + EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageTemperatureGenericWarning, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE, + EFI_ASF_EVENT_TYPE_SEVERITY_STATE, + EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_NONCRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageTemperatureOverCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageTemperatureOverWarning, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_NONCRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageTemperatureUnderCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageTemperatureUnderWarning, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_NONCRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + // + // Voltage + // + { + EfiAsfMessageVoltageGenericCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_VOLTAGE, + EFI_ASF_EVENT_TYPE_SEVERITY_STATE, + EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageVoltageOverCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_VOLTAGE, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageVoltageUnderCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_VOLTAGE, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + // + // Fan + // + { + EfiAsfMessageFanGenericCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_FAN, + EFI_ASF_EVENT_TYPE_SEVERITY_STATE, + EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageFanPredictiveFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_FAN, + EFI_ASF_EVENT_TYPE_DISCRETE_EVENT_PREDICTIVE_FAIL, + EFI_ASF_EVENT_OFFSET_DISCRETE_EVENT_PREDICTIVE_FAIL_ASSERT, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageFanLowSpeedCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_FAN, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + { + EfiAsfMessageFanLowSpeedWarning, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_FAN, + EFI_ASF_EVENT_TYPE_THRESHOLD_BASED, + EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_NONCRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Instance + } + }, + // + // Battery + // + { + EfiAsfMessageBatteryLowWarning, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_BATTERY, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_BATTERY_LOW_WARNING, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_POWER_SUPPLY, + 0, // Instance + } + }, + { + EfiAsfMessageBatteryLowCritical, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_BATTERY, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_BATTERY_LOW_CRITICAL, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_POWER_SUPPLY, + 0, // Insnce + } + }, + { + EfiAsfMessageBatteryPresenceDetected, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_BATTERY, + EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC, + EFI_ASF_EVENT_OFFSET_BATTERY_PRESENCE_DETECTED, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_MONITOR, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_POWER_SUPPLY, + 0, // Insnce + } + }, + { + EfiAsfMessagePowerFailure, + { + EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT, + EFI_ASF_VERSION, + EFI_ASF_EVENT_SENSOR_TYPE_POWER_SUPPLY, + EFI_ASF_EVENT_TYPE_SEVERITY_STATE, + EFI_ASF_EVENT_OFFSET_POWER_SUPPLY_FAILURE, + EFI_ASF_EVENT_SOURCE_TYPE_ASF10, + EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE, + EFI_ASF_SENSOR_DEVICE, + EFI_ASF_SENSOR_NUMBER, + EFI_ASF_ENTITY_SYSTEM_BOARD, + 0, // Insnce + } + }, +#endif +}; diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.cif b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.cif new file mode 100644 index 0000000..ee34575 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.cif @@ -0,0 +1,10 @@ +<component> + name = "AlertStandardFormatCommon" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\AlertStandardFormat\Heci\Common\" + RefName = "AlertStandardFormatCommon" +[files] +"AlertStandardFormatCommon.sdl" +"AlertStandardFormatCommon.c" +"AlertStandardFormatCommon.h" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.h b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.h new file mode 100644 index 0000000..5949fb9 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.h @@ -0,0 +1,397 @@ +/** @file + Include file for ASF Driver + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _ALERT_STANDARD_FORMAT_COMMON_H +#define _ALERT_STANDARD_FORMAT_COMMON_H + +#define EFI_ASF_VERSION 0x10 + +// +// ASF SMBUS Messages +// +#define EFI_ASF_MESSAGE_COMMAND_SENSE_DEVICE_SYSTEM_STATE 0x01 +#define EFI_ASF_MESSAGE_COMMAND_MANAGEMENT_CONTROL 0x02 +#define EFI_ASF_MESSAGE_COMMAND_ASF_CONFIGURATION 0x03 +#define EFI_ASF_MESSAGE_COMMAND_MESSAGE 0x04 +#define EFI_ASF_MESSAGE_COMMAND_GETUUID 0xC7 + +#define EFI_ASF_MESSAGE_BYTECOUNT_RETURN_BOOT_OPT 0x0D +#define EFI_ASF_MESSAGE_BYTECOUNT_CLEAR_BOOT_OPT 0x02 +#define EFI_ASF_MESSAGE_BYTEOUNTT_GET_BOOT_OPT 0x02 +#define EFI_ASF_MESSAGE_BYTECOUNT_DEVICE_TYPE_POLL 0x03 +#define EFI_ASF_MESSAGE_BYTECOUNT_STOP_WATCH_DOG_TIMER 0x02 +#define EFI_ASF_MESSAGE_BYTECOUNT_START_WATCH_DOG_TIMER 0x0D + +#define EFI_ASF_MESSAGE_SUBCOMMAND_RETURN_BOOT_OPT 0x16 +#define EFI_ASF_MESSAGE_SUBCOMMAND_CLEAR_BOOT_OPT 0x15 +#define EFI_ASF_MESSAGE_SUBCOMMAND_DEVICE_TYPE_POLL 0x13 +#define EFI_ASF_MESSAGE_SUBCOMMAND_STOP_WATCH_DOG_TIMER 0x14 +#define EFI_ASF_MESSAGE_SUBCOMMAND_START_WATCH_DOG_TIMER 0x13 +#define EFI_ASF_MESSAGE_SUBCOMMAND_RETRANSMIT 0x15 +#define EFI_ASF_MESSAGE_SUBCOMMAND_NORETRANSMIT 0x16 +#define EFI_ASF_MESSAGE_SUBCOMMAND_SYSTEM_STATE 0x18 + +#define EFI_ASF_MESSAGE_VERSIONNUMBER 0x10 + +// +// ASF Event Sensor Type Codes +// +#define EFI_ASF_EVENT_SENSOR_TYPE_SYS_FW_ERR_PROG 0x0F +#define EFI_ASF_EVENT_SENSOR_TYPE_POST_ERR_PROG 0x0F +#define EFI_ASF_EVENT_SENSOR_TYPE_BOOT_ERROR 0x1E +#define EFI_ASF_EVENT_SENSOR_TYPE_OS_BOOT 0x1F +#define EFI_ASF_EVENT_SENSOR_TYPE_ENTITY_PRESENCE 0x25 +#define EFI_ASF_EVENT_SENSOR_TYPE_WATCHDOG2 0x23 + +#define EFI_ASF_EVENT_SENSOR_TYPE_TEMPERATURE 0x01 +#define EFI_ASF_EVENT_SENSOR_TYPE_VOLTAGE 0x02 +#define EFI_ASF_EVENT_SENSOR_TYPE_FAN 0x04 +#define EFI_ASF_EVENT_SENSOR_TYPE_CHASSIS_INTRUSION 0x05 +#define EFI_ASF_EVENT_SENSOR_TYPE_SECURITY_VIOLATION 0x06 +#define EFI_ASF_EVENT_SENSOR_TYPE_PROCESSOR 0x07 +#define EFI_ASF_EVENT_SENSOR_TYPE_POWER_SUPPLY 0x08 +#define EFI_ASF_EVENT_SENSOR_TYPE_POWER_UNIT 0x09 +#define EFI_ASF_EVENT_SENSOR_TYPE_CHIPSET 0x19 +#define EFI_ASF_EVENT_SENSOR_TYPE_BATTERY 0x29 + +// +// ASF Event Type Codes +// IPMI/PET related stuff +// +#define EFI_ASF_EVENT_TYPE_SENSOR_SPECIFIC 0x6F + +#define EFI_ASF_EVENT_TYPE_THRESHOLD_BASED 0x01 +#define EFI_ASF_EVENT_TYPE_USAGE_STATE 0x02 +#define EFI_ASF_EVENT_TYPE_DISCRETE_EVENT_STATE 0x03 +#define EFI_ASF_EVENT_TYPE_DISCRETE_EVENT_PREDICTIVE_FAIL 0x04 +#define EFI_ASF_EVENT_TYPE_DISCRETE_EVENT_LIMIT 0x05 +#define EFI_ASF_EVENT_TYPE_DISCRETE_EVENT_PERFORMANCE 0x06 +#define EFI_ASF_EVENT_TYPE_SEVERITY_STATE 0x07 +#define EFI_ASF_EVENT_TYPE_AVAILABILITY_STATUS_PRESENT 0x08 +#define EFI_ASF_EVENT_TYPE_AVAILABILITY_STATUS_ENABLE 0x09 +#define EFI_ASF_EVENT_TYPE_AVAILABILITY_STATUS_RUNNING 0x0A +#define EFI_ASF_EVENT_TYPE_AVAILABILITY_STATUS_OTHER 0x0B +#define EFI_ASF_EVENT_TYPE_DEVICE_POWER_STATES 0x0C + +// +// ASF Event Offset Codes +// IPMI/PET related stuff +// +#define EFI_ASF_EVENT_OFFSET_ENTITY_PRESENT 0x00 +#define EFI_ASF_EVENT_OFFSET_TIMER_EXPIRED 0x00 +#define EFI_ASF_EVENT_OFFSET_SYS_FW_ERROR 0x00 +#define EFI_ASF_EVENT_OFFSET_SYS_FW_HANG 0x01 +#define EFI_ASF_EVENT_OFFSET_SYS_FW_PROGRESS 0x02 + +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_NONCRITICAL 0x00 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_NONCRITICAL_GO_HIGH 0x01 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_CRITICAL 0x02 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_CRITICAL_GO_HIGH 0x03 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_NONRECOVERABLE 0x04 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_LOWER_NONRECOVERABLE_GO_HIGH 0x05 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_NONCRITICAL_GO_LOW 0x06 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_NONCRITICAL 0x07 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_CRITICAL_GO_LOW 0x08 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_CRITICAL 0x09 +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_NONRECOVERABLE_GO_LOW 0x0A +#define EFI_ASF_EVENT_OFFSET_THRESHOLD_UPPER_NONRECOVERABLE 0x0B + +#define EFI_ASF_EVENT_OFFSET_DISCRETE_EVENT_PREDICTIVE_FAIL_DEASSERT 0x00 +#define EFI_ASF_EVENT_OFFSET_DISCRETE_EVENT_PREDICTIVE_FAIL_ASSERT 0x01 + +#define EFI_ASF_EVENT_OFFSET_SEVERITY_TO_OK 0x00 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_NONCRITICAL 0x01 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_CRITICAL 0x02 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_MORE_NONRECOVERABLE 0x03 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_LESS_NONCRITICAL 0x04 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_LESS_CRITICAL 0x05 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_TO_NONRECOVERABLE 0x06 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_MONITOR 0x07 +#define EFI_ASF_EVENT_OFFSET_SEVERITY_INFORMATIONAL 0x08 + +#define EFI_ASF_EVENT_OFFSET_CHASSIS_INTRUSION_GENERIC 0x00 + +#define EFI_ASF_EVENT_OFFSET_PROCESSOR_IERR 0x00 + +#define EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_USER_PASSWORD 0x01 +#define EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_SUPERVISOR_PASSWORD 0x02 +#define EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_NETWORK_PASSWORD 0x03 +#define EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_OTHER_PASSWORD 0x04 +#define EFI_ASF_EVENT_OFFSET_SECURITY_VIOLATION_OUTOFBAND_PASSWORD 0x05 + +#define EFI_ASF_EVENT_OFFSET_BATTERY_LOW_WARNING 0x00 +#define EFI_ASF_EVENT_OFFSET_BATTERY_LOW_CRITICAL 0x01 +#define EFI_ASF_EVENT_OFFSET_BATTERY_PRESENCE_DETECTED 0x02 + +#define EFI_ASF_EVENT_OFFSET_POWER_SUPPLY_PRESENCE 0x00 +#define EFI_ASF_EVENT_OFFSET_POWER_SUPPLY_FAILURE 0x01 +#define EFI_ASF_EVENT_OFFSET_POWER_SUPPLY_PREDICTIVE_FAILURE 0x02 + +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_DOWN 0x00 +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_CYCLE 0x01 +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_240VA_DOWN 0x02 +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_INTERLOCK_DOWN 0x03 +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_AC_LOST 0x04 +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_SOFT_CONTROL_FAILURE 0x05 +#define EFI_ASF_EVENT_OFFSET_POWER_UNIT_FAILURE 0x06 + +// +// ASF Event Source Type Code +// IPMI/PET related stuff +// +#define EFI_ASF_EVENT_SOURCE_TYPE_ASF10 0x68 +#define EFI_ASF_EVENT_SOURCE_TYPE_PLATFORM_FIRMWARE 0x00 +#define EFI_ASF_EVENT_SOURCE_TYPE_OS 0x48 + +// +// ASF Event Severity Codes +// IPMI/PET related stuff +// +#define EFI_ASF_EVENT_SEVERITY_CODE_MONITOR 0x01 +#define EFI_ASF_EVENT_SEVERITY_CODE_INFORMATION 0x02 +#define EFI_ASF_EVENT_SEVERITY_CODE_OK 0x04 +#define EFI_ASF_EVENT_SEVERITY_CODE_NONCRITICAL 0x08 +#define EFI_ASF_EVENT_SEVERITY_CODE_CRITICAL 0x10 +#define EFI_ASF_EVENT_SEVERITY_CODE_NONRECOVERABLE 0x20 + +/// +/// ASF Sensor Device Codes +/// IPMI/PET related stuff +/// +#define EFI_ASF_SENSOR_DEVICE 0xFF + +/// +/// ASF Sensor Number Codes +/// IPMI/PET related stuff +/// +#define EFI_ASF_SENSOR_NUMBER 0xFF + +// +// ASF Entity Codes +// IPMI/PET related stuff +// +#define EFI_ASF_ENTITY_UNSPECIFIED 0x00 +#define EFI_ASF_ENTITY_OTHER 0x01 +#define EFI_ASF_ENTITY_UNKNOWN 0x02 +#define EFI_ASF_ENTITY_PROCESSOR 0x03 +#define EFI_ASF_ENTITY_DISK 0x04 +#define EFI_ASF_ENTITY_PERIPHERAL 0x05 +#define EFI_ASF_ENTITY_SYSTEM_MGMT_MOD 0x06 +#define EFI_ASF_ENTITY_SYSTEM_BOARD 0x07 +#define EFI_ASF_ENTITY_POWER_SUPPLY 0x0A +#define EFI_ASF_ENTITY_ADDIN_CARD 0x0B +#define EFI_ASF_ENTITY_CHASIS_BACK_PANEL_BOARD 0x17 +#define EFI_ASF_ENTITY_MEMORY 0x20 +#define EFI_ASF_ENTITY_SYSTEM_MGMT_SW 0x21 +#define EFI_ASF_ENTITY_BIOS 0x22 +#define EFI_ASF_ENTITY_OS 0x23 +#define EFI_ASF_ENTITY_REMOTE_OOB_MGMT 0x26 +#define EFI_ASF_ENTITY_INTEL_AMT 0x26 + +/// +/// ASF Event Data Codes for System Firmware Progress Events +/// IPMI/PET related stuff +/// +#define EFI_ASF_FP_EVENT_DATA0 0x40 + +#define EFI_ASF_FP_UNSPECIFIED 0x00 +#define EFI_ASF_FP_MEMORY_INIT 0x01 +#define EFI_ASF_FP_HDD_INIT 0x02 +#define EFI_ASF_FP_AP_INIT 0x03 +#define EFI_ASF_FP_USER_AUTHENTICATION 0x04 +#define EFI_ASF_FP_USER_SETUP 0x05 +#define EFI_ASF_FP_USB_RESOURCE_CONFIG 0x06 +#define EFI_ASF_FP_PCI_RESOURCE_CONFIG 0x07 +#define EFI_ASF_FP_OPTION_ROM_INIT 0x08 +#define EFI_ASF_FP_VIDEO_INIT 0x09 +#define EFI_ASF_FP_CACHE_INIT 0x0A +#define EFI_ASF_FP_SMBUS_INIT 0x0B +#define EFI_ASF_FP_KBC_INIT 0x0C +#define EFI_ASF_FP_EC_INIT 0x0D +#define EFI_ASF_FP_AMTBX_INIT 0x0D +#define EFI_ASF_FP_ATTACH_DOCK 0x0E +#define EFI_ASF_FP_ENABLE_DOCK 0x0F +#define EFI_ASF_FP_EJECT_DOCK 0x10 +#define EFI_ASF_FP_DISABLE_DOCK 0x11 +#define EFI_ASF_FP_WAKE_OS 0x12 +#define EFI_ASF_FP_BOOT_OS 0x13 +#define EFI_ASF_FP_BOARD_INIT 0x14 +#define EFI_ASF_FP_RESERVED 0x15 +#define EFI_ASF_FP_FDC_INIT 0x16 +#define EFI_ASF_FP_KBD_TEST 0x17 +#define EFI_ASF_FP_MOUSE_TEST 0x18 +#define EFI_ASF_FP_BSP_INIT 0x19 + +/// +/// ASF Event Data Codes for System Firmware Error Events +/// IPMI/PET related stuff +/// +#define EFI_ASF_FE_EVENT_DATA0 0x40 + +#define EFI_ASF_FE_UNSPECIFIED 0x00 +#define EFI_ASF_FE_AMTBX_FAILURE 0x00 +#define EFI_ASF_FE_NO_MEMORY 0x01 +#define EFI_ASF_FE_MEMORY_FAILURE 0x02 +#define EFI_ASF_FE_HDD_FAILURE 0x03 +#define EFI_ASF_FE_BOARD_FAILURE 0x04 +#define EFI_ASF_FE_FDC_FAILURE 0x05 +#define EFI_ASF_FE_HDC_FAILURE 0x06 +#define EFI_ASF_FE_KBD_FAILURE 0x07 +#define EFI_ASF_FE_REMOVABLE_BOOT_MEDIA_NOT_FOUND 0x08 +#define EFI_ASF_FE_VIDEO_CONTROLLER_FAILURE 0x09 +#define EFI_ASF_FE_VIDEO_DEVICE_NOT_FOUND 0x0A +#define EFI_ASF_FE_ROM_CORRUPTED 0x0B +#define EFI_ASF_FE_CPU_VOLTAGE_FAILURE 0x0C +#define EFI_ASF_FE_CPU_MISMATCH_FAILURE 0x0D + +// +// AMT BX Software Class DXE Subclass Progress Code definitions. +// +#define EFI_SW_DXE_AMTBX_OPROM_DONE (EFI_OEM_SPECIFIC | 0x00000000) +#define EFI_SW_DXE_AMTBX_OPROM_NOT_STARTED (EFI_OEM_SPECIFIC | 0x00000001) +#define EFI_SW_DXE_AMTBX_SLEEP_S4_NOT_TAKEN (EFI_OEM_SPECIFIC | 0x00000002) +#define EFI_SW_DXE_AMTBX_SLEEP_S5_NOT_TAKEN (EFI_OEM_SPECIFIC | 0x00000003) +#define EFI_SW_DXE_AMTBX_SLEEP_UNSPECD_NOT_TAKEN (EFI_OEM_SPECIFIC | 0x00000004) +#define EFI_SW_DXE_AMTBX_ERROR_ACTION_INTF (EFI_OEM_SPECIFIC | 0x00000005) +#define EFI_SW_DXE_AMTBX_ERROR_ACTION_INV (EFI_OEM_SPECIFIC | 0x00000006) +#define EFI_SW_DXE_AMTBX_ERROR_ACTION_SETUP (EFI_OEM_SPECIFIC | 0x00000007) +#define EFI_SW_DXE_AMTBX_ERROR_ACTION_FAIL (EFI_OEM_SPECIFIC | 0x00000008) +#define EFI_SW_DXE_AMTBX_ERROR_ACTION_UNSPECD (EFI_OEM_SPECIFIC | 0x00000009) +#define EFI_SW_DXE_AMTBX_OTHER_UNSPECD (EFI_OEM_SPECIFIC | 0x00000009) + +typedef enum { + EfiAsfMessageBiosPresent, + EfiAsfMessageMemInit, + EfiAsfMessageMemInitDone, + EfiAsfMessageHddInit, + EfiAsfMessageApInit, + EfiAsfMessageUserAuthentication, + EfiAsfMessageUserInitSetup, + EfiAsfMessageUsbResourceConfig, + EfiAsfMessagePciResourceConfig, + EfiAsfMessageOptionRomInit, + EfiAsfMessageVideoInit, + EfiAsfMessageCacheInit, + EfiAsfMessageSmbusInit, + EfiAsfMessageKbcInit, + EfiAsfMessageEmControllerInit, + EfiAsfMessageDockAttached, + EfiAsfMessageEnableDock, + EfiAsfMessageDockEject, + EfiAsfMessageDisableDock, + EfiAsfMessageOSWakeVector, + EfiAsfMessageMotherBoardInit, + EfiAsfMessageFdcInit, + EfiAsfMessageKeyboardTest, + EfiAsfMessageMouseTest, + EfiAsfMessageBspInit, + EfiAsfMessageAmtBxDone, + EfiAsfMessageAmtBxNotStarted, + EfiAsfMessageAmtBxSleepS4ReportedNotTaken, + EfiAsfMessageAmtBxSleepS5ReportedNotTaken, + EfiAsfMessageAmtBxSleepUnspecifiedReportedNotTaken, + EfiAsfMessageAmtBxErrActionIntF, + EfiAsfMessageAmtBxErrActionInv, + EfiAsfMessageAmtBxErrActionSetup, + EfiAsfMessageAmtBxErrActionFailure, + EfiAsfMessageAmtBxErrActionUnspecified, + EfiAsfMessageAmtBxOtherUnspecified, + EfiAsfMessageNoMemory, + EfiAsfMessageMemoryFailure, + EfiAsfMessageHddFailure, + EfiAsfMessageBoardFailure, + EfiAsfMessageFdcFailure, + EfiAsfMessageHdcFailure, + EfiAsfMessageKbdFailure, + EfiAsfMessageNoFdd, + EfiAsfMessageVideoControllerFailure, + EfiAsfMessageNoVideo, + EfiAsfMessageFirmwareCorruption, + EfiAsfMessageCpuVidMismatch, + EfiAsfMessageCpuSpeedMatchingFailure, + EfiAsfMessageUserAuthenticationInvalid, + EfiAsfMessageHddAuthenticationInvalid, + EfiAsfMessageNoBootMedia, + EfiAsfMessageTemperatureGenericCritical, + EfiAsfMessageTemperatureGenericWarning, + EfiAsfMessageTemperatureOverCritical, + EfiAsfMessageTemperatureOverWarning, + EfiAsfMessageTemperatureUnderCritical, + EfiAsfMessageTemperatureUnderWarning, + EfiAsfMessageVoltageGenericCritical, + EfiAsfMessageVoltageOverCritical, + EfiAsfMessageVoltageUnderCritical, + EfiAsfMessageFanGenericCritical, + EfiAsfMessageFanPredictiveFailure, + EfiAsfMessageFanLowSpeedCritical, + EfiAsfMessageFanLowSpeedWarning, + EfiAsfMessageBatteryLowWarning, + EfiAsfMessageBatteryLowCritical, + EfiAsfMessageBatteryPresenceDetected, + EfiAsfMessagePowerFailure, + EfiAsfMessageChassisIntrusion, +} EFI_FRAMEWORK_MESSAGE_TYPE; + +// +// StatusCode extension for ASF -- start +// +#define EFI_CU_HP_EC_VID_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x0000000E) +#define EFI_CU_HP_EC_SPEED_MATCHING_FAILURE (EFI_SUBCLASS_SPECIFIC | 0x0000000F) + +#define EFI_PERIPHERAL_EMBEDDED_CONTROLLER (EFI_PERIPHERAL | 0x000D0000) +#define EFI_PERIPHERAL_DOCK (EFI_PERIPHERAL | 0x000E0000) + +#define EFI_PERIPHERAL_BATTERY (EFI_PERIPHERAL | 0x000F0000) +#define EFI_P_BATTERY_PC_LOW_WARNING (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_BATTERY_EC_LOW_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000000) + +#define EFI_PERIPHERAL_FAN (EFI_PERIPHERAL | 0x00100000) +#define EFI_P_FAN_EC_GENERIC_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_FAN_EC_PREDICTIVE_FAILURE (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_P_FAN_EC_LOW_SPEED_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_P_FAN_PC_LOW_SPEED_WARNING (EFI_SUBCLASS_SPECIFIC | 0x00000002) + +#define EFI_PERIPHERAL_TEMPERATURE (EFI_PERIPHERAL | 0x00110000) +#define EFI_P_TEMERATURE_EC_GENERIC_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_TEMERATURE_PC_GENERIC_WARNING (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_TEMERATURE_EC_OVER_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_P_TEMERATURE_PC_OVER_WARNING (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_P_TEMERATURE_EC_UNDER_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_P_TEMERATURE_PC_UNDER_WARNING (EFI_SUBCLASS_SPECIFIC | 0x00000002) + +#define EFI_PERIPHERAL_VOLTAGE (EFI_PERIPHERAL | 0x00120000) +#define EFI_P_VOLTAGE_EC_GENERIC_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_VOLTAGE_EC_OVER_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_P_VOLTAGE_EC_UNDER_CRITICAL (EFI_SUBCLASS_SPECIFIC | 0x00000002) + +#define EFI_PERIPHERAL_POWER_SUPPLY (EFI_PERIPHERAL | 0x00130000) +#define EFI_P_POWER_SUPPLY_EC_FAILURE (EFI_SUBCLASS_SPECIFIC | 0x00000000) +#define EFI_P_POWER_SUPPLY_EC_PREDICTIVE_FAILURE (EFI_SUBCLASS_SPECIFIC | 0x00000001) + +#define EFI_CU_CHIPSET_PC_INTRUDER_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000) + +#define EFI_SW_DXE_BS_EC_NO_BOOT_MEDIA (EFI_SUBCLASS_SPECIFIC | 0x00000001) +#define EFI_SW_DXE_BS_EC_AUTHENTICATE_USER_INVALID (EFI_SUBCLASS_SPECIFIC | 0x00000002) +#define EFI_SW_DXE_BS_EC_AUTHENTICATE_HDD_INVALID (EFI_SUBCLASS_SPECIFIC | 0x00000003) + +// +// StatusCode extension for ASF -- end +// +#endif diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.sdl b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.sdl new file mode 100644 index 0000000..8ec0f9c --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Common/AlertStandardFormatCommon.sdl @@ -0,0 +1,10 @@ +PATH + Name = "AlertStandardFormatCommon_DIR" + Help = "AlertStandardFormat files source directory" +End + +ELINK + Name = "/I$(AlertStandardFormatCommon_DIR)" + Parent = "AlertStandardFormat_INCLUDES" + InvokeOrder = AfterParent +End diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.c b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.c new file mode 100644 index 0000000..5119b8e --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.c @@ -0,0 +1,1234 @@ +/** @file + Processes ASF messages + +@copyright + Copyright (c) 2005 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include "AlertStandardFormatDxe.h" +#include "MeLib.h" +#endif + +#include "AlertStandardFormatCommon.c" + +UINT64 mAsfMonotonicCount; +EFI_ASF_BOOT_OPTIONS mAsfBootOptions; +BOOLEAN mBootOptionsValid; +BOOLEAN mAsfAddressValid; +BOOLEAN mProgressEventEnabled; + +ALERT_STANDARD_FORMAT_INSTANCE *mAsfContext; + +EFI_GUID gAmtForcePushPetVariableGuid = AMT_FORCE_PUSH_PET_VARIABLE_GUID; +EFI_GUID gAmtPetQueueHobGuid = AMT_PET_QUEUE_HOB_GUID; +EFI_GUID gAmtForcePushPetHobGuid = AMT_FORCE_PUSH_PET_HOB_GUID; + +AMT_PET_QUEUE_PROTOCOL gAmtPetQueue; +AMT_PET_QUEUE_PROTOCOL *gAmtPetQueueProtocol; +AMT_FORCE_PUSH_PET_POLICY_HOB *gAmtForcePushPETPolicyHob; + +/** + Update ASF Boot Options data in ACPI ASF RCMP table + + @param[in] AsfBootOptions ASF Boot Options data for ACPI ASF RCMP table used +**/ +VOID +UpdateAcpiAsfRcmpBootOptions ( + EFI_ASF_BOOT_OPTIONS *AsfBootOptions + ) +{ + EFI_STATUS Status; + EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE *AcpiAsfTable; + UINTN Handle; + UINTN VersionCount; + UINT16 *WordPointer; + EFI_ACPI_TABLE_VERSION Version[] = { + EFI_ACPI_TABLE_VERSION_1_0B, + EFI_ACPI_TABLE_VERSION_2_0, + EFI_ACPI_TABLE_VERSION_3_0 + }; + EFI_ACPI_TABLE_PROTOCOL *AcpiTable; + + /// + /// Locate ACPI Table Protocol + /// + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **) &AcpiTable); + + /// + /// Initialize ASL manipulation library + /// + InitializeAslUpdateLib (); + + for (VersionCount = 0; VersionCount < sizeof (Version) / sizeof (EFI_ACPI_TABLE_VERSION); VersionCount++) { + Handle = 0; + /// + /// Locate the ASF Table + /// + Status = LocateAcpiTableBySignature ( + EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_SIGNATURE, + (EFI_ACPI_DESCRIPTION_HEADER **) &AcpiAsfTable, + &Handle, + &Version[VersionCount] + ); + if (EFI_ERROR (Status)) { + continue; + } + + if (AsfBootOptions->SubCommand == ASF_BOOT_OPTIONS_PRESENT) { + /// + /// Check Asf table if get boot option successfully + /// + AcpiAsfTable->AsfRmcp.RMCPCompletionCode = 00; + AcpiAsfTable->AsfRmcp.RMCPIANA = AsfBootOptions->IanaId; + AcpiAsfTable->AsfRmcp.RMCPSpecialCommand = AsfBootOptions->SpecialCommand; + WordPointer = (UINT16 *) &AcpiAsfTable->AsfRmcp.RMCPSpecialCommandParameter; + *WordPointer = AsfBootOptions->SpecialCommandParam; + WordPointer = (UINT16 *) &AcpiAsfTable->AsfRmcp.RMCPBootOptions; + *WordPointer = AsfBootOptions->BootOptions; + WordPointer = (UINT16 *) &AcpiAsfTable->AsfRmcp.RMCPOEMParameters; + *WordPointer = AsfBootOptions->OemParameters; + } else { + /// + /// Failed to get boot option, update the completion code to 0x1 + /// + AcpiAsfTable->AsfRmcp.RMCPCompletionCode = 01; + } + if (Handle != 0) { + Status = AcpiTable->UninstallAcpiTable ( + AcpiTable, + Handle + ); + } + /// + /// Update the Acpi Asf table + /// + Status = AcpiTable->InstallAcpiTable ( + AcpiTable, + AcpiAsfTable, + sizeof(EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE), + &Handle + ); + FreePool (AcpiAsfTable); + } +} + +/** + 16 bits are changed backward for string transfer to value used + + @param[in] Value The value to be transferred + + @retval UINT16 Value The value after transferring +**/ +UINT16 +Swap16 ( + IN UINT16 Value + ) +{ + UINT16 OutValue; + UINT8 *TempIn; + UINT8 *TempOut; + + TempIn = (UINT8 *) &Value; + TempOut = (UINT8 *) &OutValue; + + TempOut[0] = TempIn[1]; + TempOut[1] = TempIn[0]; + + return OutValue; +} + +/** + The driver entry point - detect ASF support or not, if support, will install relative protocol. + + @param[in] ImageHandle Handle for this drivers loaded image protocol. + @param[in] SystemTable EFI system table. + + @retval EFI_SUCCESS The driver installed without error. + @exception EFI_UNSUPPORTED The chipset is unsupported by this driver. + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures. +**/ +EFI_STATUS +EFIAPI +AlertStandardFormatDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_DATA_HUB_PROTOCOL *DataHub; + EFI_EVENT DataHubEvent; + UINT64 DataClass; + EFI_ASF_BOOT_OPTIONS *AsfBootOptions; + + /// + /// First check if ASF support is enabled in Setup. + /// + if (!AsfSupported ()) { + return EFI_UNSUPPORTED; + } + + mBootOptionsValid = FALSE; + mAsfAddressValid = FALSE; + + mAsfContext = AllocateZeroPool (sizeof (ALERT_STANDARD_FORMAT_INSTANCE)); + ASSERT (mAsfContext != NULL); + if (mAsfContext == NULL) { + return EFI_OUT_OF_RESOURCES; + } + /// + /// Get the Data Hub Protocol. Assume only one instance + /// of Data Hub Protocol is available in the system. + /// + Status = gBS->LocateProtocol ( + &gEfiDataHubProtocolGuid, + NULL, + (VOID **) &DataHub + ); + ASSERT_EFI_ERROR (Status); + + mAsfContext->Handle = ImageHandle; + mAsfContext->Signature = ALERT_STANDARD_FORMAT_PRIVATE_DATA_SIGNATURE; + mAsfContext->AlertStandardFormat.GetSmbusAddr = GetSmbusAddr; + mAsfContext->AlertStandardFormat.SetSmbusAddr = SetSmbusAddr; + mAsfContext->AlertStandardFormat.GetBootOptions = GetBootOptions; + mAsfContext->AlertStandardFormat.SendAsfMessage = SendAsfMessage; + + /// + /// Sending ASF Messaging if ManageabilityMode is not zero + /// + if (ManageabilityModeSetting () != MNT_OFF) { + /// + /// ActiveManagement Protocol is not ready at this point. Need to Check Boot Options Manually + /// + mProgressEventEnabled = FALSE; + Status = GetBootOptions (&(mAsfContext->AlertStandardFormat), &AsfBootOptions); + if (!EFI_ERROR (Status)) { + if (AsfBootOptions->SubCommand == ASF_BOOT_OPTIONS_PRESENT) { + if ((AsfBootOptions->BootOptions & FORCE_PROGRESS_EVENTS) == FORCE_PROGRESS_EVENTS) { + mProgressEventEnabled = TRUE; + } + } + } + /// + /// If no boot options available, check policy + /// + if (!mProgressEventEnabled) { + mProgressEventEnabled = FwProgressSupport (); + } + /// + /// Create message queue + /// + AmtCreateMessageQueue (); + + /// + /// Get ForcePushPetPolicy Hob + /// + gAmtForcePushPETPolicyHob = GetForcePushPetPolicy (); + + /// + /// save PEI force push error event from hob to variable + /// + SaveForcePushErrorEventFromPeiToDxe (); + + /// + /// Try to send message + /// + SendPETMessageInQueue (); + + /// + /// Register our Setup Data Filter Function. + /// This function is notified at the lowest TPL + /// + Status = gBS->CreateEvent ( + EVENT_NOTIFY_SIGNAL, + TPL_CALLBACK, + DataHubEventCallback, + NULL, + &DataHubEvent + ); + ASSERT_EFI_ERROR (Status); + + if (mProgressEventEnabled) { + DataClass = EFI_DATA_RECORD_CLASS_ERROR | EFI_DATA_RECORD_CLASS_PROGRESS_CODE; + } else { + DataClass = EFI_DATA_RECORD_CLASS_ERROR; + } + + Status = DataHub->RegisterFilterDriver ( + DataHub, + DataHubEvent, + EFI_TPL_APPLICATION, + DataClass, + NULL + ); + ASSERT_EFI_ERROR (Status); + } + /// + /// Install the AlertStandardFormat interface + /// + Status = gBS->InstallMultipleProtocolInterfaces ( + &mAsfContext->Handle, + &gEfiAlertStandardFormatProtocolGuid, + &mAsfContext->AlertStandardFormat, + NULL + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} + +/** + Return the SMBus address used by the ASF driver. + Not applicable in Intel ME/HECI system, need to return EFI_UNSUPPORTED. + + @param[in] This The address of protocol + @param[in] SmbusDeviceAddress Out put the Smbus Address + + @exception EFI_UNSUPPORTED The function is unsupported by this driver +**/ +EFI_STATUS +EFIAPI +GetSmbusAddr ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + OUT UINTN *SmbusDeviceAddress + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Set the SMBus address used by the ASF driver. 0 is an invalid address. + Not applicable in Intel ME/HECI system, need to return EFI_UNSUPPORTED. + + @param[in] This The address of protocol + @param[in] SmbusDeviceAddress SMBus address of the device + + @exception EFI_UNSUPPORTED The function is unsupported by this driver +**/ +EFI_STATUS +EFIAPI +SetSmbusAddr ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + IN UINTN SmbusDeviceAddress + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Return EFI_SUCCESS if Firmware Init Complete is set in HFS[9]. + + @param[in] Heci EFI_HECI_PROTOCOL + @param[in] Timeout Time in second + + @retval EFI_SUCCESS Firmware Init Complete is set + @retval EFI_TIMEOUT Firmware Init Complete is not set in 5 seconds +**/ +EFI_STATUS +WaitFirmwareInitDone ( + EFI_HECI_PROTOCOL *Heci, + UINT32 Timeout + ) +{ + UINT32 idx; + EFI_STATUS Status; + UINT32 MeStatus; + + Status = EFI_SUCCESS; + idx = 0; + + Heci->GetMeStatus (&MeStatus); + + while (!ME_STATUS_IS_ME_FW_INIT_COMPLETE (MeStatus)) { + gBS->Stall (100000); + idx++; + if (idx > Timeout * 10) { + Status = EFI_TIMEOUT; + break; + } + + Heci->GetMeStatus (&MeStatus); + } + + return Status; +} + +/** + Initialize KVM by sending HECI messafe to ME + + @param[in] Event The event registered. + @param[in] Context Event context. Not used in this event handler. +**/ +VOID +EFIAPI +QueryKvm ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + BdsKvmInitialization (); + gBS->CloseEvent (Event); +} + +/** + Return the ASF Boot Options obtained from the controller. If the + Boot Options parameter is NULL and no boot options have been retrieved, + Query the ASF controller for its boot options. + Get ASF Boot Options through HECI. + + @param[in] This The address of protocol + @param[in] AsfBootOptions Pointer to ASF boot options to copy current ASF Boot options + + @retval EFI_SUCCESS Boot options copied + @retval EFI_NOT_READY No boot options +**/ +EFI_STATUS +EFIAPI +GetBootOptions ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + IN OUT EFI_ASF_BOOT_OPTIONS **AsfBootOptions + ) +{ + EFI_STATUS Status; + UINT8 ConsoleLock; + UINT32 MeStatus; + UINT32 MeMode; + EFI_STATUS TempStatus; + VOID *AfterConsolOutNotifyReg; + EFI_EVENT AfterConsolOutInstalledEvent; + EFI_GUID guidConOutStarted = EFI_CONSOLE_OUT_DEVICE_GUID; + EFI_HECI_PROTOCOL *Heci; + HECI_ASF_GET_BOOT_OPTIONS_RESPONSE HeciAsfGetBootOptionsResponse; + HECI_ASF_CLEAR_BOOT_OPTION HeciAsfClearBootOption; + UINT32 HeciLength; + + if (!mBootOptionsValid) { + Status = gBS->LocateProtocol ( + &gEfiHeciProtocolGuid, + NULL, + (VOID **) &Heci + ); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "ASF Get Boot Options failed!, Status = %r\n", Status)); + return Status; + } + + ZeroMem ((VOID *) &mAsfBootOptions, sizeof (EFI_ASF_BOOT_OPTIONS)); + mAsfBootOptions.SubCommand = ASF_BOOT_OPTIONS_NOT_PRESENT; + mAsfBootOptions.Version = 0x10; + UpdateAcpiAsfRcmpBootOptions (&mAsfBootOptions); + + /// + /// Get ME Status + /// + TempStatus = Heci->GetMeStatus (&MeStatus); + ASSERT_EFI_ERROR (TempStatus); + + /// + /// Get ME Operation Mode + /// + Heci->GetMeMode (&MeMode); + + /// + /// Only Send ASF Get Boot Options message when ME is ready and ME FW INIT is completed + /// + if (ME_STATUS_IS_ME_FW_BOOT_OPTIONS_PRESENT (MeStatus) && + (ManageabilityModeSetting () != MNT_OFF) && + (MeMode == ME_MODE_NORMAL) + ) { + if (WaitFirmwareInitDone (Heci, 5) != EFI_TIMEOUT) { + /// + /// Prepare Boot Option Command header + /// + HeciAsfGetBootOptionsResponse.Command = EFI_ASF_MESSAGE_COMMAND_ASF_CONFIGURATION; + HeciAsfGetBootOptionsResponse.ByteCount = EFI_ASF_MESSAGE_BYTEOUNTT_GET_BOOT_OPT; + HeciAsfGetBootOptionsResponse.AsfBootOptions.SubCommand = EFI_ASF_MESSAGE_SUBCOMMAND_RETURN_BOOT_OPT; + HeciAsfGetBootOptionsResponse.AsfBootOptions.Version = 0x10; + HeciLength = HECI_ASF_GET_BOOT_OPTIONS_LENGTH; + Status = Heci->SendMsg ( + (UINT32 *) &HeciAsfGetBootOptionsResponse, + HeciLength, + BIOS_ASF_HOST_ADDR, + HECI_ASF_MESSAGE_ADDR + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "ASF Get Boot Options failed!(SendwACK), Status = %r\n", Status)); + return Status; + } + + HeciLength = HECI_ASF_GET_BOOT_OPTIONS_RESPONSE_LENGTH; + Status = Heci->ReadMsg ( + BLOCKING, + (UINT32 *) &HeciAsfGetBootOptionsResponse, + &HeciLength + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "ASF Get Boot Options failed!(ReadMsg), Status = %r\n", Status)); + return Status; + } + + CopyMem ( + (VOID *) &mAsfBootOptions, + (VOID *) &(HeciAsfGetBootOptionsResponse.AsfBootOptions), + sizeof (EFI_ASF_BOOT_OPTIONS) + ); + + /// + /// By default, this table is belong to all ACPI table versions. + /// It is ok if the table is not found and that means the platform does not publish that version. + /// + UpdateAcpiAsfRcmpBootOptions (&mAsfBootOptions); + + mAsfBootOptions.SpecialCommandParam = Swap16 (mAsfBootOptions.SpecialCommandParam); + + /// + /// ASF Get Boot Options - Clear Boot Options + /// Need to do this so don't get caught in an endless loop plus by + /// definition get boot options is a one time boot situation. + /// So if server on other end of ASF device wants another back to back + /// boot it will request it. Do this only if there were boot options + /// + if (mAsfBootOptions.SubCommand == ASF_BOOT_OPTIONS_PRESENT) { + HeciAsfClearBootOption.Command = EFI_ASF_MESSAGE_COMMAND_ASF_CONFIGURATION; + HeciAsfClearBootOption.AsfClearBootOptions.SubCommand = EFI_ASF_MESSAGE_SUBCOMMAND_CLEAR_BOOT_OPT; + HeciAsfClearBootOption.AsfClearBootOptions.Version = EFI_ASF_MESSAGE_VERSIONNUMBER; + HeciAsfClearBootOption.ByteCount = EFI_ASF_MESSAGE_BYTECOUNT_CLEAR_BOOT_OPT; + HeciLength = HECI_ASF_CLEAR_BOOT_OPTION_LENGTH; + + Status = Heci->SendMsg ( + (UINT32 *) &HeciAsfClearBootOption, + HeciLength, + BIOS_ASF_HOST_ADDR, + HECI_ASF_MESSAGE_ADDR + ); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "ASF Clear Boot Options failed!, Status = %r\n", Status)); + return Status; + } + } + } + } + /// + /// Set flag so we don't try to get the Boot options again. + /// + mBootOptionsValid = TRUE; + + /// + /// Set up Event for KVM for when Output Display Console is installed + /// + if ((mAsfBootOptions.SpecialCommandParam & USE_KVM) == USE_KVM) { + + Status = gBS->CreateEvent ( + EFI_EVENT_NOTIFY_SIGNAL, + EFI_TPL_NOTIFY, + QueryKvm, + NULL, + &AfterConsolOutInstalledEvent + ); + + Status = gBS->RegisterProtocolNotify ( + &guidConOutStarted, + AfterConsolOutInstalledEvent, + &AfterConsolOutNotifyReg + ); + + } + /// + /// Check for keyboard locking in the boot options + /// + ConsoleLock = NO_LOCK_CONSOLE; + + if (mAsfBootOptions.SubCommand == ASF_BOOT_OPTIONS_PRESENT) { + if ((mAsfBootOptions.BootOptions & LOCK_KEYBOARD) == LOCK_KEYBOARD) { + ConsoleLock = LOCK_CONSOLE; + } + } + /// + /// Save the console lock flag for later usage in console locking determination + /// + gRT->SetVariable ( + EFI_CONSOLE_LOCK_VARIABLE_NAME, + &gEfiConsoleLockGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + sizeof (ConsoleLock), + &ConsoleLock + ); + } + + if (AsfBootOptions) { + *AsfBootOptions = &mAsfBootOptions; + + /// + /// If we're asking for the options, then resend them to the debug output just encase they've been hosed. + /// + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.SubCommand = 0x%x\n", mAsfBootOptions.SubCommand)); + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.Version = 0x%x\n", mAsfBootOptions.Version)); + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.IanaId = 0x%x\n", mAsfBootOptions.IanaId)); + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.SpecialCommand = 0x%x\n", mAsfBootOptions.SpecialCommand)); + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.SpecialCommandParam = 0x%x\n", mAsfBootOptions.SpecialCommandParam)); + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.BootOptions = 0x%x\n", mAsfBootOptions.BootOptions)); + DEBUG ((EFI_D_ERROR, "mAsfBootOptions.OemParameters = 0x%x\n", mAsfBootOptions.OemParameters)); + } + + return EFI_SUCCESS; +} + +/** + Send ASF Message through HECI. + + @param[in] This The address of protocol + @param[in] AsfMessage Pointer to ASF message + + @retval EFI_SUCCESS Boot options copied + @retval EFI_INVALID_PARAMETER Invalid pointer + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +EFIAPI +SendAsfMessage ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + IN EFI_ASF_MESSAGE *AsfMessage + ) +{ + EFI_STATUS Status; + EFI_HECI_PROTOCOL *Heci; + UINT32 HeciLength; + HECI_ASF_PUSH_PROGRESS_CODE HeciAsfPushProgressCode; + UINT32 MeStatus; + UINT32 MeMode; + EFI_STATUS TempStatus; + + Status = gBS->LocateProtocol ( + &gEfiHeciProtocolGuid, + NULL, + (VOID **) &Heci + ); + + if (!EFI_ERROR (Status)) { + TempStatus = Heci->GetMeStatus (&MeStatus); + ASSERT_EFI_ERROR (TempStatus); + + /// + /// Get ME Operation Mode + /// + Heci->GetMeMode (&MeMode); + + /// + /// Only send ASF Push Progress code when ME is ready and ME is in normal mode. Ignore FW Init Status. + /// + if (ME_STATUS_ME_STATE_ONLY (MeStatus) == ME_READY && MeMode == ME_MODE_NORMAL) { + ZeroMem ((VOID *) &HeciAsfPushProgressCode, sizeof (HECI_ASF_PUSH_PROGRESS_CODE)); + HeciAsfPushProgressCode.Command = EFI_ASF_MESSAGE_COMMAND_MESSAGE; + HeciAsfPushProgressCode.ByteCount = 0x10; + HeciLength = HECI_ASF_PUSH_PROGRESS_CODE_LENGTH; + CopyMem ((VOID *) &(HeciAsfPushProgressCode.AsfMessage), (VOID *) AsfMessage, sizeof (EFI_ASF_MESSAGE)); + + Status = Heci->SendMsg ( + (UINT32 *) &HeciAsfPushProgressCode, + HeciLength, + BIOS_ASF_HOST_ADDR, + HECI_ASF_MESSAGE_ADDR + ); + } + } + + return Status; +} + +/** + This routine returns ForcePushPetPolicy information. + + @param[in] None + + @retval AMT_FORCE_PUSH_PET_POLICY_HOB ForcePushPetPolicy information. +**/ +AMT_FORCE_PUSH_PET_POLICY_HOB * +GetForcePushPetPolicy ( + VOID + ) +{ + AMT_FORCE_PUSH_PET_POLICY_HOB *AmtForcePushPETPolicyHob; + EFI_STATUS Status; + + Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, (VOID **) &AmtForcePushPETPolicyHob); + ASSERT_EFI_ERROR (Status); + + return GetNextGuidHob (&gAmtForcePushPetPolicyGuid, AmtForcePushPETPolicyHob); +} + +/** + This routine checks whethre current message is ForcePush message. + + @param[in] MessageType AMT PET Message Type. + + @retval TRUE It is ForcePush message. + @retval FALSE It is not ForcePush message. +**/ +BOOLEAN +IsForcePushErrorEvent ( + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +{ + UINTN Index; + UINTN Number; + + Number = (gAmtForcePushPETPolicyHob->EfiHobGuidType.Header.HobLength - sizeof (EFI_HOB_GUID_TYPE)) / + sizeof (EFI_FRAMEWORK_MESSAGE_TYPE); + for (Index = 0; Index < Number; Index++) { + if (gAmtForcePushPETPolicyHob->MessageType[Index] == MessageType) { + return TRUE; + } + } + + return FALSE; +} + +/** + Filters all the progress and error codes for Asf. + + @param[in] Event The event registered. + @param[in] Context Event context. Not used in this event handler. +**/ +VOID +EFIAPI +DataHubEventCallback ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_STATUS Status; + EFI_DATA_HUB_PROTOCOL *DataHub; + EFI_DATA_RECORD_HEADER *Record; + DATA_HUB_STATUS_CODE_DATA_RECORD *StatusRecord; + UINTN Index; + + /// + /// Get the Data Hub Protocol. Assume only one instance + /// + Status = gBS->LocateProtocol (&gEfiDataHubProtocolGuid, NULL, (VOID **) &DataHub); + ASSERT_EFI_ERROR (Status); + + /// + /// Get all available data records from data hub + /// + Record = NULL; + + do { + Status = DataHub->GetNextRecord (DataHub, &mAsfMonotonicCount, &Event, &Record); + if (!EFI_ERROR (Status)) { + if (mProgressEventEnabled) { + if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_PROGRESS_CODE) { + StatusRecord = (DATA_HUB_STATUS_CODE_DATA_RECORD *) (Record + 1); + for (Index = 0; Index < sizeof (mAsfProgressDataHubMap) / sizeof (EFI_ASF_DATA_HUB_MAP); Index++) { + if (mAsfProgressDataHubMap[Index].StatusCodeValue == StatusRecord->Value) { + Status = SendPostPacket (mAsfProgressDataHubMap[Index].MessageType); + break; + } + } + } + } + + if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_ERROR) { + StatusRecord = (DATA_HUB_STATUS_CODE_DATA_RECORD *) (Record + 1); + for (Index = 0; Index < sizeof (mAsfErrorDataHubMap) / sizeof (EFI_ASF_DATA_HUB_MAP); Index++) { + if (mAsfErrorDataHubMap[Index].StatusCodeValue == StatusRecord->Value) { + Status = SendPostPacket (mAsfErrorDataHubMap[Index].MessageType); + if ((Status == EFI_DEVICE_ERROR) && IsForcePushErrorEvent (mAsfErrorDataHubMap[Index].MessageType)) { + SaveForcePushErrorEvent (mAsfErrorDataHubMap[Index].MessageType); + } + break; + } + } + } + } + } while (!EFI_ERROR (Status) && (mAsfMonotonicCount != 0)); +} + +/** + Sends a POST packet across ASF + + @param[in] MessageType POST Status Code + + @retval EFI_DEVICE_ERROR No message found + @retval EFI_SUCCESS Boot options copied + @retval EFI_INVALID_PARAMETER Invalid pointer + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +SendPostPacket ( + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +{ + EFI_STATUS Status; + UINTN Index; + + Status = EFI_DEVICE_ERROR; + /// + /// Find the message to send across the wire + /// + for (Index = 0; Index < sizeof (mAsfFrameworkMessage) / sizeof (EFI_ASF_FRAMEWORK_MESSAGE); Index++) { + if (mAsfFrameworkMessage[Index].MessageType == MessageType) { + Status = SendAsfMessage (NULL, &mAsfFrameworkMessage[Index].Message); + break; + } + } + + return Status; +} + +/** + Provides an interface that a software module can call to report an ASF DXE status code. + + @param[in] Type Indicates the type of status code being reported. + @param[in] Value Describes the current status of a hardware or software entity. + This included information about the class and subclass that is + used to classify the entity as well as an operation. + @param[in] Instance The enumeration of a hardware or software entity within + the system. Valid instance numbers start with 1. + @param[in] CallerId This optional parameter may be used to identify the caller. + This parameter allows the status code driver to apply different + rules to different callers. + @param[in] Data This optional parameter may be used to pass additional data. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_DEVICE_ERROR The function should not be completed due to a device error. +**/ +EFI_STATUS +EFIAPI +AmtReportStatusCode ( + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN EFI_GUID * CallerId OPTIONAL, + IN EFI_STATUS_CODE_DATA * Data OPTIONAL + ) +{ + UINTN Index; + EFI_STATUS Status; + + if (mProgressEventEnabled) { + if ((Type & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) { + for (Index = 0; Index < sizeof (mAsfProgressDataHubMap) / sizeof (EFI_ASF_DATA_HUB_MAP); Index++) { + if (mAsfProgressDataHubMap[Index].StatusCodeValue == Value) { + return SendPostPacket (mAsfProgressDataHubMap[Index].MessageType); + } + } + } + } + + if ((Type & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) { + for (Index = 0; Index < sizeof (mAsfErrorDataHubMap) / sizeof (EFI_ASF_DATA_HUB_MAP); Index++) { + if (mAsfErrorDataHubMap[Index].StatusCodeValue == Value) { + Status = SendPostPacket (mAsfErrorDataHubMap[Index].MessageType); + if ((Status == EFI_DEVICE_ERROR) && IsForcePushErrorEvent (mAsfErrorDataHubMap[Index].MessageType)) { + SaveForcePushErrorEvent (mAsfErrorDataHubMap[Index].MessageType); + } + + return Status; + } + } + } + + return EFI_SUCCESS; +} + +/** + This routine puts PET message to MessageQueue, which will be sent later. + + @param[in] Type StatusCode message type. + @param[in] Value StatusCode message value. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures +**/ +EFI_STATUS +QueuePetMessage ( + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value + ) +{ + AMT_PET_QUEUE_NODE *NewNode; + + NewNode = AllocateZeroPool (sizeof (AMT_PET_QUEUE_NODE)); + ASSERT (NewNode != NULL); + if (NewNode == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + NewNode->Signature = AMT_PET_QUEUE_NODE_SIGNATURE; + NewNode->Type = Type; + NewNode->Value = Value; + InsertTailList ((LIST_ENTRY *) &gAmtPetQueueProtocol->MessageList, (LIST_ENTRY *) &NewNode->Link); + + return EFI_SUCCESS; +} + +/** + This routine sends PET message in MessageQueue. + + @param[in] PeiServices PeiServices pointer. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +SendPETMessageInQueue ( + VOID + ) +{ + EFI_STATUS Status; + AMT_PET_QUEUE_HOB *PETQueueHob; + EFI_LIST_ENTRY *Link; + AMT_PET_QUEUE_NODE *Node; + EFI_PEI_HOB_POINTERS Hob; + + EFI_HECI_PROTOCOL *Heci; + UINT32 MeStatus; + EFI_STATUS TempStatus; + + /// + /// Try HECI state + /// + Status = gBS->LocateProtocol ( + &gEfiHeciProtocolGuid, + NULL, + (VOID **) &Heci + ); + if (EFI_ERROR (Status)) { + return EFI_NOT_READY; + } + + TempStatus = Heci->GetMeStatus (&MeStatus); + ASSERT_EFI_ERROR (TempStatus); + + /// + /// Only send ASF Push Progress code when ME is ready. Ignore FW Init Status. + /// + if (ME_STATUS_ME_STATE_ONLY (MeStatus) != ME_READY) { + return EFI_NOT_READY; + } + /// + /// Get PETQueueHob + /// + Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, (VOID **) &PETQueueHob); + + while (TRUE) { + PETQueueHob = GetNextGuidHob (&gAmtPetQueueHobGuid, PETQueueHob); + if (PETQueueHob == NULL) { + break; + } + /// + /// Send message + /// + AmtReportStatusCode (PETQueueHob->Type, PETQueueHob->Value, 0, NULL, NULL); + + /// + /// Mark it as sent + /// + PETQueueHob->Type = (UINT32) -1; + + /// + /// Need find next one + /// + Hob.Raw = (VOID *) PETQueueHob; + PETQueueHob = (AMT_PET_QUEUE_HOB *) GET_NEXT_HOB (Hob); + } + /// + /// Send DXEQueue + /// + Link = (EFI_LIST_ENTRY *) GetFirstNode ((LIST_ENTRY *) &gAmtPetQueueProtocol->MessageList); + + while (!IsNull ((LIST_ENTRY *) &gAmtPetQueueProtocol->MessageList, (LIST_ENTRY *) Link)) { + Node = AMT_PET_QUEUE_NODE_FROM_LINK (Link); + + /// + /// Send message + /// + AmtReportStatusCode (Node->Type, Node->Value, 0, NULL, NULL); + + /// + /// Mark it as sent + /// + Node->Type = (UINT32) -1; + + Link = (EFI_LIST_ENTRY *) GetNextNode ( + (LIST_ENTRY *) &gAmtPetQueueProtocol->MessageList, + (LIST_ENTRY *) &Node->Link + ); + } + + return EFI_SUCCESS; +} + +/** + This routine creats PET MessageQueue. + + @param[in] None + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +AmtCreateMessageQueue ( + VOID + ) +{ + /// + /// Create Queue for later usage + /// + gAmtPetQueueProtocol = &gAmtPetQueue; + + InitializeListHead ((LIST_ENTRY *) &gAmtPetQueueProtocol->MessageList); + + return EFI_SUCCESS; +} + +/** + This routine saves current ForcePush ErrorEvent to Variable, which will be sent again. + + @param[in] MessageType ASF PET message type. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures +**/ +EFI_STATUS +SaveForcePushErrorEvent ( + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +{ + EFI_STATUS Status; + UINTN Size; + EFI_FRAMEWORK_MESSAGE_TYPE *Message; + + /// + /// Create PET queue variable + /// + Message = NULL; + Size = 0; + Status = gRT->GetVariable ( + AMT_FORCE_PUSH_PET_VARIABLE_NAME, + &gAmtForcePushPetVariableGuid, + NULL, + &Size, + NULL + ); + if (Status == EFI_BUFFER_TOO_SMALL) { + /// + /// Get the exist message + /// + Message = AllocateZeroPool (Size + sizeof (MessageType)); + ASSERT (Message != NULL); + if (Message == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Status = gRT->GetVariable ( + AMT_FORCE_PUSH_PET_VARIABLE_NAME, + &gAmtForcePushPetVariableGuid, + NULL, + &Size, + Message + ); + ASSERT_EFI_ERROR (Status); + + /// + /// Fill new item + /// + *(EFI_FRAMEWORK_MESSAGE_TYPE *) ((UINTN) Message + Size) = MessageType; + Size += sizeof (MessageType); + } else if (Status == EFI_NOT_FOUND) { + /// + /// Create a new one + /// + Size = sizeof (MessageType); + Message = AllocateZeroPool (sizeof (MessageType)); + ASSERT (Message != NULL); + if (Message == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + *Message = MessageType; + } else { + ASSERT (FALSE); + } + /// + /// Set PET message to variable + /// + if (Message != NULL) { + Status = gRT->SetVariable ( + AMT_FORCE_PUSH_PET_VARIABLE_NAME, + &gAmtForcePushPetVariableGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + Size, + Message + ); + ASSERT_EFI_ERROR (Status); + + FreePool (Message); + } + + return EFI_SUCCESS; +} + +/** + This routine converts Hob ForcePush ErrorEvent to Variable, which will be sent again. + + @param[in] None + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +SaveForcePushErrorEventFromPeiToDxe ( + VOID + ) +{ + AMT_FORCE_PUSH_PET_HOB *AmtForcePushPETHob; + EFI_STATUS Status; + EFI_PEI_HOB_POINTERS Hob; + + /// + /// Find ASF ForcePush PET Hob + /// + Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, (VOID **) &AmtForcePushPETHob); + + while (TRUE) { + AmtForcePushPETHob = GetNextGuidHob (&gAmtForcePushPetHobGuid, AmtForcePushPETHob); + if (AmtForcePushPETHob == NULL) { + break; + } + + SaveForcePushErrorEvent (AmtForcePushPETHob->MessageType); + + /// + /// Need find next one + /// + Hob.Raw = (VOID *) AmtForcePushPETHob; + AmtForcePushPETHob = (AMT_FORCE_PUSH_PET_HOB *) GET_NEXT_HOB (Hob); + } + + return EFI_SUCCESS; +} + +/** + This routine tries to send all ForcePush ErrorEvent. + If message is sent, it will be deleted from Variable. + If message is not sent, it will be still stored to Variable. + + @param[in] None + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures +**/ +EFI_STATUS +SendAllForcePushErrorEvent ( + VOID + ) +{ + EFI_STATUS Status; + UINTN Size; + EFI_FRAMEWORK_MESSAGE_TYPE *Message; + UINTN Index; + EFI_FRAMEWORK_MESSAGE_TYPE *NewMessage; + UINTN NewIndex; + + /// + /// Create PET queue variable + /// + Message = NULL; + Size = 0; + Status = gRT->GetVariable ( + AMT_FORCE_PUSH_PET_VARIABLE_NAME, + &gAmtForcePushPetVariableGuid, + NULL, + &Size, + NULL + ); + if (Status == EFI_NOT_FOUND) { + return EFI_SUCCESS; + } + + if (Status != EFI_BUFFER_TOO_SMALL) { + return Status; + } + /// + /// Get the exist message + /// + Message = AllocateZeroPool (Size); + ASSERT (Message != NULL); + if (Message == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + NewMessage = AllocateZeroPool (Size); + ASSERT (NewMessage != NULL); + if (NewMessage == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Status = gRT->GetVariable ( + AMT_FORCE_PUSH_PET_VARIABLE_NAME, + &gAmtForcePushPetVariableGuid, + NULL, + &Size, + Message + ); + ASSERT_EFI_ERROR (Status); + + NewIndex = 0; + for (Index = 0; Index < Size / sizeof (EFI_FRAMEWORK_MESSAGE_TYPE); Index++) { + Status = SendPostPacket (Message[Index]); + if (EFI_ERROR (Status)) { + /// + /// Fail, save it again. + /// + NewMessage[NewIndex] = Message[Index]; + NewIndex++; + } + } + + FreePool (Message); + + /// + /// SetVariable again + /// + if (NewIndex == 0) { + FreePool (NewMessage); + NewMessage = NULL; + } + + Status = gRT->SetVariable ( + AMT_FORCE_PUSH_PET_VARIABLE_NAME, + &gAmtForcePushPetVariableGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + NewIndex * sizeof (EFI_FRAMEWORK_MESSAGE_TYPE), + NewMessage + ); + + if (NewMessage != NULL) { + FreePool (NewMessage); + } + + return EFI_SUCCESS; +} diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.cif b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.cif new file mode 100644 index 0000000..f091a20 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.cif @@ -0,0 +1,13 @@ +<component> + name = "AlertStandardFormatDxe" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\AlertStandardFormat\Heci\Dxe\" + RefName = "AlertStandardFormatDxe" +[files] +"AlertStandardFormatDxe.sdl" +"AlertStandardFormatDxe.mak" +"AlertStandardFormatDxe.c" +"AlertStandardFormatDxe.dxs" +"AlertStandardFormatDxe.h" +"AlertStandardFormatDxe.inf" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.dxs b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.dxs new file mode 100644 index 0000000..dd340c9 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.dxs @@ -0,0 +1,47 @@ +/** @file + Dependency expression source file. + +@copyright + Copyright (c) 2005 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "DxeDepex.h" + +// +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase; +// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase. +// +#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB) +#include "EfiDepex.h" + +#include EFI_PROTOCOL_DEFINITION (DataHub) +#include EFI_PROTOCOL_DEFINITION (Heci) +#include EFI_PROTOCOL_DEFINITION (AcpiSupport) +#include EFI_PROTOCOL_DEFINITION (AmtPlatformPolicy) + +#endif + +DEPENDENCY_START + EFI_DATA_HUB_PROTOCOL_GUID AND + EFI_HECI_PROTOCOL_GUID AND + EFI_ACPI_SUPPORT_GUID AND + DXE_PLATFORM_AMT_POLICY_GUID +DEPENDENCY_END diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.h b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.h new file mode 100644 index 0000000..0e6b947 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.h @@ -0,0 +1,340 @@ +/** @file + Include file for ASF Driver + +@copyright + Copyright (c) 2005 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _ALERT_STANDARD_FORMAT_H +#define _ALERT_STANDARD_FORMAT_H + +#include "AslUpdateLib.h" +#include "AlertStandardFormatTable.h" +#include "AmtLib.h" +#include "AlertStandardFormatCommon.h" + +// +// Driver Consumed Protocol Prototypes +// +#include EFI_PROTOCOL_CONSUMER (DataHub) +#include EFI_PROTOCOL_CONSUMER (AlertStandardFormat) +#include EFI_PROTOCOL_CONSUMER (HECI) +#include EFI_PROTOCOL_CONSUMER (ConsoleControl) +#include EFI_GUID_DEFINITION (ConsoleLock) +#include EFI_GUID_DEFINITION (AmtForcePushPetPolicy) + +/// +/// ASF Over HECI +/// +typedef struct _HECI_ASF_PUSH_PROGRESS_CODE { + UINT8 Command; + UINT8 ByteCount; + EFI_ASF_MESSAGE AsfMessage; + UINT8 EventData[3]; + UINT8 Reserved[2]; +} HECI_ASF_PUSH_PROGRESS_CODE; + +#define HECI_ASF_PUSH_PROGRESS_CODE_LENGTH 0x12 + +typedef struct _HECI_ASF_GET_BOOT_OPTIONS { + UINT8 Command; + UINT8 ByteCount; + UINT8 SubCommand; + UINT8 VersionNumber; +} HECI_ASF_GET_BOOT_OPTIONS; + +#define HECI_ASF_GET_BOOT_OPTIONS_LENGTH 0x04 + +typedef struct _HECI_ASF_GET_BOOT_OPTIONS_RESPONSE { + UINT8 Command; + UINT8 ByteCount; + EFI_ASF_BOOT_OPTIONS AsfBootOptions; + UINT8 Reserved; +} HECI_ASF_GET_BOOT_OPTIONS_RESPONSE; + +#define HECI_ASF_GET_BOOT_OPTIONS_RESPONSE_LENGTH 0x0F + +typedef struct _HECI_ASF_CLEAR_BOOT_OPTION { + UINT8 Command; + UINT8 ByteCount; + EFI_ASF_CLEAR_BOOT_OPTIONS AsfClearBootOptions; +} HECI_ASF_CLEAR_BOOT_OPTION; + +#define HECI_ASF_CLEAR_BOOT_OPTION_LENGTH 0x04 + +typedef enum _HASFM_COMMAND_CODE +{ + ASF_MESSAGING_CMD = 0x04, + ASF_PUSH_PROGESS_CODE_SUBCMD = 0x12, + ASF_MENAGEMENT_CONTROL = 0x02, + ASF_WDT_START_SUBCMD = 0x13, + ASF_WDT_STOP_SUBCMD = 0x14, + ASF_CONFIGURATION_CMD = 0x03, + ASF_CLEAR_BOOT_OPTION_SUBCMD = 0x15, + ASF_RETURN_BOOT_OPTION_SUBCMD = 0x16, + ASF_NO_BOOT_OPTION_SUBCMD = 0x17 +} HASFM_COMMAND_CODE; + +typedef struct { + EFI_FRAMEWORK_MESSAGE_TYPE MessageType; + EFI_ASF_MESSAGE Message; +} EFI_ASF_FRAMEWORK_MESSAGE; + +typedef struct { + EFI_FRAMEWORK_MESSAGE_TYPE MessageType; + EFI_STATUS_CODE_VALUE StatusCodeValue; +} EFI_ASF_DATA_HUB_MAP; + +#define ALERT_STANDARD_FORMAT_PRIVATE_DATA_SIGNATURE EFI_SIGNATURE_32 ('a', 's', 'f', 'd') + +/// +/// Declare a local instance structure for this driver +/// +typedef struct _ALERT_STANDARD_FORMAT_INSTANCE { + UINTN Signature; + EFI_HANDLE Handle; + + /// + /// Published interface + /// + EFI_ALERT_STANDARD_FORMAT_PROTOCOL AlertStandardFormat; + +} ALERT_STANDARD_FORMAT_INSTANCE; + +#include "Pei.h" +#include EFI_PPI_DEFINITION (AmtStatusCode) + +#define EFI_CONSOLE_OUT_DEVICE_GUID \ + { \ + 0xd3b36f2c, 0xd551, 0x11d4, \ + { \ + 0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d \ + } \ + } + +#define AMT_FORCE_PUSH_PET_VARIABLE_GUID \ + { \ + 0xd7ac94af, 0xa498, 0x45ec, 0xbf, 0xa2, 0xa5, 0x6e, 0x95, 0x34, 0x61, 0x8b \ + } + +#define AMT_FORCE_PUSH_PET_VARIABLE_NAME L"AmtForcePushErrorPET" + +#define AMT_PET_QUEUE_NODE_SIGNATURE EFI_SIGNATURE_32 ('A', 'M', 'T', 'Q') + +typedef struct _AMT_PET_QUEUE_NODE { + UINT32 Signature; + EFI_LIST_ENTRY Link; + EFI_STATUS_CODE_VALUE Value; + EFI_STATUS_CODE_TYPE Type; +} AMT_PET_QUEUE_NODE; + +#define AMT_PET_QUEUE_NODE_FROM_LINK(_node) CR (_node, AMT_PET_QUEUE_NODE, Link, AMT_PET_QUEUE_NODE_SIGNATURE) + +typedef struct { + EFI_LIST_ENTRY MessageList; +} AMT_PET_QUEUE_PROTOCOL; + +// +// Prototypes +// + +/** + The driver entry point - detect ASF support or not, if support, will install relative protocol. + + @param[in] ImageHandle Handle for this drivers loaded image protocol. + @param[in] SystemTable EFI system table. + + @retval EFI_SUCCESS The driver installed without error. + @exception EFI_UNSUPPORTED The chipset is unsupported by this driver. + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures. +**/ +EFI_STATUS +EFIAPI +AlertStandardFormatDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +; + +/** + Return the SMBus address used by the ASF driver. + Not applicable in Intel ME/HECI system, need to return EFI_UNSUPPORTED. + + @param[in] This The address of protocol + @param[in] SmbusDeviceAddress Out put the Smbus Address + + @exception EFI_UNSUPPORTED The function is unsupported by this driver +**/ +EFI_STATUS +EFIAPI +GetSmbusAddr ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + OUT UINTN *SmbusDeviceAddress + ) +; + +/** + Set the SMBus address used by the ASF driver. 0 is an invalid address. + Not applicable in Intel ME/HECI system, need to return EFI_UNSUPPORTED. + + @param[in] This The address of protocol + @param[in] SmbusDeviceAddress SMBus address of the device + + @exception EFI_UNSUPPORTED The function is unsupported by this driver +**/ +EFI_STATUS +EFIAPI +SetSmbusAddr ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + IN UINTN SmbusDeviceAddress + ) +; + +/** + Return the ASF Boot Options obtained from the controller. If the + Boot Options parameter is NULL and no boot options have been retrieved, + Query the ASF controller for its boot options. + Get ASF Boot Options through HECI. + + @param[in] This The address of protocol + @param[in] AsfBootOptions Pointer to ASF boot options to copy current ASF Boot options + + @retval EFI_SUCCESS Boot options copied + @retval EFI_NOT_READY No boot options +**/ +EFI_STATUS +EFIAPI +GetBootOptions ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + IN OUT EFI_ASF_BOOT_OPTIONS **AsfBootOptions + ) +; + +/** + Send ASF Message through HECI. + + @param[in] This The address of protocol + @param[in] AsfMessage Pointer to ASF message + + @retval EFI_SUCCESS Boot options copied + @retval EFI_INVALID_PARAMETER Invalid pointer + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +EFIAPI +SendAsfMessage ( + IN EFI_ALERT_STANDARD_FORMAT_PROTOCOL *This, + IN EFI_ASF_MESSAGE *AsfMessage + ) +; + +/** + This routine returns ForcePushPetPolicy information. + + @param[in] None + + @retval AMT_FORCE_PUSH_PET_POLICY_HOB ForcePushPetPolicy information. +**/ +AMT_FORCE_PUSH_PET_POLICY_HOB * +GetForcePushPetPolicy ( + VOID + ) +; + +/** + Filters all the progress and error codes for Asf. + + @param[in] Event The event registered. + @param[in] Context Event context. Not used in this event handler. +**/ +VOID +EFIAPI +DataHubEventCallback ( + IN EFI_EVENT Event, + IN VOID *Context + ) +; + +/** + Sends a POST packet across ASF + + @param[in] MessageType POST Status Code + + @retval EFI_DEVICE_ERROR No message found + @retval EFI_SUCCESS Boot options copied + @retval EFI_INVALID_PARAMETER Invalid pointer + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +SendPostPacket ( + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +; + +/** + This routine sends PET message in MessageQueue. + + @param[in] PeiServices PeiServices pointer. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +SendPETMessageInQueue ( + VOID + ) +; + +/** + This routine creats PET MessageQueue. + + @param[in] None + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +AmtCreateMessageQueue ( + VOID + ) +; + +/** + This routine saves current ForcePush ErrorEvent to Variable, which will be sent again. + + @param[in] MessageType ASF PET message type. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures +**/ +EFI_STATUS +SaveForcePushErrorEvent ( + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +; + +/** + This routine converts Hob ForcePush ErrorEvent to Variable, which will be sent again. + + @param[in] None + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +SaveForcePushErrorEventFromPeiToDxe ( + VOID + ) +; +#endif diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.inf b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.inf new file mode 100644 index 0000000..b484230 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.inf @@ -0,0 +1,99 @@ +## @file +# Component description file for Alert Standard Format driver. +# +#@copyright +# Copyright (c) 2005 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = AlertStandardFormatDxe +FILE_GUID = 33c6406d-2f6b-41b5-8705-52bafb633c09 +COMPONENT_TYPE = BS_DRIVER + +[sources.common] + AlertStandardFormatDxe.c + AlertStandardFormatDxe.h + +# +# Edk II Glue Driver Entry Point +# + EdkIIGlueDxeDriverEntryPoint.c + +[libraries.common] + AmtLib + MeGuidLib + MeProtocolLib + AslUpdateLib + EdkProtocolLib + EdkFrameworkProtocolLib + EdkIIGlueBaseMemoryLib + EdkIIGlueDxeReportStatusCodeLib + EdkIIGlueDxeHobLib + EdkIIGlueDxeDebugLibReportStatusCode + EdkIIGlueUefiBootServicesTableLib + EdkIIGlueUefiRuntimeServicesTableLib + EdkIIGlueDxeMemoryAllocationLib + +[includes.common] + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/ActiveManagement/AlertStandardFormat/Heci/Common + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Heci/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + +# +# Typically the sample code referenced will be available in the code base already +# So keep this include at the end to defer to the source base definition +# and only use the sample code definition if source base does not include these files. +# + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/SampleCode/Include + +# +# Edk II Glue Library, some hearder are included by R9 header so have to include +# + + $(EFI_SOURCE) + $(EFI_SOURCE)/Framework + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + DPX_SOURCE = AlertStandardFormatDxe.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=AlertStandardFormatDriverEntryPoint + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + -D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.mak b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.mak new file mode 100644 index 0000000..202d1c9 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.mak @@ -0,0 +1,59 @@ +# MAK file for the ModulePart:AlertStandardFormatDxe + +all : AlertStandardFormatDxe + +AlertStandardFormatDxe : $(BUILD_DIR)\AlertStandardFormatDxe.mak AlertStandardFormatDxeBin + +$(BUILD_DIR)\AlertStandardFormatDxe.mak : $(AlertStandardFormatDxe_DIR)\$(@B).cif $(AlertStandardFormatDxe_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(AlertStandardFormatDxe_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +AlertStandardFormatDxe_INCLUDES=\ + $(EDK_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(ME_INCLUDES)\ + $(AlertStandardFormat_INCLUDES)\ + $(IndustryStandard_INCLUDES)\ + $(INTEL_PCH_INCLUDES)\ + +AlertStandardFormatDxe_LIBS=\ + $(EDKPROTOCOLLIB)\ + $(EDKFRAMEWORKPROTOCOLLIB)\ + $(AmtLibDxe_LIB)\ + $(MeGuidLib_LIB)\ + $(MeProtocolLib_LIB)\ + $(MeAslUpdateLib_LIB)\ + $(EdkIIGlueBaseLib_LIB)\ +!IF "$(x64_BUILD)"=="1" + $(EdkIIGlueBaseLibX64_LIB)\ +!ELSE + $(EdkIIGlueBaseLibIA32_LIB)\ +!ENDIF + $(EdkIIGlueUefiLib_LIB)\ + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGlueDxeReportStatusCodeLib_LIB)\ + $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\ + $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\ + $(EdkIIGlueUefiBootServicesTableLib_LIB)\ + $(EdkIIGlueDxeMemoryAllocationLib_LIB)\ + $(EdkIIGlueDxeHobLib_LIB)\ + +AlertStandardFormatDxe_DEFINES=\ + $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=AlertStandardFormatDriverEntryPoint"\ + /D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\ + +AlertStandardFormatDxeBin : $(AlertStandardFormatDxe_LIBS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\AlertStandardFormatDxe.mak all\ + "MY_INCLUDES=$(AlertStandardFormatDxe_INCLUDES)" \ + "MY_DEFINES=$(AlertStandardFormatDxe_DEFINES)"\ + GUID=33c6406d-2f6b-41b5-8705-52bafb633c09 \ + ENTRY_POINT=_ModuleEntryPoint \ + EDKIIModule=DXEDRIVER\ + TYPE=BS_DRIVER \ + DEPEX1=$(AlertStandardFormatDxe_DIR)\AlertStandardFormatDxe.dxs \ + DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \ + COMPRESS=1 diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.sdl b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.sdl new file mode 100644 index 0000000..938ff01 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Dxe/AlertStandardFormatDxe.sdl @@ -0,0 +1,25 @@ +TOKEN + Name = AlertStandardFormatDxe_SUPPORT + Value = 1 + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable AlertStandardFormatDxe support in Project" +End + +MODULE + Help = "Includes AlertStandardFormatDxe.mak to Project" + File = "AlertStandardFormatDxe.mak" +End + +PATH + Name = "AlertStandardFormatDxe_DIR" + Help = "AlertStandardFormatDxe files source directory" +End + +ELINK + Name = "$(BUILD_DIR)\AlertStandardFormatDxe.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End
\ No newline at end of file diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.c b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.c new file mode 100644 index 0000000..10afe73 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.c @@ -0,0 +1,437 @@ +/** @file + Processes ASF messages + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include "AlertStandardFormatPei.h" +#include "MeLibPei.h" +#endif + +#define ASF_PEI +#include "AlertStandardFormatCommon.c" + +static PEI_AMT_STATUS_CODE_PPI mPeiAmtStatusCodePpi = { PeiAmtReportStatusCode }; + +static EFI_PEI_PPI_DESCRIPTOR mInstallPeiAmtStatusCodePpi = { + EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, + &gPeiAmtStatusCodePpiGuid, + &mPeiAmtStatusCodePpi +}; + +/** + Perform AMT PET message sending + + @param[in] FfsHeader FFS file header pointer of this driver. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS if the AMT StatusCode PPI is successfully installed. + @exception EFI_UNSUPPORTED ASF is not enabled or ManageabilityMode is zero. +**/ +EFI_STATUS +EFIAPI +AlertStandardFormatDriverPeiEntryPoint ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + + /// + /// First check if ASF support is enabled in Setup. + /// + if (!PeiAsfSupported (PeiServices)) { + return EFI_UNSUPPORTED; + } + /// + /// Sending ASF Messaging if ManageabilityMode is not zero + /// + if (ManageabilityModeSetting (PeiServices) == MNT_OFF) { + return EFI_UNSUPPORTED; + } + /// + /// Install AMT report status code PPI + /// + Status = (**PeiServices).InstallPpi (PeiServices, &mInstallPeiAmtStatusCodePpi); + ASSERT_EFI_ERROR (Status); + + /// + /// Try to send PET message + /// + SendPETMessageInQueue (PeiServices); + + return EFI_SUCCESS; +} + +/** + Send ASF Message. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] AsfMessage Pointer to ASF message + + @retval EFI_SUCCESS Boot options copied + @retval EFI_INVALID_PARAMETER Invalid pointer + @retval EFI_NOT_READY No controller + @retval EFI_DEVICE_ERROR The function should not be completed due to a device error +**/ +EFI_STATUS +SendAsfMessage ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_ASF_MESSAGE *AsfMessage + ) +{ + EFI_STATUS Status; + PEI_HECI_PPI *Heci; + UINT32 HeciMemBar; + UINT32 HeciLength; + HECI_ASF_PUSH_PROGRESS_CODE HeciAsfPushProgressCode; + UINT32 MeStatus; + + Status = (*PeiServices)->LocatePpi ( + PeiServices, + &gPeiHeciPpiGuid, // GUID + 0, // INSTANCE + NULL, // EFI_PEI_PPI_DESCRIPTOR + (VOID **) &Heci // PPI + ); + ASSERT_EFI_ERROR (Status); + + Status = Heci->InitializeHeci (PeiServices, Heci, &HeciMemBar); + if (EFI_ERROR (Status)) { + return EFI_NOT_READY; + } + + Status = Heci->GetMeStatus (PeiServices, &MeStatus); + ASSERT_EFI_ERROR (Status); + + /// + /// Only send ASF Push Progress code when ME is ready. Ignore FW Init Status. + /// + if (ME_STATUS_ME_STATE_ONLY (MeStatus) != ME_READY) { + return EFI_NOT_READY; + } + + ZeroMem ((VOID *) &HeciAsfPushProgressCode, sizeof (HECI_ASF_PUSH_PROGRESS_CODE)); + HeciAsfPushProgressCode.Command = EFI_ASF_MESSAGE_COMMAND_MESSAGE; + HeciAsfPushProgressCode.ByteCount = 0x10; + HeciLength = HECI_ASF_PUSH_PROGRESS_CODE_LENGTH; + CopyMem ((VOID *) &(HeciAsfPushProgressCode.AsfMessage), (VOID *) AsfMessage, sizeof (EFI_ASF_MESSAGE)); + + Status = Heci->SendMsg ( + PeiServices, + Heci, + (UINT32 *) &HeciAsfPushProgressCode, + HeciMemBar, + HeciLength, + BIOS_ASF_HOST_ADDR, + HECI_ASF_MESSAGE_ADDR + ); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + return EFI_SUCCESS; +} + +/** + This routine checks whethre current message is ForcePush message. + + @param[in] PeiServices PeiServices pointer. + @param[in] MessageType AMT PET Message Type. + + @retval TRUE It is ForcePush message. + @retval FALSE It is not ForcePush message. +**/ +BOOLEAN +IsForcePushErrorEvent ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +{ + AMT_FORCE_PUSH_PET_POLICY_HOB *AmtForcePushPETPolicyHob; + UINTN Index; + UINTN Number; + EFI_STATUS Status; + + Status = (*PeiServices)->GetHobList (PeiServices, (VOID **) &AmtForcePushPETPolicyHob); + ASSERT_EFI_ERROR (Status); + + AmtForcePushPETPolicyHob = GetNextGuidHob (&gAmtForcePushPetPolicyGuid, AmtForcePushPETPolicyHob); + if (AmtForcePushPETPolicyHob == NULL) { + return FALSE; + } + + Number = (AmtForcePushPETPolicyHob->EfiHobGuidType.Header.HobLength - sizeof (EFI_HOB_GUID_TYPE)) / + sizeof (EFI_FRAMEWORK_MESSAGE_TYPE); + for (Index = 0; Index < Number; Index++) { + if (AmtForcePushPETPolicyHob->MessageType[Index] == MessageType) { + return TRUE; + } + } + + return FALSE; +} + +/** + Provides an interface that a software module can call to report an ASF PEI status code. + + @param[in] PeiServices PeiServices pointer. + @param[in] This This interface. + @param[in] Type Indicates the type of status code being reported. + @param[in] Value Describes the current status of a hardware or software entity. + This included information about the class and subclass that is + used to classify the entity as well as an operation. + @param[in] Instance The enumeration of a hardware or software entity within + the system. Valid instance numbers start with 1. + @param[in] CallerId This optional parameter may be used to identify the caller. + This parameter allows the status code driver to apply different + rules to different callers. + @param[in] Data This optional parameter may be used to pass additional data. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_DEVICE_ERROR The function should not be completed due to a device error. +**/ +EFI_STATUS +EFIAPI +PeiAmtReportStatusCode ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_AMT_STATUS_CODE_PPI * This, + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN EFI_GUID * CallerId OPTIONAL, + IN EFI_STATUS_CODE_DATA * Data OPTIONAL + ) +{ + UINTN Index; + EFI_STATUS Status; + + Status = EFI_SUCCESS; + + if (PeiFwProgressSupport (PeiServices)) { + if ((Type & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) { + for (Index = 0; Index < sizeof (mAsfProgressDataHubMap) / sizeof (EFI_ASF_DATA_HUB_MAP); Index++) { + if (mAsfProgressDataHubMap[Index].StatusCodeValue == Value) { + /// + /// Queue Progress Code and send PET after checking Boot Options + /// + QueuePetMessage (PeiServices, Type, Value); + } + } + } + } + + if ((Type & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) { + for (Index = 0; Index < sizeof (mAsfErrorDataHubMap) / sizeof (EFI_ASF_DATA_HUB_MAP); Index++) { + if (mAsfErrorDataHubMap[Index].StatusCodeValue == Value) { + Status = SendPostPacket (PeiServices, mAsfErrorDataHubMap[Index].MessageType); + if ((Status == EFI_DEVICE_ERROR) && IsForcePushErrorEvent (PeiServices, mAsfErrorDataHubMap[Index].MessageType)) { + SaveForcePushErrorEvent (PeiServices, mAsfErrorDataHubMap[Index].MessageType); + } + + if (Status == EFI_NOT_READY) { + QueuePetMessage (PeiServices, Type, Value); + } + } + } + } + + return Status; +} + +/** + Sends a POST packet across ASF + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] MessageType POST Status Code + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +SendPostPacket ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +{ + UINTN Index; + + /// + /// Find the message to send across the wire + /// + for (Index = 0; Index < sizeof (mAsfFrameworkMessage) / sizeof (EFI_ASF_FRAMEWORK_MESSAGE); Index++) { + if (mAsfFrameworkMessage[Index].MessageType == MessageType) { + return SendAsfMessage (PeiServices, &mAsfFrameworkMessage[Index].Message); + } + } + + return EFI_SUCCESS; +} + +/** + This routine saves current ForcePush ErrorEvent to Hob, which will be sent again. + + @param[in] PeiServices PeiServices pointer. + @param[in] MessageType ASF PET message type. + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +SaveForcePushErrorEvent ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +{ + AMT_FORCE_PUSH_PET_HOB *ForcePushPETHob; + EFI_STATUS Status; + + /// + /// Create PET queue hob + /// + Status = (**PeiServices).CreateHob ( + PeiServices, + EFI_HOB_TYPE_GUID_EXTENSION, + sizeof (AMT_FORCE_PUSH_PET_HOB), + (VOID **) &ForcePushPETHob + ); + ASSERT_EFI_ERROR (Status); + + ForcePushPETHob->EfiHobGuidType.Name = gAmtForcePushPetHobGuid; + ForcePushPETHob->MessageType = MessageType; + + return EFI_SUCCESS; +} + +/** + This routine puts PET message to MessageQueue, which will be sent later. + + @param[in] PeiServices PeiServices pointer. + @param[in] Type StatusCode message type. + @param[in] Value StatusCode message value. + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +QueuePetMessage ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value + ) +{ + AMT_PET_QUEUE_HOB *PETQueueHob; + EFI_STATUS Status; + + /// + /// Create PET queue hob + /// + Status = (**PeiServices).CreateHob ( + PeiServices, + EFI_HOB_TYPE_GUID_EXTENSION, + sizeof (AMT_PET_QUEUE_HOB), + (VOID **) &PETQueueHob + ); + ASSERT_EFI_ERROR (Status); + PETQueueHob->EfiHobGuidType.Name = gAmtPetQueueHobGuid; + PETQueueHob->Value = Value; + + return EFI_SUCCESS; +} + +/** + This routine sends PET message in MessageQueue. + + @param[in] PeiServices PeiServices pointer. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +SendPETMessageInQueue ( + IN EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + AMT_PET_QUEUE_HOB *PETQueueHob; + EFI_PEI_HOB_POINTERS Hob; + + PEI_HECI_PPI *Heci; + UINT32 HeciMemBar; + UINT32 MeStatus; + + /// + /// Try HECI state + /// + Status = (*PeiServices)->LocatePpi ( + PeiServices, + &gPeiHeciPpiGuid, // GUID + 0, // INSTANCE + NULL, // EFI_PEI_PPI_DESCRIPTOR + (VOID **) &Heci // PPI + ); + ASSERT_EFI_ERROR (Status); + + Status = Heci->InitializeHeci (PeiServices, Heci, &HeciMemBar); + if (EFI_ERROR (Status)) { + return EFI_NOT_READY; + } + + Status = Heci->GetMeStatus (PeiServices, &MeStatus); + ASSERT_EFI_ERROR (Status); + + /// + /// Only send ASF Push Progress code when ME is ready. Ignore FW Init Status. + /// + if (ME_STATUS_ME_STATE_ONLY (MeStatus) != ME_READY) { + return EFI_NOT_READY; + } + /// + /// Get PETQueueHob + /// + Status = (*PeiServices)->GetHobList (PeiServices, (VOID **) &PETQueueHob); + ASSERT_EFI_ERROR (Status); + + while (TRUE) { + PETQueueHob = GetNextGuidHob (&gAmtPetQueueHobGuid, PETQueueHob); + if (PETQueueHob == NULL) { + break; + } + /// + /// Send message + /// + PeiAmtReportStatusCode (PeiServices, NULL, PETQueueHob->Type, PETQueueHob->Value, 0, NULL, NULL); + + /// + /// Mark it as sent + /// + PETQueueHob->Type = (UINT32) -1; + + /// + /// Need find next one + /// + Hob.Raw = (VOID *) PETQueueHob; + PETQueueHob = (AMT_PET_QUEUE_HOB *) GET_NEXT_HOB (Hob); + } + + return EFI_SUCCESS; +} diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.cif b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.cif new file mode 100644 index 0000000..ee123bf --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.cif @@ -0,0 +1,13 @@ +<component> + name = "AlertStandardFormatPei" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\AlertStandardFormat\Heci\Pei\" + RefName = "AlertStandardFormatPei" +[files] +"AlertStandardFormatPei.sdl" +"AlertStandardFormatPei.mak" +"AlertStandardFormatPei.c" +"AlertStandardFormatPei.dxs" +"AlertStandardFormatPei.h" +"AlertStandardFormatPei.inf" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.dxs b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.dxs new file mode 100644 index 0000000..236c6ec --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.dxs @@ -0,0 +1,29 @@ +/** @file + Dependency expression source file. + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + +#include "EfiDepex.h" + +#include EFI_PPI_DEFINITION (Heci) +#include EFI_PPI_DEFINITION (AmtPlatformPolicyPei) + +DEPENDENCY_START + PEI_HECI_PPI_GUID AND + PEI_AMT_PLATFORM_POLICY_PPI_GUID +DEPENDENCY_END diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.h b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.h new file mode 100644 index 0000000..b24dd69 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.h @@ -0,0 +1,204 @@ +/** @file + Processes ASF messages + +@copyright + Copyright (c) 2010 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _ALERT_STANDARD_FORMAT_PEI_H +#define _ALERT_STANDARD_FORMAT_PEI_H + +#include "AmtLibPei.h" +#include "MkhiMsgs.h" +#include "AlertStandardFormatCommon.h" + +// +// Driver Consumed Protocol Prototypes +// +#include EFI_PPI_CONSUMER (HECI) +#include EFI_PPI_PRODUCER (AmtStatusCode) +#include EFI_GUID_DEFINITION (MeBiosExtensionSetup) +#include EFI_GUID_DEFINITION (AmtForcePushPetPolicy) + +/// +/// ASF Over HECI +/// +#pragma pack(1) +typedef struct { + UINT8 SubCommand; + UINT8 Version; + UINT8 EventSensorType; + UINT8 EventType; + UINT8 EventOffset; + UINT8 EventSourceType; + UINT8 EventSeverity; + UINT8 SensorDevice; + UINT8 SensorNumber; + UINT8 Entity; + UINT8 EntityInstance; + UINT8 Data0; + UINT8 Data1; +} EFI_ASF_MESSAGE; +#pragma pack() + +typedef struct _HECI_ASF_PUSH_PROGRESS_CODE { + UINT8 Command; + UINT8 ByteCount; + EFI_ASF_MESSAGE AsfMessage; + UINT8 EventData[3]; + UINT8 Reserved[2]; +} HECI_ASF_PUSH_PROGRESS_CODE; + +#define HECI_ASF_PUSH_PROGRESS_CODE_LENGTH 0x12 + +typedef enum _HASFM_COMMAND_CODE +{ + ASF_MESSAGING_CMD = 0x04, + ASF_PUSH_PROGESS_CODE_SUBCMD = 0x12, + ASF_MENAGEMENT_CONTROL = 0x02, + ASF_WDT_START_SUBCMD = 0x13, + ASF_WDT_STOP_SUBCMD = 0x14, + ASF_CONFIGURATION_CMD = 0x03, + ASF_CLEAR_BOOT_OPTION_SUBCMD = 0x15, + ASF_RETURN_BOOT_OPTION_SUBCMD = 0x16, + ASF_NO_BOOT_OPTION_SUBCMD = 0x17 +} HASFM_COMMAND_CODE; + +typedef struct { + EFI_FRAMEWORK_MESSAGE_TYPE MessageType; + EFI_ASF_MESSAGE Message; +} EFI_ASF_FRAMEWORK_MESSAGE; + +typedef struct { + EFI_FRAMEWORK_MESSAGE_TYPE MessageType; + EFI_STATUS_CODE_VALUE StatusCodeValue; +} EFI_ASF_DATA_HUB_MAP; + +// +// Prototypes +// + +/** + Send ASF Message. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] AsfMessage Pointer to ASF message + + @retval EFI_SUCCESS Boot options copied + @retval EFI_INVALID_PARAMETER Invalid pointer + @retval EFI_NOT_READY No controller + @retval EFI_DEVICE_ERROR The function should not be completed due to a device error +**/ +EFI_STATUS +SendAsfMessage ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_ASF_MESSAGE *AsfMessage + ) +; + +/** + Provides an interface that a software module can call to report an ASF PEI status code. + + @param[in] PeiServices PeiServices pointer. + @param[in] This This interface. + @param[in] Type Indicates the type of status code being reported. + @param[in] Value Describes the current status of a hardware or software entity. + This included information about the class and subclass that is + used to classify the entity as well as an operation. + @param[in] Instance The enumeration of a hardware or software entity within + the system. Valid instance numbers start with 1. + @param[in] CallerId This optional parameter may be used to identify the caller. + This parameter allows the status code driver to apply different + rules to different callers. + @param[in] Data This optional parameter may be used to pass additional data. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_DEVICE_ERROR The function should not be completed due to a device error. +**/ +EFI_STATUS +EFIAPI +PeiAmtReportStatusCode ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_AMT_STATUS_CODE_PPI * This, + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN EFI_GUID * CallerId OPTIONAL, + IN EFI_STATUS_CODE_DATA * Data OPTIONAL + ) +; + +/** + Sends a POST packet across ASF + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] MessageType POST Status Code + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +SendPostPacket ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +; + +/** + This routine saves current ForcePush ErrorEvent to Hob, which will be sent again. + + @param[in] PeiServices PeiServices pointer. + @param[in] MessageType ASF PET message type. + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +SaveForcePushErrorEvent ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_FRAMEWORK_MESSAGE_TYPE MessageType + ) +; + +/** + This routine puts PET message to MessageQueue, which will be sent later. + + @param[in] PeiServices PeiServices pointer. + @param[in] Type StatusCode message type. + @param[in] Value StatusCode message value. + + @retval EFI_SUCCESS The function completed successfully +**/ +EFI_STATUS +QueuePetMessage ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value + ) +; + +/** + This routine sends PET message in MessageQueue. + + @param[in] PeiServices PeiServices pointer. + + @retval EFI_SUCCESS The function completed successfully + @retval EFI_NOT_READY No controller +**/ +EFI_STATUS +SendPETMessageInQueue ( + IN EFI_PEI_SERVICES **PeiServices + ) +; +#endif diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.inf b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.inf new file mode 100644 index 0000000..8bd8d0f --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.inf @@ -0,0 +1,93 @@ +## @file +# Component description file for Alert Standard Format driver. +# +#@copyright +# Copyright (c) 2005 - 2013 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = AlertStandardFormatPei +FILE_GUID = 3e4817fd-2742-4351-b59f-91493280329c +COMPONENT_TYPE = PE32_PEIM + +[sources.common] + AlertStandardFormatPei.c + AlertStandardFormatPei.h + +# +# Edk II Glue Driver Entry Point +# + EdkIIGluePeimEntryPoint.c + +[libraries.common] + PeiLib + AmtLibPei + MeGuidLib + MeLibPpi + EdkIIGlueBaseIoLibIntrinsic + EdkIIGluePeiDebugLibReportStatusCode + EdkIIGluePeiReportStatusCodeLib + EdkIIGluePeiServicesLib + EdkIIGlueBasePciLibPciExpress + EdkIIGlueBasePciExpressLib + EdkIIGluePeiHobLib + +[includes.common] + $(EDK_SOURCE)/Foundation/library/Pei/Include + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Library/Pei + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/ActiveManagement/AlertStandardFormat/Heci/Common + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Pei + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Pei + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + +# +# Typically the sample code referenced will be available in the code base already +# So keep this include at the end to defer to the source base definition +# and only use the sample code definition if source base does not include these files. +# + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/SampleCode/Include + +# +# Edk II Glue Library, some hearder are included by R9 header so have to include +# + $(EFI_SOURCE) + $(EFI_SOURCE)/Framework + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + DPX_SOURCE = AlertStandardFormatPei.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=AlertStandardFormatDriverPeiEntryPoint + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + -D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_PEI_SERVICES_LIB__ \ + -D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.mak b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.mak new file mode 100644 index 0000000..8ff971a --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.mak @@ -0,0 +1,50 @@ +# MAK file for the ModulePart:AlertStandardFormat +all : AlertStandardFormatPei + +AlertStandardFormatPei : $(BUILD_DIR)\AlertStandardFormatPei.mak AlertStandardFormatPeiBin + +$(BUILD_DIR)\AlertStandardFormatPei.mak : $(AlertStandardFormatPei_DIR)\$(@B).cif $(AlertStandardFormatPei_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(AlertStandardFormatPei_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +AlertStandardFormatPei_INCLUDES=\ + $(EDK_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(ME_INCLUDES)\ + $(AlertStandardFormat_INCLUDES)\ + $(IndustryStandard_INCLUDES)\ + +AlertStandardFormatPei_LIBS=\ + $(EDKPROTOCOLLIB)\ + $(MeGuidLib_LIB)\ + $(MeLibPpi_LIB)\ + $(AmtLibPei_LIB)\ + $(EdkIIGlueBaseLib_LIB)\ + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGlueBaseLibIA32_LIB)\ + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\ + $(EdkIIGluePeiReportStatusCodeLib_LIB)\ + $(EdkIIGluePeiServicesLib_LIB)\ + $(EdkIIGluePeiHobLib_LIB)\ + +AlertStandardFormatPei_DEFINES=\ + $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=AlertStandardFormatDriverPeiEntryPoint"\ + /D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_PEI_SERVICES_LIB__\ + /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \ + +AlertStandardFormatPeiBin : $(AlertStandardFormatPei_LIBS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\AlertStandardFormatPei.mak all\ + "MY_INCLUDES=$(AlertStandardFormatPei_INCLUDES)"\ + "MY_DEFINES=$(AlertStandardFormatPei_DEFINES)"\ + GUID=3e4817fd-2742-4351-b59f-91493280329c \ + ENTRY_POINT=_ModuleEntryPoint \ + EDKIIModule=PEIM\ + TYPE=PEIM \ + DEPEX1=$(AlertStandardFormatPei_DIR)\AlertStandardFormatPei.dxs \ + DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \ + COMPRESS=0 diff --git a/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.sdl b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.sdl new file mode 100644 index 0000000..ec7b2cd --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AlertStandardFormat/Heci/Pei/AlertStandardFormatPei.sdl @@ -0,0 +1,25 @@ +TOKEN + Name = AlertStandardFormatPei_SUPPORT + Value = 1 + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable AlertStandardFormat support in Project" +End + +MODULE + Help = "Includes AlertStandardFormat.mak to Project" + File = "AlertStandardFormatPei.mak" +End + +PATH + Name = "AlertStandardFormatPei_DIR" + Help = "AlertStandardFormatPei files source directory" +End + +ELINK + Name = "$(BUILD_DIR)\AlertStandardFormatPei.ffs" + Parent = "FV_BB" + InvokeOrder = AfterParent +End diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/AmtBootOptions.cif b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/AmtBootOptions.cif new file mode 100644 index 0000000..a1c7a9f --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/AmtBootOptions.cif @@ -0,0 +1,10 @@ +<component> + name = "AmtBootOptions" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\AmtBootOptions\" + RefName = "AmtBootOptions" +[files] +"AmtBootOptions.sdl" +[parts] +"AmtDxe" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/AmtBootOptions.sdl b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/AmtBootOptions.sdl new file mode 100644 index 0000000..86d7fc9 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/AmtBootOptions.sdl @@ -0,0 +1,21 @@ +TOKEN + Name = AmtBootOptions_SUPPORT + Value = 1 + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable AMT support in Project" +End + +PATH + Name = "AmtBootOptions_SOURCE" + Help = "AMT Driver files source directory" +End + +ELINK + Name = "/I$(AmtBootOptions_SOURCE)\Include" + Parent = "ME_INCLUDES" + InvokeOrder = AfterParent +End + diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.cif b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.cif new file mode 100644 index 0000000..295ac90 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.cif @@ -0,0 +1,13 @@ +<component> + name = "AMTDxe" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\AmtBootOptions\Dxe\" + RefName = "AMTDxe" +[files] +"AMTDxe.sdl" +"AMTDxe.mak" +"ActiveManagement.c" +"ActiveManagement.dxs" +"ActiveManagement.h" +"ActiveManagement.inf" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.mak b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.mak new file mode 100644 index 0000000..981a295 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.mak @@ -0,0 +1,58 @@ +# MAK file for the eModule:AMTDxe + +all : AMTDxe + + +AMTDxe : $(BUILD_DIR)\AMTDxe.mak AMTDxeBin + +$(BUILD_DIR)\AMTDxe.mak : $(AMTDxe_DIR)\$(@B).cif $(AMTDxe_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(AMTDxe_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + + +AMTDxe_INCLUDES=\ + $(ME_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(INTEL_PCH_INCLUDES) + + +AMTDxe_DEFINES = $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=ActiveManagementEntryPoint"\ + /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\ + /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \ + + +AMTDxe_LIB_LINKS =\ + $(EDKPROTOCOLLIB)\ + $(ProtocolLib_LIB)\ + $(EFISCRIPTLIB)\ + $(AmtLibDxe_LIB)\ + $(MeLibDxe_LIB)\ + $(MeChipsetDxeLib_LIB)\ + $(EDKFRAMEWORKPROTOCOLLIB)\ + $(EdkIIGlueBaseLib_LIB)\ +!IF "$(x64_BUILD)"=="1" + $(EdkIIGlueBaseLibX64_LIB)\ +!ELSE + $(EdkIIGlueBaseLibIA32_LIB)\ +!ENDIF + $(EdkIIGlueDxeReportStatusCodeLib_LIB)\ + $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\ + $(EdkIIGlueUefiBootServicesTableLib_LIB)\ + $(EdkIIGlueBasePciLibPciExpress_LIB)\ + $(PchPlatformDxeLib_LIB) + + +AMTDxeBin : $(AMTDxe_LIB_LINKS) $(MeDxe_LIB_LINKS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\AMTDxe.mak all\ + "MY_INCLUDES=$(AMTDxe_INCLUDES)"\ + "MY_DEFINES=$(AMTDxe_DEFINES)"\ + GUID=D739F969-FB2D-4bc2-AFE7-081327D3FEDE \ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=BS_DRIVER \ + EDKIIModule=DXEDRIVER\ + DEPEX1=$(AMTDxe_DIR)\ActiveManagement.dxs \ + DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \ + COMPRESS=1\ diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.sdl b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.sdl new file mode 100644 index 0000000..be1bfc0 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/AMTDxe.sdl @@ -0,0 +1,29 @@ +TOKEN + Name = "AMTDxe_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable AMT Dxe support in Project" +End +MODULE + Help = "Includes AMTDxe.mak to Project" + File = "AMTDxe.mak" +End + +PATH + Name = "AMTDxe_DIR" + Help = "AMT Driver files source directory" +End + +PATH + Name = "AMTDxe_SOURCE" + Help = "AMT Driver files source directory" +End + +ELINK + Name = "$(BUILD_DIR)\AMTDxe.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.c b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.c new file mode 100644 index 0000000..681bb6b --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.c @@ -0,0 +1,553 @@ +/** @file + Defines and prototypes for the ActiveManagement driver. + This driver implements the ActiveManagement protocol for iAMT. + It provides some functions to get Boot Options from ASF. + +@copyright + Copyright (c) 2004 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include "ActiveManagement.h" +#include "MeLib.h" +#include "MeAccess.h" +#endif +// +// Global variables +// +EFI_ASF_BOOT_OPTIONS *mAsfBootOptions; + +ACTIVE_MANAGEMENT_INSTANCE ActiveManagementInstance = { + ACTIVE_MANAGEMENT_PRIVATE_DATA_SIGNATURE, + NULL, + { + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetIderState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetEnforceSecureBootState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetSolState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetRemoteFlashState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetBiosSetupState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetBiosPauseState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetConsoleLockState, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetKvmState, + (EFI_ACTIVE_MANAGEMENT_IDER_BOOT_DEVICE_SELECTED) GetIderBootDeviceSelectd, + (EFI_ACTIVE_MANAGEMENT_ASF_BOOT_OPTIONS_GET) GetAsfBootOptions, + (EFI_ACTIVE_MANAGEMENT_BOOT_OPTIONS_STATE) GetProgressMsgRequest + }, + NULL +}; + +// +// Function implementations +// + +/** + Check if ASF boot options is present. + + @param[in] None. + + @retval True ASF boot option is present. + @retval False ASF boot option is not present +**/ +BOOLEAN +IsBootOptionsPresent ( + VOID + ) +{ + return mAsfBootOptions->SubCommand == ASF_BOOT_OPTIONS_PRESENT; +} + +/** + Check if LANA ID of ASF boot options is Industry ID. + + @param[in] None. + + @retval True IANA ID of ASF boot options is Industry ID. + @retval False IANA ID of ASF boot options is not Industry ID. +**/ +BOOLEAN +IsIndustryIanaId ( + VOID + ) +{ + volatile BOOLEAN RetVal; + + RetVal = FALSE; + if (IsBootOptionsPresent ()) { + if (mAsfBootOptions->IanaId == ASF_INDUSTRY_CONVERTED_IANA) { + RetVal = TRUE; + } + } + + return RetVal; +} + +/** + Check if LANA ID of ASF boot options is Intel ID. + + @param[in] None. + + @retval True IANA ID of ASF boot options is Intel ID. + @retval False IANA ID of ASF boot options is not Intel ID. +**/ +BOOLEAN +IsIntelIanaId ( + VOID + ) +{ + volatile BOOLEAN RetVal; + + RetVal = FALSE; + + if (IsBootOptionsPresent ()) { + if (mAsfBootOptions->IanaId == ASF_INTEL_CONVERTED_IANA) { + RetVal = TRUE; + } + } + + return RetVal; +} + +/** + Check if it is Intel ASF boot options. + + @param[in] None. + + @retval True It is Intel ASF boot options. + @retval False It is not Intel ASF boot options. +**/ +BOOLEAN +IsIntelAmtBootOptions ( + VOID + ) +{ + BOOLEAN RetVal; + + RetVal = FALSE; + + if (IsIntelIanaId ()) { + if (mAsfBootOptions->SpecialCommand == ASF_INTEL_OEM_CMD) { + RetVal = TRUE; + } + } + + return RetVal; +} + +/** + Check the Special Command Parameter of Intel ASF boot options + + @param[in] Options Special Command Parameter bit we want to check + Bit 0: Set if IDER is to be used on the next boot. Parameter 2 is set + to the driver number to be used. + Bit 1: Set if Secure Boot is enforced over IDER + Bit 2: Set if the BIOS is to be re-flashed on the next boot + Bit 3: Set if the BIOS is to boot into the BIOS set-up screen. + Bit 4: Boot into BIOS Pause on the next boot is supported + Bit 5: Set if the BIOS is to participate in KVM session + @param[in] CurrentState Return the state of result + True - Special Command Parameter bit in Options is enabled. + False - Special Command Parameter bit in Options is disabled. + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +GetSpecialParamState ( + IN UINT16 Options, + IN OUT BOOLEAN *CurrentState + ) +{ + *CurrentState = FALSE; + if (IsIntelAmtBootOptions ()) { + if ((mAsfBootOptions->SpecialCommandParam & Options) == Options) { + *CurrentState = TRUE; + } + } + + return EFI_SUCCESS; +} + +/** + Check the OEM Parameter of Intel ASF boot options + + @param[in] Options OEM Parameter bit we want to check + Bit 0: Set if SOL is to be used on the next boot. + @param[in] CurrentState Return the state of result + True : OEM Parameter bit in Options is enabled. + False : OEM Parameter bit in Options is disabled. + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +GetOemParamatersState ( + IN UINT16 Options, + IN OUT BOOLEAN *CurrentState + ) +{ + *CurrentState = FALSE; + if (IsIntelAmtBootOptions ()) { + if ((mAsfBootOptions->OemParameters & Options) == Options) { + *CurrentState = TRUE; + } + } + + return EFI_SUCCESS; +} + +/** + Check the OEM Parameter of Intel ASF boot options + + @param[in] Options OEM Parameter bit we want to check + Bit 0: Set if SOL is to be used on the next boot. + @param[in] CurrentState Return the state of result + True : OEM Parameter bit in Options is enabled. + False : OEM Parameter bit in Options is disabled. + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +GetBootOptionsMaskState ( + IN UINT16 Options, + IN OUT BOOLEAN *CurrentState + ) +{ + *CurrentState = FALSE; + if (IsBootOptionsPresent ()) { + if ((mAsfBootOptions->BootOptions & Options) == Options) { + *CurrentState = TRUE; + } + } + + return EFI_SUCCESS; +} + +/** + This will return IDE Redirection Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of IDE Redireciton Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetIderState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetSpecialParamState (USE_IDER, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return IDE Redirection boot device to boot + + @param[in] This The address of protocol + @param[in] IdeBootDevice Return the boot device number to boot + Bits 0-1: If IDER boot is selected in Perimeter 1 then Bits 1,2 define the drive on the IDER controller to be used as the boot driver. + Bit 1 Bit0 + 0 0 Primary Master Drive + 0 1 Primary Slave Drive + 1 0 Secondary Master Drive + 1 1 Secondary Slave Drive + Bits 2-7: Reserved set to 0 + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetIderBootDeviceSelectd ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT UINT8 *IdeBootDevice + ) +{ + *IdeBootDevice = (UINT8) ((mAsfBootOptions->SpecialCommandParam & IDER_BOOT_DEVICE_MASK) >> IDER_BOOT_DEVICE_SHIFT); + return EFI_SUCCESS; +} + +/** + This will return Enforce Secure Boot over IDER Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of Enforce Secure Boot over IDER Boot Option + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetEnforceSecureBootState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetSpecialParamState (ENFORCE_SECURE_BOOT, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return Serial-over-Lan Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of Serial-over-Lan Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetSolState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetOemParamatersState (USE_SOL, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return Remote Flash Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of Remote Flash Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetRemoteFlashState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetSpecialParamState (REFLASH_BIOS, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return BIOS Setup Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of BIOS Setup Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetBiosSetupState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetSpecialParamState (BIOS_SETUP, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return BIOS Pause Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of BIOS Pause Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetBiosPauseState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetSpecialParamState (BIOS_PAUSE, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return Console Lock Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of BIOS Pause Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetConsoleLockState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetBootOptionsMaskState (LOCK_KEYBOARD, CurrentState); + return EFI_SUCCESS; +} + +/** + This will return KVM Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of KVM Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetKvmState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetSpecialParamState (USE_KVM, CurrentState); + return EFI_SUCCESS; +} + +/** + Return current ASF Boot Options + + @param[in] This Pointer to the EFI_ACTIVE_MANAGEMENT_PROTOCOL instance. + @param[in] AsfBootOptions ASF Boot Options + + @retval EFI_SUCCESS Boot options updated +**/ +EFI_STATUS +EFIAPI +GetAsfBootOptions ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT EFI_ASF_BOOT_OPTIONS **AsfBootOptions + ) +{ + *AsfBootOptions = mAsfBootOptions; + return EFI_SUCCESS; +} + +/** + Disable these two driver of Sol & Ider + + @param[in] None +**/ +VOID +SolIderDisable ( + VOID + ) +{ + IderDisable (); + SolDisable (); +} + +/** + Disable Usbr + + @param[in] None +**/ +VOID +UsbrDisable ( + VOID + ) +{ + Usbr1Disable (); + Usbr2Disable (); +} + +/** + This will return progress event Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of progress event Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetProgressMsgRequest ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +{ + GetBootOptionsMaskState (FORCE_PROGRESS_EVENTS, CurrentState); + return EFI_SUCCESS; +} + +/** + Entry point for the Active Management Driver. + + @param[in] ImageHandle Image handle of this driver. + @param[in] SystemTable Global system service table. + + @retval EFI_SUCCESS Initialization complete. + @exception EFI_UNSUPPORTED The chipset is unsupported by this driver. + @retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver. + @retval EFI_DEVICE_ERROR Device error, driver exits abnormally. +**/ +EFI_STATUS +EFIAPI +ActiveManagementEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + /// + /// Check policy if AMT is supported + /// + if (!AmtSupported () || !AsfSupported ()) { + SolIderDisable (); + UsbrDisable (); + return EFI_UNSUPPORTED; + } + /// + /// Get Protocol for ASF + /// + Status = gBS->LocateProtocol ( + &gEfiAlertStandardFormatProtocolGuid, + NULL, + (VOID **) &(ActiveManagementInstance.Asf) + ); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + /// + /// Get ASF Boot Options + /// + Status = ActiveManagementInstance.Asf->GetBootOptions (ActiveManagementInstance.Asf, &mAsfBootOptions); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + /// + /// Install the EFI_ACTIVE_MANAGEMENT_PROTOCOL interface + /// + Status = gBS->InstallMultipleProtocolInterfaces ( + &(ActiveManagementInstance.Handle), + &gEfiActiveManagementProtocolGuid, + &(ActiveManagementInstance.ActiveManagementProtocol), + NULL + ); + + return Status; +} diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.dxs b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.dxs new file mode 100644 index 0000000..6c5fd38 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.dxs @@ -0,0 +1,45 @@ +/** @file + Dependency expression source file. + +@copyright + Copyright (c) 2005 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "DxeDepex.h" + +// +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase; +// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase. +// +#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB) +#include "EfiDepex.h" + +#include EFI_PROTOCOL_DEFINITION (AlertStandardFormat) +#include EFI_PROTOCOL_DEFINITION (AmtPlatformPolicy) +#include EFI_PROTOCOL_DEFINITION (MePlatformPolicy) +#endif + +DEPENDENCY_START + EFI_ALERT_STANDARD_FORMAT_PROTOCOL_GUID AND + DXE_PLATFORM_AMT_POLICY_GUID AND + DXE_PLATFORM_ME_POLICY_GUID +DEPENDENCY_END diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.h b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.h new file mode 100644 index 0000000..72bb113 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.h @@ -0,0 +1,272 @@ +/** @file + Header file for the Active Management Driver. + +@copyright + Copyright (c) 2004 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ +#ifndef _ACTIVE_MANAGEMENT_H_ +#define _ACTIVE_MANAGEMENT_H_ +#include "Amt.h" +#include "AmtLib.h" + +// +// Used during initialization +// +#include EFI_PROTOCOL_CONSUMER (AlertStandardFormat) + +// +// Driver Produced Protocols +// +#include EFI_PROTOCOL_PRODUCER (ActiveManagement) + +// +// Private data structure definitions for the driver +// +#define ACTIVE_MANAGEMENT_PRIVATE_DATA_SIGNATURE EFI_SIGNATURE_32 ('A', 'M', 'T', 'P') + +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + EFI_ACTIVE_MANAGEMENT_PROTOCOL ActiveManagementProtocol; + EFI_ALERT_STANDARD_FORMAT_PROTOCOL *Asf; +} ACTIVE_MANAGEMENT_INSTANCE; + +#define ACTIVE_MANAGEMENT_INSTANCE_FROM_ACTIVE_MANAGEMENT_PROTOCOL(a) \ + CR ( \ + a, \ + ACTIVE_MANAGEMENT_INSTANCE, \ + ActiveManagementProtocol, \ + ACTIVE_MANAGEMENT_PRIVATE_DATA_SIGNATURE \ + ) + +// +// Function prototypes used by the AMT protocol. +// + +/** + This will return IDE Redirection Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of IDE Redireciton Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetIderState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return IDE Redirection boot device to boot + + @param[in] This The address of protocol + @param[in] IdeBootDevice Return the boot device number to boot + Bits 0-1: If IDER boot is selected in Perimeter 1 then Bits 1,2 define the drive on the IDER controller to be used as the boot driver. + Bit 1 Bit0 + 0 0 Primary Master Drive + 0 1 Primary Slave Drive + 1 0 Secondary Master Drive + 1 1 Secondary Slave Drive + Bits 2-7: Reserved set to 0 + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetIderBootDeviceSelectd ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT UINT8 *IdeBootDevice + ) +; + +/** + This will return Enforce Secure Boot over IDER Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of Enforce Secure Boot over IDER Boot Option + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetEnforceSecureBootState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return Serial-over-Lan Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of Serial-over-Lan Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetSolState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return Remote Flash Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of Remote Flash Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetRemoteFlashState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return BIOS Setup Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of BIOS Setup Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetBiosSetupState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return BIOS Pause Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of BIOS Pause Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetBiosPauseState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return Console Lock Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of BIOS Pause Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetConsoleLockState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + This will return KVM Boot Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of KVM Boot Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetKvmState ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + Return current ASF Boot Options + + @param[in] This Pointer to the EFI_ACTIVE_MANAGEMENT_PROTOCOL instance. + @param[in] AsfBootOptions ASF Boot Options + + @retval EFI_SUCCESS Boot options updated +**/ +EFI_STATUS +EFIAPI +GetAsfBootOptions ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT EFI_ASF_BOOT_OPTIONS **AsfBootOptions + ) +; + +/** + This will return progress event Option. + True if the option is enabled. + + @param[in] This The address of protocol + @param[in] CurrentState Return the state of progress event Opiton + + @retval EFI_SUCCESS The function completed successfully. +**/ +EFI_STATUS +EFIAPI +GetProgressMsgRequest ( + IN EFI_ACTIVE_MANAGEMENT_PROTOCOL *This, + IN OUT BOOLEAN *CurrentState + ) +; + +/** + Entry point for the Active Management Driver. + + @param[in] ImageHandle Image handle of this driver. + @param[in] SystemTable Global system service table. + + @retval EFI_SUCCESS Initialization complete. + @exception EFI_UNSUPPORTED The chipset is unsupported by this driver. + @retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver. + @retval EFI_DEVICE_ERROR Device error, driver exits abnormally. +**/ +EFI_STATUS +EFIAPI +ActiveManagementEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +; + +#endif diff --git a/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.inf b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.inf new file mode 100644 index 0000000..3dd5fe3 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/AmtBootOptions/Dxe/ActiveManagement.inf @@ -0,0 +1,100 @@ +## @file +# Component description file for the AMT driver. +# +#@copyright +# Copyright (c) 2004 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = ActiveManagement +FILE_GUID = D739F969-FB2D-4bc2-AFE7-081327D3FEDE +COMPONENT_TYPE = BS_DRIVER + +[sources.common] + ActiveManagement.h + ActiveManagement.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGlueDxeDriverEntryPoint.c + +[includes.common] + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Heci/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + +# +# Typically the sample code referenced will be available in the code base already +# So keep this include at the end to defer to the source base definition +# and only use the sample code definition if source base does not include these files. +# + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/SampleCode/Include + +# +# Edk II Glue Library, some hearder are included by R9 header so have to include +# + + $(EFI_SOURCE) + $(EFI_SOURCE)/Framework + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + AmtLib + MeProtocolLib + MeLib + MeChipsetLib + EdkProtocolLib + EdkFrameworkProtocolLib + EdkIIGlueDxeReportStatusCodeLib + EdkIIGlueDxeDebugLibReportStatusCode + EdkIIGlueUefiBootServicesTableLib + EdkIIGlueUefiRuntimeServicesTableLib + EdkIIGlueBasePciLibPciExpress + EdkIIGlueBasePciExpressLib + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + DPX_SOURCE = Activemanagement.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=ActiveManagementEntryPoint + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\ + -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ + diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.c b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.c new file mode 100644 index 0000000..8465de8 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.c @@ -0,0 +1,927 @@ +/** @file + This driver module produces IDE_CONTROLLER_INIT protocol and will be used by + IDE Bus driver to support platform dependent timing information. This driver + is responsible for early initialization of IDE Redirect controller. + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include "IdeRController.h" +#include "MeLib.h" +#endif + +/// +/// EFI_DRIVER_BINDING_PROTOCOL instance +/// +EFI_DRIVER_BINDING_PROTOCOL mIdeRControllerDriverBinding = { + IdeRControllerSupported, + IdeRControllerStart, + IdeRControllerStop, + 1, // Version + NULL, // ImageHandle + NULL // DriverBindingHandle +}; + +/** + This function is used to calculate the best PIO mode supported by + specific IDE device + + Since the LPT IDE-R doesn't support changing the timing + registers because they are RO 0x00, we'll just return PIO mode 2. + + @param[in] IdentifyData The identify data of specific IDE device + @param[in] DisPioMode Disqualified PIO modes collection + @param[in] SelectedMode Available PIO modes collection + + @retval EFI_SUCCESS SelectedMode calculated. +**/ +EFI_STATUS +CalculateBestPioMode ( + IN EFI_IDENTIFY_DATA *IdentifyData, + IN UINT16 *DisPioMode OPTIONAL, + OUT UINT16 *SelectedMode + ) +{ + /// + /// ATA_PIO_MODE_2; + /// + *SelectedMode = 2; + + return EFI_SUCCESS; +} + +/** + This function is used to calculate the best UDMA mode supported by + specific IDE device + + Since the LPT IDE-R doesn't support changing the timing + registers because they are RO 0x00, we'll just return DMA mode 2. + + @param[in] IdentifyData The identify data of specific IDE device + @param[in] DisUDmaMode Disqualified UDMA modes collection + @param[in] SelectedMode Available UMDA modes collection + + @retval EFI_SUCCESS SelectedMode calculated. +**/ +EFI_STATUS +CalculateBestUdmaMode ( + IN EFI_IDENTIFY_DATA *IdentifyData, + IN UINT16 *DisUDmaMode OPTIONAL, + OUT UINT16 *SelectedMode + ) +{ + /// + /// ATA_UDMA_MODE_2; + /// + *SelectedMode = 2; + + return EFI_SUCCESS; +} + +/** + This function is used to set appropriate PIO timing on Ide + controller according supported PIO modes + + @param[in] Channel IDE channel number (0 based, either 0 or 1). + For LPT IDE-R there is only one (See IDER_MAX_CHANNEL). + @param[in] Device IDE device number + @param[in] PciIo Pointer to PciIo protocol opened by Ide controller driver + @param[in] IdentifyData The identify struct submitted by IDE device + @param[in] Modes The PIO mode collection supported by IDE device + + @retval EFI_SUCCESS PIO timing initialized or no need to program PIO mode +**/ +EFI_STATUS +IdeInitSetPioTiming ( + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDENTIFY_DATA *IdentifyData, + IN EFI_ATA_COLLECTIVE_MODE *Modes + ) +{ + /// + /// Since the Cantiga version of the ME IDER doesn't support registers 40-4F (they are RO), + /// there is no need to program PIO mode. + /// + return EFI_SUCCESS; +} + +/** + This function is used to set appropriate UDMA timing on Ide + controller according supported UDMA modes + + @param[in] Channel IDE channel number (0 based, either 0 or 1). + For LPT IDE-R there is only one (See IDER_MAX_CHANNEL). + @param[in] Device IDE device number + @param[in] PciIo Pointer to PciIo protocol opened by Ide controller driver + @param[in] Modes The UDMA mode collection supported by IDE device + + @retval Status code returned by PciIo operations +**/ +EFI_STATUS +IdeInitSetUdmaTiming ( + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_ATA_COLLECTIVE_MODE *Modes + ) +{ + /// + /// Since the Cantiga version of the ME IDE-R doesn't support registers 40-C7 (they are RO), + /// there is no need to program PIO/UDMA mode. + /// + EFI_STATUS Status; + UINT16 PciCommandReg; + UINT8 BusMasterIdeStatusReg; + + /// + /// PCI Command Register, offset 0x4, default 00 + /// + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint16, + PCI_COMMAND_REGISTER, + 1, + &PciCommandReg + ); + /// + /// Now set the PCH IDE Bus Master Enable bit, one bit for PCH controller + /// If BME bit is not set, set it + /// + if (!(PciCommandReg & BME_BUS_MASTER_ENABLE_BIT)) { + PciCommandReg |= BME_BUS_MASTER_ENABLE_BIT; + + Status = PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint16, + PCI_COMMAND_REGISTER, // offset 0x4 + 1, + &PciCommandReg + ); + } + + Status = PciIo->Io.Read ( + PciIo, + EfiPciIoWidthUint8, + 4, + (Channel == 0 ? 0x2 : 0xA), + 1, + &BusMasterIdeStatusReg + ); + + BusMasterIdeStatusReg = (UINT8) (BusMasterIdeStatusReg | (Device == 0 ? BIT5 : BIT6)); + + Status = PciIo->Io.Write ( + PciIo, + EfiPciIoWidthUint8, + 4, + (Channel == 0 ? 0x2 : 0xA), + 1, + &BusMasterIdeStatusReg + ); + + return Status; +} + +/** + This function is called after IdeBus driver submits its EFI_IDENTIFY_DATA data struct + to IDE controller driver. The main purpose is to detect IDE + cable type. + + @param[in] Channel IDE channel number (0 based, either 0 or 1). + For LPT IDE-R there is only one (See IDER_MAX_CHANNEL). + @param[in] Device IDE device number + @param[in] PciIo Pointer to PciIo protocol instance opened by Ide driver + @param[in] IdentifyData A pointer to EFI_IDENTIFY_DATA data structure + + @retval EFI_SUCCESS Cable type detected +**/ +EFI_STATUS +IdeDetectCableType ( + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDENTIFY_DATA *IdentifyData + ) +{ + return EFI_SUCCESS; +} + +EFI_STATUS +AdjustUdmaModeByCableType ( + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN OUT EFI_ATA_COLLECTIVE_MODE *Modes + ) +/** + This function is called AFTER IdeBus driver submits its EFI_IDENTIFY_DATA data struct. + The main objective of this function is to adjust best calculated UDMA mode + according to current cable type. LPT IDE-R is hardcoded to 40 pin UDMA-2/33 mode. + Note that the cable reporting bits should be set prior to this function call + + @param[in] Channel IDE channel number (0 based, either 0 or 1). + For LPT IDE-R there is only one (See IDER_MAX_CHANNEL). + @param[in] Device IDE device number + @param[in] PciIo Pointer to PciIo protocol instance opened by Ide driver + @param[in] Modes The current best supported mode calculated by this driver + + @retval EFI_SUCCESS UdmaMode copied +**/ +{ + Modes->UdmaMode.Mode = 2; + return EFI_SUCCESS; +} + +/// +/// Interface functions of IDE_CONTROLLER_INIT protocol +/// + +/** + This function can be used to obtain information about a specified channel. + It's usually used by IDE Bus driver during enumeration process. + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel Channel number (0 based, either 0 or 1) + @param[in] Enabled TRUE if the channel is enabled. If the channel is disabled, + then it will no be enumerated. + @param[in] MaxDevices The Max number of IDE devices that the bus driver can expect + on this channel. For ATA/ATAPI, this number is either 1 or 2. + + @retval EFI_SUCCESS Information copied + @retval EFI_INVALID_PARAMETER Invalid channel +**/ +EFI_STATUS +EFIAPI +IdeInitGetChannelInfo ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + OUT BOOLEAN *Enabled, + OUT UINT8 *MaxDevices + ) +{ + /// + /// Channel number (0 based, either 0 or 1) + /// For LPT IDE-R there is only one (See IDER_MAX_CHANNEL). + /// + if (Channel < IDER_MAX_CHANNEL) { + *Enabled = TRUE; + *MaxDevices = IDER_MAX_DEVICES; + return EFI_SUCCESS; + + } else { + return EFI_INVALID_PARAMETER; + } +} + +/** + This function is called by IdeBus driver before executing certain actions. + This allows IDE Controller Init to prepare for each action. + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Phase Phase indicator defined by IDE_CONTROLLER_INIT protocol + @param[in] Channel Channel number (0 based, either 0 or 1) + + @retval EFI_SUCCESS Preparation done + @retval EFI_INVALID_PARAMETER Invalid channel + @exception EFI_UNSUPPORTED Invalid phase +**/ +EFI_STATUS +EFIAPI +IdeInitNotifyPhase ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase, + IN UINT8 Channel + ) +{ + if (Channel >= IDER_MAX_CHANNEL) { + return EFI_INVALID_PARAMETER; + } + + switch (Phase) { + + case EfiIdeBeforeChannelEnumeration: + case EfiIdeAfterChannelEnumeration: + case EfiIdeBeforeChannelReset: + case EfiIdeAfterChannelReset: + case EfiIdeBusBeforeDevicePresenceDetection: + case EfiIdeBusAfterDevicePresenceDetection: + case EfiIdeResetMode: + /// + /// Do nothing at present + /// + break; + + default: + return EFI_UNSUPPORTED; + break; + } + + return EFI_SUCCESS; +} + +/** + This function is called by IdeBus driver to submit EFI_IDENTIFY_DATA data structure + obtained from IDE deivce. This structure is used to set IDE timing + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] IdentifyData A pointer to EFI_IDENTIFY_DATA data structure + + @retval EFI_SUCCESS Data submitted + @retval EFI_INVALID_PARAMETER Invalid channel +**/ +EFI_STATUS +EFIAPI +IdeInitSubmitData ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_IDENTIFY_DATA *IdentifyData + ) +{ + EFI_IDE_CONTROLLER_PRIVATE_DATA *IdePrivateData; + + if (Channel >= IDER_MAX_CHANNEL || Device >= IDER_MAX_DEVICES) { + return EFI_INVALID_PARAMETER; + } + + IdePrivateData = IDE_CONTROLLER_PRIVATE_DATA_FROM_THIS (This); + ASSERT (IdePrivateData); + + /// + /// Make a local copy of device's IdentifyData and mark the valid flag + /// + if (IdentifyData != NULL) { + CopyMem ( + &(IdePrivateData->IdentifyData[Channel][Device]), + IdentifyData, + sizeof (EFI_IDENTIFY_DATA) + ); + + IdePrivateData->IdentifyValid[Channel][Device] = TRUE; + + /// + /// Detect cable type and set cable type reg once we get identify data + /// + IdeDetectCableType ( + Channel, + Device, + IdePrivateData->PciIo, + &(IdePrivateData->IdentifyData[Channel][Device]) + ); + + } else { + IdePrivateData->IdentifyValid[Channel][Device] = FALSE; + } + + return EFI_SUCCESS; +} + +/** + This function is called by IdeBus driver to disqualify unsupported operation + mode on specfic IDE device + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] BadModes Operation mode indicator + + @retval EFI_SUCCESS Disqulified Modes recorded + @retval EFI_INVALID_PARAMETER Invalid channel or invalid BadModes pointer +**/ +EFI_STATUS +EFIAPI +IdeInitDisqualifyMode ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_ATA_COLLECTIVE_MODE *BadModes + ) +{ + EFI_IDE_CONTROLLER_PRIVATE_DATA *IdePrivateData; + + if (Channel >= IDER_MAX_CHANNEL || Device >= IDER_MAX_DEVICES || BadModes == NULL) { + return EFI_INVALID_PARAMETER; + } + + IdePrivateData = IDE_CONTROLLER_PRIVATE_DATA_FROM_THIS (This); + ASSERT (IdePrivateData); + + /// + /// Record the disqualified modes per channel per device. From ATA/ATAPI spec, + /// if a mode is not supported, the modes higher than it is also not + /// supported + /// + CopyMem ( + &(IdePrivateData->DisqulifiedModes[Channel][Device]), + BadModes, + sizeof (EFI_ATA_COLLECTIVE_MODE) + ); + + return EFI_SUCCESS; +} + +/** + This function is called by IdeBus driver to calculate the best operation mode + supported by specific IDE device + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] SupportedModes Modes collection supported by IDE device + + @retval EFI_SUCCESS Disqulified Modes recorded + @retval EFI_INVALID_PARAMETER Invalid channel or invalid SupportedModes pointer + @retval EFI_NOT_READY IdentifyData is not valid + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures +**/ +EFI_STATUS +EFIAPI +IdeInitCalculateMode ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes + ) +{ + EFI_IDE_CONTROLLER_PRIVATE_DATA *IdePrivateData; + EFI_IDENTIFY_DATA *IdentifyData; + BOOLEAN IdentifyValid; + EFI_ATA_COLLECTIVE_MODE *DisqulifiedModes; + UINT16 SelectedMode; + EFI_STATUS Status; + + if (Channel >= IDER_MAX_CHANNEL || Device >= IDER_MAX_DEVICES || SupportedModes == NULL) { + return EFI_INVALID_PARAMETER; + } + + IdePrivateData = IDE_CONTROLLER_PRIVATE_DATA_FROM_THIS (This); + ASSERT (IdePrivateData); + + IdentifyData = &(IdePrivateData->IdentifyData[Channel][Device]); + DisqulifiedModes = &(IdePrivateData->DisqulifiedModes[Channel][Device]); + IdentifyValid = IdePrivateData->IdentifyValid[Channel][Device]; + + /// + /// Make sure we've got the valid identify data of the device from SubmitData() + /// + if (!IdentifyValid) { + return EFI_NOT_READY; + } + + *SupportedModes = AllocateZeroPool (sizeof (EFI_ATA_COLLECTIVE_MODE)); + if (*SupportedModes == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Status = CalculateBestPioMode ( + IdentifyData, + (DisqulifiedModes->PioMode.Valid ? ((UINT16 *) &(DisqulifiedModes->PioMode.Mode)) : NULL), + &SelectedMode + ); + if (!EFI_ERROR (Status)) { + (*SupportedModes)->PioMode.Valid = TRUE; + (*SupportedModes)->PioMode.Mode = SelectedMode; + + } else { + (*SupportedModes)->PioMode.Valid = FALSE; + } + + Status = CalculateBestUdmaMode ( + IdentifyData, + (DisqulifiedModes->UdmaMode.Valid ? ((UINT16 *) &(DisqulifiedModes->UdmaMode.Mode)) : NULL), + &SelectedMode + ); + if (!EFI_ERROR (Status)) { + (*SupportedModes)->UdmaMode.Valid = TRUE; + (*SupportedModes)->UdmaMode.Mode = SelectedMode; + + } else { + (*SupportedModes)->UdmaMode.Valid = FALSE; + } + /// + /// It is only referenced here. + /// + (*SupportedModes)->ExtModeCount = 1; + /// + /// The modes other than PIO and UDMA are not supported by Ide controller + /// + return EFI_SUCCESS; +} + +/** + This function is called by IdeBus driver to set appropriate timing on IDE + controller according supported operation mode + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] Modes IDE device mode + + @retval EFI_SUCCESS Disqulified Modes recorded + @retval EFI_INVALID_PARAMETER Invalid channel or invalid Modes pointer + @retval EFI_NOT_READY IdentifyData is not valid + @exception EFI_UNSUPPORTED Failed to set PIO/MDMA/SDMA timing +**/ +EFI_STATUS +EFIAPI +IdeInitSetTiming ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_ATA_COLLECTIVE_MODE *Modes + ) +{ + EFI_IDE_CONTROLLER_PRIVATE_DATA *IdePrivateData; + + if (Channel >= IDER_MAX_CHANNEL || Device >= IDER_MAX_DEVICES || Modes == NULL) { + return EFI_INVALID_PARAMETER; + } + + IdePrivateData = IDE_CONTROLLER_PRIVATE_DATA_FROM_THIS (This); + ASSERT (IdePrivateData); + + /// + /// Make sure we've got the valid identify data of the device from SubmitData() + /// + if (!(IdePrivateData->IdentifyValid[Channel][Device])) { + return EFI_NOT_READY; + } + /// + /// Set UMDA timing + /// + if (Modes->UdmaMode.Valid) { + IdeInitSetUdmaTiming ( + Channel, + Device, + IdePrivateData->PciIo, + Modes + ); + } + /// + /// Set PIO/MDMA/SDMA timing (They generally share the same timing values) + /// + if (Modes->PioMode.Valid) { + IdeInitSetPioTiming ( + Channel, + Device, + IdePrivateData->PciIo, + &(IdePrivateData->IdentifyData[Channel][Device]), + Modes + ); + + } else { + return EFI_UNSUPPORTED; + } + + return EFI_SUCCESS; +} + +/// +/// IDE-R Controller Binding protocol declaration +/// + +/** + This function checks to see if the driver supports a device specified by + "Controller handle" parameter. It is called by DXE Core StartImage() or + ConnectController() routines. The driver uses 'device path' and/or + 'services' from the Bus I/O abstraction attached to the controller handle + to determine if the driver support this controller handle. + + Note: In the BDS (Boot Device Selection) phase, the DXE core enumerate all + devices (or, controller) and assigns GUIDs to them. + + @param[in] This a pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. + @param[in] RemainingDevicePath A pointer to the device path. Ignored by device + driver but used by bus driver + + @retval EFI_SUCCESS Have device to support + @retval EFI_NOT_FOUND Relative environment not ready + @exception EFI_UNSUPPORTED The device doesn't support +**/ +EFI_STATUS +EFIAPI +IdeRControllerSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + EFI_PCI_IO_PROTOCOL *PciIo; + PCI_TYPE00 PciData; + + + /// + /// Ide Controller is a device driver, and should ingore the + /// "RemainingDevicePath" according to EFI spec + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + (VOID *) &ParentDevicePath, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (EFI_ERROR (Status)) { + /// + /// EFI_ALREADY_STARTED is also an error + /// + return Status; + } + /// + /// Close the protocol because we don't use it here + /// + gBS->CloseProtocol ( + Controller, // handle of the controller + &gEfiDevicePathProtocolGuid, // Porotcol to be closed + This->DriverBindingHandle, // agent of opening the protocol + Controller + ); + + /// + /// Now test the EfiPciIoProtocol + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (EFI_ERROR (Status)) { + return Status; + } + /// + /// Now further check the PCI header: Base class (offset 0x0B) and + /// Sub Class (offset 0x0A). This controller should be an Ide controller + /// + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint8, + 0, + sizeof (PciData), + &PciData + ); + + if (EFI_ERROR (Status)) { + gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + return EFI_UNSUPPORTED; + } + /// + /// Examine IDE-R PCI Configuration table fields + /// + if ((PciData.Hdr.ClassCode[2] != PCI_CLASS_MASS_STORAGE) || + (PciData.Hdr.ClassCode[1] != PCI_SUB_CLASS_IDE) || + (PciData.Hdr.VendorId != V_ME_IDER_VENDOR_ID) || + !IS_PCH_LPT_IDER_DEVICE_ID(PciData.Hdr.DeviceId) + ) { + + Status = EFI_UNSUPPORTED; + } + /// + /// Close the I/O Abstraction(s) used to perform the supported test + /// + gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + return Status; +} + +/** + This routine is called right after the .Supported() called and return + EFI_SUCCESS. Notes: The supported protocols are checked but the Protocols + are closed. + + @param[in] This a pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. Parameter + passed by the caller + @param[in] RemainingDevicePath A pointer to the device path. Should be ignored by + device driver + + @retval EFI_SUCCESS The driver ready and initial complete. + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures + @retval EFI_DEVICE_ERROR The device doesn't initial. +**/ +EFI_STATUS +EFIAPI +IdeRControllerStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + EFI_IDE_CONTROLLER_PRIVATE_DATA *IdePrivateData; + UINT64 CommandVal; + + /// + /// Now test and open the EfiPciIoProtocol + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + + /// + /// Status == 0 - A normal execution flow, SUCCESS and the program proceeds. + /// Status == ALREADY_STARTED - A non-zero Status code returned. It indicates + /// that the protocol has been opened and should be treated as a + /// normal condition and the program proceeds. The Protocol will not + /// opened 'again' by this call. + /// Status != ALREADY_STARTED - Error status, terminate program execution + /// + if (EFI_ERROR (Status)) { + /// + /// EFI_ALREADY_STARTED is also an error + /// + return Status; + } + /// + /// Allocate Ide private data structure + /// + IdePrivateData = AllocatePool (sizeof (EFI_IDE_CONTROLLER_PRIVATE_DATA)); + ASSERT (IdePrivateData != NULL); + if (IdePrivateData == NULL) { + return EFI_OUT_OF_RESOURCES; + } + /// + /// Initialize IdeR controller private data + /// + ZeroMem (IdePrivateData, sizeof (EFI_IDE_CONTROLLER_PRIVATE_DATA)); + IdePrivateData->Signature = IDER_CONTROLLER_SIGNATURE; + IdePrivateData->PciIo = PciIo; + IdePrivateData->IdeInit.GetChannelInfo = IdeInitGetChannelInfo; + IdePrivateData->IdeInit.NotifyPhase = IdeInitNotifyPhase; + IdePrivateData->IdeInit.SubmitData = IdeInitSubmitData; + IdePrivateData->IdeInit.DisqualifyMode = IdeInitDisqualifyMode; + IdePrivateData->IdeInit.CalculateMode = IdeInitCalculateMode; + IdePrivateData->IdeInit.SetTiming = IdeInitSetTiming; + IdePrivateData->IdeInit.EnumAll = IDER_ENUMER_ALL; + IdePrivateData->IdeInit.ChannelCount = IDER_MAX_CHANNEL; + + // + // Get device capabilities + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationSupported, + 0, + &CommandVal + ); + ASSERT_EFI_ERROR (Status); + + // + // Enable Command Register + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationEnable, + CommandVal & EFI_PCI_DEVICE_ENABLE, + NULL + ); + ASSERT_EFI_ERROR (Status); + + /// + /// Install IDE_CONTROLLER_INIT protocol & private data to this instance + /// + Status = gBS->InstallMultipleProtocolInterfaces ( + &Controller, + &gEfiIderControllerDriverProtocolGuid, + IdePrivateData, + &gEfiIdeControllerInitProtocolGuid, + &(IdePrivateData->IdeInit), + NULL + ); + + return Status; +} + +/** + Stop. + + @param[in] This Pointer to driver binding protocol + @param[in] Controller Controller handle to connect + @param[in] NumberOfChildren Number of children handle created by this driver + @param[in] ChildHandleBuffer Buffer containing child handle created + + @retval EFI_SUCCESS Driver disconnected successfully from controller + @exception EFI_UNSUPPORTED Cannot find BIOS_VIDEO_DEV structure +**/ +EFI_STATUS +EFIAPI +IdeRControllerStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +{ + EFI_STATUS Status; + EFI_IDE_CONTROLLER_PRIVATE_DATA *IdePrivateData; + + /// + /// Get private data + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiIderControllerDriverProtocolGuid, + (VOID **) &IdePrivateData, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + ASSERT_EFI_ERROR (Status); + + /// + /// Close protocols opened by Ide controller driver + /// + Status = gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + gBS->UninstallMultipleProtocolInterfaces ( + Controller, + &gEfiIderControllerDriverProtocolGuid, + IdePrivateData, + &gEfiIdeControllerInitProtocolGuid, + &(IdePrivateData->IdeInit), + NULL + ); + + FreePool (IdePrivateData); + + return EFI_SUCCESS; +} + +/// +/// IDE-R Controller Driver Entry Point +/// + +/** + Chipset Ide Driver EntryPoint function. It follows the standard EFI driver + model. It's called by StartImage() of DXE Core + + @param[in] ImageHandle - While the driver image loaded be the ImageLoader(), + an image handle is assigned to this driver binary, + all activities of the driver is tied to this ImageHandle + @param[in] SystemTable - A pointer to the system table, for all BS(Boo Services) and + RT(Runtime Services) + + @retval EFI_SUCCESS Always return EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +InitializeIdeRControllerDriver ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + return EFI_SUCCESS; +} diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.cif b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.cif new file mode 100644 index 0000000..08416f6 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.cif @@ -0,0 +1,13 @@ +<component> + name = "IdeRController" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\IdeR\Dxe\" + RefName = "IdeRController" +[files] +"IdeRController.sdl" +"IdeRController.mak" +"IdeRController.c" +"IdeRControllerName.c" +"IdeRController.h" +"IdeRController.inf" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.h b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.h new file mode 100644 index 0000000..86ab159 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.h @@ -0,0 +1,422 @@ +/** @file + Header file for chipset IDER ATA controller driver. + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ +#ifndef _IDER_ATA_CONTROLLER_H +#define _IDER_ATA_CONTROLLER_H + +#include "pci22.h" +#include "AmtLib.h" +#include "MeAccess.h" + +// +// Constant definition +// +#include EFI_PROTOCOL_DEFINITION (PciIo) +#include EFI_PROTOCOL_DEFINITION (IdeControllerInit) +#include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo) +#include EFI_PROTOCOL_DEFINITION (IderControllerDriver) + +// +// Global Variables definitions +// +extern EFI_COMPONENT_NAME_PROTOCOL mIdeRControllerName; +extern EFI_DRIVER_BINDING_PROTOCOL mIdeRControllerDriverBinding; + +// +// Symbol definition, for PCI IDE configuration field +// +#define PCI_SUB_CLASS_IDE 0x01 + +#define IDER_MAX_CHANNEL 0x01 ///< Max channels number of single sata controller +#define IDER_MAX_DEVICES 0x02 ///< Max devices number of single sata channel +#define IDER_ENUMER_ALL TRUE + +// +// PIO and DMA Mode Timing and Control Registers definition +// +#define PCI_COMMAND_REGISTER 0x04 +#define PCI_BUS_MASTER_IDE_BASE 0x20 +#define IDE_TIMING_REGISTER_1 0x40 +#define IDE_TIMING_REGISTER_2 0x42 +#define IDE_SLAVE_TIMING_REGISTER 0x44 +#define ULTRA_DMA_CONTROL_REGISTER 0x48 +#define ULTRA_DMA_TIMING_REGISTER 0x4A +#define IDE_IO_CONFIG_REGISTER 0x54 + +#define R_PCI_SVID 0x2C + +// +// IDE Register Field definition +// +#define ENABLE_DECODE_PRIMARY 0x8000 + +#define BME_BUS_MASTER_ENABLE_BIT BIT2 + +// +// Ide Timing Register 1/2 Field offset 0x40-41 / 0x42-43 +// +#define DTE0_DRIVE_0_DMA_TIMING_ENABLE bit3 +#define DTE1_DRIVE_1_DMA_TIMING_ENABLE bit7 + +// +// UDMA Control Register field offset 0x48 +// +#define PSDE0_PRIMARY_DRIVE_0_UDMA_ENABLE bit0 +#define PSDE1_PRIMARY_DRIVE_1_UDMA_ENABLE bit1 +#define SSDE0_SECONDARY_DRIVE_0_UDMA_ENABLE bit2 +#define SSDE1_SECONDARY_DRIVE_1_UDMA_ENABLE bit3 + +// +// UDMA Timing Register +// +#define CT4_RP6 0x00 +#define CT3_RP5 0x01 +#define CT2_RP4 0x02 + +#define CT3_RP8 0x01 +#define CT2_RP8 0x02 + +#define CT3_RP16 0x01 + +// +// Ide I/O Configuration Register Field offset 0x54 +// +#define PCB0_PRIMARY_DRIVE_0_BASE_CLOCK bit0 +#define PCB1_PRIMARY_DRIVE_1_BASE_CLOCK bit1 +#define SCB0_SECONDARY_DRIVE_0_BASE_CLOCK bit2 +#define SCB1_SECONDARY_DRIVE_1_BASE_CLOCK bit3 +#define ATA_FAST_PCB0_PRIMARY_DRIVE_0 bit12 +#define ATA_FAST_PCB1_PRIMARY_DRIVE_1 bit13 +#define ATA_FAST_SCB0_SECONDARY_DRIVE_0 bit14 +#define ATA_FAST_SCB1_SECONDARY_DRIVE_1 bit15 + +// +// PCH timing register structure +// +#pragma pack(1) + +typedef struct _IDER_TIMING_REG { + // + // PIO/MDMA/SDMA timing control for drive 0 + // + UINT16 Time0 : 1; + UINT16 Ie0 : 1; + UINT16 Ppe0 : 1; + UINT16 Dte0 : 1; + + // + // PIO/MDMA/SDMA timing control for drive 1 + // + UINT16 Time1 : 1; + UINT16 Ie1 : 1; + UINT16 Ppe1 : 1; + UINT16 Dte1 : 1; + + // + // PIO/MDMA/SDMA timing + // + UINT16 RecoveryTime : 2; + UINT16 Reserved0 : 2; + UINT16 IoRdySample : 2; + UINT16 Sitre : 1; + UINT16 IdeDecode : 1; + +} IDER_TIMING_REG; + +typedef struct _IDER_SLAVE_TIMING_REG { + // + // PIO/MDMA/SDMA timing control for primary slave device + // + UINT16 PrimaryRecoveryTime : 2; + UINT16 PrimaryIoRdySample : 2; + + // + // PIO/MDMA/SDMA timing control for secondary slave device + // + UINT16 SecondaryRecoveryTime : 2; + UINT16 SecondaryIoRdySample : 2; + +} IDER_SLAVE_TIMING_REG; + +#pragma pack() + +#define IDER_CONTROLLER_SIGNATURE EFI_SIGNATURE_32 ('I', 'D', 'E', 'R') + +/// +/// Ide controller driver private data structure +/// +typedef struct _EFI_IDE_CONTROLLER_PRIVATE_DATA { + /// + /// Standard signature used to identify Ide controller private data + /// + UINT32 Signature; + + /// + /// Protocol instance of IDE_CONTROLLER_INIT produced by this driver + /// + EFI_IDE_CONTROLLER_INIT_PROTOCOL IdeInit; + + /// + /// copy of protocol pointers used by this driver + /// + EFI_PCI_IO_PROTOCOL *PciIo; + + /// + /// The highest disqulified mode for each attached Ide device. + /// Per ATA/ATAPI spec, if a mode is not supported, the modes higher than + /// it should not be supported + /// + EFI_ATA_COLLECTIVE_MODE DisqulifiedModes[IDER_MAX_CHANNEL][IDER_MAX_DEVICES]; + + /// + /// A copy of EFI_IDENTIFY_DATA data for each attached Ide device and its flag + /// + EFI_IDENTIFY_DATA IdentifyData[IDER_MAX_CHANNEL][IDER_MAX_DEVICES]; + BOOLEAN IdentifyValid[IDER_MAX_CHANNEL][IDER_MAX_DEVICES]; +} EFI_IDE_CONTROLLER_PRIVATE_DATA; + +#define IDE_CONTROLLER_PRIVATE_DATA_FROM_THIS(a) \ + CR ( \ + a, \ + EFI_IDE_CONTROLLER_PRIVATE_DATA, \ + IdeInit, \ + IDER_CONTROLLER_SIGNATURE \ + ) + +// +// IDE-R controller IDE_CONTROLLER_INIT protocol declaration +// + +/** + This function can be used to obtain information about a specified channel. + It's usually used by IDE Bus driver during enumeration process. + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel Channel number (0 based, either 0 or 1) + @param[in] Enabled TRUE if the channel is enabled. If the channel is disabled, + then it will no be enumerated. + @param[in] MaxDevices The Max number of IDE devices that the bus driver can expect + on this channel. For ATA/ATAPI, this number is either 1 or 2. + + @retval EFI_SUCCESS Information copied + @retval EFI_INVALID_PARAMETER Invalid channel +**/ +EFI_STATUS +EFIAPI +IdeInitGetChannelInfo ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + OUT BOOLEAN *Enabled, + OUT UINT8 *MaxDevices + ) +; + +/** + This function is called by IdeBus driver before executing certain actions. + This allows IDE Controller Init to prepare for each action. + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Phase Phase indicator defined by IDE_CONTROLLER_INIT protocol + @param[in] Channel Channel number (0 based, either 0 or 1) + + @retval EFI_SUCCESS Preparation done + @retval EFI_INVALID_PARAMETER Invalid channel + @exception EFI_UNSUPPORTED Invalid phase +**/ +EFI_STATUS +EFIAPI +IdeInitNotifyPhase ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase, + IN UINT8 Channel + ) +; + +/** + This function is called by IdeBus driver to submit EFI_IDENTIFY_DATA data structure + obtained from IDE deivce. This structure is used to set IDE timing + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] IdentifyData A pointer to EFI_IDENTIFY_DATA data structure + + @retval EFI_SUCCESS Data submitted + @retval EFI_INVALID_PARAMETER Invalid channel +**/ +EFI_STATUS +EFIAPI +IdeInitSubmitData ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_IDENTIFY_DATA *IdentifyData + ) +; + +/** + This function is called by IdeBus driver to disqualify unsupported operation + mode on specfic IDE device + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] BadModes Operation mode indicator + + @retval EFI_SUCCESS Disqulified Modes recorded + @retval EFI_INVALID_PARAMETER Invalid channel or invalid BadModes pointer +**/ +EFI_STATUS +EFIAPI +IdeInitDisqualifyMode ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_ATA_COLLECTIVE_MODE *BadModes + ) +; + +/** + This function is called by IdeBus driver to calculate the best operation mode + supported by specific IDE device + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] SupportedModes Modes collection supported by IDE device + + @retval EFI_SUCCESS Disqulified Modes recorded + @retval EFI_INVALID_PARAMETER Invalid channel or invalid SupportedModes pointer + @retval EFI_NOT_READY IdentifyData is not valid + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures +**/ +EFI_STATUS +EFIAPI +IdeInitCalculateMode ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes + ) +; + +/** + This function is called by IdeBus driver to set appropriate timing on IDE + controller according supported operation mode + + @param[in] This The EFI_IDE_CONTROLLER_INIT_PROTOCOL instance. + @param[in] Channel IDE channel number (0 based, either 0 or 1) + @param[in] Device IDE device number + @param[in] Modes IDE device mode + + @retval EFI_SUCCESS Disqulified Modes recorded + @retval EFI_INVALID_PARAMETER Invalid channel or invalid Modes pointer + @retval EFI_NOT_READY IdentifyData is not valid + @exception EFI_UNSUPPORTED Failed to set PIO/MDMA/SDMA timing +**/ +EFI_STATUS +EFIAPI +IdeInitSetTiming ( + IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_ATA_COLLECTIVE_MODE *Modes + ) +; + +// +// IDE-R Controller Binding protocol declaration +// + +/** + This function checks to see if the driver supports a device specified by + "Controller handle" parameter. It is called by DXE Core StartImage() or + ConnectController() routines. The driver uses 'device path' and/or + 'services' from the Bus I/O abstraction attached to the controller handle + to determine if the driver support this controller handle. + + Note: In the BDS (Boot Device Selection) phase, the DXE core enumerate all + devices (or, controller) and assigns GUIDs to them. + + @param[in] This a pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. + @param[in] RemainingDevicePath A pointer to the device path. Ignored by device + driver but used by bus driver + + @retval EFI_SUCCESS Have device to support + @retval EFI_NOT_FOUND Relative environment not ready + @exception EFI_UNSUPPORTED The device doesn't support +**/ +EFI_STATUS +EFIAPI +IdeRControllerSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +; + +/** + This routine is called right after the .Supported() called and return + EFI_SUCCESS. Notes: The supported protocols are checked but the Protocols + are closed. + + @param[in] This a pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. Parameter + passed by the caller + @param[in] RemainingDevicePath A pointer to the device path. Should be ignored by + device driver + + @retval EFI_SUCCESS The driver ready and initial complete. + @retval EFI_OUT_OF_RESOURCES Unable to allocate necessary data structures + @retval EFI_DEVICE_ERROR The device doesn't initial. +**/ +EFI_STATUS +EFIAPI +IdeRControllerStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +; + +/** + Stop. + + @param[in] This Pointer to driver binding protocol + @param[in] Controller Controller handle to connect + @param[in] NumberOfChildren Number of children handle created by this driver + @param[in] ChildHandleBuffer Buffer containing child handle created + + @retval EFI_SUCCESS Driver disconnected successfully from controller + @exception EFI_UNSUPPORTED Cannot find BIOS_VIDEO_DEV structure +**/ +EFI_STATUS +EFIAPI +IdeRControllerStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +; + +#endif // _IDER_ATA_CONTROLLER_H diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.inf b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.inf new file mode 100644 index 0000000..954e20e --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.inf @@ -0,0 +1,86 @@ +## @file +# Component description file for IDE-R Controller Driver module. +# +#@copyright +# Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = IdeRController +FILE_GUID = C4F2D007-37FD-422d-B63D-7ED73886E6CA +COMPONENT_TYPE = BS_DRIVER + +[sources.common] + IdeRController.h + IdeRController.c + IdeRControllerName.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGlueDxeDriverEntryPoint.c + +[includes.common] + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Heci/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + MeGuidLib + AmtLib + EdkProtocolLib + EdkFrameworkProtocolLib + EdkIIGlueBaseMemoryLib + EdkIIGlueDxeReportStatusCodeLib + EdkIIGlueDxeDebugLibReportStatusCode + EdkIIGlueUefiBootServicesTableLib + EdkIIGlueUefiRuntimeServicesTableLib + EdkIIGlueUefiLib + EdkIIGlueUefiDriverModelLib + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=InitializeIdeRControllerDriver \ + -D __EDKII_GLUE_DRIVER_BINDING_PROTOCOL_INSTANCE__=mIdeRControllerDriverBinding \ + -D __EDKII_GLUE_COMPONENT_NAME_PROTOCOL_INSTANCE__=mIdeRControllerName + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + -D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_UEFI_LIB__ \ + -D __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.mak b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.mak new file mode 100644 index 0000000..e7abc52 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.mak @@ -0,0 +1,55 @@ +# MAK file for the ModulePart:IdeRController +all : IdeRController + +$(BUILD_DIR)\IdeRController.mak : $(IdeRController_DIR)\$(@B).cif $(IdeRController_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(IdeRController_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +IdeRController : $(BUILD_DIR)\IdeRController.mak IdeRControllerBin + +IdeRController_INCLUDES=\ + $(ME_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(EDK_INCLUDES)\ + $(INTEL_PCH_INCLUDES) + +IdeRController_DEFINES=\ + $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InitializeIdeRControllerDriver"\ + /D"__EDKII_GLUE_DRIVER_BINDING_PROTOCOL_INSTANCE__=mIdeRControllerDriverBinding"\ + /D"__EDKII_GLUE_COMPONENT_NAME_PROTOCOL_INSTANCE__=mIdeRControllerName"\ + /D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + /D __EDKII_GLUE_UEFI_LIB__ \ + /D __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ + +IdeRController_LIBS=\ + $(EDKPROTOCOLLIB)\ + $(AmtGuidLib_LIB)\ + $(AmtLibDxe_LIB)\ + $(EDKFRAMEWORKPROTOCOLLIB)\ + $(EdkIIGlueBaseLib_LIB)\ +!IF "$(x64_BUILD)"=="1" + $(EdkIIGlueBaseLibX64_LIB)\ +!ELSE + $(EdkIIGlueBaseLibIA32_LIB)\ +!ENDIF + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGlueDxeReportStatusCodeLib_LIB)\ + $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\ + $(EdkIIGlueUefiBootServicesTableLib_LIB)\ + $(EdkIIGlueUefiLib_LIB)\ + $(EdkIIGlueUefiDriverModelLib_LIB)\ + + +IdeRControllerBin : $(IdeRController_LIBS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\IdeRController.mak all \ + "MY_INCLUDES=$(IdeRController_INCLUDES)"\ + "MY_DEFINES=$(IdeRController_DEFINES)"\ + GUID=C4F2D007-37FD-422d-B63D-7ED73886E6CA \ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=BS_DRIVER \ + EDKIIModule=DXEDRIVER\ + COMPRESS=1 diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.sdl b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.sdl new file mode 100644 index 0000000..b73480f --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRController.sdl @@ -0,0 +1,24 @@ +TOKEN + Name = "IdeRController_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable IdeRController support in Project" +End +MODULE + Help = "Includes IdeRController.mak to Project" + File = "IdeRController.mak" +End + +PATH + Name = "IdeRController_DIR" + Help = "iAMT IdeRController file source directory" +End + +ELINK + Name = "$(BUILD_DIR)\IdeRController.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End
\ No newline at end of file diff --git a/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRControllerName.c b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRControllerName.c new file mode 100644 index 0000000..15f3bf9 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/IdeR/Dxe/IdeRControllerName.c @@ -0,0 +1,172 @@ +/** @file + This portion is to register the IDE Redirect Controller Driver name + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include "IdeRController.h" +#endif + +// +// Forward reference declaration +// +EFI_STATUS +EFIAPI +IdeRControllerGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + +EFI_STATUS +EFIAPI +IdeRControllerGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + +/// +/// EFI Component Name Protocol +/// This portion declares a gloabl variable of EFI_COMPONENT_NAME_PROTOCOL type. +/// It initializes the followings: +/// - GetDriverName() to PlatformIdeGetDriverName() +/// - SupportedLanguages to "eng" (3 char ISO639-2 language indetifier) +/// +EFI_COMPONENT_NAME_PROTOCOL mIdeRControllerName = { + IdeRControllerGetDriverName, + IdeRControllerGetControllerName, + "eng" // English +}; + +// +// Define the Driver's unicode name string +// IDE controller Driver name string and IDE Controller Name string +// +static EFI_UNICODE_STRING_TABLE mIdeRControllerDriverNameTable[] = { + { + "eng", + L"IDER Controller Init Driver" + }, + { + NULL, + NULL + } +}; + +static EFI_UNICODE_STRING_TABLE mIdeRControllerControllerNameTable[] = { + { + "eng", + L"IDER Controller" + }, + { + NULL, + NULL + } +}; + +/** + This is a function definition of EFI_COMPONENT_NAME_PROTOCOL.GetDriverName(). This function + is to provide the user readable name of IDE Driver, defined in mPlaformIdeNameTable + This function is called by the platform management utilities to display the name of component. + + @param[in] This The address of protocol + @param[in] Language If the caller specificed Language matches SupportedLanguage, a pointer + to the Driver name is returned in the DriverName. + @param[in] DriverName If the caller specificed Language matches SupportedLanguage, a pointer + to the Driver name is returned in the DriverName. + + @retval EFI_SUCCESS If the caller specificed Language matches SupportedLanguage. + i.e. Language == gPlatformIdeName.SupportedLanguages + @exception EFI_UNSUPPORTED If the caller specificed Language doesn't match SupportedLanguage. +**/ +EFI_STATUS +EFIAPI +IdeRControllerGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ) +{ + + return LookupUnicodeString ( + Language, + mIdeRControllerName.SupportedLanguages, + mIdeRControllerDriverNameTable, + DriverName + ); + +} + +/** + Retrieves a Unicode string that is the user readable name of + the controller that is being managed by an EFI Driver. + + @param[in] This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance. + @param[in] ControllerHandle The handle of a controller that the driver specified by + This is managing. This handle specifies the controller + whose name is to be returned. + @param[in] ChildHandle The handle of the child controller to retrieve the name + of. This is an optional parameter that may be NULL. It + will be NULL for device drivers. It will also be NULL + for a bus drivers that wish to retrieve the name of the + bus controller. It will not be NULL for a bus driver + that wishes to retrieve the name of a child controller. + @param[in] Language A pointer to a three character ISO 639-2 language + identifier. This is the language of the controller name + that that the caller is requesting, and it must match one + of the languages specified in SupportedLanguages. The + number of languages supported by a driver is up to the + driver writer. + @param[in] ControllerName A pointer to the Unicode string to return. This Unicode + string is the name of the controller specified by + ControllerHandle and ChildHandle in the language + specified by Language from the point of view of the + driver specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in the + language specified by Language for the driver + specified by This was returned in DriverName. + @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. Language + or ControllerName is NULL. + @exception EFI_UNSUPPORTED The driver specified by this is not currently + managing the controller specified by + ControllerHandle and ChildHandle. Or the driver + specified by This does not support the language specified + by Language. +**/ +EFI_STATUS +EFIAPI +IdeRControllerGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ) +{ + return LookupUnicodeString ( + Language, + mIdeRControllerName.SupportedLanguages, + mIdeRControllerControllerNameTable, + ControllerName + ); +} diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/ComponentName.c b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/ComponentName.c new file mode 100644 index 0000000..3e6ba9f --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/ComponentName.c @@ -0,0 +1,187 @@ +/** @file + This portion is to register the Serial over Lan Controller Driver name + +@copyright + Copyright (c) 2004 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include "PciSerial.h" +#endif +// +// EFI Component Name Functions +// +EFI_STATUS +EFIAPI +PciSerialComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + +EFI_STATUS +EFIAPI +PciSerialComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + +// +// EFI Component Name Protocol +// +EFI_COMPONENT_NAME_PROTOCOL mPciSerialComponentName = { + PciSerialComponentNameGetDriverName, + PciSerialComponentNameGetControllerName, + "eng" +}; + +static EFI_UNICODE_STRING_TABLE mPciSerialDriverNameTable[] = { + { + "eng", + L"PCI Serial Driver" + }, + { + NULL, + NULL + } +}; + +/** + Retrieves a Unicode string that is the user readable name of the EFI Driver. + + @param[in] This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance. + @param[in] Language A pointer to a three character ISO 639-2 language identifier. + This is the language of the driver name that that the caller + is requesting, and it must match one of the languages specified + in SupportedLanguages. The number of languages supported by a + driver is up to the driver writer. + @param[in] DriverName A pointer to the Unicode string to return. This Unicode string + is the name of the driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by This + and the language specified by Language was returned in DriverName. + @retval EFI_INVALID_PARAMETER Language or DriverName is NULL. + @exception EFI_UNSUPPORTED The driver specified by This does not support the + language specified by Language. +**/ +EFI_STATUS +EFIAPI +PciSerialComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ) +{ + return LookupUnicodeString ( + Language, + mPciSerialComponentName.SupportedLanguages, + mPciSerialDriverNameTable, + DriverName + ); +} + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by an EFI Driver. + + @param[in] This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance. + @param[in] ControllerHandle The handle of a controller that the driver specified by + This is managing. This handle specifies the controller + whose name is to be returned. + @param[in] ChildHandle The handle of the child controller to retrieve the name + of. This is an optional parameter that may be NULL. It + will be NULL for device drivers. It will also be NULL + for a bus drivers that wish to retrieve the name of the + bus controller. It will not be NULL for a bus driver + that wishes to retrieve the name of a child controller. + @param[in] Language A pointer to a three character ISO 639-2 language + identifier. This is the language of the controller name + that that the caller is requesting, and it must match one + of the languages specified in SupportedLanguages. The + number of languages supported by a driver is up to the + driver writer. + @param[in] ControllerName A pointer to the Unicode string to return. This Unicode + string is the name of the controller specified by + ControllerHandle and ChildHandle in the language + specified by Language from the point of view of the + driver specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in the + language specified by Language for the driver + specified by This was returned in DriverName. + @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. Language or + ControllerName is NULL. + @exception EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. The driver specified by This + does not support the language specified by Language. +**/ +EFI_STATUS +EFIAPI +PciSerialComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ) +{ + EFI_STATUS Status; + EFI_SERIAL_IO_PROTOCOL *SerialIo; + SERIAL_DEV *SerialDevice; + + /// + /// This is a device driver, so ChildHandle must be NULL. + /// + if (ChildHandle != NULL) { + return EFI_UNSUPPORTED; + } + /// + /// Get the Block I/O Protocol on Controller + /// + Status = gBS->OpenProtocol ( + ControllerHandle, + &gEfiSerialIoProtocolGuid, + (VOID **) &SerialIo, + mPciSerialControllerDriverBinding.DriverBindingHandle, + ControllerHandle, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (EFI_ERROR (Status)) { + return Status; + } + /// + /// Get the Serial Controller's Device structure + /// + SerialDevice = SERIAL_DEV_FROM_THIS (SerialIo); + + return LookupUnicodeString ( + Language, + mPciSerialComponentName.SupportedLanguages, + SerialDevice->ControllerNameTable, + ControllerName + ); +} diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.c b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.c new file mode 100644 index 0000000..6dba7fa --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.c @@ -0,0 +1,1807 @@ +/** @file + PCI Serial driver for standard UARTS on an PCI bus. + Customized for Intel AMT SErial OVer LAN (82573E-Tekoa) 16550 UART Driver. + +@copyright + Copyright (c) 2004 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include "PciSerial.h" +#include "MeAccess.h" +#endif + +// +// PCI Serial Driver Binding Protocol +// +EFI_DRIVER_BINDING_PROTOCOL mPciSerialControllerDriverBinding = { + PciSerialControllerDriverSupported, + PciSerialControllerDriverStart, + PciSerialControllerDriverStop, + 0x10, + NULL, + NULL +}; + +/** + This function checks to see if the driver supports a device specified by + "Controller handle" parameter. It is called by DXE Core StartImage() or + ConnectController() routines. The driver uses 'device path' and/or + 'services' from the Bus I/O abstraction attached to the controller handle + to determine if the driver support this controller handle. + + Note: In the BDS (Boot Device Selection) phase, the DXE core enumerate all + devices (or, controller) and assigns GUIDs to them. + + @param[in] This a pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. + @param[in] RemainingDevicePath A pointer to the device path. Ignored by device + driver but used by bus driver + + @retval EFI_SUCCESS Have device to support + @retval EFI_NOT_FOUND The device doesn't support or relative environment not ready +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + EFI_PCI_IO_PROTOCOL *PciIo; + UART_DEVICE_PATH UartNode; + UINT16 Buffer[2]; + UINT16 Temp; + UINT8 *ByteBuffer; + + /// + /// Init AMT library + /// + Status = AmtLibInit (); + + if (EFI_ERROR (Status)) { + return Status; + } + /// + /// We don't want the SOL Controller enabled unless + /// there is an remote control request. The AMT usage model + /// dictates this. Thus here we check for the ASF Remote + /// Control command wants SOL before we start the controller. + /// + if (ActiveManagementEnableSol () == FALSE) { + return EFI_NOT_FOUND; + } + /// + /// Open the IO Abstraction(s) needed to perform the supported test + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + (VOID **) &ParentDevicePath, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (Status == EFI_ALREADY_STARTED) { + return EFI_SUCCESS; + } + + if (EFI_ERROR (Status)) { + return Status; + } + + gBS->CloseProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + /// + /// Now test the EfiPciIoProtocol + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + + if (Status == EFI_ALREADY_STARTED) { + return EFI_SUCCESS; + } + + if (EFI_ERROR (Status)) { + return Status; + } + /// + /// Use the PCI I/O Protocol to see if Controller is standard ISA UART that + /// can be managed by this driver. + /// + Status = EFI_SUCCESS; + + /// + /// Looks for a PCI CLASS / SUBCLASS / INTERFACE of 0x07 / 0x00 / 0x02 + /// To allow supportting all PCI Devices that are 16550 compatible UARTS. + /// + /// This is point where Tekoa iAMT SOL support enabling via + /// Get Boot Options ASF info is used to customize PCISerial + /// to work for iAMT. + /// + /// Also if want general PCI Serial com devices to work as well + /// can duplicate this driver one for tekoa and iAMT and the other + /// for general serial devices. + /// + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint32, + (UINT32) PCI_VENDOR_ID_OFFSET, + (UINTN) 1, + (VOID *) &Buffer + ); + /// + /// If Buffer is Not Valid (no setup info in NVRAM/FLASH) use auto mode for PTBx cfg. + /// + if ((Buffer[0] != V_ME_SOL_VENDOR_ID) || !IS_PCH_LPT_SOL_DEVICE_ID(Buffer[1]) + ) { + Status = EFI_UNSUPPORTED; + goto Error; + } + + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint32, + (UINT32) PCI_REVISION_ID_OFFSET, + (UINTN) 1, + (VOID *) &Buffer + ); + ByteBuffer = (UINT8 *) Buffer; + if ((ByteBuffer[3] != PCI_CLASS_SCC) || (ByteBuffer[2] != PCI_SUBCLASS_SERIAL) || (ByteBuffer[1] != PCI_IF_16550)) { + Status = EFI_UNSUPPORTED; + goto Error; + } + /// + /// Make sure the PCI io space is enabled + /// + Temp = 0x0003; + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint16, + PCI_COMMAND_OFFSET, + 0x01, + (VOID*) &Temp + ); + + /// + /// Make sure RemainingDevicePath is valid + /// + if (RemainingDevicePath != NULL) { + Status = EFI_UNSUPPORTED; + CopyMem (&UartNode, (UART_DEVICE_PATH *) RemainingDevicePath, sizeof (UART_DEVICE_PATH)); + if (UartNode.Header.Type != MESSAGING_DEVICE_PATH || + UartNode.Header.SubType != MSG_UART_DP || + DevicePathNodeLength ((EFI_DEVICE_PATH_PROTOCOL *) &UartNode) != sizeof (UART_DEVICE_PATH) + ) { + goto Error; + } + + if (UartNode.BaudRate > SERIAL_PORT_MAX_BAUD_RATE) { + goto Error; + } + + if (UartNode.Parity < NoParity || UartNode.Parity > SpaceParity) { + goto Error; + } + + if (UartNode.DataBits < 5 || UartNode.DataBits > 8) { + goto Error; + } + + if (UartNode.StopBits < OneStopBit || UartNode.StopBits > TwoStopBits) { + goto Error; + } + + if ((UartNode.DataBits == 5) && (UartNode.StopBits == TwoStopBits)) { + goto Error; + } + + if ((UartNode.DataBits >= 6) && (UartNode.DataBits <= 8) && (UartNode.StopBits == OneFiveStopBits)) { + goto Error; + } + + Status = EFI_SUCCESS; + } + +Error: + /// + /// Close the I/O Abstraction(s) used to perform the supported test + /// + gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + return Status; +} + +/** + This routine is called right after the .Supported() called + and return EFI_SUCCESS. Notes: The supported protocols are + checked but the Protocols are closed. + + @param[in] This A pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. Parameter + passed by the caller + @param[in] RemainingDevicePath A pointer to the device path. Should be ignored by + device driver + + @retval EFI_SUCCESS The driver ready and initial complete. + @retval Other The device doesn't initial. +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + SERIAL_DEV *SerialDevice; + UINTN Index; + UART_DEVICE_PATH Node; + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + CHAR16 SerialPortName[sizeof (PCI_SERIAL_PORT_NAME)]; + EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer; + UINTN EntryCount; + EFI_SERIAL_IO_PROTOCOL *SerialIo; + UINT64 *Supports; + UINT64 Temp; + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr; + VOID **Resources; + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Temp1; + + SerialDevice = NULL; + + /// + /// Get the Parent Device Path + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + (VOID **) &ParentDevicePath, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) { + return Status; + } + /// + /// Grab the IO abstraction we need to get any work done + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) { + goto Error; + } + + if (Status == EFI_ALREADY_STARTED) { + + if (RemainingDevicePath == NULL) { + return EFI_SUCCESS; + } + /// + /// Make sure a child handle does not already exist. This driver can only + /// produce one child per serial port. + /// + Status = gBS->OpenProtocolInformation ( + Controller, + &gEfiPciIoProtocolGuid, + &OpenInfoBuffer, + &EntryCount + ); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = EFI_ALREADY_STARTED; + for (Index = 0; Index < EntryCount; Index++) { + if (OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) { + Status = gBS->OpenProtocol ( + OpenInfoBuffer[Index].ControllerHandle, + &gEfiSerialIoProtocolGuid, + (VOID **) &SerialIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (!EFI_ERROR (Status)) { + CopyMem (&Node, RemainingDevicePath, sizeof (UART_DEVICE_PATH)); + Status = SerialIo->SetAttributes ( + SerialIo, + Node.BaudRate, + SerialIo->Mode->ReceiveFifoDepth, + SerialIo->Mode->Timeout, + Node.Parity, + Node.DataBits, + Node.StopBits + ); + } + break; + } + } + + FreePool (OpenInfoBuffer); + return Status; + } + /// + /// Initialize the serial device instance + /// + SerialDevice = AllocatePool (sizeof (SERIAL_DEV)); + if (SerialDevice == NULL) { + Status = EFI_OUT_OF_RESOURCES; + goto Error; + } + + ZeroMem (SerialDevice, sizeof (SERIAL_DEV)); + + SerialDevice->PciIo = PciIo; + SerialDevice->ParentDevicePath = ParentDevicePath; + SerialDevice->ControllerNameTable = NULL; + + StrCpy (SerialPortName, L"PCI Serial Port # "); + SerialPortName[sizeof (PCI_SERIAL_PORT_NAME) - 2] = (CHAR16) (L'0'); + AddUnicodeString ( + "eng", + mPciSerialComponentName.SupportedLanguages, + &SerialDevice->ControllerNameTable, + (CHAR16 *) SerialPortName + ); + + Ptr = &Temp1; + Resources = (VOID **) &Ptr; + Supports = &Temp; + *Supports = 0x01; + for (Index = 0; Index < PCI_MAX_BAR; Index++) { + Status = SerialDevice->PciIo->GetBarAttributes ( + PciIo, + (UINT8) Index, + Supports, + Resources + ); + Ptr = *Resources; + if (Ptr->ResType == ACPI_ADDRESS_SPACE_TYPE_IO) { + SerialDevice->BarIndex = (UINT16) Index; + Status = EFI_SUCCESS; + break; + } + } + + if (PciSerialPortPresent (SerialDevice) != TRUE) { + Status = EFI_DEVICE_ERROR; + goto Error; + } + + SerialDevice->Signature = SERIAL_DEV_SIGNATURE; + SerialDevice->Type = UART16450; + SerialDevice->SoftwareLoopbackEnable = FALSE; + SerialDevice->HardwareFlowControl = FALSE; + SerialDevice->Handle = NULL; + SerialDevice->Receive.First = 0; + SerialDevice->Receive.Last = 0; + SerialDevice->Receive.Surplus = SERIAL_MAX_BUFFER_SIZE; + SerialDevice->Transmit.First = 0; + SerialDevice->Transmit.Last = 0; + SerialDevice->Transmit.Surplus = SERIAL_MAX_BUFFER_SIZE; + + /// + /// Serial I/O + /// + SerialDevice->SerialIo.Revision = EFI_SERIAL_IO_PROTOCOL_REVISION; + SerialDevice->SerialIo.Reset = PciSerialReset; + SerialDevice->SerialIo.SetAttributes = PciSerialSetAttributes; + SerialDevice->SerialIo.SetControl = PciSerialSetControl; + SerialDevice->SerialIo.GetControl = PciSerialGetControl; + SerialDevice->SerialIo.Write = PciSerialWrite; + SerialDevice->SerialIo.Read = PciSerialRead; + SerialDevice->SerialIo.Mode = &(SerialDevice->SerialMode); + + if (RemainingDevicePath != NULL) { + /// + /// Match the configuration of the RemainingDevicePath. IsHandleSupported() + /// already checked to make sure the RemainingDevicePath contains settings + /// that we can support. + /// + CopyMem (&SerialDevice->UartDevicePath, RemainingDevicePath, sizeof (UART_DEVICE_PATH)); + } else { + /// + /// Build the device path by appending the UART node to the ParentDevicePath + /// from the WinNtIo handle. The Uart setings are zero here, since + /// SetAttribute() will update them to match the default setings. + /// + ZeroMem (&SerialDevice->UartDevicePath, sizeof (UART_DEVICE_PATH)); + SerialDevice->UartDevicePath.Header.Type = MESSAGING_DEVICE_PATH; + SerialDevice->UartDevicePath.Header.SubType = MSG_UART_DP; + SetDevicePathNodeLength ((EFI_DEVICE_PATH_PROTOCOL *) &SerialDevice->UartDevicePath, sizeof (UART_DEVICE_PATH)); + } + /// + /// Build the device path by appending the UART node to the ParentDevicePath + /// from the WinNtIo handle. The Uart setings are zero here, since + /// SetAttribute() will update them to match the current setings. + /// + SerialDevice->DevicePath = AppendDevicePathNode ( + ParentDevicePath, + (EFI_DEVICE_PATH_PROTOCOL *) &SerialDevice->UartDevicePath + ); + + if (SerialDevice->DevicePath == NULL) { + Status = EFI_DEVICE_ERROR; + goto Error; + } + /// + /// Fill in Serial I/O Mode structure based on either the RemainingDevicePath or defaults. + /// + SerialDevice->SerialMode.ControlMask = SERIAL_PORT_DEFAULT_CONTROL_MASK; + SerialDevice->SerialMode.Timeout = SERIAL_PORT_DEFAULT_TIMEOUT; + SerialDevice->SerialMode.BaudRate = SerialDevice->UartDevicePath.BaudRate; + SerialDevice->SerialMode.ReceiveFifoDepth = SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH; + SerialDevice->SerialMode.DataBits = SerialDevice->UartDevicePath.DataBits; + SerialDevice->SerialMode.Parity = SerialDevice->UartDevicePath.Parity; + SerialDevice->SerialMode.StopBits = SerialDevice->UartDevicePath.StopBits; + + /// + /// Issue a reset to initialize the COM port + /// + Status = SerialDevice->SerialIo.Reset (&SerialDevice->SerialIo); + if (EFI_ERROR (Status)) { + Status = EFI_SUCCESS; + goto Error; + } + /// + /// Install protocol interfaces for the serial device. + /// + Status = gBS->InstallMultipleProtocolInterfaces ( + &SerialDevice->Handle, + &gEfiDevicePathProtocolGuid, + SerialDevice->DevicePath, + &gEfiSerialIoProtocolGuid, + &SerialDevice->SerialIo, + NULL + ); + if (EFI_ERROR (Status)) { + goto Error; + } + /// + /// Open For Child Device + /// + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + SerialDevice->Handle, + EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER + ); + +Error: + if (EFI_ERROR (Status)) { + gBS->CloseProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + This->DriverBindingHandle, + Controller + ); + gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + if (SerialDevice) { + if (SerialDevice->DevicePath) { + FreePool (SerialDevice->DevicePath); + } + + FreeUnicodeStringTable (SerialDevice->ControllerNameTable); + FreePool (SerialDevice); + } + } + + return Status; +} + +/** + Stop. + + @param[in] This Pointer to driver binding protocol + @param[in] Controller Controller handle to connect + @param[in] NumberOfChildren Number of children handle created by this driver + @param[in] ChildHandleBuffer Buffer containing child handle created + + @retval EFI_SUCCESS Driver disconnected successfully from controller + @retval EFI_DEVICE_ERROR Cannot find BIOS_VIDEO_DEV structure +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +{ + EFI_STATUS Status; + UINTN Index; + BOOLEAN AllChildrenStopped; + EFI_SERIAL_IO_PROTOCOL *SerialIo; + SERIAL_DEV *SerialDevice; + EFI_PCI_IO_PROTOCOL *PciIo; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + Status = gBS->HandleProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + (VOID **) &DevicePath + ); + + /// + /// Complete all outstanding transactions to Controller. + /// Don't allow any new transaction to Controller to be started. + /// + if (NumberOfChildren == 0) { + /// + /// Close the bus driver + /// + Status = gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + Status = gBS->CloseProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + This->DriverBindingHandle, + Controller + ); + return Status; + } + + AllChildrenStopped = TRUE; + + for (Index = 0; Index < NumberOfChildren; Index++) { + Status = gBS->OpenProtocol ( + ChildHandleBuffer[Index], + &gEfiSerialIoProtocolGuid, + (VOID **) &SerialIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (!EFI_ERROR (Status)) { + + SerialDevice = SERIAL_DEV_FROM_THIS (SerialIo); + + Status = gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + ChildHandleBuffer[Index] + ); + + Status = gBS->UninstallMultipleProtocolInterfaces ( + ChildHandleBuffer[Index], + &gEfiDevicePathProtocolGuid, + SerialDevice->DevicePath, + &gEfiSerialIoProtocolGuid, + &SerialDevice->SerialIo, + NULL + ); + if (EFI_ERROR (Status)) { + gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + ChildHandleBuffer[Index], + EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER + ); + } else { + if (SerialDevice->DevicePath) { + FreePool (SerialDevice->DevicePath); + } + + FreeUnicodeStringTable (SerialDevice->ControllerNameTable); + FreePool (SerialDevice); + } + } + + if (EFI_ERROR (Status)) { + AllChildrenStopped = FALSE; + } + } + + if (AllChildrenStopped == FALSE) { + return EFI_DEVICE_ERROR; + } + + return EFI_SUCCESS; +} + +/** + Detect whether specific FIFO is full or not + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + + @retval TRUE The FIFO is full + @retval FALSE The FIFO is not full +**/ +BOOLEAN +PciSerialFifoFull ( + IN SERIAL_DEV_FIFO *Fifo + ) +{ + if (Fifo->Surplus == 0) { + return TRUE; + } + + return FALSE; +} + +/** + Detect whether specific FIFO is empty or not + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + + @retval TRUE The FIFO is empty + @retval FALSE The FIFO is not empty +**/ +BOOLEAN +PciSerialFifoEmpty ( + IN SERIAL_DEV_FIFO *Fifo + ) +{ + if (Fifo->Surplus == SERIAL_MAX_BUFFER_SIZE) { + return TRUE; + } + + return FALSE; +} + +/** + Add data to specific FIFO + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + @param[in] Data The data added to FIFO + + @retval EFI_SUCCESS Add data to specific FIFO successfully + @retval EFI_OUT_OF_RESOURCES Failed to add data because FIFO is already full +**/ +EFI_STATUS +PciSerialFifoAdd ( + IN SERIAL_DEV_FIFO *Fifo, + IN UINT8 Data + ) +{ + /// + /// if FIFO full can not add data + /// + if (PciSerialFifoFull (Fifo)) { + return EFI_OUT_OF_RESOURCES; + } + /// + /// FIFO is not full can add data + /// + Fifo->Data[Fifo->Last] = Data; + Fifo->Surplus--; + Fifo->Last++; + if (Fifo->Last == SERIAL_MAX_BUFFER_SIZE) { + Fifo->Last = 0; + } + + return EFI_SUCCESS; +} + +/** + Remove data from specific FIFO + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + @param[in] Data The data removed from FIFO + + @retval EFI_SUCCESS Remove data from specific FIFO successfully + @retval EFI_OUT_OF_RESOURCES Failed to remove data because FIFO is empty +**/ +EFI_STATUS +PciSerialFifoRemove ( + IN SERIAL_DEV_FIFO *Fifo, + OUT UINT8 *Data + ) +{ + /// + /// if FIFO is empty, no data can remove + /// + if (PciSerialFifoEmpty (Fifo)) { + return EFI_OUT_OF_RESOURCES; + } + /// + /// FIFO is not empty, can remove data + /// + *Data = Fifo->Data[Fifo->First]; + Fifo->Surplus++; + Fifo->First++; + if (Fifo->First == SERIAL_MAX_BUFFER_SIZE) { + Fifo->First = 0; + } + + return EFI_SUCCESS; +} + +/** + Reads and writes all avaliable data. + + @param[in] SerialDevice The device to flush + + @retval EFI_SUCCESS Data was read/written successfully. + @retval EFI_OUT_OF_RESOURCES Failed because software receive FIFO is full. Note, when + this happens, pending writes are not done. +**/ +EFI_STATUS +PciSerialReceiveTransmit ( + IN SERIAL_DEV *SerialDevice + ) +{ + SERIAL_PORT_LSR Lsr; + UINT8 Data; + BOOLEAN ReceiveFifoFull; + SERIAL_PORT_MSR Msr; + SERIAL_PORT_MCR Mcr; + UINTN TimeOut; + + Data = 0; + + /// + /// Begin the read or write + /// + if (SerialDevice->SoftwareLoopbackEnable) { + do { + ReceiveFifoFull = PciSerialFifoFull (&SerialDevice->Receive); + if (!PciSerialFifoEmpty (&SerialDevice->Transmit)) { + PciSerialFifoRemove (&SerialDevice->Transmit, &Data); + if (ReceiveFifoFull) { + return EFI_OUT_OF_RESOURCES; + } + + PciSerialFifoAdd (&SerialDevice->Receive, Data); + } + } while (!PciSerialFifoEmpty (&SerialDevice->Transmit)); + } else { + ReceiveFifoFull = PciSerialFifoFull (&SerialDevice->Receive); + do { + Lsr.Data = READ_LSR (SerialDevice->PciIo, SerialDevice->BarIndex); +#ifdef EFI_NT_EMULATOR + /// + /// This is required for NT to avoid a forever-spin... + /// This would be better if READ_LSR was a polling operation + /// that would timeout. + /// + Lsr.Bits.THRE = 1; +#endif + /// + /// Flush incomming data to prevent a an overrun during a long write + /// + if (Lsr.Bits.DR && !ReceiveFifoFull) { + ReceiveFifoFull = PciSerialFifoFull (&SerialDevice->Receive); + if (!ReceiveFifoFull) { + if (Lsr.Bits.FIFOE || Lsr.Bits.OE || Lsr.Bits.PE || Lsr.Bits.FE || Lsr.Bits.BI) { + if (Lsr.Bits.FIFOE || Lsr.Bits.PE || Lsr.Bits.FE || Lsr.Bits.BI) { + Data = READ_RBR (SerialDevice->PciIo, SerialDevice->BarIndex); + continue; + } + } + /// + /// Make sure the receive data will not be missed, Assert DTR + /// + if (SerialDevice->HardwareFlowControl) { + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.DTRC &= 0; + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + } + + Data = READ_RBR (SerialDevice->PciIo, SerialDevice->BarIndex); + + /// + /// Deassert DTR + /// + if (SerialDevice->HardwareFlowControl) { + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.DTRC |= 1; + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + } + + PciSerialFifoAdd (&SerialDevice->Receive, Data); + + continue; + } + } + /// + /// Do the write + /// + if (Lsr.Bits.THRE && !PciSerialFifoEmpty (&SerialDevice->Transmit)) { + /// + /// Make sure the transmit data will not be missed + /// + if (SerialDevice->HardwareFlowControl) { + /// + /// Send RTS + /// + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.RTS |= 1; + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + /// + /// Wait for CTS + /// + TimeOut = 0; + Msr.Data = READ_MSR (SerialDevice->PciIo, SerialDevice->BarIndex); + while (!Msr.Bits.CTS) { + gBS->Stall (TIMEOUT_STALL_INTERVAL); + TimeOut++; + if (TimeOut > 5) { + break; + } + + Msr.Data = READ_MSR (SerialDevice->PciIo, SerialDevice->BarIndex); + } + + if (Msr.Bits.CTS) { + PciSerialFifoRemove (&SerialDevice->Transmit, &Data); + WRITE_THR (SerialDevice->PciIo, SerialDevice->BarIndex, Data); + } + } + /// + /// write the data out + /// + if (!SerialDevice->HardwareFlowControl) { + PciSerialFifoRemove (&SerialDevice->Transmit, &Data); + WRITE_THR (SerialDevice->PciIo, SerialDevice->BarIndex, Data); + } + /// + /// Make sure the transmit data will not be missed + /// + if (SerialDevice->HardwareFlowControl) { + /// + /// Assert RTS + /// + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.RTS &= 0; + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + } + } + } while (Lsr.Bits.THRE && !PciSerialFifoEmpty (&SerialDevice->Transmit)); + } + + return EFI_SUCCESS; +} + +/// +/// Interface Functions +/// + +/** + Reset serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + + @retval EFI_SUCCESS Reset successfully + @retval EFI_DEVICE_ERROR Failed to reset +**/ +EFI_STATUS +EFIAPI +PciSerialReset ( + IN EFI_SERIAL_IO_PROTOCOL *This + ) +{ + EFI_STATUS Status; + SERIAL_DEV *SerialDevice; + SERIAL_PORT_LCR Lcr; + SERIAL_PORT_IER Ier; + SERIAL_PORT_MCR Mcr; + SERIAL_PORT_FCR Fcr; + EFI_TPL Tpl; + + SerialDevice = SERIAL_DEV_FROM_THIS (This); + + Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + /// + /// Make sure DLAB is 0. + /// + Lcr.Data = READ_LCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Lcr.Bits.DLAB = 0; + WRITE_LCR (SerialDevice->PciIo, SerialDevice->BarIndex, Lcr.Data); + + /// + /// Turn off all interrupts + /// + Ier.Data = READ_IER (SerialDevice->PciIo, SerialDevice->BarIndex); + Ier.Bits.RAVIE = 0; + Ier.Bits.THEIE = 0; + Ier.Bits.RIE = 0; + Ier.Bits.MIE = 0; + WRITE_IER (SerialDevice->PciIo, SerialDevice->BarIndex, Ier.Data); + + /// + /// Disable the FIFO. + /// + Fcr.Bits.TRFIFOE = 0; + WRITE_FCR (SerialDevice->PciIo, SerialDevice->BarIndex, Fcr.Data); + + /// + /// Turn off loopback and disable device interrupt. + /// + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.OUT1 = 0; + Mcr.Bits.OUT2 = 0; + Mcr.Bits.LME = 0; + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + + /// + /// Clear the scratch pad register + /// + WRITE_SCR (SerialDevice->PciIo, SerialDevice->BarIndex, 0); + + /// + /// Go set the current attributes + /// + Status = This->SetAttributes ( + This, + This->Mode->BaudRate, + This->Mode->ReceiveFifoDepth, + This->Mode->Timeout, + This->Mode->Parity, + (UINT8) This->Mode->DataBits, + This->Mode->StopBits + ); + + if (EFI_ERROR (Status)) { + gBS->RestoreTPL (Tpl); + return EFI_DEVICE_ERROR; + } + /// + /// Go set the current control bits + /// + Status = This->SetControl ( + This, + This->Mode->ControlMask + ); + + if (EFI_ERROR (Status)) { + gBS->RestoreTPL (Tpl); + return EFI_DEVICE_ERROR; + } + + gBS->RestoreTPL (Tpl); + + /// + /// Device reset is complete + /// + return EFI_SUCCESS; +} + +/** + Set new attributes to a serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] BaudRate The baudrate of the serial device + @param[in] ReceiveFifoDepth Fifo depth + @param[in] Timeout The request timeout for a single char + @param[in] Parity The type of parity used in serial device + @param[in] DataBits Number of databits used in serial device + @param[in] StopBits Number of stopbits used in serial device + + @retval EFI_SUCCESS The new attributes were set + @retval EFI_INVALID_PARAMETERS One or more attributes have an unsupported value + @exception EFI_UNSUPPORTED Data Bits can not set to 5 or 6 + @retval EFI_DEVICE_ERROR The serial device is not functioning correctly (no return) +**/ +EFI_STATUS +EFIAPI +PciSerialSetAttributes ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN UINT64 BaudRate, + IN UINT32 ReceiveFifoDepth, + IN UINT32 Timeout, + IN EFI_PARITY_TYPE Parity, + IN UINT8 DataBits, + IN EFI_STOP_BITS_TYPE StopBits + ) +{ + EFI_STATUS Status; + SERIAL_DEV *SerialDevice; + UINT32 Divisor; + UINT32 Remained; + SERIAL_PORT_LCR Lcr; + EFI_DEVICE_PATH_PROTOCOL *NewDevicePath; + EFI_TPL Tpl; + + SerialDevice = SERIAL_DEV_FROM_THIS (This); + + /// + /// DEBUG ((EFI_D_ERROR, "Info: Timeout = %d\n", Timeout)); + /// + /// Increase timeout by a factor of 3 to fix character drop-out with SOL. + /// + Timeout = Timeout * 100; + + /// + /// Check for default settings and fill in actual values. + /// + if (BaudRate == 0) { + BaudRate = SERIAL_PORT_DEFAULT_BAUD_RATE; + } + + if (ReceiveFifoDepth == 0) { + ReceiveFifoDepth = SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH; + } + + if (Timeout == 0) { + Timeout = SERIAL_PORT_DEFAULT_TIMEOUT; + } + + if (Parity == DefaultParity) { + Parity = SERIAL_PORT_DEFAULT_PARITY; + } + + if (DataBits == 0) { + DataBits = SERIAL_PORT_DEFAULT_DATA_BITS; + } + + if (StopBits == DefaultStopBits) { + StopBits = SERIAL_PORT_DEFAULT_STOP_BITS; + } + /// + /// 5 and 6 data bits can not be verified on a 16550A UART + /// Return EFI_INVALID_PARAMETER if an attempt is made to use these settings. + /// + if ((DataBits == 5) || (DataBits == 6)) { + return EFI_INVALID_PARAMETER; + } + /// + /// Make sure all parameters are valid + /// + if ((BaudRate > SERIAL_PORT_MAX_BAUD_RATE) || (BaudRate < SERIAL_PORT_MIN_BAUD_RATE)) { + return EFI_INVALID_PARAMETER; + } + /// + /// 50,75,110,134,150,300,600,1200,1800,2000,2400,3600,4800,7200,9600,19200, + /// 38400,57600,115200 + /// + if (BaudRate < 75) { + BaudRate = 50; + } else if (BaudRate < 110) { + BaudRate = 75; + } else if (BaudRate < 134) { + BaudRate = 110; + } else if (BaudRate < 150) { + BaudRate = 134; + } else if (BaudRate < 300) { + BaudRate = 150; + } else if (BaudRate < 600) { + BaudRate = 300; + } else if (BaudRate < 1200) { + BaudRate = 600; + } else if (BaudRate < 1800) { + BaudRate = 1200; + } else if (BaudRate < 2000) { + BaudRate = 1800; + } else if (BaudRate < 2400) { + BaudRate = 2000; + } else if (BaudRate < 3600) { + BaudRate = 2400; + } else if (BaudRate < 4800) { + BaudRate = 3600; + } else if (BaudRate < 7200) { + BaudRate = 4800; + } else if (BaudRate < 9600) { + BaudRate = 7200; + } else if (BaudRate < 19200) { + BaudRate = 9600; + } else if (BaudRate < 38400) { + BaudRate = 19200; + } else if (BaudRate < 57600) { + BaudRate = 38400; + } else if (BaudRate < 115200) { + BaudRate = 57600; + } else if (BaudRate <= SERIAL_PORT_MAX_BAUD_RATE) { + BaudRate = 115200; + } + + if ((ReceiveFifoDepth < 1) || (ReceiveFifoDepth > SERIAL_PORT_MAX_RECEIVE_FIFO_DEPTH)) { + return EFI_INVALID_PARAMETER; + } + + if ((Timeout < SERIAL_PORT_MIN_TIMEOUT) || (Timeout > SERIAL_PORT_MAX_TIMEOUT)) { + return EFI_INVALID_PARAMETER; + } + + if ((Parity < NoParity) || (Parity > SpaceParity)) { + return EFI_INVALID_PARAMETER; + } + + if ((DataBits < 5) || (DataBits > 8)) { + return EFI_INVALID_PARAMETER; + } + + if ((StopBits < OneStopBit) || (StopBits > TwoStopBits)) { + return EFI_INVALID_PARAMETER; + } + /// + /// for DataBits = 5, StopBits can not set TwoStopBits + /// + /// if ((DataBits == 5) && (StopBits == TwoStopBits)) { + /// return EFI_INVALID_PARAMETER; + /// } + /// + /// for DataBits = 6,7,8, StopBits can not set OneFiveStopBits + /// + if ((DataBits >= 6) && (DataBits <= 8) && (StopBits == OneFiveStopBits)) { + return EFI_INVALID_PARAMETER; + } + /// + /// See if the new attributes already match the current attributes + /// + if (SerialDevice->UartDevicePath.BaudRate == BaudRate && + SerialDevice->UartDevicePath.DataBits == DataBits && + SerialDevice->UartDevicePath.Parity == Parity && + SerialDevice->UartDevicePath.StopBits == StopBits && + SerialDevice->SerialMode.ReceiveFifoDepth == ReceiveFifoDepth && + SerialDevice->SerialMode.Timeout == Timeout + ) { + return EFI_SUCCESS; + } + /// + /// Compute divisor use to program the baud rate using a round determination + /// + Divisor = (UINT32) DivU64x32Remainder (SERIAL_PORT_INPUT_CLOCK, ((UINT32) BaudRate * 16), &Remained); + if (Remained) { + Divisor += 1; + } + + if ((Divisor == 0) || (Divisor & 0xffff0000)) { + return EFI_INVALID_PARAMETER; + } + + Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + /// + /// Compute the actual baud rate that the serial port will be programmed for. + /// + BaudRate = SERIAL_PORT_INPUT_CLOCK / Divisor / 16; + + /// + /// Put serial port on Divisor Latch Mode + /// + Lcr.Data = READ_LCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Lcr.Bits.DLAB = 1; + WRITE_LCR (SerialDevice->PciIo, SerialDevice->BarIndex, Lcr.Data); + + /// + /// Write the divisor to the serial port + /// + WRITE_DLL (SerialDevice->PciIo, SerialDevice->BarIndex, (UINT8) (Divisor & 0xff)); + WRITE_DLM (SerialDevice->PciIo, SerialDevice->BarIndex, (UINT8) ((Divisor >> 8) & 0xff)); + + /// + /// Put serial port back in normal mode and set remaining attributes. + /// + Lcr.Bits.DLAB = 0; + + switch (Parity) { + case NoParity: + Lcr.Bits.PAREN = 0; + Lcr.Bits.EVENPAR = 0; + Lcr.Bits.STICPAR = 0; + break; + + case EvenParity: + Lcr.Bits.PAREN = 1; + Lcr.Bits.EVENPAR = 1; + Lcr.Bits.STICPAR = 0; + break; + + case OddParity: + Lcr.Bits.PAREN = 1; + Lcr.Bits.EVENPAR = 0; + Lcr.Bits.STICPAR = 0; + break; + + case SpaceParity: + Lcr.Bits.PAREN = 1; + Lcr.Bits.EVENPAR = 1; + Lcr.Bits.STICPAR = 1; + break; + + case MarkParity: + Lcr.Bits.PAREN = 1; + Lcr.Bits.EVENPAR = 0; + Lcr.Bits.STICPAR = 1; + break; + default: + break; + } + + switch (StopBits) { + case OneStopBit: + Lcr.Bits.STOPB = 0; + break; + + case OneFiveStopBits: + case TwoStopBits: + Lcr.Bits.STOPB = 1; + break; + default: + break; + } + /// + /// DataBits + /// + Lcr.Bits.SERIALDB = (UINT8) ((DataBits - 5) & 0x03); + WRITE_LCR (SerialDevice->PciIo, SerialDevice->BarIndex, Lcr.Data); + + /// + /// Set the Serial I/O mode + /// + This->Mode->BaudRate = BaudRate; + This->Mode->ReceiveFifoDepth = ReceiveFifoDepth; + This->Mode->Timeout = Timeout; + This->Mode->Parity = Parity; + This->Mode->DataBits = DataBits; + This->Mode->StopBits = StopBits; + + /// + /// See if Device Path Node has actually changed + /// + if (SerialDevice->UartDevicePath.BaudRate == BaudRate && + SerialDevice->UartDevicePath.DataBits == DataBits && + SerialDevice->UartDevicePath.Parity == Parity && + SerialDevice->UartDevicePath.StopBits == StopBits + ) { + gBS->RestoreTPL (Tpl); + return EFI_SUCCESS; + } + /// + /// Update the device path + /// + SerialDevice->UartDevicePath.BaudRate = BaudRate; + SerialDevice->UartDevicePath.DataBits = DataBits; + SerialDevice->UartDevicePath.Parity = (UINT8) Parity; + SerialDevice->UartDevicePath.StopBits = (UINT8) StopBits; + + NewDevicePath = AppendDevicePathNode ( + SerialDevice->ParentDevicePath, + (EFI_DEVICE_PATH_PROTOCOL *) &SerialDevice->UartDevicePath + ); + if (NewDevicePath == NULL) { + gBS->RestoreTPL (Tpl); + return EFI_DEVICE_ERROR; + } + + if (SerialDevice->Handle != NULL) { + Status = gBS->ReinstallProtocolInterface ( + SerialDevice->Handle, + &gEfiDevicePathProtocolGuid, + SerialDevice->DevicePath, + NewDevicePath + ); + if (EFI_ERROR (Status)) { + gBS->RestoreTPL (Tpl); + return Status; + } + } + + if (SerialDevice->DevicePath) { + FreePool (SerialDevice->DevicePath); + } + + SerialDevice->DevicePath = NewDevicePath; + + gBS->RestoreTPL (Tpl); + + return EFI_SUCCESS; +} + +/** + Set ControlBits + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] Control Control bits that can be settable + + @retval EFI_SUCCESS New Control bits were set successfully + @retval EFI_UNSUPPORTED The Control bits wanted to set are not supported +**/ +EFI_STATUS +EFIAPI +PciSerialSetControl ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN UINT32 Control + ) +{ + SERIAL_DEV *SerialDevice; + SERIAL_PORT_MCR Mcr; + EFI_TPL Tpl; + + /// + /// The control bits that can be set are : + /// EFI_SERIAL_DATA_TERMINAL_READY: 0x0001 // WO + /// EFI_SERIAL_REQUEST_TO_SEND: 0x0002 // WO + /// EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE: 0x1000 // RW + /// EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE: 0x2000 // RW + /// + SerialDevice = SERIAL_DEV_FROM_THIS (This); + + /// + /// first determine the parameter is invalid + /// + if (Control & 0xffff8ffc) { + return EFI_UNSUPPORTED; + } + + Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.DTRC = 0; + Mcr.Bits.RTS = 0; + Mcr.Bits.LME = 0; + SerialDevice->SoftwareLoopbackEnable = FALSE; + SerialDevice->HardwareFlowControl = FALSE; + + if (Control & EFI_SERIAL_DATA_TERMINAL_READY) { + Mcr.Bits.DTRC = 1; + } + + if (Control & EFI_SERIAL_REQUEST_TO_SEND) { + Mcr.Bits.RTS = 1; + } + + if (Control & EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE) { + Mcr.Bits.LME = 1; + } + + if (Control & EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE) { + SerialDevice->HardwareFlowControl = TRUE; + } + + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + + if (Control & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) { + SerialDevice->SoftwareLoopbackEnable = TRUE; + } + + gBS->RestoreTPL (Tpl); + + return EFI_SUCCESS; +} + +/** + Get ControlBits + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] Control Control signals of the serial device + + @retval EFI_SUCCESS Get Control signals successfully +**/ +EFI_STATUS +EFIAPI +PciSerialGetControl ( + IN EFI_SERIAL_IO_PROTOCOL *This, + OUT UINT32 *Control + ) +{ + SERIAL_DEV *SerialDevice; + SERIAL_PORT_MSR Msr; + SERIAL_PORT_MCR Mcr; + EFI_TPL Tpl; + + Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + SerialDevice = SERIAL_DEV_FROM_THIS (This); + + *Control = 0; + + /// + /// Read the Modem Status Register + /// + Msr.Data = READ_MSR (SerialDevice->PciIo, SerialDevice->BarIndex); + + if (Msr.Bits.CTS) { + *Control |= EFI_SERIAL_CLEAR_TO_SEND; + } + + if (Msr.Bits.DSR) { + *Control |= EFI_SERIAL_DATA_SET_READY; + } + + if (Msr.Bits.RI) { + *Control |= EFI_SERIAL_RING_INDICATE; + } + + if (Msr.Bits.DCD) { + *Control |= EFI_SERIAL_CARRIER_DETECT; + } + /// + /// Read the Modem Control Register + /// + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + + if (Mcr.Bits.DTRC) { + *Control |= EFI_SERIAL_DATA_TERMINAL_READY; + } + + if (Mcr.Bits.RTS) { + *Control |= EFI_SERIAL_REQUEST_TO_SEND; + } + + if (Mcr.Bits.LME) { + *Control |= EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE; + } + + if (SerialDevice->HardwareFlowControl) { + *Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE; + } + /// + /// See if the Transmit FIFO is empty + /// + PciSerialReceiveTransmit (SerialDevice); + + if (PciSerialFifoEmpty (&SerialDevice->Transmit)) { + *Control |= EFI_SERIAL_OUTPUT_BUFFER_EMPTY; + } + /// + /// See if the Receive FIFO is empty. + /// + PciSerialReceiveTransmit (SerialDevice); + + if (PciSerialFifoEmpty (&SerialDevice->Receive)) { + *Control |= EFI_SERIAL_INPUT_BUFFER_EMPTY; + } + + if (SerialDevice->SoftwareLoopbackEnable) { + *Control |= EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE; + } + + gBS->RestoreTPL (Tpl); + + return EFI_SUCCESS; +} + +/** + Write the specified number of bytes to serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] BufferSize On input the size of Buffer, on output the amount of data actually written + @param[in] Buffer The buffer of data to write + + @retval EFI_SUCCESS The data were written successfully + @retval EFI_DEVICE_ERROR The device reported an error + @retval EFI_TIMEOUT The write operation was stopped due to timeout +**/ +EFI_STATUS +EFIAPI +PciSerialWrite ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN OUT UINTN *BufferSize, + IN VOID *Buffer + ) +{ + SERIAL_DEV *SerialDevice; + UINT8 *CharBuffer; + UINT32 Index; + UINTN Elapsed; + UINTN ActualWrite; + EFI_TPL Tpl; + SERIAL_PORT_MCR Mcr; + + SerialDevice = SERIAL_DEV_FROM_THIS (This); + Elapsed = 0; + ActualWrite = 0; + + if (*BufferSize == 0) { + return EFI_SUCCESS; + } + + if (!Buffer) { + return EFI_DEVICE_ERROR; + } + + Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + CharBuffer = (UINT8 *) Buffer; + + for (Index = 0; Index < *BufferSize; Index++) { + PciSerialFifoAdd (&SerialDevice->Transmit, CharBuffer[Index]); + + while + ( + PciSerialReceiveTransmit (SerialDevice) != EFI_SUCCESS || + PciSerialFifoEmpty (&SerialDevice->Transmit) == FALSE + ) { + /// + /// Unsuccessful write so check if timeout has expired, if not, + /// stall for a bit, increment time elapsed, and try again + /// + if (Elapsed >= This->Mode->Timeout) { + *BufferSize = ActualWrite; + if (PciSerialFifoEmpty (&SerialDevice->Transmit)) { + gBS->RestoreTPL (Tpl); + return EFI_TIMEOUT; + } + } + + gBS->Stall (TIMEOUT_STALL_INTERVAL); + + Elapsed += TIMEOUT_STALL_INTERVAL; + } // end while + ActualWrite++; + /// + /// Successful write so reset timeout + /// + Elapsed = 0; + + } // end for + /// + /// FW expects DTR bit to be SET before sending data. So enable DTR bit always. + /// + Mcr.Data = READ_MCR (SerialDevice->PciIo, SerialDevice->BarIndex); + Mcr.Bits.DTRC |= 1; + WRITE_MCR (SerialDevice->PciIo, SerialDevice->BarIndex, Mcr.Data); + + gBS->RestoreTPL (Tpl); + + return EFI_SUCCESS; +} + +/** + Read the specified number of bytes from serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] BufferSize On input the size of Buffer, on output the amount of data returned in buffer + @param[in] Buffer The buffer to return the data into + + @retval EFI_SUCCESS The data were read successfully + @retval EFI_DEVICE_ERROR The device reported an error + @retval EFI_TIMEOUT The read operation was stopped due to timeout +**/ +EFI_STATUS +EFIAPI +PciSerialRead ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN OUT UINTN *BufferSize, + OUT VOID *Buffer + ) +{ + SERIAL_DEV *SerialDevice; + UINT32 Index; + UINT8 *CharBuffer; + UINTN Elapsed; + EFI_STATUS Status; + EFI_TPL Tpl; + + SerialDevice = SERIAL_DEV_FROM_THIS (This); + Elapsed = 0; + + if (*BufferSize == 0) { + return EFI_SUCCESS; + } + + if (!Buffer) { + return EFI_DEVICE_ERROR; + } + /// + /// SerialDevice->Receive.First = 0; + /// SerialDevice->Receive.Last = 0; + /// SerialDevice->Receive.Surplus = SERIAL_MAX_BUFFER_SIZE; + /// + Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + Status = PciSerialReceiveTransmit (SerialDevice); + + if (EFI_ERROR (Status)) { + *BufferSize = 0; + + gBS->RestoreTPL (Tpl); + + return EFI_DEVICE_ERROR; + } + + CharBuffer = (UINT8 *) Buffer; + for (Index = 0; Index < *BufferSize; Index++) { + while (PciSerialFifoRemove (&SerialDevice->Receive, &(CharBuffer[Index])) != EFI_SUCCESS) { + /// + /// Unsuccessful read so check if timeout has expired, if not, + /// stall for a bit, increment time elapsed, and try again + /// Need this time out to get conspliter to work. + /// + if (Elapsed >= This->Mode->Timeout) { + *BufferSize = Index; + gBS->RestoreTPL (Tpl); + return EFI_TIMEOUT; + } + + gBS->Stall (TIMEOUT_STALL_INTERVAL); + Elapsed += TIMEOUT_STALL_INTERVAL; + + Status = PciSerialReceiveTransmit (SerialDevice); + if (Status == EFI_DEVICE_ERROR) { + *BufferSize = Index; + gBS->RestoreTPL (Tpl); + return EFI_DEVICE_ERROR; + } + } // end while + /// + /// Successful read so reset timeout + /// + Elapsed = 0; + } // end for + PciSerialReceiveTransmit (SerialDevice); + + gBS->RestoreTPL (Tpl); + + return EFI_SUCCESS; +} + +/** + Check serial port status. + + @param[in] SerialDevice The serial device instance + + @retval True It is present. + @retval False No present. +**/ +BOOLEAN +PciSerialPortPresent ( + IN SERIAL_DEV *SerialDevice + ) +{ + UINT8 Temp; + BOOLEAN Status; + + Status = TRUE; + + /// + /// Save SCR reg + /// + Temp = READ_SCR (SerialDevice->PciIo, SerialDevice->BarIndex); + WRITE_SCR (SerialDevice->PciIo, SerialDevice->BarIndex, 0xAA); + + if (READ_SCR (SerialDevice->PciIo, SerialDevice->BarIndex) != 0xAA) { +#ifndef EFI_NT_EMULATOR + Status = FALSE; +#endif + } + + WRITE_SCR (SerialDevice->PciIo, SerialDevice->BarIndex, 0x55); + + if (READ_SCR (SerialDevice->PciIo, SerialDevice->BarIndex) != 0x55) { +#ifndef EFI_NT_EMULATOR + Status = FALSE; +#endif + } + /// + /// Restore SCR + /// + WRITE_SCR (SerialDevice->PciIo, SerialDevice->BarIndex, Temp); + return Status; +} + +/** + PCI I/O read for byte only + + @param[in] PciIo Pointer of Pci IO protocol + @param[in] BarIndex Index of the BAR within PCI device + @param[in] Offset Offset of the BARIndex within PCI device + + @retval Return value read +**/ +UINT8 +PciSerialReadPort ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 BarIndex, + IN UINT16 Offset + ) +{ + UINT8 Data; + + /// + /// Use PciIo to access IO + /// + PciIo->Io.Read ( + PciIo, + EfiPciIoWidthUint8, + (UINT8) BarIndex, + (UINT16) Offset, + (UINTN) 1, + &Data + ); + return Data; +} + +/** + PCI I/O - write a byte + + @param[in] PciIo Pointer of Pci IO protocol + @param[in] BarIndex Index of the BAR within PCI device + @param[in] Offset Offset of the BARIndex within PCI device + @param[in] Data Written value +**/ +VOID +PciSerialWritePort ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 BarIndex, + IN UINT16 Offset, + IN UINT8 Data + ) +{ + /// + /// Use PciIo to access IO + /// + PciIo->Io.Write ( + PciIo, + EfiPciIoWidthUint8, + (UINT8) BarIndex, + (UINT16) Offset, + (UINTN) 1, + &Data + ); +} + +/** + Sol driver entry + + @param[in] ImageHandle Handle for this drivers loaded image protocol. + @param[in] SystemTable EFI system table. + + @retval EFI_SUCCESS Always return EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + return EFI_SUCCESS; +} diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.cif b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.cif new file mode 100644 index 0000000..950205e --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.cif @@ -0,0 +1,13 @@ +<component> + name = "PciSerial" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\Sol\Dxe\" + RefName = "PciSerial" +[files] +"PciSerial.sdl" +"PciSerial.mak" +"PciSerial.c" +"ComponentName.c" +"PciSerial.h" +"PciSerial.inf" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.h b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.h new file mode 100644 index 0000000..320de88 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.h @@ -0,0 +1,787 @@ +/** @file + Include for Pci Serial Driver + +@copyright + Copyright (c) 2004 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ +#ifndef _PCI_SERIAL_H +#define _PCI_SERIAL_H +#include "Pci22.h" +#include "Acpi.h" +#include "AmtLib.h" + +// +// Driver Consumed Protocol Prototypes +// +#include EFI_PROTOCOL_DEFINITION (PciIo) +#include EFI_PROTOCOL_DEFINITION (DevicePath) +#include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo) + +// +// Driver Produced Protocol Prototypes +// +#include EFI_PROTOCOL_DEFINITION (DriverBinding) +#include EFI_PROTOCOL_DEFINITION (ComponentName) +#include EFI_PROTOCOL_DEFINITION (SerialIo) + +// +// Status code GUID +// +#include EFI_GUID_DEFINITION (StatusCodeDataTypeId) + +// +// Internal Data Structures +// +#define SERIAL_DEV_SIGNATURE EFI_SIGNATURE_32 ('s', 'e', 'r', 'd') +#define SERIAL_MAX_BUFFER_SIZE 16 +#define TIMEOUT_STALL_INTERVAL 300 + +/// +/// Name: SERIAL_DEV_FIFO +/// Purpose: To define Receive FIFO and Transmit FIFO +/// Context: Used by serial data transmit and receive +/// Fields: +/// First UINT32: The index of the first data in array Data[] +/// Last UINT32: The index, which you can put a new data into array Data[] +/// Surplus UINT32: Identify how many data you can put into array Data[] +/// Data[] UINT8 : An array, which used to store data +/// +typedef struct { + UINT32 First; + UINT32 Last; + UINT32 Surplus; + UINT8 Data[SERIAL_MAX_BUFFER_SIZE]; +} SERIAL_DEV_FIFO; + +typedef enum { + UART8250 = 0, + UART16450 = 1, + UART16550 = 2, + UART16550A= 3 +} EFI_UART_TYPE; + +/// +/// Name: SERIAL_DEV +/// Purpose: To provide device specific information +/// Context: +/// Fields: +/// Signature UINTN: The identity of the serial device +/// SerialIo SERIAL_IO_PROTOCOL: Serial I/O protocol interface +/// SerialMode SERIAL_IO_MODE: +/// DevicePath EFI_DEVICE_PATH_PROTOCOL *: Device path of the serial device +/// Handle EFI_HANDLE: The handle instance attached to serial device +/// BarIndex UINT16: The bar index in pci cfg space that contains the base address +/// of specific serial device +/// Receive SERIAL_DEV_FIFO: The FIFO used to store data, +/// which is received by UART +/// Transmit SERIAL_DEV_FIFO: The FIFO used to store data, +/// which you want to transmit by UART +/// SoftwareLoopbackEnable BOOLEAN: +/// Type EFI_UART_TYPE: Specify the UART type of certain serial device +/// +typedef struct { + UINTN Signature; + + EFI_HANDLE Handle; + EFI_SERIAL_IO_PROTOCOL SerialIo; + EFI_SERIAL_IO_MODE SerialMode; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + UART_DEVICE_PATH UartDevicePath; + EFI_PCI_IO_PROTOCOL *PciIo; + + UINT16 BarIndex; + SERIAL_DEV_FIFO Receive; + SERIAL_DEV_FIFO Transmit; + BOOLEAN SoftwareLoopbackEnable; + BOOLEAN HardwareFlowControl; + EFI_UART_TYPE Type; + EFI_UNICODE_STRING_TABLE *ControllerNameTable; +} SERIAL_DEV; + +#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE) + +// +// Globale Variables +// +extern EFI_DRIVER_BINDING_PROTOCOL mPciSerialControllerDriverBinding; +extern EFI_COMPONENT_NAME_PROTOCOL mPciSerialComponentName; + +// +// Serial Driver Defaults +// +#define SERIAL_PORT_DEFAULT_BAUD_RATE 115200 +#define SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH 1 +#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000 ///< 1 seconds +#define SERIAL_PORT_DEFAULT_PARITY NoParity +#define SERIAL_PORT_DEFAULT_DATA_BITS 8 +#define SERIAL_PORT_DEFAULT_STOP_BITS 1 +#define SERIAL_PORT_DEFAULT_CONTROL_MASK EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE + +/// +/// (24000000/13)MHz input clock +/// +#define SERIAL_PORT_INPUT_CLOCK 1843200 + +/// +/// 115200 baud with rounding errors +/// +#define SERIAL_PORT_MAX_BAUD_RATE 115400 +#define SERIAL_PORT_MIN_BAUD_RATE 50 + +#define SERIAL_PORT_MAX_RECEIVE_FIFO_DEPTH 16 +#define SERIAL_PORT_MIN_TIMEOUT 1 ///< 1 uS +#define SERIAL_PORT_MAX_TIMEOUT 10000000000 ///< 10000 seconds +// +// UART Registers +// +#define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register +#define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register +#define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB +#define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB +#define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register +#define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register +#define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register +#define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register +#define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register +#define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register +#define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register +#define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register +#define TEKOA_SOL_VENDOR_ID 0x8086 +#define TEKOA_SOL_DEVICE_ID 0x108F + +#define PCI_CLASS_SCC 0x07 +#define PCI_SUBCLASS_SERIAL 0x00 +#define PCI_IF_GENERIC_XT 0x00 +#define PCI_IF_16450 0x01 +#define PCI_IF_16550 0x02 +#define PCI_IF_16650 0x03 +#define PCI_IF_16750 0x04 +#define PCI_IF_16850 0x05 +#define PCI_IF_16950 0x06 +#define PCI_SUBCLASS_PARALLEL 0x01 +#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02 +#define PCI_SUBCLASS_MODEM 0x03 +#define PCI_SUBCLASS_OTHER 0x80 + +#pragma pack(1) +/// +/// Name: SERIAL_PORT_IER_BITS +/// Purpose: Define each bit in Interrupt Enable Register +/// Context: +/// Fields: +/// RAVIE Bit0: Receiver Data Available Interrupt Enable +/// THEIE Bit1: Transmistter Holding Register Empty Interrupt Enable +/// RIE Bit2: Receiver Interrupt Enable +/// MIE Bit3: Modem Interrupt Enable +/// Reserved Bit4-Bit7: Reserved +/// +typedef struct { + UINT8 RAVIE : 1; + UINT8 THEIE : 1; + UINT8 RIE : 1; + UINT8 MIE : 1; + UINT8 Reserved : 4; +} SERIAL_PORT_IER_BITS; + +/// +/// Name: SERIAL_PORT_IER +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_IER_BITS: Bits of the IER +/// Data UINT8: the value of the IER +/// +typedef union { + SERIAL_PORT_IER_BITS Bits; + UINT8 Data; +} SERIAL_PORT_IER; + +/// +/// Name: SERIAL_PORT_IIR_BITS +/// Purpose: Define each bit in Interrupt Identification Register +/// Context: +/// Fields: +/// IPS Bit0: Interrupt Pending Status +/// IIB Bit1-Bit3: Interrupt ID Bits +/// Reserved Bit4-Bit5: Reserved +/// FIFOES Bit6-Bit7: FIFO Mode Enable Status +/// +typedef struct { + UINT8 IPS : 1; + UINT8 IIB : 3; + UINT8 Reserved : 2; + UINT8 FIFOES : 2; +} SERIAL_PORT_IIR_BITS; + +/// +/// Name: SERIAL_PORT_IIR +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_IIR_BITS: Bits of the IIR +/// Data UINT8: the value of the IIR +/// +typedef union { + SERIAL_PORT_IIR_BITS Bits; + UINT8 Data; +} SERIAL_PORT_IIR; + +/// +/// Name: SERIAL_PORT_FCR_BITS +/// Purpose: Define each bit in FIFO Control Register +/// Context: +/// Fields: +/// TRFIFOE Bit0: Transmit and Receive FIFO Enable +/// RESETRF Bit1: Reset Reciever FIFO +/// RESETTF Bit2: Reset Transmistter FIFO +/// DMS Bit3: DMA Mode Select +/// Reserved Bit4-Bit5: Reserved +/// RTB Bit6-Bit7: Receive Trigger Bits +/// +typedef struct { + UINT8 TRFIFOE : 1; + UINT8 RESETRF : 1; + UINT8 RESETTF : 1; + UINT8 DMS : 1; + UINT8 Reserved : 2; + UINT8 RTB : 2; +} SERIAL_PORT_FCR_BITS; + +/// +/// Name: SERIAL_PORT_FCR +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_FCR_BITS: Bits of the FCR +/// Data UINT8: the value of the FCR +/// +typedef union { + SERIAL_PORT_FCR_BITS Bits; + UINT8 Data; +} SERIAL_PORT_FCR; + +/// +/// Name: SERIAL_PORT_LCR_BITS +/// Purpose: Define each bit in Line Control Register +/// Context: +/// Fields: +/// SERIALDB Bit0-Bit1: Number of Serial Data Bits +/// STOPB Bit2: Number of Stop Bits +/// PAREN Bit3: Parity Enable +/// EVENPAR Bit4: Even Parity Select +/// STICPAR Bit5: Sticky Parity +/// BRCON Bit6: Break Control +/// DLAB Bit7: Divisor Latch Access Bit +/// +typedef struct { + UINT8 SERIALDB : 2; + UINT8 STOPB : 1; + UINT8 PAREN : 1; + UINT8 EVENPAR : 1; + UINT8 STICPAR : 1; + UINT8 BRCON : 1; + UINT8 DLAB : 1; +} SERIAL_PORT_LCR_BITS; + +/// +/// Name: SERIAL_PORT_LCR +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_LCR_BITS: Bits of the LCR +/// Data UINT8: the value of the LCR +/// +typedef union { + SERIAL_PORT_LCR_BITS Bits; + UINT8 Data; +} SERIAL_PORT_LCR; + +/// +/// Name: SERIAL_PORT_MCR_BITS +/// Purpose: Define each bit in Modem Control Register +/// Context: +/// Fields: +/// DTRC Bit0: Data Terminal Ready Control +/// RTS Bit1: Request To Send Control +/// OUT1 Bit2: Output1 +/// OUT2 Bit3: Output2, used to disable interrupt +/// LME; Bit4: Loopback Mode Enable +/// Reserved Bit5-Bit7: Reserved +/// +typedef struct { + UINT8 DTRC : 1; + UINT8 RTS : 1; + UINT8 OUT1 : 1; + UINT8 OUT2 : 1; + UINT8 LME : 1; + UINT8 Reserved : 3; +} SERIAL_PORT_MCR_BITS; + +/// +/// Name: SERIAL_PORT_MCR +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_MCR_BITS: Bits of the MCR +/// Data UINT8: the value of the MCR +/// +typedef union { + SERIAL_PORT_MCR_BITS Bits; + UINT8 Data; +} SERIAL_PORT_MCR; + +/// +/// Name: SERIAL_PORT_LSR_BITS +/// Purpose: Define each bit in Line Status Register +/// Context: +/// Fields: +/// DR Bit0: Receiver Data Ready Status +/// OE Bit1: Overrun Error Status +/// PE Bit2: Parity Error Status +/// FE Bit3: Framing Error Status +/// BI Bit4: Break Interrupt Status +/// THRE Bit5: Transmistter Holding Register Status +/// TEMT Bit6: Transmitter Empty Status +/// FIFOE Bit7: FIFO Error Status +/// +typedef struct { + UINT8 DR : 1; + UINT8 OE : 1; + UINT8 PE : 1; + UINT8 FE : 1; + UINT8 BI : 1; + UINT8 THRE : 1; + UINT8 TEMT : 1; + UINT8 FIFOE : 1; +} SERIAL_PORT_LSR_BITS; + +/// +/// Name: SERIAL_PORT_LSR +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_LSR_BITS: Bits of the LSR +/// Data UINT8: the value of the LSR +/// +typedef union { + SERIAL_PORT_LSR_BITS Bits; + UINT8 Data; +} SERIAL_PORT_LSR; + +/// +/// Name: SERIAL_PORT_MSR_BITS +/// Purpose: Define each bit in Modem Status Register +/// Context: +/// Fields: +/// DeltaCTS Bit0: Delta Clear To Send Status +/// DeltaDSR Bit1: Delta Data Set Ready Status +/// TrailingEdgeRI Bit2: Trailing Edge of Ring Indicator Status +/// DeltaDCD Bit3: Delta Data Carrier Detect Status +/// CTS Bit4: Clear To Send Status +/// DSR Bit5: Data Set Ready Status +/// RI Bit6: Ring Indicator Status +/// DCD Bit7: Data Carrier Detect Status +/// +typedef struct { + UINT8 DeltaCTS : 1; + UINT8 DeltaDSR : 1; + UINT8 TrailingEdgeRI : 1; + UINT8 DeltaDCD : 1; + UINT8 CTS : 1; + UINT8 DSR : 1; + UINT8 RI : 1; + UINT8 DCD : 1; +} SERIAL_PORT_MSR_BITS; + +/// +/// Name: SERIAL_PORT_MSR +/// Purpose: +/// Context: +/// Fields: +/// Bits SERIAL_PORT_MSR_BITS: Bits of the MSR +/// Data UINT8: the value of the MSR +/// +typedef union { + SERIAL_PORT_MSR_BITS Bits; + UINT8 Data; +} SERIAL_PORT_MSR; + +#pragma pack() +// +// Define serial register I/O macros +// +#define READ_RBR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_RBR) +#define READ_DLL(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_DLL) +#define READ_DLM(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_DLM) +#define READ_IER(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_IER) +#define READ_IIR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_IIR) +#define READ_LCR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_LCR) +#define READ_MCR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_MCR) +#define READ_LSR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_LSR) +#define READ_MSR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_MSR) +#define READ_SCR(IO, B) PciSerialReadPort (IO, B, SERIAL_REGISTER_SCR) + +#define WRITE_THR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_THR, D) +#define WRITE_DLL(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_DLL, D) +#define WRITE_DLM(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_DLM, D) +#define WRITE_IER(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_IER, D) +#define WRITE_FCR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_FCR, D) +#define WRITE_LCR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_LCR, D) +#define WRITE_MCR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_MCR, D) +#define WRITE_LSR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_LSR, D) +#define WRITE_MSR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_MSR, D) +#define WRITE_SCR(IO, B, D) PciSerialWritePort (IO, B, SERIAL_REGISTER_SCR, D) + +#define PCI_SERIAL_PORT_NAME "PCI Serial Port # " + +#define R_PCI_SVID 0x2C + +/** + This function checks to see if the driver supports a device specified by + "Controller handle" parameter. It is called by DXE Core StartImage() or + ConnectController() routines. The driver uses 'device path' and/or + 'services' from the Bus I/O abstraction attached to the controller handle + to determine if the driver support this controller handle. + + Note: In the BDS (Boot Device Selection) phase, the DXE core enumerate all + devices (or, controller) and assigns GUIDs to them. + + @param[in] This a pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. + @param[in] RemainingDevicePath A pointer to the device path. Ignored by device + driver but used by bus driver + + @retval EFI_SUCCESS Have device to support + @retval EFI_NOT_FOUND The device doesn't support or relative environment not ready +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +; + +/** + This routine is called right after the .Supported() called + and return EFI_SUCCESS. Notes: The supported protocols are + checked but the Protocols are closed. + + @param[in] This A pointer points to the Binding Protocol instance + @param[in] Controller The handle of controller to be tested. Parameter + passed by the caller + @param[in] RemainingDevicePath A pointer to the device path. Should be ignored by + device driver + + @retval EFI_SUCCESS The driver ready and initial complete. + @retval Other The device doesn't initial. +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +; + +/** + Stop. + + @param[in] This Pointer to driver binding protocol + @param[in] Controller Controller handle to connect + @param[in] NumberOfChildren Number of children handle created by this driver + @param[in] ChildHandleBuffer Buffer containing child handle created + + @retval EFI_SUCCESS Driver disconnected successfully from controller + @retval EFI_DEVICE_ERROR Cannot find BIOS_VIDEO_DEV structure +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +; + +/** + Detect whether specific FIFO is full or not + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + + @retval TRUE The FIFO is full + @retval FALSE The FIFO is not full +**/ +BOOLEAN +PciSerialFifoFull ( + IN SERIAL_DEV_FIFO *Fifo + ) +; + +/** + Detect whether specific FIFO is empty or not + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + + @retval TRUE The FIFO is empty + @retval FALSE The FIFO is not empty +**/ +BOOLEAN +PciSerialFifoEmpty ( + IN SERIAL_DEV_FIFO *Fifo + ) +; + +/** + Add data to specific FIFO + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + @param[in] Data The data added to FIFO + + @retval EFI_SUCCESS Add data to specific FIFO successfully + @retval EFI_OUT_OF_RESOURCES Failed to add data because FIFO is already full +**/ +EFI_STATUS +PciSerialFifoAdd ( + IN SERIAL_DEV_FIFO *Fifo, + IN UINT8 Data + ) +; + +/** + Remove data from specific FIFO + + @param[in] Fifo A pointer to the Data Structure SERIAL_DEV_FIFO + @param[in] Data The data removed from FIFO + + @retval EFI_SUCCESS Remove data from specific FIFO successfully + @retval EFI_OUT_OF_RESOURCES Failed to remove data because FIFO is empty +**/ +EFI_STATUS +PciSerialFifoRemove ( + IN SERIAL_DEV_FIFO *Fifo, + OUT UINT8 *Data + ) +; + +/** + Reads and writes all avaliable data. + + @param[in] SerialDevice The device to flush + + @retval EFI_SUCCESS Data was read/written successfully. + @retval EFI_OUT_OF_RESOURCES Failed because software receive FIFO is full. Note, when + this happens, pending writes are not done. +**/ +EFI_STATUS +PciSerialReceiveTransmit ( + IN SERIAL_DEV *SerialDevice + ) +; +/// +/// Serial I/O Protocol Interface +/// +/** + Reset serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + + @retval EFI_SUCCESS Reset successfully + @retval EFI_DEVICE_ERROR Failed to reset +**/ +EFI_STATUS +EFIAPI +PciSerialReset ( + IN EFI_SERIAL_IO_PROTOCOL *This + ) +; + +/** + Set new attributes to a serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] BaudRate The baudrate of the serial device + @param[in] ReceiveFifoDepth Fifo depth + @param[in] Timeout The request timeout for a single char + @param[in] Parity The type of parity used in serial device + @param[in] DataBits Number of databits used in serial device + @param[in] StopBits Number of stopbits used in serial device + + @retval EFI_SUCCESS The new attributes were set + @retval EFI_INVALID_PARAMETERS One or more attributes have an unsupported value + @exception EFI_UNSUPPORTED Data Bits can not set to 5 or 6 + @retval EFI_DEVICE_ERROR The serial device is not functioning correctly (no return) +**/ +EFI_STATUS +EFIAPI +PciSerialSetAttributes ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN UINT64 BaudRate, + IN UINT32 ReceiveFifoDepth, + IN UINT32 Timeout, + IN EFI_PARITY_TYPE Parity, + IN UINT8 DataBits, + IN EFI_STOP_BITS_TYPE StopBits + ) +; + +/** + Set ControlBits + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] Control Control bits that can be settable + + @retval EFI_SUCCESS New Control bits were set successfully + @retval EFI_UNSUPPORTED The Control bits wanted to set are not supported +**/ +EFI_STATUS +EFIAPI +PciSerialSetControl ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN UINT32 Control + ) +; + +/** + Get ControlBits + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] Control Control signals of the serial device + + @retval EFI_SUCCESS Get Control signals successfully +**/ +EFI_STATUS +EFIAPI +PciSerialGetControl ( + IN EFI_SERIAL_IO_PROTOCOL *This, + OUT UINT32 *Control + ) +; + +/** + Write the specified number of bytes to serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] BufferSize On input the size of Buffer, on output the amount of data actually written + @param[in] Buffer The buffer of data to write + + @retval EFI_SUCCESS The data were written successfully + @retval EFI_DEVICE_ERROR The device reported an error + @retval EFI_TIMEOUT The write operation was stopped due to timeout +**/ +EFI_STATUS +EFIAPI +PciSerialWrite ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN OUT UINTN *BufferSize, + IN VOID *Buffer + ) +; + +/** + Read the specified number of bytes from serial device + + @param[in] This Pointer to EFI_SERIAL_IO_PROTOCOL + @param[in] BufferSize On input the size of Buffer, on output the amount of data returned in buffer + @param[in] Buffer The buffer to return the data into + + @retval EFI_SUCCESS The data were read successfully + @retval EFI_DEVICE_ERROR The device reported an error + @retval EFI_TIMEOUT The read operation was stopped due to timeout +**/ +EFI_STATUS +EFIAPI +PciSerialRead ( + IN EFI_SERIAL_IO_PROTOCOL *This, + IN OUT UINTN *BufferSize, + OUT VOID *Buffer + ) +; + +/// +/// Internal Functions +/// +/** + Check serial port status. + + @param[in] SerialDevice The serial device instance + + @retval True It is present. + @retval False No present. +**/ +BOOLEAN +PciSerialPortPresent ( + IN SERIAL_DEV *SerialDevice + ) +; + +/** + PCI I/O read for byte only + + @param[in] PciIo Pointer of Pci IO protocol + @param[in] BarIndex Index of the BAR within PCI device + @param[in] Offset Offset of the BARIndex within PCI device + + @retval Return value read +**/ +UINT8 +PciSerialReadPort ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 BarIndex, + IN UINT16 Offset + ) +; + +/** + PCI I/O - write a byte + + @param[in] PciIo Pointer of Pci IO protocol + @param[in] BarIndex Index of the BAR within PCI device + @param[in] Offset Offset of the BARIndex within PCI device + @param[in] Data Written value +**/ +VOID +PciSerialWritePort ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 BarIndex, + IN UINT16 Offset, + IN UINT8 Data + ) +; + +/** + Sol driver entry + + @param[in] ImageHandle Handle for this drivers loaded image protocol. + @param[in] SystemTable EFI system table. + + @retval EFI_SUCCESS Always return EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +PciSerialControllerDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +; +#endif diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.inf b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.inf new file mode 100644 index 0000000..a3b4e0b --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.inf @@ -0,0 +1,87 @@ +## @file +# Component description file for PciSerial module. +# +#@copyright +# Copyright (c) 2004 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = PciSerial +FILE_GUID = FB142B99-DF57-46cb-BC69-0BF858A734F9 +COMPONENT_TYPE = BS_DRIVER + +[sources.common] + PciSerial.c + PciSerial.h + ComponentName.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGlueDxeDriverEntryPoint.c + +[includes.common] + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Dxe + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Include + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + AmtLib + EdkProtocolLib + EdkIIGlueBaseLib + EdkIIGlueBaseMemoryLib + EdkIIGlueDxeReportStatusCodeLib + EdkIIGlueDxeDebugLibReportStatusCode + EdkIIGlueUefiBootServicesTableLib + EdkIIGlueUefiRuntimeServicesTableLib + EdkIIGlueUefiDevicePathLib + EdkIIGlueUefiLib + EdkIIGlueUefiDriverModelLib + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=PciSerialControllerDriverEntryPoint \ + -D __EDKII_GLUE_DRIVER_BINDING_PROTOCOL_INSTANCE__=mPciSerialControllerDriverBinding \ + -D __EDKII_GLUE_COMPONENT_NAME_PROTOCOL_INSTANCE__=mPciSerialComponentName + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_LIB__ \ + -D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + -D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__ + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_UEFI_LIB__ \ + -D __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.mak b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.mak new file mode 100644 index 0000000..a94fda5 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.mak @@ -0,0 +1,55 @@ +# MAK file for the ModulePart:PciSerial + +all : PciSerial + +$(BUILD_DIR)\PciSerial.mak : $(PciSerial_DIR)\$(@B).cif $(PciSerial_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PciSerial_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PciSerial : $(BUILD_DIR)\PciSerial.mak PciSerialBin + +PciSerial_INCLUDES=\ + $(EdkIIGlueLib_INCLUDES)\ + $(ME_INCLUDES)\ + $(INTEL_PCH_INCLUDES) + +PciSerial_LIBS=\ + $(EDKPROTOCOLLIB)\ + $(AmtLibDxe_LIB)\ + $(EdkIIGlueBaseLib_LIB)\ +!IF "$(x64_BUILD)"=="1" + $(EdkIIGlueBaseLibX64_LIB)\ +!ELSE + $(EdkIIGlueBaseLibIA32_LIB)\ +!ENDIF + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGlueDxeReportStatusCodeLib_LIB)\ + $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\ + $(EdkIIGlueUefiBootServicesTableLib_LIB)\ + $(EdkIIGlueUefiDevicePathLib_LIB)\ + $(EdkIIGlueUefiLib_LIB)\ + $(EdkIIGlueUefiDriverModelLib_LIB)\ + +PciSerial_DEFINES=\ + $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=PciSerialControllerDriverEntryPoint"\ + /D"__EDKII_GLUE_DRIVER_BINDING_PROTOCOL_INSTANCE__=mPciSerialControllerDriverBinding"\ + /D"__EDKII_GLUE_COMPONENT_NAME_PROTOCOL_INSTANCE__=mPciSerialComponentName"\ + /D __EDKII_GLUE_BASE_LIB__\ + /D __EDKII_GLUE_BASE_MEMORY_LIB__\ + /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\ + /D __EDKII_GLUE_UEFI_DEVICE_PATH_LIB__\ + /D __EDKII_GLUE_UEFI_LIB__ \ + /D __EDKII_GLUE_UEFI_DRIVER_MODEL_LIB__ + +PciSerialBin : $(PciSerial_LIBS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\PciSerial.mak all \ + "MY_INCLUDES=$(PciSerial_INCLUDES)"\ + "MY_DEFINES=$(PciSerial_DEFINES)"\ + GUID=FB142B99-DF57-46cb-BC69-0BF858A734F9 \ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=BS_DRIVER \ + EDKIIModule=DXEDRIVER\ + COMPRESS=1 diff --git a/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.sdl b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.sdl new file mode 100644 index 0000000..b485486 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/Sol/Dxe/PciSerial.sdl @@ -0,0 +1,24 @@ +TOKEN + Name = "PciSerial_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable PciSerial support in Project" +End +MODULE + Help = "Includes PciSerial.mak to Project" + File = "PciSerial.mak" +End + +PATH + Name = "PciSerial_DIR" + Help = "iAMT PciSerial file source directory" +End + +ELINK + Name = "$(BUILD_DIR)\PciSerial.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End
\ No newline at end of file diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.c b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.c new file mode 100644 index 0000000..87c0818 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.c @@ -0,0 +1,96 @@ +/** @file + Start Watchdog timer in PEI phase + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include "StartWatchDog.h" +#include "MeLibPei.h" +#endif + +/** + Perform the platform spefific initializations. + + @param[in] FfsHeader FFS file header pointer of this driver. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS if the interface could be successfully installed. +**/ +EFI_STATUS +EFIAPI +PeiInitStartWatchDog ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + EFI_BOOT_MODE BootMode; + PEI_HECI_PPI *HeciPpi; + UINT32 HeciMemBar; + UINT16 WaitTimerBios; + UINT32 MeStatus; + + Status = (*PeiServices)->GetBootMode (PeiServices, &BootMode); + ASSERT_EFI_ERROR (Status); + + if (!EFI_ERROR (Status) && (BootMode == BOOT_ON_S3_RESUME)) { + return EFI_SUCCESS; + } + + if (PeiAmtWatchDog (PeiServices)) { + Status = PeiServicesLocatePpi ( + &gPeiHeciPpiGuid, // GUID + 0, // INSTANCE + NULL, // EFI_PEI_PPI_DESCRIPTOR + (VOID **) &HeciPpi // PPI + ); + ASSERT_EFI_ERROR (Status); + + Status = HeciPpi->InitializeHeci (PeiServices, HeciPpi, &HeciMemBar); + if (!EFI_ERROR (Status)) { + /// + /// Get ME Status + /// + Status = HeciPpi->GetMeStatus (PeiServices, &MeStatus); + ASSERT_EFI_ERROR (Status); + + /// + /// If ME is ready, send AsfStartWatchDog message + /// + if (ME_STATUS_ME_STATE_ONLY (MeStatus) == ME_READY) { + WaitTimerBios = PeiAmtWatchTimerBiosGet (PeiServices); + + Status = PeiHeciAsfStartWatchDog ( + PeiServices, + HeciPpi, + HeciMemBar, + WaitTimerBios + ); + ASSERT_EFI_ERROR (Status); + } + } + } + + return Status; +} diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.cif b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.cif new file mode 100644 index 0000000..0dfa5a9 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.cif @@ -0,0 +1,13 @@ +<component> + name = "StartWatchDog" + category = ModulePart + LocalRoot = "ReferenceCode\ME\ActiveManagement\StartWatchDog\Pei\" + RefName = "StartWatchDog" +[files] +"StartWatchDog.sdl" +"StartWatchDog.mak" +"StartWatchDog.h" +"StartWatchDog.c" +"StartWatchDog.dxs" +"StartWatchDog.inf" +<endComponent> diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.dxs b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.dxs new file mode 100644 index 0000000..3c05cbb --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.dxs @@ -0,0 +1,47 @@ +/** @file + Dependency expression file for the StartWatchDog PEIM. + +@copyright + Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "PeimDepex.h" + +// +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase; +// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase. +// +#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB) +#include "EfiDepex.h" + +#include EFI_PPI_DEFINITION (Heci) +#include EFI_PPI_DEFINITION (AmtPlatformPolicyPei) +#include EFI_PPI_CONSUMER (BootMode) +#endif + +DEPENDENCY_START + PEI_HECI_PPI_GUID AND + PEI_MASTER_BOOT_MODE_PEIM_PPI AND + PEI_AMT_PLATFORM_POLICY_PPI_GUID +DEPENDENCY_END + + diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.h b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.h new file mode 100644 index 0000000..5415206 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.h @@ -0,0 +1,49 @@ +/** @file + StartWatchDog header file + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights + reserved This software and associated documentation (if any) + is furnished under a license and may only be used or copied in + accordance with the terms of the license. Except as permitted + by such license, no part of this software or documentation may + be reproduced, stored in a retrieval system, or transmitted in + any form or by any means without the express written consent + of Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _EFI_START_WATCH_DOG_H_ +#define _EFI_START_WATCH_DOG_H_ + +#include "BootMode.h" +#include "AmtLibPei.h" + +#include EFI_PPI_DEPENDENCY (Heci) + +// +// Function Prototypes +// + +/** + Perform the platform spefific initializations. + + @param[in] FfsHeader FFS file header pointer of this driver. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS if the interface could be successfully installed. +**/ +EFI_STATUS +EFIAPI +PeiInitStartWatchDog ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ) +; + +#endif // _EFI_START_WATCH_DOG_H_ diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.inf b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.inf new file mode 100644 index 0000000..1dd3811 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.inf @@ -0,0 +1,74 @@ +## @file +# Component description file for the Start Watch Dog PEIM driver. +# +#@copyright +# Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + +[defines] +BASE_NAME = StartWatchDog +FILE_GUID = 5479E09C-2E74-481b-89F8-B0172E388D1F +COMPONENT_TYPE = PE32_PEIM + +[sources.common] + StartWatchDog.h + StartWatchDog.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGluePeimEntryPoint.c + +[includes.common] + $(EFI_SOURCE)/$(PROJECT_ME_ROOT) + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/AMT/Pei + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Pei + $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include + +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + MeLibPpi + MeLibPei + AmtLibPei + EdkIIGlueBaseMemoryLib + EdkIIGluePeiDebugLibReportStatusCode + EdkIIGluePeiReportStatusCodeLib + EdkIIGluePeiServicesLib + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + DPX_SOURCE = StartWatchDog.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=PeiInitStartWatchDog + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + -D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_PEI_SERVICES_LIB__ diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.mak b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.mak new file mode 100644 index 0000000..489c455 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.mak @@ -0,0 +1,52 @@ +# MAK file for the ModulePart:StartWatchDog + +all: StartWatchDog + +StartWatchDog: $(BUILD_DIR)\StartWatchDog.mak StartWatchDogBin + +$(BUILD_DIR)\StartWatchDog.mak : $(StartWatchDog_DIR)\$(@B).cif $(StartWatchDog_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(StartWatchDog_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + + +StartWatchDog_INCLUDES=\ + $(EDK_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(ME_INCLUDES)\ + +StartWatchDog_DEFINES = $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=PeiInitStartWatchDog"\ + /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + /D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_PEI_SERVICES_LIB__\ + /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \ + +StartWatchDog_LIBS =\ + $(EDKPROTOCOLLIB)\ + $(AmtLibPei_LIB)\ + $(MeLibPpi_LIB)\ + $(MeLibPei_LIB)\ + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGlueBaseLibIA32_LIB)\ + $(EdkIIGlueBaseLib_LIB)\ + $(EdkIIGlueBaseIoLibIntrinsic_LIB)\ + $(EdkIIGlueBaseMemoryLib_LIB)\ + $(EdkIIGluePeiDebugLibReportStatusCode_LIB)\ + $(EdkIIGluePeiReportStatusCodeLib_LIB)\ + $(EdkIIGluePeiServicesLib_LIB)\ + $(EdkIIGluePeiMemoryAllocationLib_LIB)\ + +StartWatchDogBin : $(StartWatchDog_LIBS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\StartWatchDog.mak all\ + NAME=StartWatchDog\ + MAKEFILE=$(BUILD_DIR)\StartWatchDog.mak \ + GUID=5479E09C-2E74-481b-89F8-B0172E388D1F\ + "MY_INCLUDES=$(StartWatchDog_INCLUDES)"\ + "MY_DEFINES=$(StartWatchDog_DEFINES)"\ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=PEIM \ + EDKIIModule=PEIM\ + DEPEX1=$(StartWatchDog_DIR)\StartWatchDog.dxs DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX \ + COMPRESS=0 diff --git a/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.sdl b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.sdl new file mode 100644 index 0000000..ec760e6 --- /dev/null +++ b/ReferenceCode/ME/ActiveManagement/StartWatchDog/Pei/StartWatchDog.sdl @@ -0,0 +1,25 @@ +TOKEN + Name = "StartWatchDog_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable StartWatchDog support in Project" +End + +MODULE + Help = "Includes StartWatchDog.mak to Project" + File = "StartWatchDog.mak" +End + +PATH + Name = "StartWatchDog_DIR" + Help = "iAMT Heci Pei file source directory" +End + +ELINK + Name = "$(BUILD_DIR)\StartWatchDog.ffs" + Parent = "FV_BB" + InvokeOrder = AfterParent +End |