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author | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
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committer | raywu <raywu0301@gmail.com> | 2018-06-15 00:00:50 +0800 |
commit | b7c51c9cf4864df6aabb99a1ae843becd577237c (patch) | |
tree | eebe9b0d0ca03062955223097e57da84dd618b9a /ReferenceCode/ME/Ppi/Heci | |
download | zprj-master.tar.xz |
Diffstat (limited to 'ReferenceCode/ME/Ppi/Heci')
-rw-r--r-- | ReferenceCode/ME/Ppi/Heci/Heci.c | 31 | ||||
-rw-r--r-- | ReferenceCode/ME/Ppi/Heci/Heci.h | 201 |
2 files changed, 232 insertions, 0 deletions
diff --git a/ReferenceCode/ME/Ppi/Heci/Heci.c b/ReferenceCode/ME/Ppi/Heci/Heci.c new file mode 100644 index 0000000..9b600a7 --- /dev/null +++ b/ReferenceCode/ME/Ppi/Heci/Heci.c @@ -0,0 +1,31 @@ +/** @file + PEI Heci PPI + +@copyright + Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement +**/ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include EFI_PPI_DEFINITION (Heci) +#endif + +EFI_GUID gPeiHeciPpiGuid = PEI_HECI_PPI_GUID; + +EFI_GUID_STRING(&gPeiHeciPpiGuid, "PEI Heci PPI", "PEI Heci PPI"); diff --git a/ReferenceCode/ME/Ppi/Heci/Heci.h b/ReferenceCode/ME/Ppi/Heci/Heci.h new file mode 100644 index 0000000..2f026b3 --- /dev/null +++ b/ReferenceCode/ME/Ppi/Heci/Heci.h @@ -0,0 +1,201 @@ +/** @file + PEI Heci PPI + +@copyright + Copyright (c) 2006 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ +#ifndef _PEI_HECI_PPI_H_ +#define _PEI_HECI_PPI_H_ + +#include "MeState.h" + +/// +/// HECI PPI GUID +/// This PPI provides an interface to communicate with Intel ME in PEI phase +/// +#define PEI_HECI_PPI_GUID \ + { \ + 0xEE0EA811, 0xFBD9, 0x4777, 0xB9, 0x5A, 0xBA, 0x4F, 0x71, 0x10, 0x1F, 0x74 \ + } + +extern EFI_GUID gPeiHeciPpiGuid; + +EFI_FORWARD_DECLARATION (PEI_HECI_PPI); + +/** + Function sends one messsage through the HECI circular buffer and waits + for the corresponding ACK message. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI. + @param[in][out] Message Pointer to the message buffer. + @param[in] HeciMemBar HECI Memory BAR. + @param[in][out] Length Length of the message in bytes. + @param[in] HostAddress Address of the sending entity. + @param[in] MeAddress Address of the ME entity that should receive the message. + + @retval EFI_SUCCESS Command succeeded + @retval EFI_DEVICE_ERROR HECI Device error, command aborts abnormally + @retval EFI_TIMEOUT HECI does not return the bufferbefore timeout + @retval EFI_BUFFER_TOO_SMALL Message Buffer is too small for the Acknowledge + @exception EFI_UNSUPPORTED Current ME mode doesn't support send message through HECI +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_SENDWACK) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN OUT UINT32 *Message, + IN UINT32 HeciMemBar, + IN OUT UINT32 *Length, + IN UINT8 HostAddress, + IN UINT8 MeAddress + ); + +/** + Read the HECI Message from Intel ME with size in Length into + buffer Message. Set Blocking to BLOCKING and code will wait + until one message packet is received. When set to + NON_BLOCKING, if the circular buffer is empty at the time, the + code not wait for the message packet read. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI. + @param[in] HeciMemBar HECI Memory BAR. + @param[in] Blocking Used to determine if the read is BLOCKING or NON_BLOCKING. + @param[in] MessageBody Pointer to a buffer used to receive a message. + @param[in][out] Length Pointer to the length of the buffer on input and the length + of the message on return. (in bytes) + + @exception EFI_UNSUPPORTED Current ME mode doesn't support this function + @retval EFI_SUCCESS One message packet read + @retval EFI_TIMEOUT HECI is not ready for communication + @retval EFI_DEVICE_ERROR Zero-length message packet read + @retval EFI_BUFFER_TOO_SMALL The caller's buffer was not large enough +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_READ_MESSAGE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN UINT32 Blocking, + IN UINT32 HeciMemBar, + IN UINT32 *MessageBody, + IN OUT UINT32 *Length + ); + +/** + Function sends one messsage (of any length) through the HECI circular buffer. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI. + @param[in] HeciMemBar HECI Memory BAR. + @param[in] Message Pointer to the message data to be sent. + @param[in] Length Length of the message in bytes. + @param[in] HostAddress The address of the host processor. + @param[in] MeAddress Address of the ME subsystem the message is being sent to. + + @retval EFI_SUCCESS One message packet sent. + @retval EFI_DEVICE_ERROR Failed to initialize HECI + @retval EFI_TIMEOUT HECI is not ready for communication + @exception EFI_UNSUPPORTED Current ME mode doesn't support send message through HEC +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_SEND_MESSAGE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN UINT32 *Message, + IN UINT32 HeciMemBar, + IN UINT32 Length, + IN UINT8 HostAddress, + IN UINT8 MEAddress + ); + +/** + Determines if the HECI device is present and, if present, initializes it for + use by the BIOS. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] This The address of HECI PPI + @param[in][out] HeciMemBar HECI Memory BAR + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_DEVICE_ERROR No HECI device + @retval EFI_TIMEOUT HECI does not return the buffer before timeout + @exception EFI_UNSUPPORTED HECI MSG is unsupported +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_INITIALIZE_HECI) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_HECI_PPI *This, + IN OUT UINT32 *HeciMemBar + ); + +/** + Get an abstract Intel ME Status from Firmware Status Register. + This is used to control BIOS flow for different Intel ME + functions. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[in] MeStatus Pointer for status report, + see MeState.h - Abstract ME status definitions. + + @retval EFI_SUCCESS MeStatus copied + @retval EFI_INVALID_PARAMETER Pointer of MeStatus is invalid +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_GET_ME_STATUS) ( + IN EFI_PEI_SERVICES **PeiServices, + IN UINT32 *Status + ); + +/** + Get an abstract ME operation mode from firmware status + register. This is used to control BIOS flow for different + Intel ME functions. + + @param[in] PeiServices General purpose services available to every PEIM. + @param[out] MeMode Pointer for ME Mode report, + see MeState.h - Abstract ME Mode definitions. + + @retval EFI_SUCCESS MeMode copied + @retval EFI_INVALID_PARAMETER Pointer of MeMode is invalid +**/ +typedef +EFI_STATUS +(EFIAPI *PEI_HECI_GET_ME_MODE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN UINT32 *MeMode + ); + +/// +/// HECI PPI +/// The interface functions are for sending/receiving HECI messages between host and Intel ME subsystem +/// in PEI phase +/// +struct _PEI_HECI_PPI { + PEI_HECI_SENDWACK SendwAck; ///< Send HECI message and wait for respond + PEI_HECI_READ_MESSAGE ReadMsg; ///< Read message from HECI + PEI_HECI_SEND_MESSAGE SendMsg; ///< Send message to HECI + PEI_INITIALIZE_HECI InitializeHeci; ///< Init HECI + PEI_HECI_GET_ME_STATUS GetMeStatus; ///< Get Intel ME Status register + PEI_HECI_GET_ME_MODE GetMeMode; ///< Get Intel ME mode +}; + +#endif |