init. 1AQQW051HEADmaster

40 files changed, 7709 insertions, 0 deletions

diff --git a/ReferenceCode/ME/SampleCode/AsfSupport/AsfSupport.c b/ReferenceCode/ME/SampleCode/AsfSupport/AsfSupport.c
new file mode 100644
index 0000000..c5324aa
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/AsfSupport/AsfSupport.c
@@ -0,0 +1,1517 @@
+/** @file
+  Support routines for ASF boot options in the BDS
+
+@copyright
+  Copyright (c) 2005-2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+
+**/
+
+#include "AsfSupport.h"
+
+#pragma pack(push,1)
+
+typedef struct {
+  UINT32 Attributes;
+  UINT16 FilePathListLength;
+} EFI_LOAD_OPTION;
+
+#pragma pack(pop)
+
+//
+// Global variables
+//
+EFI_ASF_BOOT_OPTIONS  *mAsfBootOptions;
+EFI_GUID              gAsfRestoreBootSettingsGuid = RESTORE_SECURE_BOOT_GUID;
+
+/**
+  Retrieve the ASF boot options previously recorded by the ASF driver.
+
+  @param[in] None.
+
+  @retval EFI_SUCCESS        Initialized Boot Options global variable and AMT protocol
+**/
+EFI_STATUS
+BdsAsfInitialization (
+  IN  VOID
+  )
+{
+  EFI_STATUS                          Status;
+  EFI_ALERT_STANDARD_FORMAT_PROTOCOL  *Asf;
+
+  mAsfBootOptions = NULL;
+
+  //
+  // Amt Library Init
+  //
+  Status = AmtLibInit ();
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "Info : Error init AmtLibInit -> %r\n", Status));
+    return Status;
+  }
+  //
+  // Get Protocol for ASF
+  //
+  Status = gBS->LocateProtocol (
+                  &gEfiAlertStandardFormatProtocolGuid,
+                  NULL,
+                  &Asf
+                  );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "Info : Error getting ASF protocol -> %r\n", Status));
+    return Status;
+  }
+
+  Status = Asf->GetBootOptions (Asf, &mAsfBootOptions);
+  if (EFI_ERROR(Status)) {
+    DEBUG ((EFI_D_ERROR, "Info : Error getting ASF BootOptions -> %r\n", Status));
+    return Status;
+  }
+
+  Status = ManageSecureBootState();
+
+  return Status;
+}
+
+/**
+  Get current Secure Boot state (enabled/disabled)
+
+  @param[in] None.
+
+  @retval UINT8         Secure Boot State
+**/
+UINT8
+GetSecureBootState(
+  IN VOID
+  )
+{
+  //
+  // This function is BIOS implementation specific
+  // and should be implemented in platform code
+  //
+
+  return SECURE_BOOT_DISABLED;
+}
+
+/**
+  Set current Secure Boot state (enabled/disabled)
+
+  @param[in] SecureBootState         Secure Boot State
+
+  @retval EFI_SUCCESS        Secure Boot State successfully changed
+**/
+EFI_STATUS
+SetSecureBootState(
+  IN UINT8 SecureBootState
+  )
+{
+  //
+  // This function is BIOS implementation specific
+  // and should be implemented in platform code
+  //
+
+  return EFI_SUCCESS;
+}
+
+/**
+  This routine makes necessary Secure Boot & CSM state changes for IDEr boot
+
+  @param[in] None.
+
+  @retval EFI_SUCCESS      Changes applied succesfully
+**/
+EFI_STATUS
+ManageSecureBootState(
+  IN VOID
+  )
+{
+  EFI_STATUS Status;
+  BOOLEAN    EnforceSecureBoot;
+  UINT8      SecureBootState;
+  UINT8      RestoreBootSettings;
+  UINT8      IderBoot;
+  UINTN      VarSize;
+
+  VarSize           = sizeof(UINT8);
+
+  //
+  // Get boot parameters (IDER boot?, EnforceSecureBoot flag set?, secure boot enabled?)
+  //
+  EnforceSecureBoot = ActiveManagementEnforceSecureBoot();
+  IderBoot          = ActiveManagementEnableIdeR();
+  SecureBootState   = GetSecureBootState();
+
+  //
+  // Check whether we need to restore SecureBootEnable value changed in previous IDER boot
+  //
+  Status = gRT->GetVariable(
+                 L"RestoreBootSettings",
+                 &gAsfRestoreBootSettingsGuid,
+                 NULL,
+                 &VarSize,
+                 &RestoreBootSettings
+                 );
+
+  if (Status == EFI_SUCCESS && RestoreBootSettings != RESTORE_SECURE_BOOT_NONE) {
+    if (RestoreBootSettings == RESTORE_SECURE_BOOT_ENABLED && SecureBootState == SECURE_BOOT_DISABLED &&
+      !(IderBoot && !EnforceSecureBoot)) {
+      
+      SecureBootState = SECURE_BOOT_ENABLED; 
+
+      Status = SetSecureBootState(SecureBootState);
+      ASSERT_EFI_ERROR (Status);
+
+      //
+      // Delete RestoreBootSettings variable
+      //
+      Status = gRT->SetVariable(
+                      L"RestoreBootSettings",
+                      &gAsfRestoreBootSettingsGuid,
+                      0,
+                      0,
+                      NULL
+                      );
+      ASSERT_EFI_ERROR (Status);
+
+      DEBUG ((EFI_D_INFO, "Secure Boot settings restored after IDER boot - Cold Reset!\n"));
+      gRT->ResetSystem(EfiResetCold, EFI_SUCCESS, 0, NULL);
+      EFI_DEADLOOP();
+    }     
+  }
+
+  Status = EFI_SUCCESS;
+
+  if (IderBoot) {
+    if (SecureBootState == SECURE_BOOT_ENABLED && !EnforceSecureBoot) {
+      //
+      // Secure boot needs to be disabled if we're doing IDER and EnforceSecureBoot not set
+      //
+      SecureBootState     = SECURE_BOOT_DISABLED;
+      RestoreBootSettings = RESTORE_SECURE_BOOT_ENABLED;      
+
+      Status = SetSecureBootState(SecureBootState);
+      ASSERT_EFI_ERROR (Status);
+
+      //
+      // Set variable to restore previous secure boot state
+      //
+      Status = gRT->SetVariable(
+                      L"RestoreBootSettings",
+                      &gAsfRestoreBootSettingsGuid,
+                      EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+                      sizeof(UINT8),
+                      &RestoreBootSettings
+                      );
+      ASSERT_EFI_ERROR (Status);
+
+      DEBUG ((EFI_D_INFO, "Secure Boot disabled for IDER boot - Cold Reset!\n"));
+      gRT->ResetSystem(EfiResetCold, EFI_SUCCESS, 0, NULL);
+      EFI_DEADLOOP();           
+    }
+  } 
+
+  return Status;
+}
+
+/**
+  This function will create a BootOption from the give device path and
+  description string.
+
+  @param[in]  DevicePath     The device path which the option represent
+  @param[in]  Description     The description of the boot option
+
+  @retval BDS_COMMON_OPTION - Pointer to created boot option
+**/
+BDS_COMMON_OPTION *
+BdsCreateBootOption (
+  IN  EFI_DEVICE_PATH_PROTOCOL       *DevicePath,
+  IN  CHAR16                         *Description
+  )
+{
+  BDS_COMMON_OPTION *Option;
+
+  Option = AllocateZeroPool (sizeof (BDS_COMMON_OPTION));
+  if (Option == NULL) {
+    return NULL;
+  }
+
+  Option->Signature   = BDS_LOAD_OPTION_SIGNATURE;
+  Option->DevicePath  = AllocateZeroPool (GetDevicePathSize (DevicePath));
+  CopyMem (Option->DevicePath, DevicePath, GetDevicePathSize (DevicePath));
+
+  Option->Attribute   = LOAD_OPTION_ACTIVE;
+  Option->Description = AllocateZeroPool (EfiStrSize (Description));
+  CopyMem (Option->Description, Description, EfiStrSize (Description));
+
+  return Option;
+}
+
+/**
+  This function will create a SHELL BootOption to boot.
+
+  @param[in]  None.
+
+  @retval EFI_DEVICE_PATH_PROTOCOL Shell Device path for booting.
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreateShellDevicePath (
+  VOID
+  )
+{
+  UINTN                             FvHandleCount;
+  EFI_HANDLE                        *FvHandleBuffer;
+  UINTN                             Index;
+  EFI_STATUS                        Status;
+  EFI_FIRMWARE_VOLUME_PROTOCOL      *Fv;
+  EFI_FV_FILETYPE                   Type;
+  UINTN                             Size;
+  EFI_FV_FILE_ATTRIBUTES            Attributes;
+  UINT32                            AuthenticationStatus;
+  EFI_DEVICE_PATH_PROTOCOL          *DevicePath;
+  MEDIA_FW_VOL_FILEPATH_DEVICE_PATH ShellNode;
+
+  DevicePath  = NULL;
+  Status      = EFI_SUCCESS;
+
+  gBS->LocateHandleBuffer (
+        ByProtocol,
+        &gEfiFirmwareVolumeProtocolGuid,
+        NULL,
+        &FvHandleCount,
+        &FvHandleBuffer
+        );
+
+  for (Index = 0; Index < FvHandleCount; Index++) {
+    gBS->HandleProtocol (
+          FvHandleBuffer[Index],
+          &gEfiFirmwareVolumeProtocolGuid,
+          (VOID **) &Fv
+          );
+
+    Status = Fv->ReadFile (
+                  Fv,
+                  &gEfiShellFileGuid,
+                  NULL,
+                  &Size,
+                  &Type,
+                  &Attributes,
+                  &AuthenticationStatus
+                  );
+    if (EFI_ERROR (Status)) {
+      //
+      // Skip if no shell file in the FV
+      //
+      continue;
+    } else {
+      //
+      // Found the shell
+      //
+      break;
+    }
+  }
+
+  if (EFI_ERROR (Status)) {
+    //
+    // No shell present
+    //
+    if (FvHandleCount) {
+      FreePool (FvHandleBuffer);
+    }
+    return NULL;
+  }
+  //
+  // Build the shell boot option
+  //
+  DevicePath = DevicePathFromHandle (FvHandleBuffer[Index]);
+
+  //
+  // Build the shell device path
+  //
+  ShellNode.Header.Type     = MEDIA_DEVICE_PATH;
+  ShellNode.Header.SubType  = MEDIA_FV_FILEPATH_DP;
+  SetDevicePathNodeLength (&ShellNode.Header, sizeof (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH));
+  CopyMem (&ShellNode.NameGuid, &gEfiShellFileGuid, sizeof (EFI_GUID));
+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *) &ShellNode);
+
+  if (FvHandleCount) {
+    FreePool (FvHandleBuffer);
+  }
+
+  return DevicePath;
+}
+
+/**
+  This function will create a PXE BootOption to boot.
+
+  @param[in] DeviceIndex      PXE handle index
+
+  @retval EFI_DEVICE_PATH_PROTOCOL     PXE Device path for booting.
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreatePxeDevicePath (
+  IN UINT16     DeviceIndex
+  )
+{
+  UINTN                     Index;
+  EFI_STATUS                Status;
+  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;
+  UINTN                     NumberLoadFileHandles;
+  EFI_HANDLE                *LoadFileHandles;
+  VOID                      *ProtocolInstance;
+
+  DevicePath  = NULL;
+  Status      = EFI_SUCCESS;
+
+  //
+  // We want everything connected up for PXE
+  //
+  BdsLibConnectAllDriversToAllControllers ();
+
+  //
+  // Parse Network Boot Device
+  //
+  gBS->LocateHandleBuffer (
+        ByProtocol,
+        &gEfiSimpleNetworkProtocolGuid,
+        NULL,
+        &NumberLoadFileHandles,
+        &LoadFileHandles
+        );
+  for (Index = 0; Index < NumberLoadFileHandles; Index++) {
+    Status = gBS->HandleProtocol (
+                    LoadFileHandles[Index],
+                    &gEfiLoadFileProtocolGuid,
+                    (VOID **) &ProtocolInstance
+                    );
+    if (EFI_ERROR (Status)) {
+      //
+      // try next handle
+      //
+      continue;
+    } else {
+      if (Index == DeviceIndex) {
+        //
+        // Found a PXE handle
+        //
+        break;
+      } else {
+        Status = EFI_UNSUPPORTED;
+      }
+    }
+  }
+
+  if (EFI_ERROR (Status)) {
+    //
+    // No PXE present
+    //
+    if (NumberLoadFileHandles) {
+      FreePool (LoadFileHandles);
+    }
+    return NULL;
+  }
+  //
+  // Build the PXE device path
+  //
+  DevicePath = DevicePathFromHandle (LoadFileHandles[Index]);
+
+  if (NumberLoadFileHandles) {
+    FreePool (LoadFileHandles);
+  }
+
+  return DevicePath;
+}
+
+BOOLEAN 
+ComparePathNode(
+  IN EFI_DEVICE_PATH_PROTOCOL *PathNode1,
+  IN EFI_DEVICE_PATH_PROTOCOL *PathNode2
+)
+{
+  BOOLEAN st = FALSE;
+  UINTN Size1, Size2;
+  UINT8 *p1, *p2;
+
+  if ((PathNode1 == NULL) || (PathNode2 == NULL)) {
+    return FALSE;
+  }
+
+  if (PathNode1 == PathNode2) {
+    st = TRUE;
+  } else {
+    Size1 = DevicePathNodeLength(PathNode1);
+    Size2 = DevicePathNodeLength(PathNode2);
+    p1 = (UINT8 *)PathNode1;
+    p2 = (UINT8 *)PathNode2;
+    if ((Size1 == Size2)
+        && (DevicePathType(PathNode1) == DevicePathType(PathNode2))
+        && (CompareMem(p1+1, p2+1, Size1-1) == 0)) {
+      st = TRUE;
+    }
+  }
+
+  return st;
+}
+
+/**
+  Compare two device paths node by node up to MEDIA_DEVICE_PATH node
+
+  @param[in] BootOptionDP     Device path acquired from BootXXXX EFI variable
+  @param[in] FileSysDP    Device path acquired through EFI_SIMPLE_FILE_SYSTEM_PROTOCOL Handles buffer
+
+  @retval TRUE   Both device paths point to the same device
+  @retval FALSE   Device paths point to different devices
+**/
+BOOLEAN
+CompareDevicePaths(
+  IN  EFI_DEVICE_PATH_PROTOCOL *BootOptionDP,
+  IN  EFI_DEVICE_PATH_PROTOCOL *FileSysDP
+)
+{
+  EFI_DEVICE_PATH_PROTOCOL     *DevPathNodeA;
+  EFI_DEVICE_PATH_PROTOCOL     *DevPathNodeB;
+
+  if (BootOptionDP == NULL || FileSysDP == NULL) {
+    return FALSE;
+  }
+
+  DevPathNodeA = BdsLibUnpackDevicePath(BootOptionDP);
+  if (DevPathNodeA == NULL) {
+    return FALSE;
+  }
+
+  DevPathNodeB = BdsLibUnpackDevicePath(FileSysDP);
+  if (DevPathNodeB == NULL) {
+    return FALSE;
+  }
+
+  while (!IsDevicePathEnd(DevPathNodeB)) {
+    if (DevicePathType(DevPathNodeB) == MEDIA_DEVICE_PATH) {
+      //
+      // If we have reached MEDIA_DEVICE_PATH node and all previous
+      // nodes matched - we can be sure path points to the same device
+      //
+      return TRUE;
+    }
+
+    if (!ComparePathNode(DevPathNodeA, DevPathNodeB)) {
+      break;
+    }
+
+    DevPathNodeA = NextDevicePathNode(DevPathNodeA);
+    DevPathNodeB = NextDevicePathNode(DevPathNodeB);
+  }
+
+  return FALSE;
+}
+
+/**
+  Get EFI device path through EFI_SIMPLE_FILE_SYSTEM_PROTOCOL Handles buffer. Acquired path must
+  point to the same device as argument DevicePath passed to the function.
+
+  @param[in] DevicePath   Device path acquired from BootXXXX EFI variable
+
+  @retval EFI_DEVICE_PATH_PROTOCOL   Device path for booting
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+GetFullBootDevicePath(
+  IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+)
+{
+  EFI_STATUS               Status;
+  EFI_DEVICE_PATH_PROTOCOL *DPath;
+  EFI_DEVICE_PATH_PROTOCOL *DevPath;
+  UINTN                    HandleNum;
+  EFI_HANDLE               *HandleBuf;
+  UINTN                    Index;
+
+  DevPath = NULL;
+
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
+                  &gEfiSimpleFileSystemProtocolGuid,
+                  NULL,
+                  &HandleNum,
+                  &HandleBuf
+                  );
+  if ((EFI_ERROR (Status)) || (HandleBuf == NULL)) {
+    return NULL;
+  }
+
+  for (Index = 0; Index < HandleNum; Index++) {
+    Status = gBS->HandleProtocol (
+                    HandleBuf[Index],
+                    &gEfiDevicePathProtocolGuid,
+                    &DPath
+                    );
+
+    if (CompareDevicePaths(DevicePath, DPath)) {
+      DevPath = DuplicateDevicePath(DPath);
+      break;
+    }
+  }
+
+  return DevPath;
+}
+
+/*++
+  Translate ASF request type to BBS or EFI device path type
+
+  @param[in] DeviceType     - ASF request type
+  @param[in]  Efi           - Set to TRUE if DeviceType is to be translated
+                              to EFI device path type; FALSE if BBS type
+  @retval UINTN Translated device type
+--*/
+UINTN
+GetBootDeviceType (
+  IN UINTN    DeviceType, 
+  IN BOOLEAN  Efi
+  )
+{
+  UINTN Type = 0;
+  
+  switch (DeviceType) {
+    case FORCE_PXE:
+      if (Efi) { 
+        Type = MEDIA_FILEPATH_DP; 
+      } else { 
+        Type = BBS_EMBED_NETWORK; 
+      }
+      break;
+    case FORCE_HARDDRIVE:      
+    case FORCE_SAFEMODE:
+      if (Efi) { 
+        Type = MEDIA_HARDDRIVE_DP; 
+      } else { 
+        Type = BBS_TYPE_HARDDRIVE; 
+      }
+      break;
+    case FORCE_DIAGNOSTICS:
+      if (Efi) { 
+        Type = MEDIA_FILEPATH_DP; 
+      }
+      break;
+    case FORCE_CDDVD:
+      if (Efi) { 
+        Type = MEDIA_CDROM_DP; 
+      } else { 
+        Type = BBS_TYPE_CDROM; 
+      }
+      break;
+    default:
+      break;
+  }
+
+  return Type;
+}
+
+/**
+  Update the BBS table with our required boot device
+
+  @param[in] DeviceIndex   Boot device whose device index
+  @param[in] DevType     Boot device whose device type
+  @param[in] BbsCount    Number of BBS_TABLE structures
+  @param[in] BbsTable    BBS entry
+  @param[in] IderBoot    set to TRUE if this is IDER boot
+
+  @retval EFI_SUCCESS   BBS table successfully updated
+**/
+EFI_STATUS
+RefreshBbsTableForBoot (
+  IN     UINT16        DeviceIndex,
+  IN     UINT16        DevType,
+  IN     BOOLEAN       IderBoot
+  )
+{
+  EFI_STATUS                Status;
+  UINTN                     Index;
+  UINT16                    TempIndex;
+  BOOLEAN                   IderBootDevice;
+  BOOLEAN                   RegularBootDevice;
+  HDD_INFO                  *LocalHddInfo;
+  EFI_LEGACY_BIOS_PROTOCOL  *LegacyBios;
+  BBS_TABLE                 *BbsTable;
+  UINT16                    HddCount;
+  UINT16                    BbsCount;
+  
+  TempIndex       = (IderBoot) ? 0 : ((DeviceIndex <= 1) ? DeviceIndex : 1);
+
+  //
+  // Make sure the Legacy Boot Protocol is available
+  //
+  Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+  if (LegacyBios == NULL) {
+    return EFI_ABORTED;
+  }
+
+  //
+  // Get BBS table instance
+  //
+  Status = LegacyBios->GetBbsInfo (
+                        LegacyBios,
+                        &HddCount,
+                        &LocalHddInfo,
+                        &BbsCount,
+                        &BbsTable
+                        );
+  if (EFI_ERROR (Status)) {
+    return EFI_ABORTED;
+  }
+
+  Status = EFI_NOT_FOUND;
+  
+  //
+  // For debug
+  //
+  PrintBbsTable (BbsTable);
+
+  //
+  // Find the first present boot device whose device type
+  // matches the DevType, we use it to boot first. This is different
+  // from the other Bbs table refresh since we are looking for the device type
+  // index instead of the first device to match the device type.
+  //
+  // And set other present boot devices' priority to BBS_UNPRIORITIZED_ENTRY
+  // their priority will be set by LegacyBiosPlatform protocol by default
+  //
+  for (Index = 0; Index < BbsCount; Index++) {
+    if (BbsTable[Index].BootPriority == BBS_IGNORE_ENTRY) {
+      continue;
+    }
+
+    BbsTable[Index].BootPriority = BBS_DO_NOT_BOOT_FROM;
+    IderBootDevice = IderBoot && IS_IDER(BbsTable[Index].Bus, BbsTable[Index].Device, BbsTable[Index].Function) &&
+      BbsTable[Index].DeviceType == DevType;
+    RegularBootDevice = !IderBoot && (BbsTable[Index].DeviceType == DevType ||
+      (DevType == BBS_EMBED_NETWORK && IS_PXE(BbsTable[Index].DeviceType, BbsTable[Index].Class)) ||
+      (DevType == BBS_TYPE_CDROM && IS_CDROM(BbsTable[Index].DeviceType, BbsTable[Index].Class)));
+
+    if ((IderBootDevice || RegularBootDevice) && Status != EFI_SUCCESS) {
+      if (IderBoot || (TempIndex++ == DeviceIndex)) {
+        BbsTable[Index].BootPriority  = 0;
+        Status                        = EFI_SUCCESS;
+        continue;
+      }
+    }
+  }
+
+  //
+  // For debug
+  //
+  PrintBbsTable (BbsTable);
+
+  return Status;
+}
+
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreateBootDevicePath (
+  IN UINT16     DeviceType,
+  IN UINT16     DeviceIndex,
+  IN BOOLEAN    IdeRBoot,
+  IN BOOLEAN    EfiBoot
+  )
+{
+  EFI_DEVICE_PATH_PROTOCOL     *DevicePath;
+  EFI_DEVICE_PATH_PROTOCOL     *TempDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL     *FullDevicePath;
+  UINTN                        OptionOrderSize;
+  UINT16                       *OptionOrder;
+  EFI_LOAD_OPTION              *Option;
+  CHAR16                       OptionName[sizeof ("Driver####")];
+  UINT16                       OptionNumber;
+  UINTN                        OptionIndex;
+  UINTN                        OptionCount;
+  UINTN                        Index;
+  UINTN                        OptionSize;
+  UINTN                        TempIndex;
+  EFI_DEVICE_PATH_PROTOCOL     *DevPathNode;
+  EFI_DEVICE_PATH_PROTOCOL     *DevPathNodeBackup;
+  ATAPI_DEVICE_PATH            *AtaPath;
+  BOOLEAN                      AtaDeviceMatch;
+  PCI_DEVICE_PATH              *PciPath;
+  BOOLEAN                      PciDeviceMatch;
+  UINT8                        PrimarySecondary;
+  UINT8                        SlaveMaster;
+  UINTN                        EfiDeviceType;
+  UINTN                        LegacyDeviceType;
+  BOOLEAN                      TypeMatched;
+
+  PrimarySecondary = ((mAsfBootOptions->SpecialCommandParam >> IDER_BOOT_DEVICE_SHIFT) & IDER_PRIMARY_SECONDARY_MASK)
+                        >> IDER_PRIMARY_SECONDARY_SHIFT;
+  SlaveMaster      = (mAsfBootOptions->SpecialCommandParam >> IDER_BOOT_DEVICE_SHIFT) & IDER_MASTER_SLAVE_MASK;
+  DevicePath       = NULL;
+  FullDevicePath   = NULL;
+  TempIndex        = 1;
+  AtaDeviceMatch   = FALSE;
+  PciDeviceMatch   = FALSE;
+  EfiDeviceType    = GetBootDeviceType(DeviceType, TRUE);
+  LegacyDeviceType = GetBootDeviceType(DeviceType, FALSE);
+  TypeMatched      = FALSE;
+
+  if (IdeRBoot && !EfiBoot) {
+    LegacyDeviceType = (SlaveMaster == 1) ? BBS_CDROM : BBS_HARDDISK;
+  }
+  
+  //
+  // Read the BootOrder variable.
+  //
+  OptionOrder = BdsLibGetVariableAndSize (L"BootOrder", &gEfiGlobalVariableGuid, &OptionOrderSize);
+  if (OptionOrder == NULL) {
+    return NULL;
+  }
+
+  OptionCount = OptionOrderSize/sizeof(UINT16);
+  OptionIndex = 0;
+
+  for (Index = 0; Index < OptionCount; Index++) {
+
+    OptionNumber = OptionOrder[Index];
+    UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", OptionNumber);
+    Option = BdsLibGetVariableAndSize (OptionName, &gEfiGlobalVariableGuid, &OptionSize);
+    if (Option == NULL) {
+      continue;
+    }
+
+    //
+    // Extract device path from the boot order entry
+    //
+    TempDevicePath = (EFI_DEVICE_PATH_PROTOCOL*)
+        (   //skip the header
+          (UINT8*)(Option+1)
+          //skip the string
+          +(EfiStrLen((CHAR16*)(Option+1))+1)*sizeof(CHAR16)
+            );
+
+    if (DevicePathType(TempDevicePath) == BBS_DEVICE_PATH && DevicePathSubType(TempDevicePath) == BBS_BBS_DP) {
+      FullDevicePath = DuplicateDevicePath(TempDevicePath);
+    } else {
+      //
+      // If this is EFI boot option, we need to get full device path from EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
+      // to determine type of device and provide LoadImage with proper path to bootloader image later on
+      //
+      FullDevicePath = GetFullBootDevicePath(TempDevicePath);
+      if (FullDevicePath == NULL) {
+        continue;
+      }
+    }
+
+    TempDevicePath = FullDevicePath;
+    DevPathNode = BdsLibUnpackDevicePath(TempDevicePath);    
+    if (DevPathNode == NULL) {
+      continue;
+    }
+
+    DevPathNodeBackup = DevPathNode;
+
+    //
+    // Check if this is our requested boot device
+    //
+    while (!IsDevicePathEnd(DevPathNode)) {
+      if (IdeRBoot && EfiBoot) {
+        //
+        // IDER EFI boot, check for PCI/ATA device match
+        //
+        if ((DevicePathType(DevPathNode) == HARDWARE_DEVICE_PATH) &&
+          (DevicePathSubType(DevPathNode) == HW_PCI_DP)) {
+           PciPath = (PCI_DEVICE_PATH*) DevPathNode;
+
+           if ((PciPath->Device == IDER_DEVICE_NUMBER)
+             && (PciPath->Function == IDER_FUNCTION_NUMBER)) {
+             PciDeviceMatch = TRUE;
+           }
+        } else if ((DevicePathType(DevPathNode) == MESSAGING_DEVICE_PATH) &&
+          (DevicePathSubType(DevPathNode) == MSG_ATAPI_DP)) {
+           AtaPath = (ATAPI_DEVICE_PATH*) DevPathNode;
+
+           if ((AtaPath->PrimarySecondary == PrimarySecondary)
+            && (AtaPath->SlaveMaster == SlaveMaster)) {
+             AtaDeviceMatch = TRUE;
+           }
+        }
+
+        if (PciDeviceMatch && AtaDeviceMatch) {
+          TypeMatched = TRUE;
+        } 
+      } else {
+        if (DevicePathType(DevPathNode) == BBS_DEVICE_PATH && DevicePathSubType(DevPathNode) == BBS_BBS_DP) {
+          //
+          // Legacy boot option
+          //
+          if (((BBS_BBS_DEVICE_PATH *)DevPathNode)->DeviceType == LegacyDeviceType) {
+            TypeMatched = TRUE;
+          }
+        } else {
+          //
+          // EFI boot option
+          //
+          if (DevicePathType(DevPathNode) == MEDIA_DEVICE_PATH && DevicePathSubType(DevPathNode) == EfiDeviceType) {
+            TypeMatched = TRUE;
+          }
+        }
+      }
+
+      if (TypeMatched) {
+        //
+        // Type matched, check for device index
+        //
+        if (!IdeRBoot && TempIndex < DeviceIndex) {
+          TempIndex++;
+          TypeMatched = FALSE;
+          break;
+        }
+
+        DevicePath = DuplicateDevicePath(TempDevicePath);
+        //
+        // Refresh BBS table if legacy option
+        //
+        if (DevicePathType(DevicePath) == BBS_DEVICE_PATH && DevicePathSubType(DevicePath) == BBS_BBS_DP) {
+          RefreshBbsTableForBoot(DeviceIndex, (UINT16)LegacyDeviceType, IdeRBoot);
+        }
+        break;
+      }
+
+      DevPathNode = NextDevicePathNode(DevPathNode);
+    }
+
+    if (FullDevicePath != NULL) {
+      FreePool(FullDevicePath);
+      FullDevicePath = NULL;
+    }
+
+    FreePool(DevPathNodeBackup);
+    FreePool(Option);
+
+    if (DevicePath != NULL) {
+      //
+      // Set Boot Current and leave
+      //
+      gRT->SetVariable (
+          L"BootCurrent",
+          &gEfiGlobalVariableGuid,
+          EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+          sizeof (UINT16),
+          &OptionNumber
+          );
+      break;
+    }
+  }
+
+  FreePool(OptionOrder);
+  
+  return DevicePath;
+}
+
+/**
+  Boot the legacy system with the boot option
+
+  @param[in] Option           The legacy boot option which have BBS device path
+
+  @retval EFI_UNSUPPORTED  - There is no legacybios protocol, do not support legacy boot.
+  @retval EFI_STATUS       - Return the status of LegacyBios->LegacyBoot ().
+**/
+EFI_STATUS
+AsfDoLegacyBoot (
+  IN  BDS_COMMON_OPTION           *Option
+  )
+{
+  EFI_STATUS                Status;
+  EFI_LEGACY_BIOS_PROTOCOL  *LegacyBios;
+
+  Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+  if (EFI_ERROR (Status)) {
+    //
+    // If no LegacyBios protocol we do not support legacy boot
+    //
+    return EFI_UNSUPPORTED;
+  }
+  //
+  // Write boot to OS performance data to a file
+  //
+  WRITE_BOOT_TO_OS_PERFORMANCE_DATA;
+
+  DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Legacy Boot: %S\n", Option->Description));
+  return LegacyBios->LegacyBoot (
+                      LegacyBios,
+                      (BBS_BBS_DEVICE_PATH *) Option->DevicePath,
+                      Option->LoadOptionsSize,
+                      Option->LoadOptions
+                      );
+}
+
+/**
+  Process the boot option follow the EFI 1.1 specification and
+  special treat the legacy boot option with BBS_DEVICE_PATH.
+
+  @param[in] Option         The boot option need to be processed
+  @param[in] DevicePath       The device path which describe where to load
+                 the boot image or the legcy BBS device path
+                 to boot the legacy OS
+  @param[in] ExitDataSize      Returned directly from gBS->StartImage ()
+  @param[in] ExitData       Returned directly from gBS->StartImage ()
+
+  @retval EFI_SUCCESS   - Status from gBS->StartImage (),
+                  or BdsBootByDiskSignatureAndPartition ()
+  @retval EFI_NOT_FOUND - If the Device Path is not found in the system
+**/
+EFI_STATUS
+AsfBootViaBootOption (
+  IN  BDS_COMMON_OPTION             * Option,
+  IN  EFI_DEVICE_PATH_PROTOCOL      * DevicePath,
+  OUT UINTN                         *ExitDataSize,
+  OUT CHAR16                        **ExitData OPTIONAL
+  )
+{
+  EFI_STATUS                Status;
+  EFI_HANDLE                Handle;
+  EFI_HANDLE                ImageHandle;
+  EFI_DEVICE_PATH_PROTOCOL  *TempDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL  *FilePath;
+  EFI_LOADED_IMAGE_PROTOCOL *ImageInfo;
+  EFI_EVENT                 ReadyToBootEvent;
+  EFI_ACPI_S3_SAVE_PROTOCOL *AcpiS3Save;
+  UINTN                     DataSize;
+  EFI_INPUT_KEY             Key;
+  UINTN                     EventIndex;
+#ifdef EFI_DEBUG
+  UINT8                     SecureBootState;
+#endif
+
+  *ExitDataSize = 0;
+  *ExitData     = NULL;
+  DataSize      = sizeof(UINT16);
+
+  //
+  // Notes: put EFI64 ROM Shadow Solution
+  //
+  EFI64_SHADOW_ALL_LEGACY_ROM ();
+
+  //
+  // Notes: this code can be remove after the s3 script table
+  // hook on the event EFI_EVENT_SIGNAL_READY_TO_BOOT or
+  // EFI_EVENT_SIGNAL_LEGACY_BOOT
+  //
+  Status = gBS->LocateProtocol (&gEfiAcpiS3SaveGuid, NULL, &AcpiS3Save);
+  if (!EFI_ERROR (Status)) {
+    AcpiS3Save->S3Save (AcpiS3Save, NULL);
+  }
+  //
+  // If it's Device Path that starts with a hard drive path,
+  // this routine will do the booting.
+  //
+  Status = BdsBootByDiskSignatureAndPartition (
+            Option,
+            (HARDDRIVE_DEVICE_PATH *) DevicePath,
+            Option->LoadOptionsSize,
+            Option->LoadOptions,
+            ExitDataSize,
+            ExitData
+            );
+  if (!EFI_ERROR (Status)) {
+    //
+    // If we found a disk signature and partition device path return success
+    //
+    return EFI_SUCCESS;
+  }
+
+  //
+  // Set Option's BootCurrent field
+  //
+  gRT->GetVariable (
+      L"BootCurrent",
+      &gEfiGlobalVariableGuid,
+      0,
+      &DataSize,
+      &Option->BootCurrent
+      );
+
+  DEBUG ((EFI_D_INFO, "AsfBootViaBootOption: BootCurrent = %d, DevicePath = %s\n", Option->BootCurrent, DevicePathToStr(DevicePath)));
+
+  //
+  // Signal the EFI_EVENT_SIGNAL_READY_TO_BOOT event
+  //
+  Status = EfiCreateEventReadyToBoot (&ReadyToBootEvent);
+  if (!EFI_ERROR (Status)) {
+    gBS->SignalEvent (ReadyToBootEvent);
+    gBS->CloseEvent (ReadyToBootEvent);
+  }
+
+  if ((DevicePathType (Option->DevicePath) == BBS_DEVICE_PATH) &&
+      (DevicePathSubType (Option->DevicePath) == BBS_BBS_DP)
+      ) {
+    //
+    // Check to see if we should legacy BOOT. If yes then do the legacy boot
+    //
+    return AsfDoLegacyBoot (Option);
+  }
+
+  DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Booting EFI 1.1 way %S\n", Option->Description));
+
+  //
+  // If this is RCO/IDER EFI Boot, don't allow returning to regular boot
+  // and booting other devices
+  //
+  while (1) {
+    Status = gBS->LoadImage (
+                    TRUE,
+                    mBdsImageHandle,
+                    DevicePath,
+                    NULL,
+                    0,
+                    &ImageHandle
+                    );
+
+    //
+    // If we didn't find an image, we may need to load the default
+    // boot behavior for the device.
+    //
+    if (EFI_ERROR (Status)) {
+      //
+      // Find a Simple File System protocol on the device path. If the remaining
+      // device path is set to end then no Files are being specified, so try
+      // the removable media file name.
+      //
+      TempDevicePath = DevicePath;
+      Status = gBS->LocateDevicePath (
+                      &gEfiSimpleFileSystemProtocolGuid,
+                      &TempDevicePath,
+                      &Handle
+                      );
+      if (!EFI_ERROR (Status) && IsDevicePathEnd (TempDevicePath)) {
+        FilePath = FileDevicePath (Handle, DEFAULT_REMOVABLE_FILE_NAME);
+        if (FilePath) {
+          Status = gBS->LoadImage (
+                          TRUE,
+                          mBdsImageHandle,
+                          FilePath,
+                          NULL,
+                          0,
+                          &ImageHandle
+                          );
+        } else {
+          Status = EFI_NOT_FOUND;
+        }
+      } else {
+        Status = EFI_NOT_FOUND;
+      }
+    }
+
+    if (!EFI_ERROR (Status)) {
+      //
+      // Provide the image with it's load options
+      //
+      Status = gBS->HandleProtocol (ImageHandle, &gEfiLoadedImageProtocolGuid, &ImageInfo);
+      ASSERT_EFI_ERROR (Status);
+
+      if (Option->LoadOptionsSize != 0) {
+        ImageInfo->LoadOptionsSize  = Option->LoadOptionsSize;
+        ImageInfo->LoadOptions      = Option->LoadOptions;
+      }
+
+#ifdef EFI_DEBUG
+      //
+      // Get SecureBoot state
+      //
+      SecureBootState = GetSecureBootState();
+      DEBUG ((EFI_D_INFO | EFI_D_LOAD, "SecureBootEnable value prior to image execution %d\n", SecureBootState));
+#endif
+      //
+      // Before calling the image, enable the Watchdog Timer for
+      // the 5 Minute period
+      //
+      gBS->SetWatchdogTimer (5 * 60, 0x0000, 0x00, NULL);
+
+      Status = gBS->StartImage (ImageHandle, ExitDataSize, ExitData);
+      DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Image Return Status = %r\n", Status));
+
+      //
+      // Clear the Watchdog Timer after the image returns
+      //
+      gBS->SetWatchdogTimer (0x0000, 0x0000, 0x0000, NULL);
+    }
+
+    //
+    // Display message to user before attempting another RCO/IDER boot
+    //
+    gST->ConOut->ClearScreen (gST->ConOut);
+    gST->ConOut->OutputString (
+                  gST->ConOut,
+                  L"EFI RCO/IDER boot failed. Press ENTER to try again\r\n"
+                  );
+    Key.ScanCode    = 0;
+    Key.UnicodeChar = 0;
+    while (!(Key.ScanCode == 0 && Key.UnicodeChar == L'\r')) {
+      gBS->WaitForEvent (1, &(gST->ConIn->WaitForKey), &EventIndex);
+      gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+    }
+  }
+
+  //
+  // Clear Boot Current
+  //
+  gRT->SetVariable (
+        L"BootCurrent",
+        &gEfiGlobalVariableGuid,
+        EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+        0,
+        &Option->BootCurrent
+        );
+
+  return Status;
+}
+
+/**
+  Found out ASF boot options.
+
+  @param[in] EfiBoot      Set to TRUE if this is EFI boot
+
+  @retval EFI_DEVICE_PATH_PROTOCOL     Device path for booting.
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+BdsAsfBoot (
+  IN   BOOLEAN                         EfiBoot
+  )
+{
+  EFI_DEVICE_PATH_PROTOCOL        *DevicePath;
+
+  DevicePath = NULL;
+
+  //
+  // First we check ASF boot options Special Command
+  //
+  switch (mAsfBootOptions->SpecialCommand) {
+  //
+  // No additional special command is included; the Special Command Parameter has no
+  // meaning.
+  //
+  case NOP:
+    break;
+
+  //
+  // The Special Command Parameter can be used to specify a PXE
+  // parameter. When the parameter value is 0, the system default PXE device is booted. All
+  // other values for the PXE parameter are reserved for future definition by this specification.
+  //
+  case FORCE_PXE:
+    if (mAsfBootOptions->SpecialCommandParam != 0) {
+      //
+      // ASF spec says 0 currently only option
+      //
+      break;
+    }
+
+    if (EfiBoot == TRUE) {
+      DevicePath = BdsCreatePxeDevicePath (mAsfBootOptions->SpecialCommandParam);
+    } else {
+      DevicePath = BdsCreateBootDevicePath (FORCE_PXE, mAsfBootOptions->SpecialCommandParam, FALSE, EfiBoot);
+    }
+    break;
+
+  //
+  // The Special Command Parameter identifies the boot-media index for
+  // the managed client. When the parameter value is 0, the default hard-drive is booted, when the
+  // parameter value is 1, the primary hard-drive is booted; when the value is 2, the secondary
+  // hard-drive is booted and so on.
+  //
+  case FORCE_HARDDRIVE:
+  //
+  // The Special Command Parameter identifies the boot-media
+  // index for the managed client. When the parameter value is 0, the default hard-drive is
+  // booted, when the parameter value is 1, the primary hard-drive is booted; when the value is 2,
+  // the secondary hard-drive is booted and so on.
+  //
+  case FORCE_SAFEMODE:
+    DevicePath = BdsCreateBootDevicePath(FORCE_HARDDRIVE, mAsfBootOptions->SpecialCommandParam, FALSE, EfiBoot);    
+    break;
+
+  //
+  // The Special Command Parameter can be used to specify a
+  // diagnostic parameter. When the parameter value is 0, the default diagnostic media is booted.
+  // All other values for the diagnostic parameter are reserved for future definition by this
+  // specification.
+  //
+  case FORCE_DIAGNOSTICS:
+    if (mAsfBootOptions->SpecialCommandParam != 0) {
+      //
+      // ASF spec says 0 currently only option
+      //
+      break;
+    }
+
+    DevicePath = BdsCreateShellDevicePath ();
+
+    //
+    // We want everything connected up for shell
+    //
+    BdsLibConnectAllDriversToAllControllers ();
+    break;
+
+  //
+  // The Special Command Parameter identifies the boot-media index for
+  // the managed client. When the parameter value is 0, the default CD/DVD is booted, when the
+  // parameter value is 1, the primary CD/DVD is booted; when the value is 2, the secondary
+  // CD/DVD is booted and so on.
+  //
+  case FORCE_CDDVD:
+    DevicePath = BdsCreateBootDevicePath (FORCE_CDDVD, mAsfBootOptions->SpecialCommandParam, FALSE, EfiBoot);
+    break;
+
+  default:
+    break;;
+  }
+
+  return DevicePath;
+}
+
+/**
+  Check IdeR boot device and Asf boot device
+
+  @param[in] EfiBoot      Set to TRUE if this is EFI boot
+
+  @retval EFI_DEVICE_PATH_PROTOCOL     Device path for booting.
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+BdsForcedBoot (
+  IN   BOOLEAN                         EfiBoot
+  )
+{
+  EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+  DevicePath = NULL;
+
+  //
+  // OEM command values; the interpretation of the Special Command and associated Special
+  // Command Parameters is defined by the entity associated with the Enterprise ID.
+  //
+  if (ActiveManagementEnableIdeR ()) {
+    //
+    // Check if any media exist in Ider device
+    //
+    if (BdsCheckIderMedia ()) {
+      DevicePath = BdsCreateBootDevicePath (
+                      FORCE_CDDVD,
+                      0,
+                      TRUE,
+                      EfiBoot
+                      );
+    }
+  } else if (mAsfBootOptions->IanaId != ASF_INDUSTRY_CONVERTED_IANA) {
+    DevicePath = BdsAsfBoot (EfiBoot);
+  }
+
+  return DevicePath;
+}
+
+/**
+  Process ASF boot options and if available, attempt the boot
+
+  @param[in] None.
+
+  @retval EFI_SUCCESS    The command completed successfully
+**/
+EFI_STATUS
+BdsBootViaAsf (
+  IN  VOID
+  )
+{
+  EFI_STATUS                Status;
+  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;
+  BDS_COMMON_OPTION         *BootOption;
+  UINTN                     ExitDataSize;
+  CHAR16                    *ExitData;
+  BOOLEAN                   EfiBoot;
+  EFI_LEGACY_BIOS_PROTOCOL  *LegacyBios;
+
+  Status      = EFI_SUCCESS;
+  DevicePath  = NULL;
+  EfiBoot     = FALSE;
+
+  //
+  // Check if this is legacy or efi boot
+  //
+  Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &LegacyBios);
+  if (LegacyBios == NULL) {
+    EfiBoot = TRUE;
+  }
+
+  //
+  // Check if ASF Boot Options is present.
+  //
+  if (mAsfBootOptions->SubCommand != ASF_BOOT_OPTIONS_PRESENT) {
+    return EFI_NOT_FOUND;
+  }
+
+  DevicePath = BdsForcedBoot (EfiBoot);
+  //
+  // If device path was set, the we have a boot option to use
+  //
+  if (DevicePath == NULL) {
+    return EFI_UNSUPPORTED;
+  }
+
+  BootOption = BdsCreateBootOption (DevicePath, L"ASF Boot");
+  if (BootOption == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  Status = AsfBootViaBootOption (BootOption, BootOption->DevicePath, &ExitDataSize, &ExitData);
+
+  FreePool (BootOption);
+  FreePool (DevicePath);
+
+  return Status;
+}
+
+/**
+  This will return if Media in IDE-R is present.
+
+  @param[in] None.
+
+  @retval TRUE    Media is present.
+  @retval FALSE   Media is not present.
+**/
+BOOLEAN
+BdsCheckIderMedia (
+  IN  VOID
+  )
+{
+  UINTN                     HandleNum;
+  EFI_HANDLE                *HandleBuf;
+  EFI_HANDLE                Handle;
+  EFI_STATUS                Status;
+  EFI_DEVICE_PATH_PROTOCOL  *DPath;
+  UINTN                     Index;
+  UINTN                     EventIndex;
+  EFI_INPUT_KEY             Key;
+  EFI_BLOCK_IO_PROTOCOL     *BlkIo;
+  EFI_DISK_INFO_PROTOCOL    *DiskInfo;
+  EFI_BLOCK_IO_MEDIA        *BlkMedia;
+  VOID                      *Buffer;
+  UINT8                     IdeBootDevice;
+  UINT32                    IdeChannel;
+  UINT32                    IdeDevice;
+
+  IdeBootDevice = ActiveManagementIderBootDeviceGet ();
+
+  DEBUG ((EFI_D_INFO | EFI_D_LOAD, "Ide Channel Device Index = %d\n", IdeBootDevice));
+
+  //
+  // Make sure the Legacy Boot Protocol is available
+  //
+  Status = gBS->LocateHandleBuffer (
+                  ByProtocol,
+                  &gEfiBlockIoProtocolGuid,
+                  NULL,
+                  &HandleNum,
+                  &HandleBuf
+                  );
+  if ((EFI_ERROR (Status)) || (HandleBuf == NULL)) {
+    goto Exit;
+  }
+
+  for (Index = 0; Index < HandleNum; Index++) {
+    Status = gBS->HandleProtocol (
+                    HandleBuf[Index],
+                    &gEfiDevicePathProtocolGuid,
+                    &DPath
+                    );
+    if (EFI_ERROR (Status)) {
+      continue;
+    }
+
+    Status = gBS->LocateDevicePath (
+                    &gEfiIderControllerDriverProtocolGuid,
+                    &DPath,
+                    &Handle
+                    );
+    if (EFI_ERROR (Status)) {
+      continue;
+    }
+
+    Status = gBS->HandleProtocol (
+                    HandleBuf[Index],
+                    &gEfiBlockIoProtocolGuid,
+                    &BlkIo
+                    );
+
+    if (EFI_ERROR(Status)) {
+      continue;
+    }
+
+    Status = gBS->HandleProtocol (
+                    HandleBuf[Index],
+                    &gEfiDiskInfoProtocolGuid,
+                    &DiskInfo
+                    );
+
+    if (EFI_ERROR(Status)) {
+      continue;
+    }
+
+    DiskInfo->WhichIde (DiskInfo, &IdeChannel, &IdeDevice);
+
+    if (IdeBootDevice != (UINT8) (IdeChannel * 2 + IdeDevice)) {
+      continue;
+    }
+
+    if (BlkIo->Media->MediaPresent) {
+      if (HandleBuf != NULL) {
+        FreePool (HandleBuf);
+      }
+      return TRUE;
+    }
+
+    while (TRUE) {
+      BlkMedia  = BlkIo->Media;
+      Buffer    = AllocatePool (BlkMedia->BlockSize);
+      if (Buffer) {
+        BlkIo->ReadBlocks (
+                BlkIo,
+                BlkMedia->MediaId,
+                0,
+                BlkMedia->BlockSize,
+                Buffer
+                );
+        FreePool (Buffer);
+      }
+
+      if (BlkMedia->MediaPresent) {
+        if (HandleBuf != NULL) {
+          FreePool (HandleBuf);
+        }
+        return TRUE;
+      }
+
+      gST->ConOut->OutputString (
+                    gST->ConOut,
+                    L"Boot disk missing, please insert boot disk and press ENTER\r\n"
+                    );
+      Key.ScanCode    = 0;
+      Key.UnicodeChar = 0;
+      gBS->RestoreTPL (EFI_TPL_APPLICATION);
+      while (!(Key.ScanCode == 0 && Key.UnicodeChar == L'\r')) {
+        Status = gBS->WaitForEvent (1, &(gST->ConIn->WaitForKey), &EventIndex);
+        gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+      }
+
+      gBS->RaiseTPL (EFI_TPL_DRIVER);
+    }
+
+    break;
+  }
+
+Exit:
+  if (HandleBuf != NULL) {
+    FreePool (HandleBuf);
+  }
+  return FALSE;
+}
diff --git a/ReferenceCode/ME/SampleCode/AsfSupport/AsfSupport.h b/ReferenceCode/ME/SampleCode/AsfSupport/AsfSupport.h
new file mode 100644
index 0000000..dad873d
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/AsfSupport/AsfSupport.h
@@ -0,0 +1,162 @@
+/** @file
+  ASF BDS Support include file
+
+@copyright
+  Copyright (c) 2005-2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+#ifndef _ASF_SUPPORT_H_
+#define _ASF_SUPPORT_H_
+
+#include "EdkIIGlueDxe.h"
+#include "BdsLib.h"
+#include "Pci22.h"
+#include "Amt.h"
+#include "AmtLib.h"
+#include "MeAccess.h"
+
+#include EFI_PROTOCOL_DEFINITION (LegacyBios)
+#include EFI_PROTOCOL_DEFINITION (SimpleNetwork)
+#include EFI_PROTOCOL_DEFINITION (FirmwareVolume)
+#include EFI_PROTOCOL_DEFINITION (PciRootBridgeIo)
+
+#include EFI_PROTOCOL_CONSUMER (AlertStandardformat)
+#include EFI_PROTOCOL_CONSUMER (DiskInfo)
+
+#include EFI_PROTOCOL_DEFINITION (IderControllerDriver)
+
+#define IDER_PRIMARY_SECONDARY_MASK   0x02
+#define IDER_MASTER_SLAVE_MASK        0x01
+#define IDER_PRIMARY_SECONDARY_SHIFT  1
+
+#define IS_IDER(BUS, DEVICE,FUNCTION) \
+  (BUS == ME_BUS && DEVICE == ME_DEVICE_NUMBER && FUNCTION == IDER_FUNCTION_NUMBER)
+#define IS_PXE(TYPE, CLASS) \
+  (TYPE == BBS_TYPE_BEV && CLASS == PCI_CLASS_NETWORK)
+#define IS_CDROM(TYPE, CLASS) \
+  (TYPE == BBS_TYPE_BEV && CLASS == PCI_CLASS_MASS_STORAGE)
+
+#define SECURE_BOOT_ENABLED               1
+#define SECURE_BOOT_DISABLED              0
+
+#define RESTORE_SECURE_BOOT_NONE          0
+#define RESTORE_SECURE_BOOT_ENABLED       1
+
+#define RESTORE_SECURE_BOOT_GUID \
+  { \
+    0x118b3c6f, 0x98d6, 0x4d05, 0x96, 0xb2, 0x90, 0xe4, 0xcb, 0xb7, 0x40, 0x34 \
+  }
+
+typedef union {
+  UINT32  Data32;
+  UINT16  Data16[2];
+} DATA32_UNION;
+
+/**
+  Retrieve the ASF boot options previously recorded by the ASF driver.
+
+  @param[in] None.
+
+  @retval EFI_SUCCESS        Initialized Boot Options global variable and AMT protocol
+**/
+EFI_STATUS
+BdsAsfInitialization (
+  IN  VOID
+  )
+;
+
+/**
+  This routine makes necessary Secure Boot & CSM state changes for IDEr boot
+
+  @param[in] None.
+
+  @retval EFI_SUCCESS      Changes applied succesfully
+**/
+EFI_STATUS
+ManageSecureBootState(
+  IN VOID
+  )
+;
+
+/**
+  This function will create a BootOption from the give device path and
+  description string.
+
+  @param[in]  DevicePath     The device path which the option represent
+  @param[in]  Description     The description of the boot option
+
+  @retval BDS_COMMON_OPTION - Pointer to created boot option
+**/
+BDS_COMMON_OPTION *
+BdsCreateBootOption (
+  IN  EFI_DEVICE_PATH_PROTOCOL       *DevicePath,
+  IN  CHAR16                         *Description
+  )
+;
+
+/**
+  Dump all devices of BBS.
+
+  @param[in] LocalBbsTable      BBS table entry.
+**/
+VOID
+PrintBbsTable (
+  IN BBS_TABLE                      *LocalBbsTable
+  )
+;
+
+/**
+  This will return if Media in IDE-R is present.
+
+  @param[in] None.
+
+  @retval TRUE    Media is present.
+  @retval FALSE   Media is not present.
+**/
+BOOLEAN
+BdsCheckIderMedia (
+  IN  VOID
+  )
+;
+
+/**
+  This function will create a SHELL BootOption to boot.
+
+  @param[in]  None.
+
+  @retval EFI_DEVICE_PATH_PROTOCOL Shell Device path for booting.
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+BdsCreateShellDevicePath (
+  VOID
+  )
+;
+
+/**
+  This function will create a BootOption from the give device path and
+  description string.
+
+  @param[in]  DevicePath     The device path which the option represent
+  @param[in]  Description     The description of the boot option
+
+  @retval BDS_COMMON_OPTION - Pointer to created boot option
+**/
+BDS_COMMON_OPTION *
+BdsCreateBootOption (
+  IN  EFI_DEVICE_PATH_PROTOCOL       *DevicePath,
+  IN  CHAR16                         *Description
+  )
+;
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/Acpi1_0.h b/ReferenceCode/ME/SampleCode/Include/Acpi1_0.h
new file mode 100644
index 0000000..71c6624
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/Acpi1_0.h
@@ -0,0 +1,297 @@
+/** @file
+  ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
+
+@copyright
+  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains 'Framework Code' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may not be modified, except as allowed by
+  additional terms of your license agreement.
+**/
+#ifndef _ACPI_1_0_H_
+#define _ACPI_1_0_H_
+
+//
+// Statements that include other files
+//
+#include "Tiano.h"
+#include "Acpi.h"
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+///
+/// ACPI 1.0b table structures
+///
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+  UINT64  Signature;
+  UINT8   Checksum;
+  UINT8   OemId[6];
+  UINT8   Reserved;
+  UINT32  RsdtAddress;
+} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// Root System Description Table
+/// No definition needed as it is a common description table header followed by a
+/// variable number of UINT32 table pointers.
+///
+///
+/// RSDT Revision (as defined in ACPI 1.0b spec.)
+///
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      FirmwareCtrl;
+  UINT32                      Dsdt;
+  UINT8                       IntModel;
+  UINT8                       Reserved1;
+  UINT16                      SciInt;
+  UINT32                      SmiCmd;
+  UINT8                       AcpiEnable;
+  UINT8                       AcpiDisable;
+  UINT8                       S4BiosReq;
+  UINT8                       Reserved2;
+  UINT32                      Pm1aEvtBlk;
+  UINT32                      Pm1bEvtBlk;
+  UINT32                      Pm1aCntBlk;
+  UINT32                      Pm1bCntBlk;
+  UINT32                      Pm2CntBlk;
+  UINT32                      PmTmrBlk;
+  UINT32                      Gpe0Blk;
+  UINT32                      Gpe1Blk;
+  UINT8                       Pm1EvtLen;
+  UINT8                       Pm1CntLen;
+  UINT8                       Pm2CntLen;
+  UINT8                       PmTmLen;
+  UINT8                       Gpe0BlkLen;
+  UINT8                       Gpe1BlkLen;
+  UINT8                       Gpe1Base;
+  UINT8                       Reserved3;
+  UINT16                      PLvl2Lat;
+  UINT16                      PLvl3Lat;
+  UINT16                      FlushSize;
+  UINT16                      FlushStride;
+  UINT8                       DutyOffset;
+  UINT8                       DutyWidth;
+  UINT8                       DayAlrm;
+  UINT8                       MonAlrm;
+  UINT8                       Century;
+  UINT8                       Reserved4;
+  UINT8                       Reserved5;
+  UINT8                       Reserved6;
+  UINT32                      Flags;
+} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 1.0b spec.)
+///
+#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x01
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_1_0_WBINVD       (1 << 0)
+#define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)
+#define EFI_ACPI_1_0_PROC_C1      (1 << 2)
+#define EFI_ACPI_1_0_P_LVL2_UP    (1 << 3)
+#define EFI_ACPI_1_0_PWR_BUTTON   (1 << 4)
+#define EFI_ACPI_1_0_SLP_BUTTON   (1 << 5)
+#define EFI_ACPI_1_0_FIX_RTC      (1 << 6)
+#define EFI_ACPI_1_0_RTC_S4       (1 << 7)
+#define EFI_ACPI_1_0_TMR_VAL_EXT  (1 << 8)
+#define EFI_ACPI_1_0_DCK_CAP      (1 << 9)
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+  UINT32  Signature;
+  UINT32  Length;
+  UINT32  HardwareSignature;
+  UINT32  FirmwareWakingVector;
+  UINT32  GlobalLock;
+  UINT32  Flags;
+  UINT8   Reserved[40];
+} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_1_0_S4BIOS_F (1 << 0)
+
+///
+/// Multiple APIC Description Table header definition.  The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      LocalApicAddress;
+  UINT32                      Flags;
+} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 1.0b spec.)
+///
+#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_1_0_PCAT_COMPAT  (1 << 0)
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x09 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC           0x00
+#define EFI_ACPI_1_0_IO_APIC                        0x01
+#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE      0x02
+#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03
+#define EFI_ACPI_1_0_LOCAL_APIC_NMI                 0x04
+
+///
+/// APIC Structure Definitions
+///
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT8   ApicId;
+  UINT32  Flags;
+} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags.  All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   IoApicId;
+  UINT8   Reserved;
+  UINT32  IoApicAddress;
+  UINT32  SystemVectorBase;
+} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   Bus;
+  UINT8   Source;
+  UINT32  GlobalSystemInterruptVector;
+  UINT16  Flags;
+} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Flags;
+  UINT32  GlobalSystemInterruptVector;
+} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT16  Flags;
+  UINT8   LocalApicInti;
+} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      WarningEnergyLevel;
+  UINT32                      LowEnergyLevel;
+  UINT32                      CriticalEnergyLevel;
+} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// Known table signatures
+///
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
+
+#pragma pack()
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/Acpi2_0.h b/ReferenceCode/ME/SampleCode/Include/Acpi2_0.h
new file mode 100644
index 0000000..38ffbac
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/Acpi2_0.h
@@ -0,0 +1,533 @@
+/** @file
+  ACPI 2.0 definitions from the ACPI Specification, revision 2.0
+
+@copyright
+  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains 'Framework Code' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may not be modified, except as allowed by
+  additional terms of your license agreement.
+**/
+#ifndef _ACPI_2_0_H_
+#define _ACPI_2_0_H_
+
+//
+// Statements that include other files
+//
+#include "Tiano.h"
+#include "Acpi.h"
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+///
+/// ACPI Specification Revision
+///
+#define EFI_ACPI_2_0_REVISION 0x02
+
+//
+// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
+// and produced by a platform specific driver.
+//
+///
+/// ACPI OEM ID
+///
+#define EFI_ACPI_2_0_OEM_ID       "INTEL "
+#define EFI_ACPI_2_0_OEM_TABLE_ID 0x5034303738543245  /// "E2T8704P"
+///
+/// ACPI OEM Revision
+///
+#define EFI_ACPI_2_0_OEM_REVISION 0x00000002
+
+///
+/// ACPI table creator ID
+///
+#define EFI_ACPI_2_0_CREATOR_ID 0x5446534D  /// TBD "MSFT"
+///
+/// ACPI table creator revision
+///
+#define EFI_ACPI_2_0_CREATOR_REVISION 0x01000013  /// TBD
+///
+/// ACPI 2.0 Generic Address Space definition
+///
+typedef struct {
+  UINT8   AddressSpaceId;
+  UINT8   RegisterBitWidth;
+  UINT8   RegisterBitOffset;
+  UINT8   Reserved;
+  UINT64  Address;
+} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
+
+///
+/// Generic Address Space Address IDs
+///
+#define EFI_ACPI_2_0_SYSTEM_MEMORY              0
+#define EFI_ACPI_2_0_SYSTEM_IO                  1
+#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3
+#define EFI_ACPI_2_0_SMBUS                      4
+#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F
+
+///
+/// ACPI 2.0 table structures
+///
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+  UINT64  Signature;
+  UINT8   Checksum;
+  UINT8   OemId[6];
+  UINT8   Revision;
+  UINT32  RsdtAddress;
+  UINT32  Length;
+  UINT64  XsdtAddress;
+  UINT8   ExtendedChecksum;
+  UINT8   Reserved[3];
+} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
+
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+  UINT32  Signature;
+  UINT32  Length;
+} EFI_ACPI_2_0_COMMON_HEADER;
+
+///
+/// Root System Description Table
+/// No definition needed as it is a common description table header followed by a
+/// variable number of UINT32 table pointers.
+///
+///
+/// RSDT Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Extended System Description Table
+/// No definition needed as it is a common description table header followed by a
+/// variable number of UINT64 table pointers.
+///
+///
+/// XSDT Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER             Header;
+  UINT32                                  FirmwareCtrl;
+  UINT32                                  Dsdt;
+  UINT8                                   Reserved0;
+  UINT8                                   PreferredPmProfile;
+  UINT16                                  SciInt;
+  UINT32                                  SmiCmd;
+  UINT8                                   AcpiEnable;
+  UINT8                                   AcpiDisable;
+  UINT8                                   S4BiosReq;
+  UINT8                                   PstateCnt;
+  UINT32                                  Pm1aEvtBlk;
+  UINT32                                  Pm1bEvtBlk;
+  UINT32                                  Pm1aCntBlk;
+  UINT32                                  Pm1bCntBlk;
+  UINT32                                  Pm2CntBlk;
+  UINT32                                  PmTmrBlk;
+  UINT32                                  Gpe0Blk;
+  UINT32                                  Gpe1Blk;
+  UINT8                                   Pm1EvtLen;
+  UINT8                                   Pm1CntLen;
+  UINT8                                   Pm2CntLen;
+  UINT8                                   PmTmrLen;
+  UINT8                                   Gpe0BlkLen;
+  UINT8                                   Gpe1BlkLen;
+  UINT8                                   Gpe1Base;
+  UINT8                                   CstCnt;
+  UINT16                                  PLvl2Lat;
+  UINT16                                  PLvl3Lat;
+  UINT16                                  FlushSize;
+  UINT16                                  FlushStride;
+  UINT8                                   DutyOffset;
+  UINT8                                   DutyWidth;
+  UINT8                                   DayAlrm;
+  UINT8                                   MonAlrm;
+  UINT8                                   Century;
+  UINT16                                  IaPcBootArch;
+  UINT8                                   Reserved1;
+  UINT32                                  Flags;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;
+  UINT8                                   ResetValue;
+  UINT8                                   Reserved2[3];
+  UINT64                                  XFirmwareCtrl;
+  UINT64                                  XDsdt;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
+} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03
+
+///
+/// Fixed ACPI Description Table Boot Architecture Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)
+#define EFI_ACPI_2_0_8042           (1 << 1)
+
+///
+/// Fixed ACPI Description Table Fixed Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_2_0_WBINVD         (1 << 0)
+#define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)
+#define EFI_ACPI_2_0_PROC_C1        (1 << 2)
+#define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)
+#define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)
+#define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)
+#define EFI_ACPI_2_0_FIX_RTC        (1 << 6)
+#define EFI_ACPI_2_0_RTC_S4         (1 << 7)
+#define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)
+#define EFI_ACPI_2_0_DCK_CAP        (1 << 9)
+#define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)
+#define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)
+#define EFI_ACPI_2_0_HEADLESS       (1 << 12)
+#define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+  UINT32  Signature;
+  UINT32  Length;
+  UINT32  HardwareSignature;
+  UINT32  FirmwareWakingVector;
+  UINT32  GlobalLock;
+  UINT32  Flags;
+  UINT64  XFirmwareWakingVector;
+  UINT8   Version;
+  UINT8   Reserved[31];
+} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)
+
+///
+/// Multiple APIC Description Table header definition.  The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      LocalApicAddress;
+  UINT32                      Flags;
+} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x09 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00
+#define EFI_ACPI_2_0_IO_APIC                        0x01
+#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02
+#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03
+#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04
+#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
+#define EFI_ACPI_2_0_IO_SAPIC                       0x06
+#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07
+#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08
+
+///
+/// APIC Structure Definitions
+///
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT8   ApicId;
+  UINT32  Flags;
+} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags.  All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   IoApicId;
+  UINT8   Reserved;
+  UINT32  IoApicAddress;
+  UINT32  GlobalSystemInterruptBase;
+} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   Bus;
+  UINT8   Source;
+  UINT32  GlobalSystemInterrupt;
+  UINT16  Flags;
+} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Flags;
+  UINT32  GlobalSystemInterrupt;
+} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT16  Flags;
+  UINT8   LocalApicLint;
+} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Reserved;
+  UINT64  LocalApicAddress;
+} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   IoApicId;
+  UINT8   Reserved;
+  UINT32  GlobalSystemInterruptBase;
+  UINT64  IoSapicAddress;
+} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT8   LocalSapicId;
+  UINT8   LocalSapicEid;
+  UINT8   Reserved[3];
+  UINT32  Flags;
+} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Flags;
+  UINT8   InterruptType;
+  UINT8   ProcessorId;
+  UINT8   ProcessorEid;
+  UINT8   IoSapicVector;
+  UINT32  GlobalSystemInterrupt;
+  UINT32  Reserved;
+} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      WarningEnergyLevel;
+  UINT32                      LowEnergyLevel;
+  UINT32                      CriticalEnergyLevel;
+} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER             Header;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;
+  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;
+  UINT32                                  Uid;
+  UINT8                                   GpeBit;
+} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 2.0 spec.)
+///
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
+
+///
+/// Known table signatures
+///
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352
+
+///
+/// "SPIC" Multiple SAPIC Description Table
+///
+/// BUGBUG: Don't know where this came from except SR870BN4 uses it.
+/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
+///
+#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
+
+///
+/// "DBGP" MS Bebug Port Spec
+///
+#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053
+
+///
+/// "SRAT" Static Resource Affinity Table
+///
+#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358
+
+#pragma pack()
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/Acpi3_0.h b/ReferenceCode/ME/SampleCode/Include/Acpi3_0.h
new file mode 100644
index 0000000..3fc3cb6
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/Acpi3_0.h
@@ -0,0 +1,682 @@
+/** @file
+  ACPI 3.0 definitions from the ACPI Specification Revision 3.0 September 2, 2004
+
+@copyright
+  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains 'Framework Code' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may not be modified, except as allowed by
+  additional terms of your license agreement.
+**/
+#ifndef _ACPI_3_0_H_
+#define _ACPI_3_0_H_
+
+//
+// Statements that include other files
+//
+#include "Tiano.h"
+#include "Acpi.h"
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+///
+/// ACPI Specification Revision
+///
+#define EFI_ACPI_3_0_REVISION 0x03  /// BUGBUG: Not in spec yet.
+//
+// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
+// and produced by a platform specific driver.
+//
+
+///
+/// ACPI 3.0 Generic Address Space definition
+///
+typedef struct {
+  UINT8   AddressSpaceId;
+  UINT8   RegisterBitWidth;
+  UINT8   RegisterBitOffset;
+  UINT8   AccessSize;
+  UINT64  Address;
+} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
+
+///
+/// Generic Address Space Address IDs
+///
+#define EFI_ACPI_3_0_SYSTEM_MEMORY              0
+#define EFI_ACPI_3_0_SYSTEM_IO                  1
+#define EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE    2
+#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER        3
+#define EFI_ACPI_3_0_SMBUS                      4
+#define EFI_ACPI_3_0_FUNCTIONAL_FIXED_HARDWARE  0x7F
+
+///
+/// Generic Address Space Access Sizes
+///
+#define EFI_ACPI_3_0_UNDEFINED  0
+#define EFI_ACPI_3_0_BYTE       1
+#define EFI_ACPI_3_0_WORD       2
+#define EFI_ACPI_3_0_DWORD      3
+#define EFI_ACPI_3_0_QWORD      4
+
+///
+/// ACPI 3.0 table structures
+///
+///
+/// Root System Description Pointer Structure
+///
+typedef struct {
+  UINT64  Signature;
+  UINT8   Checksum;
+  UINT8   OemId[6];
+  UINT8   Revision;
+  UINT32  RsdtAddress;
+  UINT32  Length;
+  UINT64  XsdtAddress;
+  UINT8   ExtendedChecksum;
+  UINT8   Reserved[3];
+} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
+
+///
+/// RSD_PTR Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02  /// ACPISpec30 (Revision 3.0 September 2, 2004) says current value is 2
+///
+/// Common table header, this prefaces all ACPI tables, including FACS, but
+/// excluding the RSD PTR structure
+///
+typedef struct {
+  UINT32  Signature;
+  UINT32  Length;
+} EFI_ACPI_3_0_COMMON_HEADER;
+
+///
+/// Root System Description Table
+/// No definition needed as it is a common description table header followed by a
+/// variable number of UINT32 table pointers.
+///
+///
+/// RSDT Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Extended System Description Table
+/// No definition needed as it is a common description table header followed by a
+/// variable number of UINT64 table pointers.
+///
+///
+/// XSDT Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Fixed ACPI Description Table Structure (FADT)
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER             Header;
+  UINT32                                  FirmwareCtrl;
+  UINT32                                  Dsdt;
+  UINT8                                   Reserved0;
+  UINT8                                   PreferredPmProfile;
+  UINT16                                  SciInt;
+  UINT32                                  SmiCmd;
+  UINT8                                   AcpiEnable;
+  UINT8                                   AcpiDisable;
+  UINT8                                   S4BiosReq;
+  UINT8                                   PstateCnt;
+  UINT32                                  Pm1aEvtBlk;
+  UINT32                                  Pm1bEvtBlk;
+  UINT32                                  Pm1aCntBlk;
+  UINT32                                  Pm1bCntBlk;
+  UINT32                                  Pm2CntBlk;
+  UINT32                                  PmTmrBlk;
+  UINT32                                  Gpe0Blk;
+  UINT32                                  Gpe1Blk;
+  UINT8                                   Pm1EvtLen;
+  UINT8                                   Pm1CntLen;
+  UINT8                                   Pm2CntLen;
+  UINT8                                   PmTmrLen;
+  UINT8                                   Gpe0BlkLen;
+  UINT8                                   Gpe1BlkLen;
+  UINT8                                   Gpe1Base;
+  UINT8                                   CstCnt;
+  UINT16                                  PLvl2Lat;
+  UINT16                                  PLvl3Lat;
+  UINT16                                  FlushSize;
+  UINT16                                  FlushStride;
+  UINT8                                   DutyOffset;
+  UINT8                                   DutyWidth;
+  UINT8                                   DayAlrm;
+  UINT8                                   MonAlrm;
+  UINT8                                   Century;
+  UINT16                                  IaPcBootArch;
+  UINT8                                   Reserved1;
+  UINT32                                  Flags;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;
+  UINT8                                   ResetValue;
+  UINT8                                   Reserved2[3];
+  UINT64                                  XFirmwareCtrl;
+  UINT64                                  XDsdt;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
+} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
+
+///
+/// FADT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x04
+
+//
+// Fixed ACPI Description Table Preferred Power Management Profile
+//
+#define EFI_ACPI_3_0_PM_PROFILE_UNSPECIFIED         0
+#define EFI_ACPI_3_0_PM_PROFILE_DESKTOP             1
+#define EFI_ACPI_3_0_PM_PROFILE_MOBILE              2
+#define EFI_ACPI_3_0_PM_PROFILE_WORKSTATION         3
+#define EFI_ACPI_3_0_PM_PROFILE_ENTERPRISE_SERVER   4
+#define EFI_ACPI_3_0_PM_PROFILE_SOHO_SERVER         5
+#define EFI_ACPI_3_0_PM_PROFILE_APPLIANCE_PC        6
+#define EFI_ACPI_3_0_PM_PROFILE_PERFORMANCE_SERVER  7
+
+//
+// Fixed ACPI Description Table Boot Architecture Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_3_0_LEGACY_DEVICES   (1 << 0)
+#define EFI_ACPI_3_0_8042             (1 << 1)
+#define EFI_ACPI_3_0_VGA_NOT_PRESENT  (1 << 2)
+
+//
+// Fixed ACPI Description Table Fixed Feature Flags
+// All other bits are reserved and must be set to 0.
+//
+#define EFI_ACPI_3_0_WBINVD                               (1 << 0)
+#define EFI_ACPI_3_0_WBINVD_FLUSH                         (1 << 1)
+#define EFI_ACPI_3_0_PROC_C1                              (1 << 2)
+#define EFI_ACPI_3_0_P_LVL2_UP                            (1 << 3)
+#define EFI_ACPI_3_0_PWR_BUTTON                           (1 << 4)
+#define EFI_ACPI_3_0_SLP_BUTTON                           (1 << 5)
+#define EFI_ACPI_3_0_FIX_RTC                              (1 << 6)
+#define EFI_ACPI_3_0_RTC_S4                               (1 << 7)
+#define EFI_ACPI_3_0_TMR_VAL_EXT                          (1 << 8)
+#define EFI_ACPI_3_0_DCK_CAP                              (1 << 9)
+#define EFI_ACPI_3_0_RESET_REG_SUP                        (1 << 10)
+#define EFI_ACPI_3_0_SEALED_CASE                          (1 << 11)
+#define EFI_ACPI_3_0_HEADLESS                             (1 << 12)
+#define EFI_ACPI_3_0_CPU_SW_SLP                           (1 << 13)
+#define EFI_ACPI_3_0_PCI_EXP_WAK                          (1 << 14)
+#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK                   (1 << 15)
+#define EFI_ACPI_3_0_S4_RTC_STS_VALID                     (1 << 16)
+#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE              (1 << 17)
+#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL             (1 << 18)
+#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)
+
+///
+/// Firmware ACPI Control Structure
+///
+typedef struct {
+  UINT32  Signature;
+  UINT32  Length;
+  UINT32  HardwareSignature;
+  UINT32  FirmwareWakingVector;
+  UINT32  GlobalLock;
+  UINT32  Flags;
+  UINT64  XFirmwareWakingVector;
+  UINT8   Version;
+  UINT8   Reserved[31];
+} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
+
+///
+/// FACS Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01
+
+///
+/// Firmware Control Structure Feature Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_S4BIOS_F (1 << 0)
+
+//
+// Differentiated System Description Table,
+// Secondary System Description Table
+// and Persistent System Description Table,
+// no definition needed as they are common description table header followed by a
+// definition block.
+//
+#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION      0x02
+
+///
+/// Multiple APIC Description Table header definition.  The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      LocalApicAddress;
+  UINT32                      Flags;
+} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
+
+///
+/// MADT Revision (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
+
+///
+/// Multiple APIC Flags
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_PCAT_COMPAT  (1 << 0)
+
+//
+// Multiple APIC Description Table APIC structure types
+// All other values between 0x09 an 0xFF are reserved and
+// will be ignored by OSPM.
+//
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC           0x00
+#define EFI_ACPI_3_0_IO_APIC                        0x01
+#define EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE      0x02
+#define EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03
+#define EFI_ACPI_3_0_LOCAL_APIC_NMI                 0x04
+#define EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
+#define EFI_ACPI_3_0_IO_SAPIC                       0x06
+#define EFI_ACPI_3_0_LOCAL_SAPIC                    0x07
+#define EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES     0x08
+
+///
+/// APIC Structure Definitions
+///
+///
+/// Processor Local APIC Structure Definition
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT8   ApicId;
+  UINT32  Flags;
+} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
+
+///
+/// Local APIC Flags.  All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED (1 << 0)
+
+///
+/// IO APIC Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   IoApicId;
+  UINT8   Reserved;
+  UINT32  IoApicAddress;
+  UINT32  GlobalSystemInterruptBase;
+} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
+
+///
+/// Interrupt Source Override Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   Bus;
+  UINT8   Source;
+  UINT32  GlobalSystemInterrupt;
+  UINT16  Flags;
+} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure Definition
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Flags;
+  UINT8   InterruptType;
+  UINT8   ProcessorId;
+  UINT8   ProcessorEid;
+  UINT8   IoSapicVector;
+  UINT32  GlobalSystemInterrupt;
+  UINT32  PlatformInterruptSourceFlags;
+  UINT8   CpeiProcessorOverride;
+  UINT8   Reserved[31];
+} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
+
+///
+/// MPS INTI flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_POLARITY     (3 << 0)
+#define EFI_ACPI_3_0_TRIGGER_MODE (3 << 2)
+
+///
+/// Non-Maskable Interrupt Source Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Flags;
+  UINT32  GlobalSystemInterrupt;
+} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
+
+///
+/// Local APIC NMI Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT16  Flags;
+  UINT8   LocalApicLint;
+} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
+
+///
+/// Local APIC Address Override Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Reserved;
+  UINT64  LocalApicAddress;
+} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
+
+///
+/// IO SAPIC Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   IoApicId;
+  UINT8   Reserved;
+  UINT32  GlobalSystemInterruptBase;
+  UINT64  IoSapicAddress;
+} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
+
+///
+/// Local SAPIC Structure
+/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   AcpiProcessorId;
+  UINT8   LocalSapicId;
+  UINT8   LocalSapicEid;
+  UINT8   Reserved[3];
+  UINT32  Flags;
+  UINT32  ACPIProcessorUIDValue;
+} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
+
+///
+/// Platform Interrupt Sources Structure
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT16  Flags;
+  UINT8   InterruptType;
+  UINT8   ProcessorId;
+  UINT8   ProcessorEid;
+  UINT8   IoSapicVector;
+  UINT32  GlobalSystemInterrupt;
+  UINT32  PlatformInterruptSourceFlags;
+} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
+
+///
+/// Platform Interrupt Source Flags.
+/// All other bits are reserved and must be set to 0.
+///
+#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE  (1 << 0)
+
+///
+/// Smart Battery Description Table (SBST)
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      WarningEnergyLevel;
+  UINT32                      LowEnergyLevel;
+  UINT32                      CriticalEnergyLevel;
+} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
+
+///
+/// SBST Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+
+///
+/// Embedded Controller Boot Resources Table (ECDT)
+/// The table is followed by a null terminated ASCII string that contains
+/// a fully qualified reference to the name space object.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER             Header;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  EcControl;
+  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  EcData;
+  UINT32                                  Uid;
+  UINT8                                   GpeBit;
+} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
+
+///
+/// ECDT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
+
+///
+/// System Resource Affinity Table (SRAT.  The rest of the table
+/// must be defined in a platform specific manner.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      Reserved1;  /// Must be set to 1
+  UINT64                      Reserved2;
+} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
+
+///
+/// SRAT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x02
+
+///
+/// SRAT structure types.
+/// All other values between 0x02 an 0xFF are reserved and
+/// will be ignored by OSPM.
+///
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00
+#define EFI_ACPI_3_0_MEMORY_AFFINITY                      0x01
+
+///
+/// Processor Local APIC/SAPIC Affinity Structure Definition
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT8   ProximityDomain7To0;
+  UINT8   ApicId;
+  UINT32  Flags;
+  UINT8   LocalSapicEid;
+  UINT8   ProximityDomain31To8[3];
+  UINT8   Reserved[4];
+} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
+
+///
+/// Local APIC/SAPIC Flags.  All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+
+///
+/// Memory Affinity Structure Definition
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT32  ProximityDomain;
+  UINT16  Reserved1;
+  UINT32  AddressBaseLow;
+  UINT32  AddressBaseHigh;
+  UINT32  LengthLow;
+  UINT32  LengthHigh;
+  UINT32  Reserved2;
+  UINT32  Flags;
+  UINT64  Reserved3;
+} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
+
+///
+/// Memory Flags.  All other bits are reserved and must be 0.
+///
+#define EFI_ACPI_3_0_MEMORY_ENABLED       (1 << 0)
+#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_3_0_MEMORY_NONVOLATILE   (1 << 2)
+
+///
+/// System Locality Distance Information Table (SLIT).
+/// The rest of the table is a matrix.
+///
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT64                      NumberOfSystemLocalities;
+} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
+
+///
+/// SLIT Version (as defined in ACPI 3.0 spec.)
+///
+#define EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION  0x01
+
+///
+/// Known table signatures
+///
+///
+/// "RSD PTR " Root System Description Pointer
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352
+
+///
+/// "APIC" Multiple APIC Description Table
+///
+#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041
+
+///
+/// "DSDT" Differentiated System Description Table
+///
+#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344
+
+///
+/// "ECDT" Embedded Controller Boot Resources Table
+///
+#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
+
+///
+/// "FACP" Fixed ACPI Description Table
+///
+#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
+
+///
+/// "FACS" Firmware ACPI Control Structure
+///
+#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146
+
+///
+/// "PSDT" Persistent System Description Table
+///
+#define EFI_ACPI_3_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350
+
+///
+/// "RSDT" Root System Description Table
+///
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352
+
+///
+/// "SBST" Smart Battery Specification Table
+///
+#define EFI_ACPI_3_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253
+
+///
+/// "SLIT" System Locality Information Table
+///
+#define EFI_ACPI_3_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53
+
+///
+/// "SRAT" System Resource Affinity Table
+///
+#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
+
+///
+/// "SSDT" Secondary System Description Table
+///
+#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
+
+///
+/// "XSDT" Extended System Description Table
+///
+#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358
+
+///
+/// "BOOT" MS Simple Boot Spec
+///
+#define EFI_ACPI_3_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
+
+///
+/// "CPEP" Corrected Platform Error Polling Table
+/// See
+///
+#define EFI_ACPI_3_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE 0x50455043
+
+///
+/// "DBGP" MS Debug Port Spec
+///
+#define EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
+
+///
+/// "ETDT" Event Timer Description Table
+///
+#define EFI_ACPI_3_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445
+
+///
+/// "HPET" IA-PC High Precision Event Timer Table
+///
+#define EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE 0x54455048
+
+///
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
+///
+#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE 0x4746434D
+
+///
+/// "SPCR" Serial Port Concole Redirection Table
+///
+#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053
+
+///
+/// "SPMI" Server Platform Management Interface Table
+///
+#define EFI_ACPI_3_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE 0x494D5053
+
+///
+/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
+///
+#define EFI_ACPI_3_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE 0x41504354
+
+///
+/// "WDRT" Watchdog Resource Table
+///
+#define EFI_ACPI_3_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE  0x41504354 0x54524457
+
+#pragma pack()
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/AlertStandardFormatTable.h b/ReferenceCode/ME/SampleCode/Include/AlertStandardFormatTable.h
new file mode 100644
index 0000000..672a764
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/AlertStandardFormatTable.h
@@ -0,0 +1,119 @@
+/** @file
+  ACPI Alert Standard Format Description Table ASF! as described
+  in the ASF2.0 Specification
+
+@copyright
+  Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+#ifndef _ALERT_STANDARD_FORMAT_TABLE_H
+#define _ALERT_STANDARD_FORMAT_TABLE_H
+
+#include "Acpi2_0.h"
+
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+///
+/// Information Record header that appears at the beginning of each record
+///
+typedef struct {
+  UINT8   Type;
+  UINT8   Reserved;
+  UINT16  RecordLength;
+} EFI_ACPI_ASF_RECORD_HEADER;
+
+///
+/// This structure contains information that identifies the system's type
+/// and configuration
+///
+typedef struct {
+  EFI_ACPI_ASF_RECORD_HEADER  RecordHeader;
+  UINT8                       MinWatchDogResetValue;
+  UINT8                       MinPollingInterval;
+  UINT16                      SystemID;
+  UINT32                      IANAManufactureID;
+  UINT8                       FeatureFlags;
+  UINT8                       Reserved[3];
+} EFI_ACPI_ASF_INFO;
+
+///
+/// Alert sensors definition
+///
+#define ASF_ALRT_SENSOR_ARRAY_LENGTH  36
+
+typedef struct {
+  EFI_ACPI_ASF_RECORD_HEADER  RecordHeader;
+  UINT8                       AssertionEventBitMask;
+  UINT8                       DeassertionEventBitMask;
+  UINT8                       NumberOfAlerts;
+  UINT8                       ArrayElementLength;
+  UINT8                       DeviceArray[ASF_ALRT_SENSOR_ARRAY_LENGTH];
+} EFI_ACPI_ASF_ALRT;
+
+///
+/// Alert Remote Control System Actions
+///
+#define ASF_RCTL_DEVICES_ARRAY_LENGTH 16
+typedef struct {
+  EFI_ACPI_ASF_RECORD_HEADER  RecordHeader;
+  UINT8                       NumberOfControls;
+  UINT8                       ArrayElementLength;
+  UINT16                      RctlReserved;
+  UINT8                       ControlArray[ASF_RCTL_DEVICES_ARRAY_LENGTH];
+} EFI_ACPI_ASF_RCTL;
+
+///
+/// Remote Control Capabilities
+///
+typedef struct {
+  EFI_ACPI_ASF_RECORD_HEADER  RecordHeader;
+  UINT8                       RemoteControlCapabilities[7];
+  UINT8                       RMCPCompletionCode;
+  UINT32                      RMCPIANA;
+  UINT8                       RMCPSpecialCommand;
+  UINT8                       RMCPSpecialCommandParameter[2];
+  UINT8                       RMCPBootOptions[2];
+  UINT8                       RMCPOEMParameters[2];
+} EFI_ACPI_ASF_RMCP;
+
+///
+/// SMBus Devices with fixed addresses
+///
+#define ASF_ADDR_DEVICE_ARRAY_LENGTH  11
+typedef struct {
+  EFI_ACPI_ASF_RECORD_HEADER  RecordHeader;
+  UINT8                       SEEPROMAddress;
+  UINT8                       NumberOfDevices;
+  UINT8                       FixedSmbusAddresses[ASF_ADDR_DEVICE_ARRAY_LENGTH];
+} EFI_ACPI_ASF_ADDR;
+
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  EFI_ACPI_ASF_INFO           AsfInfo;
+  EFI_ACPI_ASF_ALRT           AsfAlert;
+  EFI_ACPI_ASF_RCTL           AsfRctl;
+  EFI_ACPI_ASF_RMCP           AsfRmcp;
+  EFI_ACPI_ASF_ADDR           AsfAddr;
+} EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE;
+
+///
+/// "ASF!" ASF Description Table Signature
+///
+#define EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_SIGNATURE  0x21465341
+
+#pragma pack()
+
+#endif // _ALERT_STANDARD_FORMAT_TABLE_H
diff --git a/ReferenceCode/ME/SampleCode/Include/AslUpdateLib.h b/ReferenceCode/ME/SampleCode/Include/AslUpdateLib.h
new file mode 100644
index 0000000..dcee41d
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/AslUpdateLib.h
@@ -0,0 +1,167 @@
+/** @file
+  ASL dynamic update library definitions.
+  This library provides dymanic update to various ASL structures.
+  There may be different libraries for different environments (PEI, BS, RT, SMM).
+  Make sure you meet the requirements for the library (protocol dependencies, use
+  restrictions, etc).
+
+@copyright
+  Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+#ifndef _ASL_UPDATE_LIB_H_
+#define _ASL_UPDATE_LIB_H_
+
+//
+// Include files
+//
+#include "Acpi.h"
+#include "Acpi3_0.h"
+
+#include EFI_PROTOCOL_DEPENDENCY (AcpiSupport)
+#include EFI_PROTOCOL_DEPENDENCY (AcpiTable)
+
+//
+// AML parsing definitions
+//
+#define AML_NAME_OP       0x08
+#define AML_SCOPE_OP      0x10
+#define AML_PACKAGE_OP    0x12
+#define AML_METHOD_OP     0x14
+#define AML_OPREGION_OP   0x80
+#define AML_DEVICE_OP     0x82
+#define AML_PROCESSOR_OP  0x83
+
+//
+// Magic number definition for values to be updated
+//
+#define UINT16_BIT_MAGIC_NUMBER 0xFFFF
+#define UINT32_BIT_MAGIC_NUMBER 0xFFFFFFFF
+
+///
+/// ASL PSS package structure layout
+///
+#pragma pack(1)
+typedef struct {
+  UINT8   NameOp;         ///< 12h ;First opcode is a NameOp.
+  UINT8   PackageLead;    ///< 20h ;First opcode is a NameOp.
+  UINT8   NumEntries;     ///< 06h ;First opcode is a NameOp.
+  UINT8   DwordPrefix1;   ///< 0Ch
+  UINT32  CoreFrequency;  ///< 00h
+  UINT8   DwordPrefix2;   ///< 0Ch
+  UINT32  Power;          ///< 00h
+  UINT8   DwordPrefix3;   ///< 0Ch
+  UINT32  TransLatency;   ///< 00h
+  UINT8   DwordPrefix4;   ///< 0Ch
+  UINT32  BMLatency;      ///< 00h
+  UINT8   DwordPrefix5;   ///< 0Ch
+  UINT32  Control;        ///< 00h
+  UINT8   DwordPrefix6;   ///< 0Ch
+  UINT32  Status;         ///< 00h
+} PSS_PACKAGE_LAYOUT;
+#pragma pack()
+
+/**
+  Initialize the ASL update library state.
+  This must be called prior to invoking other library functions.
+
+  @param[in] None
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+InitializeAslUpdateLib (
+  VOID
+  )
+;
+
+/**
+  This procedure will update two kinds of asl code.
+  1:  Operating Region base address and length.
+  2:  Resource Consumption structures in device LDRC.
+
+  @param[in] AslSignature         The signature of Operation Region that we want to update.
+  @param[in] BaseAddress          Base address of IO trap.
+  @param[in] Length               Length of IO address.
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+UpdateAslCode (
+  IN     UINT32                   AslSignature,
+  IN     UINT16                   BaseAddress,
+  IN     UINT8                    Length
+  )
+;
+
+/**
+  This function uses the ACPI support protocol to locate an ACPI table.
+  It is really only useful for finding tables that only have a single instance,
+  e.g. FADT, FACS, MADT, etc.  It is not good for locating SSDT, etc.
+
+  @param[in] Signature            Pointer to an ASCII string containing the OEM Table ID from the ACPI table header
+  @param[in] Table                Updated with a pointer to the table
+  @param[in] Handle               AcpiSupport protocol table handle for the table found
+  @param[in] Version              The version of the table desired
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+LocateAcpiTableBySignature (
+  IN      UINT32                        Signature,
+  IN OUT  EFI_ACPI_DESCRIPTION_HEADER   **Table,
+  IN OUT  UINTN                         *Handle,
+  IN OUT  EFI_ACPI_TABLE_VERSION        *Version
+  )
+;
+
+/**
+  This function uses the ACPI support protocol to locate an ACPI SSDT table.
+
+  @param[in] TableId              Pointer to an ASCII string containing the OEM Table ID from the ACPI table header
+  @param[in] TableIdSize          Length of the TableId to match.  Table ID are 8 bytes long, this function
+                                  will consider it a match if the first TableIdSize bytes match
+  @param[in] Table                Updated with a pointer to the table
+  @param[in] Handle               AcpiSupport protocol table handle for the table found
+  @param[in] Version              See AcpiSupport protocol, GetAcpiTable function for use
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+LocateAcpiTableByOemTableId (
+  IN      UINT8                         *TableId,
+  IN      UINT8                         TableIdSize,
+  IN OUT  EFI_ACPI_DESCRIPTION_HEADER   **Table,
+  IN OUT  UINTN                         *Handle,
+  IN OUT  EFI_ACPI_TABLE_VERSION        *Version
+  )
+;
+
+/**
+  This function calculates and updates an UINT8 checksum.
+
+  @param[in] Buffer               Pointer to buffer to checksum
+  @param[in] Size                 Number of bytes to checksum
+  @param[in] ChecksumOffset       Offset to place the checksum result in
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+AcpiChecksum (
+  IN VOID                         *Buffer,
+  IN UINTN                        Size,
+  IN UINTN                        ChecksumOffset
+  )
+;
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/Guid/MemoryOverwriteControl/MemoryOverwriteControl.h b/ReferenceCode/ME/SampleCode/Include/Guid/MemoryOverwriteControl/MemoryOverwriteControl.h
new file mode 100644
index 0000000..a792842
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/Guid/MemoryOverwriteControl/MemoryOverwriteControl.h
@@ -0,0 +1,81 @@
+/** @file
+  GUID used for MemoryOverwriteRequestControl UEFI variable defined in
+  TCG Platform Reset Attack Mitigation Specification 1.00.
+  See http://trustedcomputinggroup.org for the latest specification
+
+  The purpose of the MemoryOverwriteRequestControl UEFI variable is to give users (e.g., OS, loader) the ability to
+  indicate to the platform that secrets are present in memory and that the platform firmware must clear memory upon
+  a restart. The OS loader should not create the variable. Rather, the  firmware is required to create it.
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef _MEMORY_OVERWRITE_CONTROL_DATA_GUID_H_
+#define _MEMORY_OVERWRITE_CONTROL_DATA_GUID_H_
+
+#define MEMORY_ONLY_RESET_CONTROL_GUID \
+  { \
+    0xe20939be, 0x32d4, 0x41be, {0xa1, 0x50, 0x89, 0x7f, 0x85, 0xd4, 0x98, 0x29} \
+  }
+
+///
+///  Variable name is "MemoryOverwriteRequestControl" and it is a 1 byte unsigned value.
+///  The attributes should be:
+///  EFI_VARIABLE_NON_VOLATILE |
+///  EFI_VARIABLE_BOOTSERVICE_ACCESS |
+///  EFI_VARIABLE_RUNTIME_ACCESS
+///
+#define MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME L"MemoryOverwriteRequestControl"
+
+///
+/// 0 = Firmware MUST clear the MOR bi
+/// 1 = Firmware MUST set the MOR bit
+///
+#define MOR_CLEAR_MEMORY_BIT_MASK        0x01
+
+///
+/// 0 = Firmware MAY autodetect a clean shutdown of the Static RTM OS.
+/// 1 = Firmware MUST NOT autodetect a clean shutdown of the Static RTM OS.
+///
+#define MOR_DISABLEAUTODETECT_BIT_MASK   0x10
+
+///
+/// MOR field bit offset
+///
+#define MOR_CLEAR_MEMORY_BIT_OFFSET      0
+#define MOR_DISABLEAUTODETECT_BIT_OFFSET 4
+
+/**
+  Return the ClearMemory bit value 0 or 1.
+
+  @param mor   1 byte value that contains ClearMemory and DisableAutoDetect bit.
+
+  @return ClearMemory bit value
+**/
+#define MOR_CLEAR_MEMORY_VALUE(mor)        (((UINT8)(mor) & MOR_CLEAR_MEMORY_BIT_MASK) >> MOR_CLEAR_MEMORY_BIT_OFFSET)
+
+/**
+  Return the DisableAutoDetect bit value 0 or 1.
+
+  @param mor   1 byte value that contains ClearMemory and DisableAutoDetect bit.
+
+  @return DisableAutoDetect bit value
+**/
+#define MOR_DISABLE_AUTO_DETECT_VALUE(mor) (((UINT8)(mor) & MOR_DISABLEAUTODETECT_BIT_MASK) >> MOR_DISABLEAUTODETECT_BIT_OFFSET)
+
+extern EFI_GUID gEfiMemoryOverwriteControlDataGuid;
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/Guid/TrEEPhysicalPresenceData/TrEEPhysicalPresenceData.h b/ReferenceCode/ME/SampleCode/Include/Guid/TrEEPhysicalPresenceData/TrEEPhysicalPresenceData.h
new file mode 100644
index 0000000..215e8f9
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/Guid/TrEEPhysicalPresenceData/TrEEPhysicalPresenceData.h
@@ -0,0 +1,62 @@
+/** @file
+  Define the variable data structures used for TrEE physical presence.
+  The TPM2 request from firmware or OS is saved to variable. And it is
+  cleared after it is processed in the next boot cycle. The TPM2 response
+  is saved to variable.
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef __TREE_PHYSICAL_PRESENCE_DATA_GUID_H__
+#define __TREE_PHYSICAL_PRESENCE_DATA_GUID_H__
+
+#define EFI_TREE_PHYSICAL_PRESENCE_DATA_GUID \
+  { \
+    0xf24643c2, 0xc622, 0x494e, { 0x8a, 0xd, 0x46, 0x32, 0x57, 0x9c, 0x2d, 0x5b }\
+  }
+
+#define TREE_PHYSICAL_PRESENCE_VARIABLE  L"TrEEPhysicalPresence"
+
+typedef struct {
+  UINT8   PPRequest;      ///< Physical Presence request command.
+  UINT8   LastPPRequest;
+  UINT32  PPResponse;
+  UINT8   Flags;
+} EFI_TREE_PHYSICAL_PRESENCE;
+
+//
+// The definition bit of the flags
+//
+#define TREE_FLAG_NO_PPI_CLEAR                        0x2
+#define TREE_FLAG_RESET_TRACK                         0x8
+
+//
+// The definition of physical presence operation actions
+//
+#define TREE_PHYSICAL_PRESENCE_NO_ACTION                               0
+#define TREE_PHYSICAL_PRESENCE_CLEAR_CONTROL_CLEAR                     5
+#define TREE_PHYSICAL_PRESENCE_CLEAR_CONTROL_CLEAR_2                   14
+#define TREE_PHYSICAL_PRESENCE_SET_NO_PPI_CLEAR_FALSE                  17
+#define TREE_PHYSICAL_PRESENCE_SET_NO_PPI_CLEAR_TRUE                   18
+#define TREE_PHYSICAL_PRESENCE_CLEAR_CONTROL_CLEAR_3                   21
+#define TREE_PHYSICAL_PRESENCE_CLEAR_CONTROL_CLEAR_4                   22
+
+#define TREE_PHYSICAL_PRESENCE_NO_ACTION_MAX                           20
+
+extern EFI_GUID  gEfiTrEEPhysicalPresenceGuid;
+
+#endif
+
diff --git a/ReferenceCode/ME/SampleCode/Include/IndustryStandard/AcpiAml.h b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/AcpiAml.h
new file mode 100644
index 0000000..192a869
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/AcpiAml.h
@@ -0,0 +1,180 @@
+/** @file
+  This file contains AML code definition in the latest ACPI spec.
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef _ACPI_AML_H_
+#define _ACPI_AML_H_
+
+//
+// ACPI AML definition
+//
+
+//
+// Primary OpCode
+//
+#define AML_ZERO_OP                  0x00
+#define AML_ONE_OP                   0x01
+#define AML_ALIAS_OP                 0x06
+#define AML_NAME_OP                  0x08
+#define AML_BYTE_PREFIX              0x0a
+#define AML_WORD_PREFIX              0x0b
+#define AML_DWORD_PREFIX             0x0c
+#define AML_STRING_PREFIX            0x0d
+#define AML_QWORD_PREFIX             0x0e
+#define AML_SCOPE_OP                 0x10
+#define AML_BUFFER_OP                0x11
+#define AML_PACKAGE_OP               0x12
+#define AML_VAR_PACKAGE_OP           0x13
+#define AML_METHOD_OP                0x14
+#define AML_DUAL_NAME_PREFIX         0x2e
+#define AML_MULTI_NAME_PREFIX        0x2f
+#define AML_NAME_CHAR_A              0x41
+#define AML_NAME_CHAR_B              0x42
+#define AML_NAME_CHAR_C              0x43
+#define AML_NAME_CHAR_D              0x44
+#define AML_NAME_CHAR_E              0x45
+#define AML_NAME_CHAR_F              0x46
+#define AML_NAME_CHAR_G              0x47
+#define AML_NAME_CHAR_H              0x48
+#define AML_NAME_CHAR_I              0x49
+#define AML_NAME_CHAR_J              0x4a
+#define AML_NAME_CHAR_K              0x4b
+#define AML_NAME_CHAR_L              0x4c
+#define AML_NAME_CHAR_M              0x4d
+#define AML_NAME_CHAR_N              0x4e
+#define AML_NAME_CHAR_O              0x4f
+#define AML_NAME_CHAR_P              0x50
+#define AML_NAME_CHAR_Q              0x51
+#define AML_NAME_CHAR_R              0x52
+#define AML_NAME_CHAR_S              0x53
+#define AML_NAME_CHAR_T              0x54
+#define AML_NAME_CHAR_U              0x55
+#define AML_NAME_CHAR_V              0x56
+#define AML_NAME_CHAR_W              0x57
+#define AML_NAME_CHAR_X              0x58
+#define AML_NAME_CHAR_Y              0x59
+#define AML_NAME_CHAR_Z              0x5a
+#define AML_ROOT_CHAR                0x5c
+#define AML_PARENT_PREFIX_CHAR       0x5e
+#define AML_NAME_CHAR__              0x5f
+#define AML_LOCAL0                   0x60
+#define AML_LOCAL1                   0x61
+#define AML_LOCAL2                   0x62
+#define AML_LOCAL3                   0x63
+#define AML_LOCAL4                   0x64
+#define AML_LOCAL5                   0x65
+#define AML_LOCAL6                   0x66
+#define AML_LOCAL7                   0x67
+#define AML_ARG0                     0x68
+#define AML_ARG1                     0x69
+#define AML_ARG2                     0x6a
+#define AML_ARG3                     0x6b
+#define AML_ARG4                     0x6c
+#define AML_ARG5                     0x6d
+#define AML_ARG6                     0x6e
+#define AML_STORE_OP                 0x70
+#define AML_REF_OF_OP                0x71
+#define AML_ADD_OP                   0x72
+#define AML_CONCAT_OP                0x73
+#define AML_SUBTRACT_OP              0x74
+#define AML_INCREMENT_OP             0x75
+#define AML_DECREMENT_OP             0x76
+#define AML_MULTIPLY_OP              0x77
+#define AML_DIVIDE_OP                0x78
+#define AML_SHIFT_LEFT_OP            0x79
+#define AML_SHIFT_RIGHT_OP           0x7a
+#define AML_AND_OP                   0x7b
+#define AML_NAND_OP                  0x7c
+#define AML_OR_OP                    0x7d
+#define AML_NOR_OP                   0x7e
+#define AML_XOR_OP                   0x7f
+#define AML_NOT_OP                   0x80
+#define AML_FIND_SET_LEFT_BIT_OP     0x81
+#define AML_FIND_SET_RIGHT_BIT_OP    0x82
+#define AML_DEREF_OF_OP              0x83
+#define AML_CONCAT_RES_OP            0x84
+#define AML_MOD_OP                   0x85
+#define AML_NOTIFY_OP                0x86
+#define AML_SIZE_OF_OP               0x87
+#define AML_INDEX_OP                 0x88
+#define AML_MATCH_OP                 0x89
+#define AML_CREATE_DWORD_FIELD_OP    0x8a
+#define AML_CREATE_WORD_FIELD_OP     0x8b
+#define AML_CREATE_BYTE_FIELD_OP     0x8c
+#define AML_CREATE_BIT_FIELD_OP      0x8d
+#define AML_OBJECT_TYPE_OP           0x8e
+#define AML_CREATE_QWORD_FIELD_OP    0x8f
+#define AML_LAND_OP                  0x90
+#define AML_LOR_OP                   0x91
+#define AML_LNOT_OP                  0x92
+#define AML_LEQUAL_OP                0x93
+#define AML_LGREATER_OP              0x94
+#define AML_LLESS_OP                 0x95
+#define AML_TO_BUFFER_OP             0x96
+#define AML_TO_DEC_STRING_OP         0x97
+#define AML_TO_HEX_STRING_OP         0x98
+#define AML_TO_INTEGER_OP            0x99
+#define AML_TO_STRING_OP             0x9c
+#define AML_COPY_OBJECT_OP           0x9d
+#define AML_MID_OP                   0x9e
+#define AML_CONTINUE_OP              0x9f
+#define AML_IF_OP                    0xa0
+#define AML_ELSE_OP                  0xa1
+#define AML_WHILE_OP                 0xa2
+#define AML_NOOP_OP                  0xa3
+#define AML_RETURN_OP                0xa4
+#define AML_BREAK_OP                 0xa5
+#define AML_BREAK_POINT_OP           0xcc
+#define AML_ONES_OP                  0xff
+
+//
+// Extended OpCode
+//
+#define AML_EXT_OP                   0x5b
+
+#define AML_EXT_MUTEX_OP             0x01
+#define AML_EXT_EVENT_OP             0x02
+#define AML_EXT_COND_REF_OF_OP       0x12
+#define AML_EXT_CREATE_FIELD_OP      0x13
+#define AML_EXT_LOAD_TABLE_OP        0x1f
+#define AML_EXT_LOAD_OP              0x20
+#define AML_EXT_STALL_OP             0x21
+#define AML_EXT_SLEEP_OP             0x22
+#define AML_EXT_ACQUIRE_OP           0x23
+#define AML_EXT_SIGNAL_OP            0x24
+#define AML_EXT_WAIT_OP              0x25
+#define AML_EXT_RESET_OP             0x26
+#define AML_EXT_RELEASE_OP           0x27
+#define AML_EXT_FROM_BCD_OP          0x28
+#define AML_EXT_TO_BCD_OP            0x29
+#define AML_EXT_UNLOAD_OP            0x2a
+#define AML_EXT_REVISION_OP          0x30
+#define AML_EXT_DEBUG_OP             0x31
+#define AML_EXT_FATAL_OP             0x32
+#define AML_EXT_TIMER_OP             0x33
+#define AML_EXT_REGION_OP            0x80
+#define AML_EXT_FIELD_OP             0x81
+#define AML_EXT_DEVICE_OP            0x82
+#define AML_EXT_PROCESSOR_OP         0x83
+#define AML_EXT_POWER_RES_OP         0x84
+#define AML_EXT_THERMAL_ZONE_OP      0x85
+#define AML_EXT_INDEX_FIELD_OP       0x86
+#define AML_EXT_BANK_FIELD_OP        0x87
+#define AML_EXT_DATA_REGION_OP       0x88
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm20.h b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm20.h
new file mode 100644
index 0000000..95cd283
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm20.h
@@ -0,0 +1,1872 @@
+/** @file
+
+  Definitions for Tpm 2.0
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef    _TPM20_H
+#define    _TPM20_H
+
+///
+/// The start of TPM return codes
+///
+#define TPM_BASE                  0
+#include <IndustryStandard/Tpm12.h>
+
+#pragma pack (push, 1)
+
+typedef UINT8                    BYTE;
+typedef UINT8                    BOOL;
+
+typedef struct {
+    UINT16        size;
+    BYTE          buffer[1];
+} TPM2B;
+
+#include <IndustryStandard/Tpm20Implementation.h>
+
+#define    MAX_CAP_DATA                   (MAX_CAP_BUFFER-sizeof(TPM_CAP)-sizeof(UINT32))
+#define    MAX_CAP_ALGS                   (MAX_CAP_DATA/sizeof(TPMS_ALG_PROPERTY))
+#define    MAX_CAP_HANDLES                (MAX_CAP_DATA/sizeof(TPM_HANDLE))
+#define    MAX_CAP_CC                     (MAX_CAP_DATA/sizeof(TPM_CC))
+#define    MAX_TPM_PROPERTIES             (MAX_CAP_DATA/sizeof(TPMS_TAGGED_PROPERTY))
+#define    MAX_PCR_PROPERTIES             (MAX_CAP_DATA/sizeof(TPMS_TAGGED_PCR_SELECT))
+#define    MAX_ECC_CURVES                 (MAX_CAP_DATA/sizeof(TPM_ECC_CURVE))
+
+// Table 2 -- BaseTypes BaseTypes <I/O>
+
+// Table 3 -- DocumentationClarity Types <I/O>
+typedef UINT32    TPM_ALGORITHM_ID;
+typedef UINT32    TPM_MODIFIER_INDICATOR;
+typedef UINT32    TPM_SESSION_OFFSET;
+typedef UINT16    TPM_KEY_SIZE;
+typedef UINT16    TPM_KEY_BITS;
+typedef UINT64    TPM_SYSTEM_ADDRESS;
+typedef UINT32 TPM_SPEC;
+
+#define    TPM_SPEC_FAMILY         (TPM_SPEC)(0x322E3000)
+#define    TPM_SPEC_LEVEL          (TPM_SPEC)(00)
+#define    TPM_SPEC_VERSION        (TPM_SPEC)(88)
+#define    TPM_SPEC_YEAR           (TPM_SPEC)(2012)
+#define    TPM_SPEC_DAY_OF_YEAR    (TPM_SPEC)(65)
+
+// Table 5 -- TPM_GENERATED Constants <O,S>
+typedef UINT32 TPM_GENERATED;
+
+#define    TPM_GENERATED_VALUE    (TPM_GENERATED)(0xff544347)
+
+// Table 10 -- TPM_CC Constants <I/O,S>
+typedef UINT32 TPM_CC;
+
+#define    TPM_CC_FIRST                         (TPM_CC)(0x0000011F)
+#define    TPM_CC_PP_FIRST                      (TPM_CC)(0x0000011F)
+#define    TPM_CC_NV_UndefineSpaceSpecial       (TPM_CC)(0x0000011F)
+#define    CC_NV_UndefineSpaceSpecial       YES
+#define    TPM_CC_EvictControl                  (TPM_CC)(0x00000120)
+#define    CC_EvictControl                  YES
+#define    TPM_CC_HierarchyControl              (TPM_CC)(0x00000121)
+#define    CC_HierarchyControl              YES
+#define    TPM_CC_NV_UndefineSpace              (TPM_CC)(0x00000122)
+#define    CC_NV_UndefineSpace              YES
+#define    TPM_CC_ChangeEPS                     (TPM_CC)(0x00000124)
+#define    CC_ChangeEPS                     YES
+#define    TPM_CC_ChangePPS                     (TPM_CC)(0x00000125)
+#define    CC_ChangePPS                     YES
+#define    TPM_CC_Clear                         (TPM_CC)(0x00000126)
+#define    CC_Clear                         YES
+#define    TPM_CC_ClearControl                  (TPM_CC)(0x00000127)
+#define    CC_ClearControl                  YES
+#define    TPM_CC_ClockSet                      (TPM_CC)(0x00000128)
+#define    CC_ClockSet                      YES
+#define    TPM_CC_HierarchyChangeAuth           (TPM_CC)(0x00000129)
+#define    CC_HierarchyChangeAuth           YES
+#define    TPM_CC_NV_DefineSpace                (TPM_CC)(0x0000012A)
+#define    CC_NV_DefineSpace                YES
+#define    TPM_CC_PCR_Allocate                  (TPM_CC)(0x0000012B)
+#define    CC_PCR_Allocate                  YES
+#define    TPM_CC_PCR_SetAuthPolicy             (TPM_CC)(0x0000012C)
+#define    CC_PCR_SetAuthPolicy             YES
+#define    TPM_CC_PP_Commands                   (TPM_CC)(0x0000012D)
+#define    CC_PP_Commands                   YES
+#define    TPM_CC_SetPrimaryPolicy              (TPM_CC)(0x0000012E)
+#define    CC_SetPrimaryPolicy              YES
+#define    TPM_CC_FieldUpgradeStart             (TPM_CC)(0x0000012F)
+#define    CC_FieldUpgradeStart             NO
+#define    TPM_CC_ClockRateAdjust               (TPM_CC)(0x00000130)
+#define    CC_ClockRateAdjust               YES
+#define    TPM_CC_CreatePrimary                 (TPM_CC)(0x00000131)
+#define    CC_CreatePrimary                 YES
+#define    TPM_CC_NV_GlobalWriteLock            (TPM_CC)(0x00000132)
+#define    CC_NV_GlobalWriteLock            YES
+#define    TPM_CC_PP_LAST                       (TPM_CC)(0x00000132)
+#define    TPM_CC_GetCommandAuditDigest         (TPM_CC)(0x00000133)
+#define    CC_GetCommandAuditDigest         YES
+#define    TPM_CC_NV_Increment                  (TPM_CC)(0x00000134)
+#define    CC_NV_Increment                  YES
+#define    TPM_CC_NV_SetBits                    (TPM_CC)(0x00000135)
+#define    CC_NV_SetBits                    YES
+#define    TPM_CC_NV_Extend                     (TPM_CC)(0x00000136)
+#define    CC_NV_Extend                     YES
+#define    TPM_CC_NV_Write                      (TPM_CC)(0x00000137)
+#define    CC_NV_Write                      YES
+#define    TPM_CC_NV_WriteLock                  (TPM_CC)(0x00000138)
+#define    CC_NV_WriteLock                  YES
+#define    TPM_CC_DictionaryAttackLockReset     (TPM_CC)(0x00000139)
+#define    CC_DictionaryAttackLockReset     YES
+#define    TPM_CC_DictionaryAttackParameters    (TPM_CC)(0x0000013A)
+#define    CC_DictionaryAttackParameters    YES
+#define    TPM_CC_NV_ChangeAuth                 (TPM_CC)(0x0000013B)
+#define    CC_NV_ChangeAuth                 YES
+#define    TPM_CC_PCR_Event                     (TPM_CC)(0x0000013C)
+#define    CC_PCR_Event                     YES
+#define    TPM_CC_PCR_Reset                     (TPM_CC)(0x0000013D)
+#define    CC_PCR_Reset                     YES
+#define    TPM_CC_SequenceComplete              (TPM_CC)(0x0000013E)
+#define    CC_SequenceComplete              YES
+#define    TPM_CC_SetAlgorithmSet               (TPM_CC)(0x0000013F)
+#define    CC_SetAlgorithmSet               YES
+#define    TPM_CC_SetCommandCodeAuditStatus     (TPM_CC)(0x00000140)
+#define    CC_SetCommandCodeAuditStatus     YES
+#define    TPM_CC_FieldUpgradeData              (TPM_CC)(0x00000141)
+#define    CC_FieldUpgradeData              NO
+#define    TPM_CC_IncrementalSelfTest           (TPM_CC)(0x00000142)
+#define    CC_IncrementalSelfTest           YES
+#define    TPM_CC_SelfTest                      (TPM_CC)(0x00000143)
+#define    CC_SelfTest                      YES
+#define    TPM_CC_Startup                       (TPM_CC)(0x00000144)
+#define    CC_Startup                       YES
+#define    TPM_CC_Shutdown                      (TPM_CC)(0x00000145)
+#define    CC_Shutdown                      YES
+#define    TPM_CC_StirRandom                    (TPM_CC)(0x00000146)
+#define    CC_StirRandom                    YES
+#define    TPM_CC_ActivateCredential            (TPM_CC)(0x00000147)
+#define    CC_ActivateCredential            YES
+#define    TPM_CC_Certify                       (TPM_CC)(0x00000148)
+#define    CC_Certify                       YES
+#define    TPM_CC_PolicyNV                      (TPM_CC)(0x00000149)
+#define    CC_PolicyNV                      YES
+#define    TPM_CC_CertifyCreation               (TPM_CC)(0x0000014A)
+#define    CC_CertifyCreation               YES
+#define    TPM_CC_Duplicate                     (TPM_CC)(0x0000014B)
+#define    CC_Duplicate                     YES
+#define    TPM_CC_GetTime                       (TPM_CC)(0x0000014C)
+#define    CC_GetTime                       YES
+#define    TPM_CC_GetSessionAuditDigest         (TPM_CC)(0x0000014D)
+#define    CC_GetSessionAuditDigest         YES
+#define    TPM_CC_NV_Read                       (TPM_CC)(0x0000014E)
+#define    CC_NV_Read                       YES
+#define    TPM_CC_NV_ReadLock                   (TPM_CC)(0x0000014F)
+#define    CC_NV_ReadLock                   YES
+#define    TPM_CC_ObjectChangeAuth              (TPM_CC)(0x00000150)
+#define    CC_ObjectChangeAuth              YES
+#define    TPM_CC_PolicySecret                  (TPM_CC)(0x00000151)
+#define    CC_PolicySecret                  YES
+#define    TPM_CC_Rewrap                        (TPM_CC)(0x00000152)
+#define    CC_Rewrap                        YES
+#define    TPM_CC_Create                        (TPM_CC)(0x00000153)
+#define    CC_Create                        YES
+#define    TPM_CC_ECDH_ZGen                     (TPM_CC)(0x00000154)
+#define    CC_ECDH_ZGen                     YES
+#define    TPM_CC_HMAC                          (TPM_CC)(0x00000155)
+#define    CC_HMAC                          YES
+#define    TPM_CC_Import                        (TPM_CC)(0x00000156)
+#define    CC_Import                        YES
+#define    TPM_CC_Load                          (TPM_CC)(0x00000157)
+#define    CC_Load                          YES
+#define    TPM_CC_Quote                         (TPM_CC)(0x00000158)
+#define    CC_Quote                         YES
+#define    TPM_CC_RSA_Decrypt                   (TPM_CC)(0x00000159)
+#define    CC_RSA_Decrypt                   YES
+#define    TPM_CC_HMAC_Start                    (TPM_CC)(0x0000015B)
+#define    CC_HMAC_Start                    YES
+#define    TPM_CC_SequenceUpdate                (TPM_CC)(0x0000015C)
+#define    CC_SequenceUpdate                YES
+#define    TPM_CC_Sign                          (TPM_CC)(0x0000015D)
+#define    CC_Sign                          YES
+#define    TPM_CC_Unseal                        (TPM_CC)(0x0000015E)
+#define    CC_Unseal                        YES
+#define    TPM_CC_PolicySigned                  (TPM_CC)(0x00000160)
+#define    CC_PolicySigned                  YES
+#define    TPM_CC_ContextLoad                   (TPM_CC)(0x00000161)
+#define    CC_ContextLoad                   YES
+#define    TPM_CC_ContextSave                   (TPM_CC)(0x00000162)
+#define    CC_ContextSave                   YES
+#define    TPM_CC_ECDH_KeyGen                   (TPM_CC)(0x00000163)
+#define    CC_ECDH_KeyGen                   YES
+#define    TPM_CC_EncryptDecrypt                (TPM_CC)(0x00000164)
+#define    CC_EncryptDecrypt                YES
+#define    TPM_CC_FlushContext                  (TPM_CC)(0x00000165)
+#define    CC_FlushContext                  YES
+#define    TPM_CC_LoadExternal                  (TPM_CC)(0x00000167)
+#define    CC_LoadExternal                  YES
+#define    TPM_CC_MakeCredential                (TPM_CC)(0x00000168)
+#define    CC_MakeCredential                YES
+#define    TPM_CC_NV_ReadPublic                 (TPM_CC)(0x00000169)
+#define    CC_NV_ReadPublic                 YES
+#define    TPM_CC_PolicyAuthorize               (TPM_CC)(0x0000016A)
+#define    CC_PolicyAuthorize               YES
+#define    TPM_CC_PolicyAuthValue               (TPM_CC)(0x0000016B)
+#define    CC_PolicyAuthValue               YES
+#define    TPM_CC_PolicyCommandCode             (TPM_CC)(0x0000016C)
+#define    CC_PolicyCommandCode             YES
+#define    TPM_CC_PolicyCounterTimer            (TPM_CC)(0x0000016D)
+#define    CC_PolicyCounterTimer            YES
+#define    TPM_CC_PolicyCpHash                  (TPM_CC)(0x0000016E)
+#define    CC_PolicyCpHash                  YES
+#define    TPM_CC_PolicyLocality                (TPM_CC)(0x0000016F)
+#define    CC_PolicyLocality                YES
+#define    TPM_CC_PolicyNameHash                (TPM_CC)(0x00000170)
+#define    CC_PolicyNameHash                YES
+#define    TPM_CC_PolicyOR                      (TPM_CC)(0x00000171)
+#define    CC_PolicyOR                      YES
+#define    TPM_CC_PolicyTicket                  (TPM_CC)(0x00000172)
+#define    CC_PolicyTicket                  YES
+#define    TPM_CC_ReadPublic                    (TPM_CC)(0x00000173)
+#define    CC_ReadPublic                    YES
+#define    TPM_CC_RSA_Encrypt                   (TPM_CC)(0x00000174)
+#define    CC_RSA_Encrypt                   YES
+#define    TPM_CC_StartAuthSession              (TPM_CC)(0x00000176)
+#define    CC_StartAuthSession              YES
+#define    TPM_CC_VerifySignature               (TPM_CC)(0x00000177)
+#define    CC_VerifySignature               YES
+#define    TPM_CC_ECC_Parameters                (TPM_CC)(0x00000178)
+#define    CC_ECC_Parameters                YES
+#define    TPM_CC_FirmwareRead                  (TPM_CC)(0x00000179)
+#define    CC_FirmwareRead                  NO
+#define    TPM_CC_GetCapability                 (TPM_CC)(0x0000017A)
+#define    CC_GetCapability                 YES
+#define    TPM_CC_GetRandom                     (TPM_CC)(0x0000017B)
+#define    CC_GetRandom                     YES
+#define    TPM_CC_GetTestResult                 (TPM_CC)(0x0000017C)
+#define    CC_GetTestResult                 YES
+#define    TPM_CC_Hash                          (TPM_CC)(0x0000017D)
+#define    CC_Hash                          YES
+#define    TPM_CC_PCR_Read                      (TPM_CC)(0x0000017E)
+#define    CC_PCR_Read                      YES
+#define    TPM_CC_PolicyPCR                     (TPM_CC)(0x0000017F)
+#define    CC_PolicyPCR                     YES
+#define    TPM_CC_PolicyRestart                 (TPM_CC)(0x00000180)
+#define    CC_PolicyRestart                 YES
+#define    TPM_CC_ReadClock                     (TPM_CC)(0x00000181)
+#define    CC_ReadClock                     YES
+#define    TPM_CC_PCR_Extend                    (TPM_CC)(0x00000182)
+#define    CC_PCR_Extend                    YES
+#define    TPM_CC_PCR_SetAuthValue              (TPM_CC)(0x00000183)
+#define    CC_PCR_SetAuthValue              YES
+#define    TPM_CC_NV_Certify                    (TPM_CC)(0x00000184)
+#define    CC_NV_Certify                    YES
+#define    TPM_CC_EventSequenceComplete         (TPM_CC)(0x00000185)
+#define    CC_EventSequenceComplete         YES
+#define    TPM_CC_HashSequenceStart             (TPM_CC)(0x00000186)
+#define    CC_HashSequenceStart             YES
+#define    TPM_CC_PolicyPhysicalPresence        (TPM_CC)(0x00000187)
+#define    CC_PolicyPhysicalPresence        YES
+#define    TPM_CC_PolicyDuplicationSelect       (TPM_CC)(0x00000188)
+#define    CC_PolicyDuplicationSelect       YES
+#define    TPM_CC_PolicyGetDigest               (TPM_CC)(0x00000189)
+#define    CC_PolicyGetDigest               YES
+#define    TPM_CC_TestParms                     (TPM_CC)(0x0000018A)
+#define    CC_TestParms                     YES
+#define    TPM_CC_Commit                        (TPM_CC)(0x0000018B)
+#define    CC_Commit                        YES
+#define    TPM_CC_PolicyPassword                (TPM_CC)(0x0000018C)
+#define    CC_PolicyPassword                YES
+#define    TPM_CC_LAST                          (TPM_CC)(0x0000018C)
+
+// Table 14 -- TPM_RC Constants <O,S>
+typedef UINT32 TPM_RC;
+
+#define    TPM_RC_SUCCESS              (TPM_RC)(0x000)
+#define    TPM_RC_BAD_TAG              (TPM_RC)(0x030)
+#define    RC_VER1                     (TPM_RC)(0x100)
+#define    TPM_RC_INITIALIZE           (TPM_RC)(RC_VER1 + 0x000)
+#define    TPM_RC_FAILURE              (TPM_RC)(RC_VER1 + 0x001)
+#define    TPM_RC_SEQUENCE             (TPM_RC)(RC_VER1 + 0x003)
+#define    TPM_RC_PRIVATE              (TPM_RC)(RC_VER1 + 0x00B)
+#define    TPM_RC_HMAC                 (TPM_RC)(RC_VER1 + 0x019)
+#define    TPM_RC_DISABLED             (TPM_RC)(RC_VER1 + 0x020)
+#define    TPM_RC_EXCLUSIVE            (TPM_RC)(RC_VER1 + 0x021)
+#define    TPM_RC_ECC_CURVE            (TPM_RC)(RC_VER1 + 0x023)
+#define    TPM_RC_AUTH_TYPE            (TPM_RC)(RC_VER1 + 0x024)
+#define    TPM_RC_AUTH_MISSING         (TPM_RC)(RC_VER1 + 0x025)
+#define    TPM_RC_POLICY               (TPM_RC)(RC_VER1 + 0x026)
+#define    TPM_RC_PCR                  (TPM_RC)(RC_VER1 + 0x027)
+#define    TPM_RC_PCR_CHANGED          (TPM_RC)(RC_VER1 + 0x028)
+#define    TPM_RC_ECC_POINT            (TPM_RC)(RC_VER1 + 0x02C)
+#define    TPM_RC_UPGRADE              (TPM_RC)(RC_VER1 + 0x02D)
+#define    TPM_RC_TOO_MANY_CONTEXTS    (TPM_RC)(RC_VER1 + 0x02E)
+#define    TPM_RC_AUTH_UNAVAILABLE     (TPM_RC)(RC_VER1 + 0x02F)
+#define    TPM_RC_REBOOT               (TPM_RC)(RC_VER1 + 0x030)
+#define    TPM_RC_UNBALANCED           (TPM_RC)(RC_VER1 + 0x031)
+#define    TPM_RC_COMMAND_SIZE         (TPM_RC)(RC_VER1 + 0x042)
+#define    TPM_RC_COMMAND_CODE         (TPM_RC)(RC_VER1 + 0x043)
+#define    TPM_RC_AUTHSIZE             (TPM_RC)(RC_VER1 + 0x044)
+#define    TPM_RC_AUTH_CONTEXT         (TPM_RC)(RC_VER1 + 0x045)
+#define    TPM_RC_NV_RANGE             (TPM_RC)(RC_VER1 + 0x046)
+#define    TPM_RC_NV_SIZE              (TPM_RC)(RC_VER1 + 0x047)
+#define    TPM_RC_NV_LOCKED            (TPM_RC)(RC_VER1 + 0x048)
+#define    TPM_RC_NV_AUTHORIZATION     (TPM_RC)(RC_VER1 + 0x049)
+#define    TPM_RC_NV_UNINITIALIZED     (TPM_RC)(RC_VER1 + 0x04A)
+#define    TPM_RC_NV_SPACE             (TPM_RC)(RC_VER1 + 0x04B)
+#define    TPM_RC_NV_DEFINED           (TPM_RC)(RC_VER1 + 0x04C)
+#define    TPM_RC_BAD_CONTEXT          (TPM_RC)(RC_VER1 + 0x050)
+#define    TPM_RC_CPHASH               (TPM_RC)(RC_VER1 + 0x051)
+#define    TPM_RC_PARENT               (TPM_RC)(RC_VER1 + 0x052)
+#define    TPM_RC_NEEDS_TEST           (TPM_RC)(RC_VER1 + 0x053)
+#define    TPM_RC_NO_RESULT            (TPM_RC)(RC_VER1 + 0x054)
+#define    TPM_RC_SENSITIVE            (TPM_RC)(RC_VER1 + 0x055)
+#define    RC_MAX_FM0                  (TPM_RC)(RC_VER1 + 0x07F)
+#define    RC_FMT1                     (TPM_RC)(0x080)
+#define    TPM_RC_ASYMMETRIC           (TPM_RC)(RC_FMT1 + 0x001)
+#define    TPM_RC_ATTRIBUTES           (TPM_RC)(RC_FMT1 + 0x002)
+#define    TPM_RC_HASH                 (TPM_RC)(RC_FMT1 + 0x003)
+#define    TPM_RC_VALUE                (TPM_RC)(RC_FMT1 + 0x004)
+#define    TPM_RC_HIERARCHY            (TPM_RC)(RC_FMT1 + 0x005)
+#define    TPM_RC_KEY_SIZE             (TPM_RC)(RC_FMT1 + 0x007)
+#define    TPM_RC_MGF                  (TPM_RC)(RC_FMT1 + 0x008)
+#define    TPM_RC_MODE                 (TPM_RC)(RC_FMT1 + 0x009)
+#define    TPM_RC_TYPE                 (TPM_RC)(RC_FMT1 + 0x00A)
+#define    TPM_RC_HANDLE               (TPM_RC)(RC_FMT1 + 0x00B)
+#define    TPM_RC_KDF                  (TPM_RC)(RC_FMT1 + 0x00C)
+#define    TPM_RC_RANGE                (TPM_RC)(RC_FMT1 + 0x00D)
+#define    TPM_RC_AUTH_FAIL            (TPM_RC)(RC_FMT1 + 0x00E)
+#define    TPM_RC_NONCE                (TPM_RC)(RC_FMT1 + 0x00F)
+#define    TPM_RC_PP                   (TPM_RC)(RC_FMT1 + 0x010)
+#define    TPM_RC_SCHEME               (TPM_RC)(RC_FMT1 + 0x012)
+#define    TPM_RC_SIZE                 (TPM_RC)(RC_FMT1 + 0x015)
+#define    TPM_RC_SYMMETRIC            (TPM_RC)(RC_FMT1 + 0x016)
+#define    TPM_RC_TAG                  (TPM_RC)(RC_FMT1 + 0x017)
+#define    TPM_RC_SELECTOR             (TPM_RC)(RC_FMT1 + 0x018)
+#define    TPM_RC_INSUFFICIENT         (TPM_RC)(RC_FMT1 + 0x01A)
+#define    TPM_RC_SIGNATURE            (TPM_RC)(RC_FMT1 + 0x01B)
+#define    TPM_RC_KEY                  (TPM_RC)(RC_FMT1 + 0x01C)
+#define    TPM_RC_POLICY_FAIL          (TPM_RC)(RC_FMT1 + 0x01D)
+#define    TPM_RC_INTEGRITY            (TPM_RC)(RC_FMT1 + 0x01F)
+#define    TPM_RC_TICKET               (TPM_RC)(RC_FMT1 + 0x020)
+#define    TPM_RC_RESERVED_BITS        (TPM_RC)(RC_FMT1 + 0x021)
+#define    TPM_RC_BAD_AUTH             (TPM_RC)(RC_FMT1 + 0x022)
+#define    TPM_RC_EXPIRED              (TPM_RC)(RC_FMT1 + 0x023)
+#define    TPM_RC_POLICY_CC            (TPM_RC)(RC_FMT1 + 0x024 )
+#define    TPM_RC_BINDING              (TPM_RC)(RC_FMT1 + 0x025)
+#define    TPM_RC_CURVE                (TPM_RC)(RC_FMT1 + 0x026)
+#define    RC_WARN                     (TPM_RC)(0x900)
+#define    TPM_RC_CONTEXT_GAP          (TPM_RC)(RC_WARN + 0x001)
+#define    TPM_RC_OBJECT_MEMORY        (TPM_RC)(RC_WARN + 0x002)
+#define    TPM_RC_SESSION_MEMORY       (TPM_RC)(RC_WARN + 0x003)
+#define    TPM_RC_MEMORY               (TPM_RC)(RC_WARN + 0x004)
+#define    TPM_RC_SESSION_HANDLES      (TPM_RC)(RC_WARN + 0x005)
+#define    TPM_RC_OBJECT_HANDLES       (TPM_RC)(RC_WARN + 0x006)
+#define    TPM_RC_LOCALITY             (TPM_RC)(RC_WARN + 0x007)
+#define    TPM_RC_YIELDED              (TPM_RC)(RC_WARN + 0x008)
+#define    TPM_RC_CANCELLED            (TPM_RC)(RC_WARN + 0x009)
+#define    TPM_RC_TESTING              (TPM_RC)(RC_WARN + 0x00A)
+#define    TPM_RC_REFERENCE_H0         (TPM_RC)(RC_WARN + 0x010)
+#define    TPM_RC_REFERENCE_H1         (TPM_RC)(RC_WARN + 0x011)
+#define    TPM_RC_REFERENCE_H2         (TPM_RC)(RC_WARN + 0x012)
+#define    TPM_RC_REFERENCE_H3         (TPM_RC)(RC_WARN + 0x013)
+#define    TPM_RC_REFERENCE_H4         (TPM_RC)(RC_WARN + 0x014)
+#define    TPM_RC_REFERENCE_H5         (TPM_RC)(RC_WARN + 0x015)
+#define    TPM_RC_REFERENCE_H6         (TPM_RC)(RC_WARN + 0x016)
+#define    TPM_RC_REFERENCE_S0         (TPM_RC)(RC_WARN + 0x018)
+#define    TPM_RC_REFERENCE_S1         (TPM_RC)(RC_WARN + 0x019)
+#define    TPM_RC_REFERENCE_S2         (TPM_RC)(RC_WARN + 0x01A)
+#define    TPM_RC_REFERENCE_S3         (TPM_RC)(RC_WARN + 0x01B)
+#define    TPM_RC_REFERENCE_S4         (TPM_RC)(RC_WARN + 0x01C)
+#define    TPM_RC_REFERENCE_S5         (TPM_RC)(RC_WARN + 0x01D)
+#define    TPM_RC_REFERENCE_S6         (TPM_RC)(RC_WARN + 0x01E)
+#define    TPM_RC_NV_RATE              (TPM_RC)(RC_WARN + 0x020)
+#define    TPM_RC_LOCKOUT              (TPM_RC)(RC_WARN + 0x021)
+#define    TPM_RC_RETRY                (TPM_RC)(RC_WARN + 0x022)
+#define    TPM_RC_NV_UNAVAILABLE       (TPM_RC)(RC_WARN + 0x023)
+#define    TPM_RC_NOT_USED             (TPM_RC)(RC_WARN + 0x7F)
+#define    TPM_RC_H                    (TPM_RC)(0x000)
+#define    TPM_RC_P                    (TPM_RC)(0x040)
+#define    TPM_RC_S                    (TPM_RC)(0x800)
+#define    TPM_RC_1                    (TPM_RC)(0x100)
+#define    TPM_RC_2                    (TPM_RC)(0x200)
+#define    TPM_RC_3                    (TPM_RC)(0x300)
+#define    TPM_RC_4                    (TPM_RC)(0x400)
+#define    TPM_RC_5                    (TPM_RC)(0x500)
+#define    TPM_RC_6                    (TPM_RC)(0x600)
+#define    TPM_RC_7                    (TPM_RC)(0x700)
+#define    TPM_RC_8                    (TPM_RC)(0x800)
+#define    TPM_RC_9                    (TPM_RC)(0x900)
+#define    TPM_RC_A                    (TPM_RC)(0xA00)
+#define    TPM_RC_B                    (TPM_RC)(0xB00)
+#define    TPM_RC_C                    (TPM_RC)(0xC00)
+#define    TPM_RC_D                    (TPM_RC)(0xD00)
+#define    TPM_RC_E                    (TPM_RC)(0xE00)
+#define    TPM_RC_F                    (TPM_RC)(0xF00)
+#define    TPM_RC_N_MASK               (TPM_RC)(0xF00)
+
+// Table 15 -- TPM_CLOCK_ADJUST Constants <I>
+typedef INT8 TPM_CLOCK_ADJUST;
+
+#define    TPM_CLOCK_COARSE_SLOWER    (TPM_CLOCK_ADJUST)(-3)
+#define    TPM_CLOCK_MEDIUM_SLOWER    (TPM_CLOCK_ADJUST)(-2)
+#define    TPM_CLOCK_FINE_SLOWER      (TPM_CLOCK_ADJUST)(-1)
+#define    TPM_CLOCK_NO_CHANGE        (TPM_CLOCK_ADJUST)(0)
+#define    TPM_CLOCK_FINE_FASTER      (TPM_CLOCK_ADJUST)(1)
+#define    TPM_CLOCK_MEDIUM_FASTER    (TPM_CLOCK_ADJUST)(2)
+#define    TPM_CLOCK_COARSE_FASTER    (TPM_CLOCK_ADJUST)(3)
+
+// Table 16 -- TPM_EO Constants <I/O>
+typedef UINT16 TPM_EO;
+
+#define    TPM_EO_EQ             (TPM_EO)(0x0000)
+#define    TPM_EO_NEQ            (TPM_EO)(0x0001)
+#define    TPM_EO_SIGNED_GT      (TPM_EO)(0x0002)
+#define    TPM_EO_UNSIGNED_GT    (TPM_EO)(0x0003)
+#define    TPM_EO_SIGNED_LT      (TPM_EO)(0x0004)
+#define    TPM_EO_UNSIGNED_LT    (TPM_EO)(0x0005)
+#define    TPM_EO_SIGNED_GE      (TPM_EO)(0x0006)
+#define    TPM_EO_UNSIGNED_GE    (TPM_EO)(0x0007)
+#define    TPM_EO_SIGNED_LE      (TPM_EO)(0x0008)
+#define    TPM_EO_UNSIGNED_LE    (TPM_EO)(0x0009)
+#define    TPM_EO_BITSET         (TPM_EO)(0x000A)
+#define    TPM_EO_BITCLEAR       (TPM_EO)(0x000B)
+
+// Table 17 -- TPM_ST Constants <I/O,S>
+typedef UINT16 TPM_ST;
+
+#define    TPM_ST_RSP_COMMAND             (TPM_ST)(0x00C4)
+#define    TPM_ST_NULL                    (TPM_ST)(0X8000)
+#define    TPM_ST_NO_SESSIONS             (TPM_ST)(0x8001)
+#define    TPM_ST_SESSIONS                (TPM_ST)(0x8002)
+#define    TPM_ST_ATTEST_COMMAND_AUDIT    (TPM_ST)(0x8015)
+#define    TPM_ST_ATTEST_SESSION_AUDIT    (TPM_ST)(0x8016)
+#define    TPM_ST_ATTEST_CERTIFY          (TPM_ST)(0x8017)
+#define    TPM_ST_ATTEST_QUOTE            (TPM_ST)(0x8018)
+#define    TPM_ST_ATTEST_TIME             (TPM_ST)(0x8019)
+#define    TPM_ST_ATTEST_CREATION         (TPM_ST)(0x801A)
+#define    TPM_ST_ATTEST_NV               (TPM_ST)(0x801B)
+#define    TPM_ST_CREATION                (TPM_ST)(0x8021)
+#define    TPM_ST_VERIFIED                (TPM_ST)(0x8022)
+#define    TPM_ST_AUTH_SECRET             (TPM_ST)(0x8023)
+#define    TPM_ST_HASHCHECK               (TPM_ST)(0x8024)
+#define    TPM_ST_AUTH_SIGNED             (TPM_ST)(0x8025)
+#define    TPM_ST_FU_MANIFEST             (TPM_ST)(0x8029)
+
+// Table 18 -- TPM_SU Constants <I>
+typedef UINT16 TPM_SU;
+
+#define    TPM_SU_CLEAR     (TPM_SU)(0x0000)
+#define    TPM_SU_STATE     (TPM_SU)(0x0001)
+
+// Table 19 -- TPM_SE Constants <I>
+typedef UINT8 TPM_SE;
+
+#define    TPM_SE_HMAC      (TPM_SE)(0x00)
+#define    TPM_SE_POLICY    (TPM_SE)(0x01)
+#define    TPM_SE_TRIAL     (TPM_SE)(0x03)
+
+// Table 20 -- TPM_CAP Constants <I/O,S>
+typedef UINT32 TPM_CAP;
+
+#define    TPM_CAP_FIRST              (TPM_CAP)(0x00000000)
+#define    TPM_CAP_ALGS               (TPM_CAP)(0x00000000)
+#define    TPM_CAP_HANDLES            (TPM_CAP)(0x00000001)
+#define    TPM_CAP_COMMANDS           (TPM_CAP)(0x00000002)
+#define    TPM_CAP_PP_COMMANDS        (TPM_CAP)(0x00000003)
+#define    TPM_CAP_AUDIT_COMMANDS     (TPM_CAP)(0x00000004)
+#define    TPM_CAP_PCRS               (TPM_CAP)(0x00000005)
+#define    TPM_CAP_TPM_PROPERTIES     (TPM_CAP)(0x00000006)
+#define    TPM_CAP_PCR_PROPERTIES     (TPM_CAP)(0x00000007)
+#define    TPM_CAP_ECC_CURVES         (TPM_CAP)(0x00000008)
+#define    TPM_CAP_LAST               (TPM_CAP)(0x00000008)
+#define    TPM_CAP_VENDOR_PROPERTY    (TPM_CAP)(0x00000100)
+
+// Table 21 -- TPM_PT Constants <I/O,S>
+typedef UINT32 TPM_PT;
+
+#define    TPM_PT_NONE                   (TPM_PT)(0x00000000)
+#define    PT_GROUP                      (TPM_PT)(0x00000100)
+#define    PT_FIXED                      (TPM_PT)(PT_GROUP * 1)
+#define    TPM_PT_FAMILY_INDICATOR       (TPM_PT)(PT_FIXED + 0)
+#define    TPM_PT_LEVEL                  (TPM_PT)(PT_FIXED + 1)
+#define    TPM_PT_REVISION               (TPM_PT)(PT_FIXED + 2)
+#define    TPM_PT_DAY_OF_YEAR            (TPM_PT)(PT_FIXED + 3)
+#define    TPM_PT_YEAR                   (TPM_PT)(PT_FIXED + 4)
+#define    TPM_PT_MANUFACTURER           (TPM_PT)(PT_FIXED + 5)
+#define    TPM_PT_VENDOR_STRING_1        (TPM_PT)(PT_FIXED + 6)
+#define    TPM_PT_VENDOR_STRING_2        (TPM_PT)(PT_FIXED + 7)
+#define    TPM_PT_VENDOR_STRING_3        (TPM_PT)(PT_FIXED + 8)
+#define    TPM_PT_VENDOR_STRING_4        (TPM_PT)(PT_FIXED + 9)
+#define    TPM_PT_VENDOR_TPM_TYPE        (TPM_PT)(PT_FIXED + 10)
+#define    TPM_PT_FIRMWARE_VERSION_1     (TPM_PT)(PT_FIXED + 11)
+#define    TPM_PT_FIRMWARE_VERSION_2     (TPM_PT)(PT_FIXED + 12)
+#define    TPM_PT_INPUT_BUFFER           (TPM_PT)(PT_FIXED + 13)
+#define    TPM_PT_HR_TRANSIENT_MIN       (TPM_PT)(PT_FIXED + 14)
+#define    TPM_PT_HR_PERSISTENT_MIN      (TPM_PT)(PT_FIXED + 15)
+#define    TPM_PT_HR_LOADED_MIN          (TPM_PT)(PT_FIXED + 16)
+#define    TPM_PT_ACTIVE_SESSIONS_MAX    (TPM_PT)(PT_FIXED + 17)
+#define    TPM_PT_PCR_COUNT              (TPM_PT)(PT_FIXED + 18)
+#define    TPM_PT_PCR_SELECT_MIN         (TPM_PT)(PT_FIXED + 19)
+#define    TPM_PT_CONTEXT_GAP_MAX        (TPM_PT)(PT_FIXED + 20)
+#define    TPM_PT_NV_COUNTERS_MAX        (TPM_PT)(PT_FIXED + 22)
+#define    TPM_PT_NV_INDEX_MAX           (TPM_PT)(PT_FIXED + 23)
+#define    TPM_PT_MEMORY                 (TPM_PT)(PT_FIXED + 24)
+#define    TPM_PT_CLOCK_UPDATE           (TPM_PT)(PT_FIXED + 25)
+#define    TPM_PT_CONTEXT_HASH           (TPM_PT)(PT_FIXED + 26)
+#define    TPM_PT_CONTEXT_SYM            (TPM_PT)(PT_FIXED + 27)
+#define    TPM_PT_CONTEXT_SYM_SIZE       (TPM_PT)(PT_FIXED + 28)
+#define    TPM_PT_ORDERLY_COUNT          (TPM_PT)(PT_FIXED + 29)
+#define    TPM_PT_MAX_COMMAND_SIZE       (TPM_PT)(PT_FIXED + 30)
+#define    TPM_PT_MAX_RESPONSE_SIZE      (TPM_PT)(PT_FIXED + 31)
+#define    TPM_PT_MAX_DIGEST             (TPM_PT)(PT_FIXED + 32)
+#define    TPM_PT_MAX_OBJECT_CONTEXT     (TPM_PT)(PT_FIXED + 33)
+#define    TPM_PT_MAX_SESSION_CONTEXT    (TPM_PT)(PT_FIXED + 34)
+#define    TPM_PT_PS_FAMILY_INDICATOR    (TPM_PT)(PT_FIXED + 35)
+#define    TPM_PT_PS_LEVEL               (TPM_PT)(PT_FIXED + 36)
+#define    TPM_PT_PS_REVISION            (TPM_PT)(PT_FIXED + 37)
+#define    TPM_PT_PS_DAY_OF_YEAR         (TPM_PT)(PT_FIXED + 38)
+#define    TPM_PT_PS_YEAR                (TPM_PT)(PT_FIXED + 39)
+#define    TPM_PT_SPLIT_MAX              (TPM_PT)(PT_FIXED + 40)
+#define    TPM_PT_TOTAL_COMMANDS         (TPM_PT)(PT_FIXED + 41)
+#define    TPM_PT_LIBRARY_COMMANDS       (TPM_PT)(PT_FIXED + 42)
+#define    TPM_PT_VENDOR_COMMANDS        (TPM_PT)(PT_FIXED + 43)
+#define    PT_VAR                        (TPM_PT)(PT_GROUP * 2)
+#define    TPM_PT_PERMANENT              (TPM_PT)(PT_VAR + 0)
+#define    TPM_PT_STARTUP_CLEAR          (TPM_PT)(PT_VAR + 1)
+#define    TPM_PT_HR_NV_INDEX            (TPM_PT)(PT_VAR + 2)
+#define    TPM_PT_HR_LOADED              (TPM_PT)(PT_VAR + 3)
+#define    TPM_PT_HR_LOADED_AVAIL        (TPM_PT)(PT_VAR + 4)
+#define    TPM_PT_HR_ACTIVE              (TPM_PT)(PT_VAR + 5)
+#define    TPM_PT_HR_ACTIVE_AVAIL        (TPM_PT)(PT_VAR + 6)
+#define    TPM_PT_HR_TRANSIENT_AVAIL     (TPM_PT)(PT_VAR + 7)
+#define    TPM_PT_HR_PERSISTENT          (TPM_PT)(PT_VAR + 8)
+#define    TPM_PT_HR_PERSISTENT_AVAIL    (TPM_PT)(PT_VAR + 9)
+#define    TPM_PT_NV_COUNTERS            (TPM_PT)(PT_VAR + 10)
+#define    TPM_PT_NV_COUNTERS_AVAIL      (TPM_PT)(PT_VAR + 11)
+#define    TPM_PT_ALGORITHM_SET          (TPM_PT)(PT_VAR + 12)
+#define    TPM_PT_LOADED_CURVES          (TPM_PT)(PT_VAR + 13)
+#define    TPM_PT_LOCKOUT_COUNTER        (TPM_PT)(PT_VAR + 14)
+#define    TPM_PT_MAX_AUTH_FAIL          (TPM_PT)(PT_VAR + 15)
+#define    TPM_PT_LOCKOUT_INTERVAL       (TPM_PT)(PT_VAR + 16)
+#define    TPM_PT_LOCKOUT_RECOVERY       (TPM_PT)(PT_VAR + 17)
+#define    TPM_PT_NV_WRITE_RECOVERY      (TPM_PT)(PT_VAR + 18)
+#define    TPM_PT_AUDIT_COUNTER_0        (TPM_PT)(PT_VAR + 19)
+#define    TPM_PT_AUDIT_COUNTER_1        (TPM_PT)(PT_VAR + 20)
+
+// Table 22 -- TPM_PT_PCR Constants <I/O,S>
+typedef UINT32 TPM_PT_PCR;
+
+#define    TPM_PT_PCR_FIRST         (TPM_PT_PCR)(0x00000000)
+#define    TPM_PT_PCR_SAVE          (TPM_PT_PCR)(0x00000000)
+#define    TPM_PT_PCR_EXTEND_L0     (TPM_PT_PCR)(0x00000001)
+#define    TPM_PT_PCR_RESET_L0      (TPM_PT_PCR)(0x00000002)
+#define    TPM_PT_PCR_EXTEND_L1     (TPM_PT_PCR)(0x00000003)
+#define    TPM_PT_PCR_RESET_L1      (TPM_PT_PCR)(0x00000004)
+#define    TPM_PT_PCR_EXTEND_L2     (TPM_PT_PCR)(0x00000005)
+#define    TPM_PT_PCR_RESET_L2      (TPM_PT_PCR)(0x00000006)
+#define    TPM_PT_PCR_EXTEND_L3     (TPM_PT_PCR)(0x00000007)
+#define    TPM_PT_PCR_RESET_L3      (TPM_PT_PCR)(0x00000008)
+#define    TPM_PT_PCR_EXTEND_L4     (TPM_PT_PCR)(0x00000009)
+#define    TPM_PT_PCR_RESET_L4      (TPM_PT_PCR)(0x0000000A)
+#define    TPM_PT_PCR_DRTM_RESET    (TPM_PT_PCR)(0x0000000B)
+#define    TPM_PT_PCR_POLICY        (TPM_PT_PCR)(0x0000000C)
+#define    TPM_PT_PCR_AUTH          (TPM_PT_PCR)(0x0000000D)
+#define    TPM_PT_PCR_LAST          (TPM_PT_PCR)(0x0000000D)
+
+// Table 23 -- TPM_PS Constants <O,S>
+typedef UINT32 TPM_PS;
+
+#define    TPM_PS_MAIN              (TPM_PS)(0x00000000)
+#define    TPM_PS_PC                (TPM_PS)(0x00000001)
+#define    TPM_PS_PDA               (TPM_PS)(0x00000002)
+#define    TPM_PS_CELL_PHONE        (TPM_PS)(0x00000003)
+#define    TPM_PS_SERVER            (TPM_PS)(0x00000004)
+#define    TPM_PS_PERIPHERAL        (TPM_PS)(0x00000005)
+#define    TPM_PS_TSS               (TPM_PS)(0x00000006)
+#define    TPM_PS_STORAGE           (TPM_PS)(0x00000007)
+#define    TPM_PS_AUTHENTICATION    (TPM_PS)(0x00000008)
+#define    TPM_PS_EMBEDDED          (TPM_PS)(0x00000009)
+#define    TPM_PS_HARDCOPY          (TPM_PS)(0x0000000A)
+#define    TPM_PS_INFRASTRUCTURE    (TPM_PS)(0x0000000B)
+#define    TPM_PS_VIRTUALIZATION    (TPM_PS)(0x0000000C)
+#define    TPM_PS_TNC               (TPM_PS)(0x0000000D)
+#define    TPM_PS_MULTI_TENANT      (TPM_PS)(0x0000000E)
+#define    TPM_PS_TC                (TPM_PS)(0x0000000F)
+
+// Table 24 -- Handles Types <I/O>
+typedef UINT32    TPM_HANDLE;
+typedef UINT8 TPM_HT;
+
+#define    TPM_HT_PCR               (TPM_HT)(0x00)
+#define    TPM_HT_NV_INDEX          (TPM_HT)(0x01)
+#define    TPM_HT_HMAC_SESSION      (TPM_HT)(0x02)
+#define    TPM_HT_LOADED_SESSION    (TPM_HT)(0x02)
+#define    TPM_HT_POLICY_SESSION    (TPM_HT)(0x03)
+#define    TPM_HT_ACTIVE_SESSION    (TPM_HT)(0x03)
+#define    TPM_HT_PERMANENT         (TPM_HT)(0x40)
+#define    TPM_HT_TRANSIENT         (TPM_HT)(0x80)
+#define    TPM_HT_PERSISTENT        (TPM_HT)(0x81)
+
+// Table 26 -- TPM_RH Constants <I,S>
+typedef UINT32 TPM_RH;
+
+#define    TPM_RH_FIRST          (TPM_RH)(0x40000000)
+#define    TPM_RH_SRK            (TPM_RH)(0x40000000)
+#define    TPM_RH_OWNER          (TPM_RH)(0x40000001)
+#define    TPM_RH_REVOKE         (TPM_RH)(0x40000002)
+#define    TPM_RH_TRANSPORT      (TPM_RH)(0x40000003)
+#define    TPM_RH_OPERATOR       (TPM_RH)(0x40000004)
+#define    TPM_RH_ADMIN          (TPM_RH)(0x40000005)
+#define    TPM_RH_EK             (TPM_RH)(0x40000006)
+#define    TPM_RH_NULL           (TPM_RH)(0x40000007)
+#define    TPM_RH_UNASSIGNED     (TPM_RH)(0x40000008)
+#define    TPM_RH_PW             (TPM_RH)(0x40000009)
+#define    TPM_RS_PW             (TPM_RH)(0x40000009)
+#define    TPM_RH_LOCKOUT        (TPM_RH)(0x4000000A)
+#define    TPM_RH_ENDORSEMENT    (TPM_RH)(0x4000000B)
+#define    TPM_RH_PLATFORM       (TPM_RH)(0x4000000C)
+#define    TPM_RH_LAST           (TPM_RH)(0x4000000C)
+#define    TPM_RH_PCR0           (TPM_RH)(0x00000000)
+
+// Table 27 -- TPM_HC Constants <I,S>
+typedef TPM_HANDLE TPM_HC;
+
+#define    HR_HANDLE_MASK          (TPM_HC)(0x00FFFFFF)
+#define    HR_RANGE_MASK           (TPM_HC)(0xFF000000)
+#define    HR_SHIFT                (TPM_HC)(24)
+#define    HR_PCR                  (TPM_HC)((TPM_HC)TPM_HT_PCR << HR_SHIFT)
+#define    HR_HMAC_SESSION         (TPM_HC)((TPM_HC)TPM_HT_HMAC_SESSION << HR_SHIFT)
+#define    HR_POLICY_SESSION       (TPM_HC)((TPM_HC)TPM_HT_POLICY_SESSION << HR_SHIFT)
+#define    HR_TRANSIENT            (TPM_HC)((TPM_HC)TPM_HT_TRANSIENT << HR_SHIFT)
+#define    HR_PERSISTENT           (TPM_HC)((TPM_HC)TPM_HT_PERSISTENT << HR_SHIFT)
+#define    HR_NV_INDEX             (TPM_HC)((TPM_HC)TPM_HT_NV_INDEX << HR_SHIFT)
+#define    HR_PERMANENT            (TPM_HC)((TPM_HC)TPM_HT_PERMANENT << HR_SHIFT)
+#define    PCR_FIRST               (TPM_HC)(TPM_RH_PCR0)
+#define    PCR_LAST                (TPM_HC)(PCR_FIRST + IMPLEMENTATION_PCR-1)
+#define    HMAC_SESSION_FIRST      (TPM_HC)(HR_HMAC_SESSION + 0)
+#define    HMAC_SESSION_LAST       (TPM_HC)(HMAC_SESSION_FIRST+MAX_ACTIVE_SESSIONS-1)
+#define    LOADED_SESSION_FIRST    (TPM_HC)(HMAC_SESSION_FIRST)
+#define    LOADED_SESSION_LAST     (TPM_HC)(HMAC_SESSION_LAST)
+#define    POLICY_SESSION_FIRST    (TPM_HC)(HR_POLICY_SESSION + 0)
+#define    POLICY_SESSION_LAST     (TPM_HC)(POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS-1)
+#define    TRANSIENT_FIRST         (TPM_HC)(HR_TRANSIENT +  0)
+#define    ACTIVE_SESSION_FIRST    (TPM_HC)(POLICY_SESSION_FIRST)
+#define    ACTIVE_SESSION_LAST     (TPM_HC)(POLICY_SESSION_LAST)
+#define    TRANSIENT_LAST          (TPM_HC)(TRANSIENT_FIRST+MAX_LOADED_OBJECTS-1)
+#define    PERSISTENT_FIRST        (TPM_HC)(HR_PERSISTENT  +  0)
+#define    PERSISTENT_LAST         (TPM_HC)(PERSISTENT_FIRST + 0x00FFFFFF)
+#define    PLATFORM_PERSISTENT     (TPM_HC)(PERSISTENT_FIRST + 0x00800000)
+#define    NV_INDEX_FIRST          (TPM_HC)(HR_NV_INDEX + 0)
+#define    NV_INDEX_LAST           (TPM_HC)(NV_INDEX_FIRST + 0x00FFFFFF)
+#define    PERMANENT_FIRST         (TPM_HC)(TPM_RH_FIRST)
+#define    PERMANENT_LAST          (TPM_HC)(TPM_RH_LAST)
+
+// Table 28 -- TPMA_ALGORITHM Bits <I/O>
+typedef struct {
+    unsigned int asymmetric : 1;
+    unsigned int symmetric  : 1;
+    unsigned int hash       : 1;
+    unsigned int object     : 1;
+    unsigned int reserved5  : 4;
+    unsigned int signing    : 1;
+    unsigned int encrypting : 1;
+    unsigned int method     : 1;
+    unsigned int reserved9  : 21;
+} TPMA_ALGORITHM ;
+
+// Table 29 -- TPMA_OBJECT Bits <I/O>
+typedef struct {
+    unsigned int reserved1           : 1;
+    unsigned int fixedTPM            : 1;
+    unsigned int stClear             : 1;
+    unsigned int reserved4           : 1;
+    unsigned int fixedParent         : 1;
+    unsigned int sensitiveDataOrigin : 1;
+    unsigned int userWithAuth        : 1;
+    unsigned int adminWithPolicy     : 1;
+    unsigned int Pad9                : 1;    //Inserted extra pad
+    unsigned int reserved9           : 1;
+    unsigned int noDA                : 1;
+    unsigned int reserved11          : 5;
+    unsigned int restricted          : 1;
+    unsigned int decrypt             : 1;
+    unsigned int sign                : 1;
+    unsigned int Pad15               : 9;    //Inserted extra pad
+    unsigned int softwareUse         : 4;
+} TPMA_OBJECT ;
+
+// Table 30 -- TPMA_SESSION Bits <I/O>
+typedef struct {
+    unsigned int continueSession : 1;
+    unsigned int auditExclusive  : 1;
+    unsigned int auditReset      : 1;
+    unsigned int reserved4       : 2;
+    unsigned int decrypt         : 1;
+    unsigned int encrypt         : 1;
+    unsigned int audit           : 1;
+} TPMA_SESSION ;
+
+// Table 31 -- TPMA_LOCALITY Bits <I/O>
+//
+// BUGBUG: Use low case here to resolve conflict
+//
+typedef struct {
+    unsigned int locZero  : 1;
+    unsigned int locOne   : 1;
+    unsigned int locTwo   : 1;
+    unsigned int locThree : 1;
+    unsigned int locFour  : 1;
+    unsigned int reserved6     : 3;
+} TPMA_LOCALITY ;
+
+// Table 32 -- TPMA_PERMANENT Bits <O,S>
+typedef struct {
+    unsigned int ownerAuthSet       : 1;
+    unsigned int endorsementAuthSet : 1;
+    unsigned int lockoutAuthSet     : 1;
+    unsigned int reserved4          : 5;
+    unsigned int disableClear       : 1;
+    unsigned int inLockout          : 1;
+    unsigned int tpmGeneratedEPS    : 1;
+    unsigned int reserved8          : 21;
+} TPMA_PERMANENT ;
+
+// Table 33 -- TPMA_STARTUP_CLEAR Bits <O,S>
+typedef struct {
+    unsigned int phEnable  : 1;
+    unsigned int shEnable  : 1;
+    unsigned int ehEnable  : 1;
+    unsigned int reserved4 : 28;
+    unsigned int orderly   : 1;
+} TPMA_STARTUP_CLEAR ;
+
+// Table 34 -- TPMA_MEMORY Bits <O,S>
+typedef struct {
+    unsigned int sharedRAM         : 1;
+    unsigned int sharedNV          : 1;
+    unsigned int objectCopiedToRam : 1;
+    unsigned int reserved4         : 29;
+} TPMA_MEMORY ;
+
+// Table 35 -- TPMA_CC Bits <O,S>
+typedef struct {
+    unsigned int commandIndex : 16;
+    unsigned int reserved2    : 6;
+    unsigned int nv           : 1;
+    unsigned int extensive    : 1;
+    unsigned int flushed      : 1;
+    unsigned int cHandles     : 3;
+    unsigned int rHandle      : 1;
+    unsigned int V            : 1;
+    unsigned int reserved9    : 2;
+} TPMA_CC ;
+
+// Table 36 -- TPMI_YES_NO Type <I/O>
+typedef BYTE TPMI_YES_NO;
+
+// Table 37 -- TPMI_DH_OBJECT Type <I/O>
+typedef TPM_HANDLE TPMI_DH_OBJECT;
+
+// Table 38 -- TPMI_DH_PERSISTENT Type <I/O>
+typedef TPM_HANDLE TPMI_DH_PERSISTENT;
+
+// Table 39 -- TPMI_DH_ENTITY Type <I>
+typedef TPM_HANDLE TPMI_DH_ENTITY;
+
+// Table 40 -- TPMI_DH_PCR Type <I>
+typedef TPM_HANDLE TPMI_DH_PCR;
+
+// Table 41 -- TPMI_SH_AUTH_SESSION Type <I/O>
+typedef TPM_HANDLE TPMI_SH_AUTH_SESSION;
+
+// Table 42 -- TPMI_SH_HMAC Type <I/O>
+typedef TPM_HANDLE TPMI_SH_HMAC;
+
+// Table 43 -- TPMI_SH_POLICY Type <I/O>
+typedef TPM_HANDLE TPMI_SH_POLICY;
+
+// Table 44 -- TPMI_DH_CONTEXT Type <I/O>
+typedef TPM_HANDLE TPMI_DH_CONTEXT;
+
+// Table 45 -- TPMI_RH_HIERARCHY Type <I/O>
+typedef TPM_HANDLE TPMI_RH_HIERARCHY;
+
+// Table 46 -- TPMI_RH_HIERARCHY_AUTH Type <I>
+typedef TPM_HANDLE TPMI_RH_HIERARCHY_AUTH;
+
+// Table 47 -- TPMI_RH_PLATFORM Type <I>
+typedef TPM_HANDLE TPMI_RH_PLATFORM;
+
+// Table 48 -- TPMI_RH_OWNER Type <I>
+typedef TPM_HANDLE TPMI_RH_OWNER;
+
+// Table 49 -- TPMI_RH_ENDORSEMENT Type <I>
+typedef TPM_HANDLE TPMI_RH_ENDORSEMENT;
+
+// Table 50 -- TPMI_RH_PROVISION Type <I>
+typedef TPM_HANDLE TPMI_RH_PROVISION;
+
+// Table 51 -- TPMI_RH_CLEAR Type <I>
+typedef TPM_HANDLE TPMI_RH_CLEAR;
+
+// Table 52 -- TPMI_RH_NV_AUTH Type <I>
+typedef TPM_HANDLE TPMI_RH_NV_AUTH;
+
+// Table 53 -- TPMI_RH_LOCKOUT Type <I>
+typedef TPM_HANDLE TPMI_RH_LOCKOUT;
+
+// Table 54 -- TPMI_RH_NV_INDEX Type <I/O>
+typedef TPM_HANDLE TPMI_RH_NV_INDEX;
+
+// Table 55 -- TPMI_ALG_HASH Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_HASH;
+
+// Table 56 -- TPMI_ALG_ASYM Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_ASYM;
+
+// Table 57 -- TPMI_ALG_SYM Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_SYM;
+
+// Table 58 -- TPMI_ALG_SYM_OBJECT Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_SYM_OBJECT;
+
+// Table 59 -- TPMI_ALG_SYM_MODE Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_SYM_MODE;
+
+// Table 60 -- TPMI_ALG_KDF Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_KDF;
+
+// Table 61 -- TPMI_ALG_SIG_SCHEME Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_SIG_SCHEME;
+
+// Table 62 -- TPMI_ST_COMMAND_TAG Type <I/O>
+typedef TPM_ST TPMI_ST_COMMAND_TAG;
+
+// Table 63 -- TPMS_ALGORITHM_DESCRIPTION Structure <O,S>
+typedef struct {
+    TPM_ALG_ID        alg;
+    TPMA_ALGORITHM    attributes;
+} TPMS_ALGORITHM_DESCRIPTION;
+
+// Table 64 -- TPMU_HA Union <I/O,S>
+typedef union {
+    BYTE  sha1[SHA1_DIGEST_SIZE];
+    BYTE  sha256[SHA256_DIGEST_SIZE];
+    BYTE  sm3_256[SM3_256_DIGEST_SIZE];
+    BYTE  sha384[SHA384_DIGEST_SIZE];
+    BYTE  sha512[SHA512_DIGEST_SIZE];
+    BYTE  whirlpool[WHIRLPOOL512_DIGEST_SIZE];
+} TPMU_HA ;
+
+// Table 65 -- TPMT_HA Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+    TPMU_HA          digest;
+} TPMT_HA;
+
+// Table 66 -- TPM2B_DIGEST Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[sizeof(TPMU_HA)];
+} DIGEST_2B;
+
+typedef union {
+    DIGEST_2B    t;
+    TPM2B        b;
+} TPM2B_DIGEST;
+
+// Table 67 -- TPM2B_DATA Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[sizeof(TPMT_HA)];
+} DATA_2B;
+
+typedef union {
+    DATA_2B    t;
+    TPM2B      b;
+} TPM2B_DATA;
+
+// Table 68 -- TPM2B_NONCE Types <I/O>
+typedef TPM2B_DIGEST    TPM2B_NONCE;
+
+// Table 69 -- TPM2B_AUTH Types <I/O>
+typedef TPM2B_DIGEST    TPM2B_AUTH;
+
+// Table 70 -- TPM2B_OPERAND Types <I/O>
+typedef TPM2B_DIGEST    TPM2B_OPERAND;
+
+// Table 71 -- TPM2B_EVENT Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[1024];
+} EVENT_2B;
+
+typedef union {
+    EVENT_2B    t;
+    TPM2B       b;
+} TPM2B_EVENT;
+
+// Table 72 -- TPM2B_MAX_BUFFER Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_DIGEST_BUFFER];
+} MAX_BUFFER_2B;
+
+typedef union {
+    MAX_BUFFER_2B    t;
+    TPM2B            b;
+} TPM2B_MAX_BUFFER;
+
+// Table 73 -- TPM2B_TIMEOUT Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[sizeof(UINT64)];
+} TIMEOUT_2B;
+
+typedef union {
+    TIMEOUT_2B    t;
+    TPM2B         b;
+} TPM2B_TIMEOUT;
+
+// Table 74 -- TPM2B_IV Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_SYM_BLOCK_SIZE];
+} IV_2B;
+
+typedef union {
+    IV_2B    t;
+    TPM2B    b;
+} TPM2B_IV;
+typedef union {
+    TPMT_HA  digest;
+    TPM_HANDLE  handle;
+
+} TPMU_NAME ;
+
+// Table 76 -- TPM2B_NAME Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      name[sizeof(TPMU_NAME)];
+} NAME_2B;
+
+typedef union {
+    NAME_2B    t;
+    TPM2B      b;
+} TPM2B_NAME;
+
+// Table 77 -- TPMS_PCR_SELECT Structure <I/O>
+typedef struct {
+    UINT8    sizeofSelect;
+    BYTE     pcrSelect[PCR_SELECT_MAX];
+} TPMS_PCR_SELECT;
+
+// Table 78 -- TPMS_PCR_SELECTION Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hash;
+    UINT8            sizeofSelect;
+    BYTE             pcrSelect[PCR_SELECT_MAX];
+} TPMS_PCR_SELECTION;
+
+// Table 82 -- TPMT_TK_CREATION Structure <I/O>
+typedef struct {
+    TPM_ST               tag;
+    TPMI_RH_HIERARCHY    hierarchy;
+    TPM2B_DIGEST         digest;
+} TPMT_TK_CREATION;
+
+// Table 83 -- TPMT_TK_VERIFIED Structure <I/O>
+typedef struct {
+    TPM_ST               tag;
+    TPMI_RH_HIERARCHY    hierarchy;
+    TPM2B_DIGEST         digest;
+} TPMT_TK_VERIFIED;
+
+// Table 84 -- TPMT_TK_AUTH Structure <I/O>
+typedef struct {
+    TPM_ST               tag;
+    TPMI_RH_HIERARCHY    hierarchy;
+    TPM2B_DIGEST         digest;
+} TPMT_TK_AUTH;
+
+// Table 85 -- TPMT_TK_HASHCHECK Structure <I/O>
+typedef struct {
+    TPM_ST               tag;
+    TPMI_RH_HIERARCHY    hierarchy;
+    TPM2B_DIGEST         digest;
+} TPMT_TK_HASHCHECK;
+
+// Table 86 -- TPMS_ALG_PROPERTY Structure <O,S>
+typedef struct {
+    TPM_ALG_ID        alg;
+    TPMA_ALGORITHM    algProperties;
+} TPMS_ALG_PROPERTY;
+
+// Table 87 -- TPMS_TAGGED_PROPERTY Structure <O,S>
+typedef struct {
+    TPM_PT    property;
+    UINT32    value;
+} TPMS_TAGGED_PROPERTY;
+
+// Table 88 -- TPMS_TAGGED_PCR_SELECT Structure <O,S>
+typedef struct {
+    TPM_PT    tag;
+    UINT8     sizeofSelect;
+    BYTE      pcrSelect[PCR_SELECT_MAX];
+} TPMS_TAGGED_PCR_SELECT;
+
+// Table 89 -- TPML_CC Structure <I/O>
+typedef struct {
+    UINT32    count;
+    TPM_CC    commandCodes[MAX_CAP_CC];
+} TPML_CC;
+
+// Table 90 -- TPML_CCA Structure <O,S>
+typedef struct {
+    UINT32     count;
+    TPMA_CC    commandAttributes[MAX_CAP_CC];
+} TPML_CCA;
+
+// Table 91 -- TPML_ALG Structure <I/O>
+typedef struct {
+    UINT32        count;
+    TPM_ALG_ID    algorithms[MAX_ALG_LIST_SIZE];
+} TPML_ALG;
+
+// Table 92 -- TPML_HANDLE Structure <O,S>
+typedef struct {
+    UINT32        count;
+    TPM_HANDLE    handle[MAX_CAP_HANDLES];
+} TPML_HANDLE;
+
+// Table 93 -- TPML_DIGEST Structure <I/O>
+typedef struct {
+    UINT32          count;
+    TPM2B_DIGEST    digests[8];
+} TPML_DIGEST;
+
+// Table 94 -- TPML_DIGEST_VALUES Structure <I/O>
+typedef struct {
+    UINT32     count;
+    TPMT_HA    digests[HASH_COUNT];
+} TPML_DIGEST_VALUES;
+
+// Table 95 -- TPM2B_DIGEST_VALUES Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[sizeof(TPML_DIGEST_VALUES)];
+} DIGEST_VALUES_2B;
+
+typedef union {
+    DIGEST_VALUES_2B    t;
+    TPM2B               b;
+} TPM2B_DIGEST_VALUES;
+
+// Table 96 -- TPML_PCR_SELECTION Structure <I/O>
+typedef struct {
+    UINT32                count;
+    TPMS_PCR_SELECTION    pcrSelections[HASH_COUNT];
+} TPML_PCR_SELECTION;
+
+// Table 97 -- TPML_ALG_PROPERTY Structure <O,S>
+typedef struct {
+    UINT32               count;
+    TPMS_ALG_PROPERTY    algProperties[MAX_CAP_ALGS];
+} TPML_ALG_PROPERTY;
+
+// Table 98 -- TPML_TAGGED_TPM_PROPERTY Structure <O,S>
+typedef struct {
+    UINT32                  count;
+    TPMS_TAGGED_PROPERTY    tpmProperty[MAX_TPM_PROPERTIES];
+} TPML_TAGGED_TPM_PROPERTY;
+
+// Table 99 -- TPML_TAGGED_PCR_PROPERTY Structure <O,S>
+typedef struct {
+    UINT32                    count;
+    TPMS_TAGGED_PCR_SELECT    pcrProperty[MAX_PCR_PROPERTIES];
+} TPML_TAGGED_PCR_PROPERTY;
+
+// Table 100 -- TPML_ECC_CURVE Structure <O,S>
+typedef struct {
+    UINT32           count;
+    TPM_ECC_CURVE    eccCurves[MAX_ECC_CURVES];
+} TPML_ECC_CURVE;
+
+// Table 101 -- TPMU_CAPABILITIES Union <O,S>
+typedef union {
+    TPML_ALG_PROPERTY  algorithms;
+    TPML_HANDLE  handles;
+    TPML_CCA  command;
+    TPML_CC  ppCommands;
+    TPML_CC  auditCommands;
+    TPML_PCR_SELECTION  assignedPCR;
+    TPML_TAGGED_TPM_PROPERTY  tpmProperties;
+    TPML_TAGGED_PCR_PROPERTY  pcrProperties;
+    TPML_ECC_CURVE  eccCurves;
+
+} TPMU_CAPABILITIES ;
+
+// Table 102 -- TPMS_CAPABILITY_DATA Structure <O,S>
+typedef struct {
+    TPM_CAP              capability;
+    TPMU_CAPABILITIES    data;
+} TPMS_CAPABILITY_DATA;
+
+// Table 103 -- TPMS_CLOCK_INFO Structure <I/O>
+typedef struct {
+    UINT64         clock;
+    UINT32         resetCount;
+    UINT32         restartCount;
+    TPMI_YES_NO    safe;
+} TPMS_CLOCK_INFO;
+
+// Table 104 -- TPMS_TIME_INFO Structure <I/O>
+typedef struct {
+    UINT64             time;
+    TPMS_CLOCK_INFO    clockInfo;
+} TPMS_TIME_INFO;
+
+// Table 105 -- TPMS_TIME_ATTEST_INFO Structure <O,S>
+typedef struct {
+    TPMS_TIME_INFO    time;
+    UINT64            firmwareVersion;
+} TPMS_TIME_ATTEST_INFO;
+
+// Table 106 -- TPMS_CERTIFY_INFO Structure <O,S>
+typedef struct {
+    TPM2B_NAME    name;
+    TPM2B_NAME    qualifiedName;
+} TPMS_CERTIFY_INFO;
+
+// Table 107 -- TPMS_QUOTE_INFO Structure <O,S>
+typedef struct {
+    TPML_PCR_SELECTION    pcrSelect;
+    TPM2B_DIGEST          pcrDigest;
+} TPMS_QUOTE_INFO;
+
+// Table 108 -- TPMS_COMMAND_AUDIT_INFO Structure <O,S>
+typedef struct {
+    UINT64          auditCounter;
+    TPM_ALG_ID      digestAlg;
+    TPM2B_DIGEST    auditDigest;
+    TPM2B_DIGEST    commandDigest;
+} TPMS_COMMAND_AUDIT_INFO;
+
+// Table 109 -- TPMS_SESSION_AUDIT_INFO Structure <O,S>
+typedef struct {
+    TPMI_YES_NO     exclusiveSession;
+    TPM2B_DIGEST    sessionDigest;
+} TPMS_SESSION_AUDIT_INFO;
+
+// Table 110 -- TPMS_CREATION_INFO Structure <O,S>
+typedef struct {
+    TPM2B_NAME      objectName;
+    TPM2B_DIGEST    creationHash;
+} TPMS_CREATION_INFO;
+
+// Table 111 -- TPMS_NV_CERTIFY_INFO Structure <O,S>
+typedef struct {
+    TPM2B_MAX_BUFFER    nvContents;
+} TPMS_NV_CERTIFY_INFO;
+
+// Table 112 -- TPMI_ST_ATTEST Type <O,S>
+typedef TPM_ST TPMI_ST_ATTEST;
+
+// Table 113 -- TPMU_ATTEST Union <O,S>
+typedef union {
+    TPMS_CERTIFY_INFO  certify;
+    TPMS_CREATION_INFO  creation;
+    TPMS_QUOTE_INFO  quote;
+    TPMS_COMMAND_AUDIT_INFO  commandAudit;
+    TPMS_SESSION_AUDIT_INFO  sessionAudit;
+    TPMS_TIME_ATTEST_INFO  time;
+    TPMS_NV_CERTIFY_INFO  nv;
+
+} TPMU_ATTEST ;
+
+// Table 114 -- TPMS_ATTEST Structure <O,S>
+typedef struct {
+    TPM_GENERATED      magic;
+    TPMI_ST_ATTEST     type;
+    TPM2B_NAME         qualifiedSigner;
+    TPM2B_DATA         extraData;
+    TPMS_CLOCK_INFO    clockInfo;
+    UINT64             firmwareVersion;
+    TPMU_ATTEST        attested;
+} TPMS_ATTEST;
+
+// Table 115 -- TPM2B_ATTEST Structure <O,S>
+typedef struct {
+    UINT16    size;
+    BYTE      attestationData[sizeof(TPMS_ATTEST)];
+} ATTEST_2B;
+
+typedef union {
+    ATTEST_2B    t;
+    TPM2B        b;
+} TPM2B_ATTEST;
+
+// Table 116 -- TPMS_AUTH_SESSION_COMMAND Structure <I>
+typedef struct {
+    TPMI_SH_AUTH_SESSION    sessionHandle;
+    TPM2B_NONCE             nonce;
+    TPMA_SESSION            sessionAttributes;
+    TPM2B_AUTH              auth;
+} TPMS_AUTH_SESSION_COMMAND;
+
+// Table 117 -- TPMS_AUTH_SESSION_RESPONSE Structure <O,S>
+typedef struct {
+    TPM2B_NONCE     nonce;
+    TPMA_SESSION    sessionAttributes;
+    TPM2B_AUTH      auth;
+} TPMS_AUTH_SESSION_RESPONSE;
+typedef struct {
+    TPM2B_AUTH      sessionKey;
+    TPM2B_AUTH      authValue;
+    TPM2B_DIGEST    pHash;
+    TPM2B_NONCE     nonceNewer;
+    TPM2B_NONCE     nonceOlder;
+    TPMA_SESSION    sessionFlags;
+} TPMS_AUTH_COMPUTE_NOT_BOUND;
+typedef struct {
+    TPM2B_DIGEST    sessionKey;
+    TPM2B_DIGEST    pHash;
+    TPM2B_NONCE     nonceNewer;
+    TPM2B_NONCE     nonceOlder;
+    TPMA_SESSION    sessionFlags;
+} TPMS_AUTH_COMPUTE_BOUND;
+
+// Table 120 -- TPMI_AES_KEY_BITS Type <I/O>
+typedef TPM_KEY_BITS TPMI_AES_KEY_BITS;
+
+// Table 121 -- TPMI_SMS4_KEY_BITS Type <I/O>
+typedef TPM_KEY_BITS TPMI_SMS4_KEY_BITS;
+
+// Table 122 -- TPMU_SYM_KEY_BITS Union <I/O>
+typedef union {
+    TPMI_AES_KEY_BITS  aes;
+    TPMI_SMS4_KEY_BITS  sms4;
+    TPM_KEY_BITS  sym;
+    TPMI_ALG_HASH  xor;
+
+} TPMU_SYM_KEY_BITS ;
+
+// Table 123 -- TPMU_SYM_MODE Union <I/O>
+typedef union {
+    TPMI_ALG_SYM_MODE  aes;
+    TPMI_ALG_SYM_MODE  sms4;
+    TPMI_ALG_SYM_MODE  sym;
+
+} TPMU_SYM_MODE ;
+
+// Table 125 -- TPMT_SYM_DEF Structure <I/O>
+typedef struct {
+    TPMI_ALG_SYM         algorithm;
+    TPMU_SYM_KEY_BITS    keyBits;
+    TPMU_SYM_MODE        mode;
+} TPMT_SYM_DEF;
+
+// Table 126 -- TPMT_SYM_DEF_OBJECT Structure <I/O>
+typedef struct {
+    TPMI_ALG_SYM_OBJECT    algorithm;
+    TPMU_SYM_KEY_BITS      keyBits;
+    TPMU_SYM_MODE          mode;
+} TPMT_SYM_DEF_OBJECT;
+
+// Table 127 -- TPM2B_SYM_KEY Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_SYM_KEY_BYTES];
+} SYM_KEY_2B;
+
+typedef union {
+    SYM_KEY_2B    t;
+    TPM2B         b;
+} TPM2B_SYM_KEY;
+
+// Table 128 -- TPMS_SYMCIPHER_PARMS Structure <I/O>
+typedef struct {
+    TPMT_SYM_DEF_OBJECT    sym;
+} TPMS_SYMCIPHER_PARMS;
+
+// Table 129 -- TPM2B_SENSITIVE_DATA Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_SYM_DATA];
+} SENSITIVE_DATA_2B;
+
+typedef union {
+    SENSITIVE_DATA_2B    t;
+    TPM2B                b;
+} TPM2B_SENSITIVE_DATA;
+
+// Table 130 -- TPMS_SENSITIVE_CREATE Structure <I>
+typedef struct {
+    TPM2B_AUTH              userAuth;
+    TPM2B_SENSITIVE_DATA    data;
+} TPMS_SENSITIVE_CREATE;
+
+// Table 131 -- TPM2B_SENSITIVE_CREATE Structure <I,S>
+typedef struct {
+    UINT16                   size;
+    TPMS_SENSITIVE_CREATE    sensitive;
+} SENSITIVE_CREATE_2B;
+
+typedef union {
+    SENSITIVE_CREATE_2B    t;
+    TPM2B                  b;
+} TPM2B_SENSITIVE_CREATE;
+
+// Table 132 -- TPMS_SCHEME_SIGHASH Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_SIGHASH;
+
+// Table 133 -- TPMI_ALG_KEYEDHASH_SCHEME Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_KEYEDHASH_SCHEME;
+
+// Table 134 -- HMAC_SIG_SCHEME Types <I/O>
+typedef TPMS_SCHEME_SIGHASH    TPMS_SCHEME_HMAC;
+
+// Table 135 -- TPMS_SCHEME_XOR Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+    TPMI_ALG_KDF     kdf;
+} TPMS_SCHEME_XOR;
+
+// Table 136 -- TPMU_SCHEME_KEYEDHASH Union <I/O,S>
+typedef union {
+    TPMS_SCHEME_HMAC  hmac;
+    TPMS_SCHEME_XOR  xor;
+
+} TPMU_SCHEME_KEYEDHASH ;
+
+// Table 137 -- TPMT_KEYEDHASH_SCHEME Structure <I/O>
+typedef struct {
+    TPMI_ALG_KEYEDHASH_SCHEME    scheme;
+    TPMU_SCHEME_KEYEDHASH        details;
+} TPMT_KEYEDHASH_SCHEME;
+
+// Table 138 -- RSA_SIG_SCHEMES Types <I/O>
+typedef TPMS_SCHEME_SIGHASH    TPMS_SCHEME_RSASSA;
+typedef TPMS_SCHEME_SIGHASH    TPMS_SCHEME_RSAPSS;
+
+// Table 139 -- ECC_SIG_SCHEMES Types <I/O>
+typedef TPMS_SCHEME_SIGHASH    TPMS_SCHEME_ECDSA;
+
+// Table 140 -- TPMS_SCHEME_ECDAA Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_ECDAA;
+
+// Table 141 -- TPMS_SCHEME_ECSCHNORR Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+    UINT16           count;
+} TPMS_SCHEME_ECSCHNORR;
+
+// Table 142 -- TPMU_SIG_SCHEME Union <I/O,S>
+typedef union {
+    TPMS_SCHEME_RSASSA  rsassa;
+    TPMS_SCHEME_RSAPSS  rsapss;
+    TPMS_SCHEME_ECDSA  ecdsa;
+    TPMS_SCHEME_ECDAA  ecdaa;
+    TPMS_SCHEME_ECSCHNORR  ecSchnorr;
+    TPMS_SCHEME_HMAC  hmac;
+    TPMS_SCHEME_SIGHASH  any;
+
+} TPMU_SIG_SCHEME ;
+
+// Table 143 -- TPMT_SIG_SCHEME Structure <I/O>
+typedef struct {
+    TPMI_ALG_SIG_SCHEME    scheme;
+    TPMU_SIG_SCHEME        details;
+} TPMT_SIG_SCHEME;
+
+// Table 144 -- TPMS_SCHEME_OAEP Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_OAEP;
+
+// Table 145 -- TPMS_SCHEME_ECDH Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_ECDH;
+
+// Table 146 -- TPMS_SCHEME_MGF1 Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_MGF1;
+
+// Table 147 -- TPMS_SCHEME_KDF1_SP800_56a Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_KDF1_SP800_56a;
+
+// Table 148 -- TPMS_SCHEME_KDF2 Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_KDF2;
+
+// Table 149 -- TPMS_SCHEME_KDF1_SP800_108 Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH    hashAlg;
+} TPMS_SCHEME_KDF1_SP800_108;
+
+// Table 150 -- TPMU_KDF_SCHEME Union <I/O,S>
+typedef union {
+    TPMS_SCHEME_MGF1  mgf1;
+    TPMS_SCHEME_KDF1_SP800_56a  kdf1_SP800_56a;
+    TPMS_SCHEME_KDF2  kdf2;
+    TPMS_SCHEME_KDF1_SP800_108  kdf1_sp800_108;
+} TPMU_KDF_SCHEME ;
+
+// Table 151 -- TPMT_KDF_SCHEME Structure <I/O>
+typedef struct {
+    TPMI_ALG_KDF       scheme;
+    TPMU_KDF_SCHEME    details;
+} TPMT_KDF_SCHEME;
+typedef TPM_ALG_ID TPMI_ALG_ASYM_SCHEME;
+
+// Table 153 -- TPMU_ASYM_SCHEME Union <I/O>
+typedef union {
+    TPMS_SCHEME_RSASSA  rsassa;
+    TPMS_SCHEME_RSAPSS  rsapss;
+    TPMS_SCHEME_OAEP  oaep;
+    TPMS_SCHEME_ECDSA  ecdsa;
+    TPMS_SCHEME_ECDAA  ecdaa;
+    TPMS_SCHEME_ECSCHNORR  ecSchnorr;
+    TPMS_SCHEME_SIGHASH  anySig;
+
+} TPMU_ASYM_SCHEME ;
+
+typedef struct {
+    TPMI_ALG_ASYM_SCHEME    scheme;
+    TPMU_ASYM_SCHEME        details;
+} TPMT_ASYM_SCHEME;
+
+// Table 155 -- TPMI_ALG_RSA_SCHEME Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_RSA_SCHEME;
+
+// Table 156 -- TPMT_RSA_SCHEME Structure <I/O>
+typedef struct {
+    TPMI_ALG_RSA_SCHEME    scheme;
+    TPMU_ASYM_SCHEME       details;
+} TPMT_RSA_SCHEME;
+
+// Table 157 -- TPMI_ALG_RSA_DECRYPT Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_RSA_DECRYPT;
+
+// Table 158 -- TPMT_RSA_DECRYPT Structure <I/O>
+typedef struct {
+    TPMI_ALG_RSA_DECRYPT    scheme;
+    TPMU_ASYM_SCHEME        details;
+} TPMT_RSA_DECRYPT;
+
+// Table 159 -- TPM2B_PUBLIC_KEY_RSA Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_RSA_KEY_BYTES];
+} PUBLIC_KEY_RSA_2B;
+
+typedef union {
+    PUBLIC_KEY_RSA_2B    t;
+    TPM2B                b;
+} TPM2B_PUBLIC_KEY_RSA;
+
+// Table 160 -- TPMI_RSA_KEY_BITS Type <I/O>
+typedef TPM_KEY_BITS TPMI_RSA_KEY_BITS;
+
+// Table 161 -- TPM2B_PRIVATE_KEY_RSA Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_RSA_KEY_BYTES/2];
+} PRIVATE_KEY_RSA_2B;
+
+typedef union {
+    PRIVATE_KEY_RSA_2B    t;
+    TPM2B                 b;
+} TPM2B_PRIVATE_KEY_RSA;
+
+// Table 162 -- TPM2B_ECC_PARAMETER Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      value[MAX_ECC_KEY_BYTES];
+} ECC_PARAMETER_2B;
+
+typedef union {
+    ECC_PARAMETER_2B    t;
+    TPM2B               b;
+} TPM2B_ECC_PARAMETER;
+
+// Table 163 -- TPMS_ECC_POINT Structure <I/O>
+typedef struct {
+    TPM2B_ECC_PARAMETER    pointX;
+    TPM2B_ECC_PARAMETER    pointY;
+} TPMS_ECC_POINT;
+
+// Table 164 -- TPM2B_ECC_POINT Structure <I/O>
+typedef struct {
+    UINT16            size;
+    TPMS_ECC_POINT    point;
+} ECC_POINT_2B;
+
+typedef union {
+    ECC_POINT_2B    t;
+    TPM2B           b;
+} TPM2B_ECC_POINT;
+
+// Table 165 -- TPMI_ALG_ECC_SCHEME Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_ECC_SCHEME;
+
+// Table 166 -- TPMI_ECC_CURVE Type <I/O>
+typedef TPM_ECC_CURVE TPMI_ECC_CURVE;
+
+// Table 167 -- TPMT_ECC_SCHEME Structure <I/O>
+typedef struct {
+    TPMI_ALG_ECC_SCHEME    scheme;
+    TPMU_SIG_SCHEME        details;
+} TPMT_ECC_SCHEME;
+
+// Table 168 -- TPMS_ALGORITHM_DETAIL_ECC Structure <O,S>
+typedef struct {
+    TPM_ECC_CURVE          curveID;
+    UINT16                 keySize;
+    TPMT_KDF_SCHEME        kdf;
+    TPMT_ECC_SCHEME        sign;
+    TPM2B_ECC_PARAMETER    p;
+    TPM2B_ECC_PARAMETER    a;
+    TPM2B_ECC_PARAMETER    b;
+    TPM2B_ECC_PARAMETER    gX;
+    TPM2B_ECC_PARAMETER    gY;
+    TPM2B_ECC_PARAMETER    n;
+    TPM2B_ECC_PARAMETER    h;
+} TPMS_ALGORITHM_DETAIL_ECC;
+
+// Table 169 -- TPMS_SIGNATURE_RSASSA Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH           hash;
+    TPM2B_PUBLIC_KEY_RSA    sig;
+} TPMS_SIGNATURE_RSASSA;
+
+// Table 170 -- TPMS_SIGNATURE_RSAPSS Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH           hash;
+    TPM2B_PUBLIC_KEY_RSA    sig;
+} TPMS_SIGNATURE_RSAPSS;
+
+// Table 171 -- TPMS_SIGNATURE_ECDSA Structure <I/O>
+typedef struct {
+    TPMI_ALG_HASH          hash;
+    TPM2B_ECC_PARAMETER    signatureR;
+    TPM2B_ECC_PARAMETER    signatureS;
+} TPMS_SIGNATURE_ECDSA;
+
+// Table 172 -- TPMU_SIGNATURE Union <I/O,S>
+typedef union {
+    TPMS_SIGNATURE_RSASSA  rsassa;
+    TPMS_SIGNATURE_RSAPSS  rsapss;
+    TPMS_SIGNATURE_ECDSA  ecdsa;
+    TPMT_HA  hmac;
+} TPMU_SIGNATURE ;
+
+// Table 173 -- TPMT_SIGNATURE Structure <I/O>
+typedef struct {
+    TPMI_ALG_SIG_SCHEME    sigAlg;
+    TPMU_SIGNATURE         signature;
+} TPMT_SIGNATURE;
+typedef union {
+    BYTE  ecc[sizeof(TPMS_ECC_POINT)];
+    BYTE  rsa[MAX_RSA_KEY_BYTES];
+    BYTE  symmetric[sizeof(TPM2B_DIGEST)];
+    BYTE  keyedHash[sizeof(TPM2B_DIGEST)];
+} TPMU_ENCRYPTED_SECRET ;
+
+// Table 175 -- TPM2B_ENCRYPTED_SECRET Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      secret[sizeof(TPMU_ENCRYPTED_SECRET)];
+} ENCRYPTED_SECRET_2B;
+
+typedef union {
+    ENCRYPTED_SECRET_2B    t;
+    TPM2B                  b;
+} TPM2B_ENCRYPTED_SECRET;
+
+// Table 176 -- TPMI_ALG_PUBLIC Type <I/O>
+typedef TPM_ALG_ID TPMI_ALG_PUBLIC;
+
+// Table 177 -- TPMU_PUBLIC_ID Union <I/O,S>
+typedef union {
+    TPM2B_DIGEST  keyedHash;
+    TPM2B_DIGEST  sym;
+    TPM2B_PUBLIC_KEY_RSA  rsa;
+    TPMS_ECC_POINT  ecc;
+
+} TPMU_PUBLIC_ID ;
+
+// Table 178 -- TPMS_KEYEDHASH_PARMS Structure <I/O>
+typedef struct {
+    TPMT_KEYEDHASH_SCHEME    scheme;
+} TPMS_KEYEDHASH_PARMS;
+typedef struct {
+    TPMT_SYM_DEF_OBJECT    symmetric;
+    TPMT_ASYM_SCHEME       scheme;
+} TPMS_ASYM_PARMS;
+
+// Table 180 -- TPMS_RSA_PARMS Structure <I/O>
+typedef struct {
+    TPMT_SYM_DEF_OBJECT    symmetric;
+    TPMT_RSA_SCHEME        scheme;
+    TPMI_RSA_KEY_BITS      keyBits;
+    UINT32                 exponent;
+} TPMS_RSA_PARMS;
+
+// Table 181 -- TPMS_ECC_PARMS Structure <I/O>
+typedef struct {
+    TPMT_SYM_DEF_OBJECT    symmetric;
+    TPMT_ECC_SCHEME        scheme;
+    TPMI_ECC_CURVE         curveID;
+    TPMT_KDF_SCHEME        kdf;
+} TPMS_ECC_PARMS;
+
+// Table 182 -- TPMU_PUBLIC_PARMS Union <I/O,S>
+typedef union {
+    TPMS_KEYEDHASH_PARMS  keyedHashDetail;
+    TPMT_SYM_DEF_OBJECT  symDetail;
+    TPMS_RSA_PARMS  rsaDetail;
+    TPMS_ECC_PARMS  eccDetail;
+    TPMS_ASYM_PARMS  asymDetail;
+
+} TPMU_PUBLIC_PARMS ;
+
+// Table 183 -- TPMT_PUBLIC_PARMS Structure <I/O>
+typedef struct {
+    TPMI_ALG_PUBLIC      type;
+    TPMU_PUBLIC_PARMS    parameters;
+} TPMT_PUBLIC_PARMS;
+
+// Table 184 -- TPMT_PUBLIC Structure <I/O>
+typedef struct {
+    TPMI_ALG_PUBLIC      type;
+    TPMI_ALG_HASH        nameAlg;
+    TPMA_OBJECT          objectAttributes;
+    TPM2B_DIGEST         authPolicy;
+    TPMU_PUBLIC_PARMS    parameters;
+    TPMU_PUBLIC_ID       unique;
+} TPMT_PUBLIC;
+
+// Table 185 -- TPM2B_PUBLIC Structure <I/O>
+typedef struct {
+    UINT16         size;
+    TPMT_PUBLIC    publicArea;
+} PUBLIC_2B;
+
+typedef union {
+    PUBLIC_2B    t;
+    TPM2B        b;
+} TPM2B_PUBLIC;
+
+// Table 186 -- TPMU_SENSITIVE_COMPOSITE Union <I/O,S>
+typedef union {
+    TPM2B_PRIVATE_KEY_RSA  rsa;
+    TPM2B_ECC_PARAMETER  ecc;
+    TPM2B_SENSITIVE_DATA  bits;
+    TPM2B_SYM_KEY  sym;
+    TPM2B_SENSITIVE_DATA  any;
+
+} TPMU_SENSITIVE_COMPOSITE ;
+
+// Table 187 -- TPMT_SENSITIVE Structure <I/O>
+typedef struct {
+    TPMI_ALG_PUBLIC             sensitiveType;
+    TPM2B_AUTH                  authValue;
+    TPM2B_DIGEST                seedValue;
+    TPMU_SENSITIVE_COMPOSITE    sensitive;
+} TPMT_SENSITIVE;
+
+// Table 188 -- TPM2B_SENSITIVE Structure <I/O>
+typedef struct {
+    UINT16            size;
+    TPMT_SENSITIVE    sensitiveArea;
+} SENSITIVE_2B;
+
+typedef union {
+    SENSITIVE_2B    t;
+    TPM2B           b;
+} TPM2B_SENSITIVE;
+typedef struct {
+    TPM2B_DIGEST      integrityOuter;
+    TPM2B_DIGEST      integrityInner;
+    TPMT_SENSITIVE    sensitive;
+} _PRIVATE;
+
+// Table 190 -- TPM2B_PRIVATE Structure <I/O,S>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[sizeof(_PRIVATE)];
+} PRIVATE_2B;
+
+typedef union {
+    PRIVATE_2B    t;
+    TPM2B         b;
+} TPM2B_PRIVATE;
+typedef struct {
+    TPM2B_DIGEST    integrityHMAC;
+    TPM2B_DIGEST    encIdentity;
+} _ID_OBJECT;
+
+// Table 192 -- TPM2B_ID_OBJECT Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      credential[sizeof(_ID_OBJECT)];
+} ID_OBJECT_2B;
+
+typedef union {
+    ID_OBJECT_2B    t;
+    TPM2B           b;
+} TPM2B_ID_OBJECT;
+//
+// BUGBUG: Comment here to resolve conflict
+//
+//typedef struct {
+//    unsigned int index : 22;
+//    unsigned int space : 2;
+//    unsigned int RH_NV : 8;
+//} TPM_NV_INDEX ;
+
+// Table 195 -- TPMA_NV Bits <I/O>
+typedef struct {
+    unsigned int TPMA_NV_PPWRITE        : 1;
+    unsigned int TPMA_NV_OWNERWRITE     : 1;
+    unsigned int TPMA_NV_AUTHWRITE      : 1;
+    unsigned int TPMA_NV_POLICYWRITE    : 1;
+    unsigned int TPMA_NV_COUNTER        : 1;
+    unsigned int TPMA_NV_BITS           : 1;
+    unsigned int TPMA_NV_EXTEND         : 1;
+    unsigned int reserved8              : 3;
+    unsigned int TPMA_NV_POLICY_DELETE  : 1;
+    unsigned int TPMA_NV_WRITELOCKED    : 1;
+    unsigned int TPMA_NV_WRITEALL       : 1;
+    unsigned int TPMA_NV_WRITEDEFINE    : 1;
+    unsigned int TPMA_NV_WRITE_STCLEAR  : 1;
+    unsigned int TPMA_NV_GLOBALLOCK     : 1;
+    unsigned int TPMA_NV_PPREAD         : 1;
+    unsigned int TPMA_NV_OWNERREAD      : 1;
+    unsigned int TPMA_NV_AUTHREAD       : 1;
+    unsigned int TPMA_NV_POLICYREAD     : 1;
+    unsigned int reserved19             : 5;
+    unsigned int TPMA_NV_NO_DA          : 1;
+    unsigned int TPMA_NV_ORDERLY        : 1;
+    unsigned int TPMA_NV_CLEAR_STCLEAR  : 1;
+    unsigned int TPMA_NV_READLOCKED     : 1;
+    unsigned int TPMA_NV_WRITTEN        : 1;
+    unsigned int TPMA_NV_PLATFORMCREATE : 1;
+    unsigned int TPMA_NV_READ_STCLEAR   : 1;
+} TPMA_NV ;
+
+// Table 196 -- TPMS_NV_PUBLIC Structure <I/O>
+typedef struct {
+    TPMI_RH_NV_INDEX    nvIndex;
+    TPMI_ALG_HASH       nameAlg;
+    TPMA_NV             attributes;
+    TPM2B_DIGEST        authPolicy;
+    UINT16              dataSize;
+} TPMS_NV_PUBLIC;
+
+// Table 197 -- TPM2B_NV_PUBLIC Structure <I/O>
+typedef struct {
+    UINT16            size;
+    TPMS_NV_PUBLIC    nvPublic;
+} NV_PUBLIC_2B;
+
+typedef union {
+    NV_PUBLIC_2B    t;
+    TPM2B           b;
+} TPM2B_NV_PUBLIC;
+
+// Table 198 -- TPM2B_CONTEXT_SENSITIVE Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[MAX_CONTEXT_SIZE];
+} CONTEXT_SENSITIVE_2B;
+
+typedef union {
+    CONTEXT_SENSITIVE_2B    t;
+    TPM2B                   b;
+} TPM2B_CONTEXT_SENSITIVE;
+
+// Table 199 -- TPMS_CONTEXT_DATA Structure <I/O,S>
+typedef struct {
+    TPM2B_DIGEST               integrity;
+    TPM2B_CONTEXT_SENSITIVE    encrypted;
+} TPMS_CONTEXT_DATA;
+
+// Table 200 -- TPM2B_CONTEXT_DATA Structure <I/O>
+typedef struct {
+    UINT16    size;
+    BYTE      buffer[sizeof(TPMS_CONTEXT_DATA)];
+} CONTEXT_DATA_2B;
+
+typedef union {
+    CONTEXT_DATA_2B    t;
+    TPM2B              b;
+} TPM2B_CONTEXT_DATA;
+
+// Table 201 -- TPMS_CONTEXT Structure <I/O>
+typedef struct {
+    UINT64                sequence;
+    TPMI_DH_CONTEXT       savedHandle;
+    TPMI_RH_HIERARCHY     hierarchy;
+    TPM2B_CONTEXT_DATA    contextBlob;
+} TPMS_CONTEXT;
+
+// Table 203 -- TPMS_CREATION_DATA Structure <O,S>
+typedef struct {
+    TPML_PCR_SELECTION    pcrSelect;
+    TPM2B_DIGEST          pcrDigest;
+    TPMA_LOCALITY         locality;
+    TPM_ALG_ID            parentNameAlg;
+    TPM2B_NAME            parentName;
+    TPM2B_NAME            parentQualifiedName;
+    TPM2B_DATA            outsideInfo;
+} TPMS_CREATION_DATA;
+
+// Table 204 -- TPM2B_CREATION_DATA Structure <O,S>
+typedef struct {
+    UINT16                size;
+    TPMS_CREATION_DATA    creationData;
+} CREATION_DATA_2B;
+
+typedef union {
+    CREATION_DATA_2B    t;
+    TPM2B               b;
+} TPM2B_CREATION_DATA;
+
+//
+// Command Header
+//
+typedef struct {
+  TPM_ST tag;
+  UINT32 paramSize;
+  TPM_CC commandCode;
+} TPM2_COMMAND_HEADER;
+
+typedef struct {
+  TPM_ST tag;
+  UINT32 paramSize;
+  TPM_RC responseCode;
+} TPM2_RESPONSE_HEADER;
+
+#pragma pack (pop)
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm20Implementation.h b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm20Implementation.h
new file mode 100644
index 0000000..d21eb53
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm20Implementation.h
@@ -0,0 +1,259 @@
+/** @file
+
+  Definitions for Tpm 2.0 implementation
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef    _IMPLEMENTATION_H
+#define    _IMPLEMENTATION_H
+
+// Table 205 -- Hash Algorithm Digest and Block Size Values
+#define    SHA1_DIGEST_SIZE            20
+#define    SHA1_BLOCK_SIZE             64
+#define    SHA256_DIGEST_SIZE          32
+#define    SHA256_BLOCK_SIZE           64
+#define    SM3_256_DIGEST_SIZE         32
+#define    SM3_256_BLOCK_SIZE          64
+#define    SHA384_DIGEST_SIZE          48
+#define    SHA384_BLOCK_SIZE           128
+#define    SHA512_DIGEST_SIZE          64
+#define    SHA512_BLOCK_SIZE           128
+#define    WHIRLPOOL512_DIGEST_SIZE    64
+#define    WHIRLPOOL512_BLOCK_SIZE     64
+
+// Table 206 -- DER Values
+#define    SHA1_DER_SIZE      15
+#define    SHA1_DER           {0x30,0x21,0x30,0x09,0x06,0x05,0x2B,0x0E,0x03,0x02,0x1A,0x05,0x00,0x04,0x14}
+#define    SHA256_DER_SIZE    19
+#define    SHA256_DER         {0x30,0x31,0x30,0x0d,0x06,0x09,0x60,0x86,0x48,0x01,0x65,0x03,0x04,0x02,0x01,0x05,0x00,0x04,0x20}
+#define    SHA384_DER_SIZE    19
+#define    SHA384_DER         {0x30,0x41,0x30,0x0d,0x06,0x09,0x60,0x86,0x48,0x01,0x65,0x03,0x04,0x02,0x02,0x05,0x00,0x04,0x30}
+#define    SHA512_DER_SIZE    19
+#define    SHA512_DER         {0x30,0x51,0x30,0x0d,0x06,0x09,0x60,0x86,0x48,0x01,0x65,0x03,0x04,0x02,0x03,0x05,0x00,0x04,0x40}
+
+// Table 207 -- Architectural Limits Values
+#define    MAX_SESSION_NUMBER    3
+
+// Table 208 -- Minimum and Maximum Values
+#ifndef UINT8_MAX
+#define    UINT8_MAX     255
+#endif
+#define    BYTE_MAX      255
+#define    INT8_MIN      -128
+#define    INT8_MAX      127
+#define    UINT16_MAX    65535
+#define    INT16_MIN     -32768
+#define    INT16_MAX     32767
+#define    UINT32_MAX    4294967295
+#define    INT32_MIN     -2147483648
+#define    INT32_MAX     2147483647
+#define    UINT64_MAX    18446744073709551615    // 1.84467440737096e+019
+#define    INT64_MIN     -9223372036854775808    // 1
+#define    INT64_MAX     9223372036854775807    // 9.22337203685478e+018
+
+// Table 209 -- Logic Values
+#define    YES      1
+#define    NO       0
+//
+// BUGBUG: Comment to to resolve duplicated definition
+//
+//#define    TRUE     1
+//#define    FALSE    0
+#define    SET      1
+#define    CLEAR    0
+
+// Table 210 -- Processor Values
+#define    BIG_ENDIAN       NO    // 0
+#define    LITTLE_ENDIAN    YES    // 1
+#define    NO_AUTO_ALIGN    NO    // 0
+
+/* Table 211 -- Implemented Algorithms
+#define    RSA               YES    // 1
+#define    DES               YES    // 1
+#define    _3DES             YES    // 1
+#define    SHA1              YES    // 1
+#define    HMAC              YES    // 1
+#define    AES               YES    // 1
+#define    MGF1              YES    // 1
+#define    XOR               YES    // 1
+#define    KEYEDHASH         YES    // 1
+#define    SHA256            YES    // 1
+#define    SHA384            YES    // 1
+#define    SHA512            YES    // 1
+#define    WHIRLPOOL512      YES    // 1
+#define    SM3_256           YES    // 1
+#define    SMS4              YES    // 1
+#define    RSASSA            RSA    // 1
+#define    RSAES             RSA    // 1
+#define    RSAPSS            RSA    // 1
+#define    OAEP              RSA    // 1
+#define    ECC               YES    // 1
+#define    ECDH              YES    // 1
+#define    ECDSA             ECC    // 1
+#define    ECDAA             ECC    // 1
+#define    ECSCHNORR         ECC    // 1
+#define    SYMCIPHER         YES    // 1
+#define    KDF1_SP800_56a    ECC    // 1
+#define    KDF2              YES    // 1
+#define    KDF1_SP800_108    YES    // 1
+#define    SP800_56a_C1_1    ECC    // 1
+#define    CTR               YES    // 1
+#define    OFB               YES    // 1
+#define    CBC               YES    // 1
+#define    CFB               YES    // 1
+#define    ECB               YES    // 1
+
+*/
+
+// Table 212 -- Implemented Algorithm Constants
+#define    RSA_KEY_SIZES_BITS    {1024,2048}
+#define    MAX_RSA_KEY_BITS      2048
+#define    MAX_RSA_KEY_BYTES     ((MAX_RSA_KEY_BITS+7)/8)    // 256
+#define    ECC_CURVES            {TPM_ECC_NIST_P256,TPM_ECC_BN_P256}
+#define    ECC_KEY_SIZES_BITS    {256}
+#define    MAX_ECC_KEY_BITS      256
+#define    MAX_ECC_KEY_BYTES     ((MAX_ECC_KEY_BITS+7)/8)    // 32
+#define    AES_KEY_SIZES_BITS    {128}
+#define    MAX_AES_KEY_BITS      128
+#define    MAX_AES_KEY_BYTES     ((MAX_AES_KEY_BITS+7)/8)    // 16
+#define    MAX_SYM_KEY_BITS      128
+#define    MAX_SYM_KEY_BYTES     ((MAX_SYM_KEY_BITS+7)/8)    // 16
+#define    MAX_SYM_BLOCK_SIZE    16
+
+// Table 213 -- Implementation Values
+#define    FIELD_UPGRADE_IMPLEMENTED      NO    // 0
+typedef    UINT16                         BSIZE;
+#define    IMPLEMENTATION_PCR             24
+#define    PLATFORM_PCR                   24
+#define    DRTM_PCR                       17
+#define    NUM_LOCALITIES                 5
+#define    MAX_HANDLE_NUM                 3
+#define    MAX_ACTIVE_SESSIONS            64
+typedef    UINT16                         CONTEXT_SLOT;
+typedef    UINT64                         CONTEXT_COUNTER;
+#define    MAX_LOADED_SESSIONS            3
+#define    MAX_SESSION_NUM                3
+#define    MAX_LOADED_OBJECTS             3
+#define    MIN_EVICT_OBJECTS              2
+#define    PCR_SELECT_MIN                 ((PLATFORM_PCR+7)/8)    // 3
+#define    PCR_SELECT_MAX                 ((IMPLEMENTATION_PCR+7)/8)    // 3
+#define    NUM_POLICY_PCR_GROUP           1
+#define    NUM_AUTHVALUE_PCR_GROUP        1
+#define    MAX_CONTEXT_SIZE               4000
+#define    MAX_DIGEST_BUFFER              1024
+#define    MAX_NV_INDEX_SIZE              1024
+#define    MAX_CAP_BUFFER                 1024
+#define    NV_MEMORY_SIZE                 16384
+#define    NUM_STATIC_PCR                 16
+#define    MAX_ALG_LIST_SIZE              64
+#define    TIMER_PRESCALE                 100000
+#define    PRIMARY_SEED_SIZE              32
+#define    CONTEXT_ENCRYPT_ALG            TPM_ALG_AES
+#define    CONTEXT_ENCRYPT_KEY_BITS       MAX_SYM_KEY_BITS    // 128
+#define    CONTEXT_ENCRYPT_KEY_BYTES      ((CONTEXT_ENCRYPT_KEY_BITS+7)/8)    // 16
+#define    CONTEXT_INTEGRITY_HASH_ALG     TPM_ALG_SHA256
+#define    CONTEXT_INTEGRITY_HASH_SIZE    SHA256_DIGEST_SIZE    // 32
+#define    PROOF_SIZE                     CONTEXT_INTEGRITY_HASH_SIZE    // 32
+#define    NV_CLOCK_UPDATE_INTERVAL       12
+#define    NUM_POLICY_PCR                 1
+#define    MAX_COMMAND_SIZE               4096
+#define    MAX_RESPONSE_SIZE              4096
+#define    ORDERLY_BITS                   8
+#define    MAX_ORDERLY_COUNT              ((1<<ORDERLY_BITS)-1)    // 255
+#define    ALG_ID_FIRST                   TPM_ALG_FIRST
+#define    ALG_ID_LAST                    TPM_ALG_LAST
+#define    MAX_SYM_DATA                   128
+#define    MAX_HASH_STATE_SIZE            512
+#define    MAX_RNG_ENTROPY_SIZE           64
+#define    RAM_INDEX_SPACE                512
+#define    RSA_DEFAULT_PUBLIC_EXPONENT    0x00010001
+
+///
+
+/*(auto)
+
+    Automatically Generated by DoImplemented.pl
+
+    Date: Mar  5, 2012
+    Time: 11:14:55 PM
+
+*/
+
+// Table 6 -- TPM_ALG_ID Constants <I/O,S>
+typedef UINT16 TPM_ALG_ID;
+//
+// BUGBUG: Comment some algo which has same name as TPM1.2 (value is same, so not runtime issue)
+//
+#define    TPM_ALG_ERROR             (TPM_ALG_ID)(0x0000)        // a: ; D:
+#define    TPM_ALG_FIRST             (TPM_ALG_ID)(0x0001)        // a: ; D:
+//#define    TPM_ALG_RSA               (TPM_ALG_ID)(0x0001)        // a: A O; D:
+//#define    TPM_ALG_DES               (TPM_ALG_ID)(0x0002)        // a: S; D:
+#define    TPM_ALG__3DES             (TPM_ALG_ID)(0x0003)        // a: S; D:
+//#define    TPM_ALG_SHA               (TPM_ALG_ID)(0x0004)        // a: H; D:
+#define    TPM_ALG_SHA1              (TPM_ALG_ID)(0x0004)        // a: H; D:
+//#define    TPM_ALG_HMAC              (TPM_ALG_ID)(0x0005)        // a: H X; D:
+#define    TPM_ALG_AES               (TPM_ALG_ID)(0x0006)        // a: S; D:
+//#define    TPM_ALG_MGF1              (TPM_ALG_ID)(0x0007)        // a: H M; D:
+#define    TPM_ALG_KEYEDHASH         (TPM_ALG_ID)(0x0008)        // a: H E X O; D:
+//#define    TPM_ALG_XOR               (TPM_ALG_ID)(0x000A)        // a: H S; D:
+#define    TPM_ALG_SHA256            (TPM_ALG_ID)(0x000B)        // a: H; D:
+#define    TPM_ALG_SHA384            (TPM_ALG_ID)(0x000C)        // a: H; D:
+#define    TPM_ALG_SHA512            (TPM_ALG_ID)(0x000D)        // a: H; D:
+#define    TPM_ALG_WHIRLPOOL512      (TPM_ALG_ID)(0x000E)        // a: H; D:
+#define    TPM_ALG_NULL              (TPM_ALG_ID)(0x0010)        // a: ; D:
+#define    TPM_ALG_SM3_256           (TPM_ALG_ID)(0x0012)        // a: H; D:
+#define    TPM_ALG_SMS4              (TPM_ALG_ID)(0x0013)        // a: S; D:
+#define    TPM_ALG_RSASSA            (TPM_ALG_ID)(0x0014)        // a: X; D: RSA
+#define    TPM_ALG_RSAES             (TPM_ALG_ID)(0x0015)        // a: E; D: RSA
+#define    TPM_ALG_RSAPSS            (TPM_ALG_ID)(0x0016)        // a: X; D: RSA
+#define    TPM_ALG_OAEP              (TPM_ALG_ID)(0x0017)        // a: E; D: RSA
+#define    TPM_ALG_ECDSA             (TPM_ALG_ID)(0x0018)        // a: X; D: ECC
+#define    TPM_ALG_ECDH              (TPM_ALG_ID)(0x0019)        // a: M; D: ECC
+#define    TPM_ALG_ECDAA             (TPM_ALG_ID)(0x001A)        // a: A X; D: ECC
+#define    TPM_ALG_ECSCHNORR         (TPM_ALG_ID)(0x001C)        // a:  A X; D: ECC
+#define    TPM_ALG_KDF1_SP800_56a    (TPM_ALG_ID)(0x0020)        // a: H M; D: ECC
+#define    TPM_ALG_KDF2              (TPM_ALG_ID)(0x0021)        // a: H M; D:
+#define    TPM_ALG_KDF1_SP800_108    (TPM_ALG_ID)(0x0022)        // a: H M; D:
+#define    TPM_ALG_ECC               (TPM_ALG_ID)(0x0023)        // a: A O; D:
+#define    TPM_ALG_SYMCIPHER         (TPM_ALG_ID)(0x0025)        // a: O; D:
+#define    TPM_ALG_CTR               (TPM_ALG_ID)(0x0040)        // a: S E; D:
+#define    TPM_ALG_OFB               (TPM_ALG_ID)(0x0041)        // a: S E; D:
+#define    TPM_ALG_CBC               (TPM_ALG_ID)(0x0042)        // a: S E; D:
+#define    TPM_ALG_CFB               (TPM_ALG_ID)(0x0043)        // a: S E; D:
+#define    TPM_ALG_ECB               (TPM_ALG_ID)(0x0044)        // a: S E; D:
+#define    TPM_ALG_LAST              (TPM_ALG_ID)(0x0044)        // a: ; D:
+
+// Table 7 -- TPM_ECC_CURVE Constants <I/O,S>
+typedef UINT16 TPM_ECC_CURVE;
+
+#define    TPM_ECC_NONE         (TPM_ECC_CURVE)(0x0000)
+#define    TPM_ECC_NIST_P192    (TPM_ECC_CURVE)(0x0001)
+#define    TPM_ECC_NIST_P224    (TPM_ECC_CURVE)(0x0002)
+#define    TPM_ECC_NIST_P256    (TPM_ECC_CURVE)(0x0003)
+#define    TPM_ECC_NIST_P384    (TPM_ECC_CURVE)(0x0004)
+#define    TPM_ECC_NIST_P521    (TPM_ECC_CURVE)(0x0005)
+#define    TPM_ECC_BN_P256      (TPM_ECC_CURVE)(0x0010)
+#define    TPM_ECC_BN_P638      (TPM_ECC_CURVE)(0x0011)
+
+//#define      MAX_DIGEST_SIZE        32
+//#define      MAX_HASH_BLOCK_SIZE    64
+//
+// BUGBUG: Always set 6 here, because we want to support all hash algo in BIOS.
+//
+#define      HASH_COUNT             6
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm2Acpi.h b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm2Acpi.h
new file mode 100644
index 0000000..3c86567
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm2Acpi.h
@@ -0,0 +1,53 @@
+/** @file
+  TPM2 ACPI table definition.
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef _TPM2_ACPI_H_
+#define _TPM2_ACPI_H_
+
+#include <IndustryStandard/Acpi.h>
+
+#pragma pack (1)
+
+#define EFI_TPM2_ACPI_TABLE_REVISION  3
+
+typedef struct {
+  EFI_ACPI_DESCRIPTION_HEADER Header;
+  UINT32                      Flags;
+  UINT64                      AddressOfControlArea;
+  UINT32                      StartMethod;
+//UINT8                       PlatformSpecificParameters[];
+} EFI_TPM2_ACPI_TABLE;
+
+#define EFI_TPM2_ACPI_TABLE_START_METHOD_ACPI  2
+
+typedef struct {
+  UINT32   Reserved;
+  UINT32   Error;
+  UINT32   Cancel;
+  UINT32   Start;
+  UINT64   InterruptControl;
+  UINT32   CommandSize;
+  UINT64   Command;
+  UINT32   ResponseSize;
+  UINT64   Response;
+} EFI_TPM2_ACPI_CONTROL_AREA;
+
+#pragma pack ()
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm2DeviceLib.h b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm2DeviceLib.h
new file mode 100644
index 0000000..803fb6c
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/IndustryStandard/Tpm2DeviceLib.h
@@ -0,0 +1,112 @@
+/** @file
+  This library abstract how to access TPM2 hardware device.
+
+@copyright
+  Copyright (c) 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+#ifndef _TPM2_DEVICE_LIB_H_
+#define _TPM2_DEVICE_LIB_H_
+
+/**
+  This service enables the sending of commands to the TPM2.
+
+  @param[in]  InputParameterBlockSize  Size of the TPM2 input parameter block.
+  @param[in]  InputParameterBlock      Pointer to the TPM2 input parameter block.
+  @param[in]  OutputParameterBlockSize Size of the TPM2 output parameter block.
+  @param[in]  OutputParameterBlock     Pointer to the TPM2 output parameter block.
+
+  @retval EFI_SUCCESS            The command byte stream was successfully sent to the device and a response was successfully received.
+  @retval EFI_DEVICE_ERROR       The command was not successfully sent to the device or a response was not successfully received from the device.
+  @retval EFI_BUFFER_TOO_SMALL   The output parameter block is too small.
+**/
+EFI_STATUS
+EFIAPI
+Tpm2SubmitCommand (
+  IN UINT32            InputParameterBlockSize,
+  IN UINT8             *InputParameterBlock,
+  IN OUT UINT32        *OutputParameterBlockSize,
+  IN UINT8             *OutputParameterBlock
+  );
+
+/**
+  This service requests use TPM2.
+
+  @retval EFI_SUCCESS      Get the control of TPM2 chip.
+  @retval EFI_NOT_FOUND    TPM2 not found.
+  @retval EFI_DEVICE_ERROR Unexpected device behavior.
+**/
+EFI_STATUS
+EFIAPI
+Tpm2RequestUseTpm (
+  VOID
+  );
+
+/**
+  This service enables the sending of commands to the TPM2.
+
+  @param[in]  InputParameterBlockSize  Size of the TPM2 input parameter block.
+  @param[in]  InputParameterBlock      Pointer to the TPM2 input parameter block.
+  @param[in]  OutputParameterBlockSize Size of the TPM2 output parameter block.
+  @param[in]  OutputParameterBlock     Pointer to the TPM2 output parameter block.
+
+  @retval EFI_SUCCESS            The command byte stream was successfully sent to the device and a response was successfully received.
+  @retval EFI_DEVICE_ERROR       The command was not successfully sent to the device or a response was not successfully received from the device.
+  @retval EFI_BUFFER_TOO_SMALL   The output parameter block is too small.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *TPM2_SUBMIT_COMMAND) (
+  IN UINT32            InputParameterBlockSize,
+  IN UINT8             *InputParameterBlock,
+  IN OUT UINT32        *OutputParameterBlockSize,
+  IN UINT8             *OutputParameterBlock
+  );
+
+/**
+  This service requests use TPM2.
+
+  @retval EFI_SUCCESS      Get the control of TPM2 chip.
+  @retval EFI_NOT_FOUND    TPM2 not found.
+  @retval EFI_DEVICE_ERROR Unexpected device behavior.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *TPM2_REQUEST_USE_TPM) (
+  VOID
+  );
+
+typedef struct {
+  EFI_GUID                           ProviderGuid;
+  TPM2_SUBMIT_COMMAND                Tpm2SubmitCommand;
+  TPM2_REQUEST_USE_TPM               Tpm2RequestUseTpm;
+} TPM2_DEVICE_INTERFACE;
+
+/**
+  This service register TPM2 device.
+
+  @Param Tpm2Device  TPM2 device
+
+  @retval EFI_SUCCESS          This TPM2 device is registered successfully.
+  @retval EFI_UNSUPPORTED      System does not support register this TPM2 device.
+  @retval EFI_ALREADY_STARTED  System already register this TPM2 device.
+**/
+EFI_STATUS
+EFIAPI
+Tpm2RegisterTpm2DeviceLib (
+  IN TPM2_DEVICE_INTERFACE   *Tpm2Device
+  );
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Include/MeDxeLibSampleCode.dsc b/ReferenceCode/ME/SampleCode/Include/MeDxeLibSampleCode.dsc
new file mode 100644
index 0000000..334e205
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Include/MeDxeLibSampleCode.dsc
@@ -0,0 +1,26 @@
+## @file
+#  Build description file Sample Code for building the Me
+#
+#@copyright
+#  Copyright (c)  1999 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains an 'Intel Peripheral Driver' and uniquely
+#  identified as "Intel Reference Module" and is
+#  licensed for Intel CPUs and chipsets under the terms of your
+#  license agreement with Intel or your vendor.  This file may
+#  be modified by the user, subject to additional terms of the
+#  license agreement
+#
+
+#
+# ME Sample Code Libraries
+#
+$(PROJECT_ME_ROOT)\SampleCode\Library\AslUpdate\Dxe\AslUpdateLib.inf
+$(PROJECT_ME_ROOT)\SampleCode\Protocol\MeSampleCodeProtocolLib.inf
\ No newline at end of file
diff --git a/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/AslUpdateLib.inf b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/AslUpdateLib.inf
new file mode 100644
index 0000000..8b5396f
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/AslUpdateLib.inf
@@ -0,0 +1,66 @@
+## @file
+#  Provides services to update ASL tables.
+#
+#@copyright
+#  Copyright (c)  1999 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains a 'Sample Driver' and is licensed as such
+#  under the terms of your license agreement with Intel or your
+#  vendor.  This file may be modified by the user, subject to
+#  the additional terms of the license agreement
+#
+
+[defines]
+BASE_NAME            = AslUpdateLib
+COMPONENT_TYPE       = LIBRARY
+
+[sources.common]
+  DxeAslUpdateLib.c
+
+[includes.common]
+  $(EDK_SOURCE)/Foundation
+  $(EDK_SOURCE)/Foundation/Framework
+  $(EDK_SOURCE)/Foundation/Efi
+  $(EDK_SOURCE)/Foundation/Include
+  $(EDK_SOURCE)/Foundation/Efi/Include
+  $(EDK_SOURCE)/Foundation/Framework/Include
+  $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+  $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+#
+# Typically the sample code referenced will be available in the code base already
+# So keep this include at the end to defer to the source base definition
+# and only use the sample code definition if source base does not include these files.
+#
+  $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/SampleCode/Include
+
+#
+# Edk II Glue Library, some hearder are included by R9 header so have to include
+#
+
+ $(EFI_SOURCE)
+ $(EFI_SOURCE)/Framework
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Include/Pei
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+
+[libraries.common]
+  EdkIIGlueBaseMemoryLib
+  EdkIIGlueUefiBootServicesTableLib
+  EdkIIGlueUefiRuntimeServicesTableLib
+
+[nmake.common]
+
+ C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+                      -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
+                      -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__
diff --git a/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/DxeAslUpdateLib.c b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/DxeAslUpdateLib.c
new file mode 100644
index 0000000..79a7c86
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/DxeAslUpdateLib.c
@@ -0,0 +1,333 @@
+/** @file
+  Boot service DXE ASL update library implementation.
+  These functions in this file can be called during DXE and cannot be called during runtime
+  or in SMM which should use a RT or SMM library.
+  This library uses the ACPI Support protocol.
+
+@copyright
+  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+
+**/
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#include "AslUpdateLib.h"
+#endif
+static EFI_ACPI_SUPPORT_PROTOCOL  *mAcpiSupport = NULL;
+static EFI_ACPI_TABLE_PROTOCOL    *mAcpiTable   = NULL;
+
+//
+// Function implemenations
+//
+
+/**
+  Initialize the ASL update library state.
+  This must be called prior to invoking other library functions.
+
+  @param[in] None
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+InitializeAslUpdateLib (
+  VOID
+  )
+{
+  EFI_STATUS  Status;
+
+  ///
+  /// Locate ACPI tables
+  ///
+  Status = gBS->LocateProtocol (&gEfiAcpiSupportProtocolGuid, NULL, (VOID **) &mAcpiSupport);
+  ASSERT_EFI_ERROR (Status);
+  Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **) &mAcpiTable);
+  return EFI_SUCCESS;
+}
+
+/**
+  This procedure will update two kinds of asl code.
+  1:  Operating Region base address and length.
+  2:  Resource Consumption structures in device LDRC.
+
+  @param[in] AslSignature         The signature of Operation Region that we want to update.
+  @param[in] BaseAddress          Base address of IO trap.
+  @param[in] Length               Length of IO address.
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+UpdateAslCode (
+  IN     UINT32                   AslSignature,
+  IN     UINT16                   BaseAddress,
+  IN     UINT8                    Length
+  )
+{
+  EFI_STATUS                  Status;
+  EFI_ACPI_DESCRIPTION_HEADER *Table;
+  EFI_ACPI_TABLE_VERSION      Version;
+  UINT8                       *CurrPtr;
+  UINT8                       *Operation;
+  UINT32                      *Signature;
+  UINT8                       *DsdtPointer;
+  INTN                        Index;
+  UINTN                       Handle;
+  UINT16                      AslLength;
+
+  ///
+  /// Locate table with matching ID
+  ///
+  Index     = 0;
+  AslLength = 0;
+  do {
+    Status = mAcpiSupport->GetAcpiTable (mAcpiSupport, Index, (VOID **) &Table, &Version, &Handle);
+    if (Status == EFI_NOT_FOUND) {
+      break;
+    }
+
+    ASSERT_EFI_ERROR (Status);
+    Index++;
+  } while (Table->Signature != EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE);
+
+  ///
+  /// Fix up the following ASL Code in DSDT:
+  /// (1) OperationRegion's IO Base Address and Length.
+  /// (2) Resource Consumption in LPC Device.
+  ///
+  CurrPtr = (UINT8 *) Table;
+
+  ///
+  /// Loop through the ASL looking for values that we must fix up.
+  ///
+  for (DsdtPointer = CurrPtr; DsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length); DsdtPointer++) {
+    ///
+    /// Get a pointer to compare for signature
+    ///
+    Signature = (UINT32 *) DsdtPointer;
+
+    ///
+    /// Check if this is the signature we are looking for
+    ///
+    if ((*Signature) == AslSignature) {
+      ///
+      /// Conditional match.  For Region Objects, the Operator will always be the
+      /// byte immediately before the specific name.  Therefore, subtract 1 to check
+      /// the Operator.
+      ///
+      Operation = DsdtPointer - 1;
+
+      ///
+      /// If we have an operation region, update the base address and length
+      ///
+      if (*Operation == AML_OPREGION_OP) {
+        ///
+        /// Fixup the Base Address in OperationRegion.
+        ///
+        *(UINT16 *) (DsdtPointer + 6) = BaseAddress;
+
+        ///
+        /// Fixup the Length in OperationRegion.
+        ///
+        *(DsdtPointer + 9) = Length;
+      }
+
+    } else if ((*Signature) == EFI_SIGNATURE_32 ('L', 'D', 'R', 'C')) {
+      ///
+      /// Make sure it's device of LDRC and read the length
+      ///
+      if (*(DsdtPointer - 2) == AML_DEVICE_OP) {
+        AslLength = *(DsdtPointer - 1);
+      } else if (*(DsdtPointer - 3) == AML_DEVICE_OP) {
+        AslLength = *(UINT16 *) (DsdtPointer - 2);
+        AslLength = (AslLength & 0x0F) + ((AslLength & 0x0FF00) >> 4);
+      }
+      ///
+      /// Conditional match.  Search _CSR in Device (LDRC).
+      ///
+      for (Operation = DsdtPointer; Operation <= DsdtPointer + AslLength; Operation++) {
+        ///
+        /// Get a pointer to compare for signature
+        ///
+        Signature = (UINT32 *) Operation;
+
+        ///
+        /// Check if this is the signature we are looking for
+        ///
+        if ((*Signature) == EFI_SIGNATURE_32 ('_', 'C', 'R', 'S')) {
+          ///
+          /// Now look for an empty resource entry, fix the base address and length fields
+          ///
+          for (Index = 0; *(UINT16 *) (Operation + 9 + 8 * Index) != 0x0079; Index++) {
+            if (*(UINT16 *) (Operation + 11 + 8 * Index) == UINT16_BIT_MAGIC_NUMBER) {
+              ///
+              /// Fixup the Base Address and Length.
+              ///
+              *(UINT16 *) (Operation + 11 + 8 * Index)  = BaseAddress;
+              *(UINT16 *) (Operation + 13 + 8 * Index)  = BaseAddress;
+              *(Operation + 16 + 8 * Index)             = Length;
+              break;
+            }
+          }
+        }
+      }
+
+      DsdtPointer = DsdtPointer + AslLength;
+    }
+  }
+  ///
+  /// Update the modified ACPI table
+  ///
+  Status = mAcpiTable->InstallAcpiTable (
+                                  mAcpiTable,
+                                  Table,
+                                  Table->Length,
+                                  &Handle
+                                  );
+  FreePool (Table);
+
+  return EFI_SUCCESS;
+}
+
+/**
+  This function uses the ACPI support protocol to locate an ACPI table.
+  It is really only useful for finding tables that only have a single instance,
+  e.g. FADT, FACS, MADT, etc.  It is not good for locating SSDT, etc.
+
+  @param[in] Signature            Pointer to an ASCII string containing the OEM Table ID from the ACPI table header
+  @param[in] Table                Updated with a pointer to the table
+  @param[in] Handle               AcpiSupport protocol table handle for the table found
+  @param[in] Version              The version of the table desired
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+LocateAcpiTableBySignature (
+  IN      UINT32                        Signature,
+  IN OUT  EFI_ACPI_DESCRIPTION_HEADER   **Table,
+  IN OUT  UINTN                         *Handle,
+  IN OUT  EFI_ACPI_TABLE_VERSION        *Version
+  )
+{
+  EFI_STATUS              Status;
+  INTN                    Index;
+  EFI_ACPI_TABLE_VERSION  DesiredVersion;
+
+  DesiredVersion = *Version;
+  ///
+  /// Locate table with matching ID
+  ///
+  Index = 0;
+  do {
+    Status = mAcpiSupport->GetAcpiTable (mAcpiSupport, Index, (VOID **) Table, Version, Handle);
+    if (Status == EFI_NOT_FOUND) {
+      break;
+    }
+
+    ASSERT_EFI_ERROR (Status);
+    Index++;
+  } while ((*Table)->Signature != Signature || !(*Version & DesiredVersion));
+
+  ///
+  /// If we found the table, there will be no error.
+  ///
+  return Status;
+}
+
+/**
+  This function uses the ACPI support protocol to locate an ACPI SSDT table.
+
+  @param[in] TableId              Pointer to an ASCII string containing the OEM Table ID from the ACPI table header
+  @param[in] TableIdSize          Length of the TableId to match.  Table ID are 8 bytes long, this function
+                                  will consider it a match if the first TableIdSize bytes match
+  @param[in] Table                Updated with a pointer to the table
+  @param[in] Handle               AcpiSupport protocol table handle for the table found
+  @param[in] Version              See AcpiSupport protocol, GetAcpiTable function for use
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+LocateAcpiTableByOemTableId (
+  IN      UINT8                         *TableId,
+  IN      UINT8                         TableIdSize,
+  IN OUT  EFI_ACPI_DESCRIPTION_HEADER   **Table,
+  IN OUT  UINTN                         *Handle,
+  IN OUT  EFI_ACPI_TABLE_VERSION        *Version
+  )
+{
+  EFI_STATUS  Status;
+  INTN        Index;
+
+  ///
+  /// Locate table with matching ID
+  ///
+  Index = 0;
+  do {
+    Status = mAcpiSupport->GetAcpiTable (mAcpiSupport, Index, (VOID **) Table, Version, Handle);
+    if (Status == EFI_NOT_FOUND) {
+      break;
+    }
+
+    ASSERT_EFI_ERROR (Status);
+    Index++;
+  } while (CompareMem (&(*Table)->OemTableId, TableId, TableIdSize));
+
+  ///
+  /// If we found the table, there will be no error.
+  ///
+  return Status;
+}
+
+/**
+  This function calculates and updates an UINT8 checksum.
+
+  @param[in] Buffer               Pointer to buffer to checksum
+  @param[in] Size                 Number of bytes to checksum
+  @param[in] ChecksumOffset       Offset to place the checksum result in
+
+  @retval EFI_SUCCESS             The function completed successfully.
+**/
+EFI_STATUS
+AcpiChecksum (
+  IN VOID                         *Buffer,
+  IN UINTN                        Size,
+  IN UINTN                        ChecksumOffset
+  )
+{
+  UINT8 Sum;
+  UINT8 *Ptr;
+
+  Sum = 0;
+  //
+  // Initialize pointer
+  //
+  Ptr = Buffer;
+
+  //
+  // Set checksum to 0 first
+  //
+  Ptr[ChecksumOffset] = 0;
+
+  //
+  // Add all content of buffer
+  //
+  while (Size--) {
+    Sum = (UINT8) (Sum + (*Ptr++));
+  }
+  //
+  // Set checksum
+  //
+  Ptr                 = Buffer;
+  Ptr[ChecksumOffset] = (UINT8) (0xff - Sum + 1);
+
+  return EFI_SUCCESS;
+}
diff --git a/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.cif b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.cif
new file mode 100644
index 0000000..81b5bf0
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.cif
@@ -0,0 +1,11 @@
+<component>
+	name = "MeAslUpdateLib"
+	category = ModulePart
+	LocalRoot = "ReferenceCode\ME\SampleCode\Library\AslUpdate\Dxe"
+	RefName = "MeAslUpdateLib"
+[files]
+"MeAslUpdateLib.sdl"	
+"MeAslUpdateLib.mak"	
+"DxeAslUpdateLib.c"	
+"AslUpdateLib.inf"	
+<endComponent>
diff --git a/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.mak b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.mak
new file mode 100644
index 0000000..7417a00
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.mak
@@ -0,0 +1,32 @@
+# MAK file for the ModulePart:AslUpdateLib
+all : MeAslUpdateLib
+
+$(BUILD_DIR)\MeAslUpdateLib.lib : MeAslUpdateLib
+
+MeAslUpdateLib : $(BUILD_DIR)\MeAslUpdateLib.mak MeAslUpdateLibBin
+
+$(BUILD_DIR)\MeAslUpdateLib.mak : $(MeAslUpdateLib_DIR)\$(@B).cif $(MeAslUpdateLib_DIR)\$(@B).mak $(BUILD_RULES)
+  $(CIF2MAK) $(MeAslUpdateLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+MeAslUpdateLib_INCLUDES=\
+    $(EDK_INCLUDES)\
+    $(ME_INCLUDES)\
+    $(EdkIIGlueLib_INCLUDES)\
+    $(iAMT_INCLUDES)\
+    $(IndustryStandard_INCLUDES)
+
+MeAslUpdateLib_DEFINES=\
+    $(MY_DEFINES)\
+    /D __EDKII_GLUE_BASE_MEMORY_LIB__\
+    /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+
+MeAslUpdateLib_LIBS=\
+    $(EdkIIGlueBaseMemoryLib_LIB)\
+    $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+
+MeAslUpdateLibBin : $(MeAslUpdateLib_LIBS)
+  $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+    /f $(BUILD_DIR)\MeAslUpdateLib.mak all \
+    "MY_INCLUDES=$(MeAslUpdateLib_INCLUDES)"\
+    "MY_DEFINES=$(MeAslUpdateLib_DEFINES)"\
+    TYPE=LIBRARY\
\ No newline at end of file
diff --git a/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.sdl b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.sdl
new file mode 100644
index 0000000..aae94fb
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Library/AslUpdate/Dxe/MeAslUpdateLib.sdl
@@ -0,0 +1,29 @@
+TOKEN
+	Name  = MeAslUpdateLib_SUPPORT
+	Value  = 1
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	Master = Yes
+	Help  = "Main switch to enable AslUpdateLib support in Project"
+End
+
+MODULE
+	Help  = "Includes MeAslUpdateLib.mak to Project"
+	File  = "MeAslUpdateLib.mak"
+End
+
+PATH
+	Name  = "MeAslUpdateLib_DIR"
+End
+
+ELINK
+	Name  = "MeAslUpdateLib_LIB"
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\MeAslUpdateLib.lib"
+	Parent  = "MeAslUpdateLib_LIB"
+	InvokeOrder = AfterParent
+End
\ No newline at end of file
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.c b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.c
new file mode 100644
index 0000000..3b78726
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.c
@@ -0,0 +1,122 @@
+/** @file
+  Provides an interface to call function to send HECI message.
+
+@copyright
+  Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+#endif
+#include "MdesStatusCodeDxe.h"
+#include "MeLib.h"
+#include "MePlatformPolicy\MePlatformPolicy.h"
+
+
+EFI_GUID  gMdesStatusCodeProtocolGuid = MDES_STATUS_CODE_PROTOCOL_GUID;
+
+/**
+  This function is called in case of status code appears.
+  Provides an interface to call function to send HECI message.
+
+  @param[in] Type                 Indicates the type of status code being reported.
+  @param[in] Value                Describes the current status of a hardware or software entity.
+                                  This included information about the class and subclass that is
+                                  used to classify the entity as well as an operation.
+  @param[in] Instance             The enumeration of a hardware or software entity within
+                                  the system. Valid instance numbers start with 1.
+  @param[in] CallerId             This optional parameter may be used to identify the caller.
+                                  This parameter allows the status code driver to apply different
+                                  rules to different callers.
+  @param[in] Data                 This optional parameter may be used to pass additional data.
+
+  @retval EFI_STATUS              HECI sent with success.
+**/
+EFI_STATUS
+EFIAPI
+MdesReportStatusCodeHandler (
+  IN  EFI_STATUS_CODE_TYPE        Type,
+  IN  EFI_STATUS_CODE_VALUE       Value,
+  IN  UINT32                      Instance,
+  IN  EFI_GUID                    *CallerId OPTIONAL,
+  IN  EFI_STATUS_CODE_DATA        *Data OPTIONAL
+  )
+{
+  EFI_STATUS                      Status;
+
+  Status = HeciSendMdesStatusCode (Type, Value, Instance, CallerId, Data);
+
+  return Status;
+}
+
+MDES_STATUS_CODE_PROTOCOL MdesStatusCodeProtocolInstance = {MdesReportStatusCodeHandler};
+
+
+/**
+  Installs MdesStatusCodeProtocolInstance protocol.
+
+  @param[in] ImageHandle          Image handle of this driver.
+  @param[in] SystemTable          Global system service table.
+
+  @retval EFI_STATUS              Driver instaled with siccess.
+**/
+EFI_STATUS
+EFIAPI
+MdesStatusCodeDrvEntryPoint (
+  IN EFI_HANDLE                   ImageHandle,
+  IN EFI_SYSTEM_TABLE             *SystemTable
+  )
+{
+  EFI_STATUS                      Status;
+  MDES_BIOS_FLAGS                 Flags;
+  UINT32                          BiosEventFilters;
+  DXE_ME_POLICY_PROTOCOL          *MePlatformPolicy;
+
+  ///
+  /// Get the ME platform policy.
+  ///
+  Status = gBS->LocateProtocol (&gDxePlatformMePolicyGuid, NULL, (VOID **) &MePlatformPolicy);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  if(MePlatformPolicy->MeConfig.MdesForBiosState == TRUE) {
+    ///
+    /// Check if Mdes is enabled in FW
+    ///
+    Status = HeciGetMdesConfig(&Flags, &BiosEventFilters);
+    if (EFI_ERROR (Status)) {
+      return EFI_SUCCESS;
+    }
+    if (1) {
+      ///
+      /// Install Mdes protocol to be consumed by platform library for ReportStatusCode core driver.
+      ///
+      Status = gBS->InstallProtocolInterface (
+                      &ImageHandle,
+                      &gMdesStatusCodeProtocolGuid,
+                      EFI_NATIVE_INTERFACE,
+                      &MdesStatusCodeProtocolInstance
+                      );
+    }
+    {
+      PLATFORM_DEBUG_CAP Data;
+      UINT8              Result;
+
+      Data.Data = 3;
+      Status = HeciPlatformDebugCapabilityMsg(Data, &Result);
+    }
+  }
+  return Status;
+}
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.cif b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.cif
new file mode 100644
index 0000000..2647905
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.cif
@@ -0,0 +1,13 @@
+<component>
+	name = "MdesStatusCodeDxe"
+	category = ModulePart
+	LocalRoot = "ReferenceCode\ME\SampleCode\MdesStatusCode\Dxe"
+	RefName = "MdesStatusCodeDxe"
+[files]
+"MdesStatusCodeDxe.sdl"
+"MdesStatusCodeDxe.mak"
+"MdesStatusCodeDxe.c"
+"MdesStatusCodeDxe.dxs"
+"MdesStatusCodeDxe.h"
+"MdesStatusCodeDxe.inf"
+<endComponent>
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.dxs b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.dxs
new file mode 100644
index 0000000..ab85bb6
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.dxs
@@ -0,0 +1,39 @@
+/**
+
+Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+Module Name:
+
+  
+Abstract:
+
+  
+**/
+//
+// Common for R8 and R9 codebase
+//
+#include "AutoGen.h"
+#include "DxeDepex.h"
+
+//
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase;
+// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase.
+//
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_PROTOCOL_DEFINITION (Heci)
+#include EFI_PROTOCOL_DEFINITION (MePlatformPolicy)
+#endif
+
+DEPENDENCY_START
+  EFI_HECI_PROTOCOL_GUID AND
+  DXE_PLATFORM_ME_POLICY_GUID
+DEPENDENCY_END
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.h b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.h
new file mode 100644
index 0000000..74bfc0a
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.h
@@ -0,0 +1,59 @@
+/** @file
+  Header file to provides an interface to call function to send HECI message.
+
+@copyright
+  Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+
+--*/
+#ifndef _MDES_STATUS_CODE_DXE_H_
+#define _MDES_STATUS_CODE_DXE_H_
+
+#define MDES_STATUS_CODE_PROTOCOL_GUID \
+  { \
+    0xe5d0875a, 0xf647, 0x4e16, 0xbe, 0x4d, 0x95, 0x02, 0x40, 0x29, 0xcc, 0x44 \
+  }
+
+/**
+  This function is called in case of status code appears.
+  Provides an interface to call function to send HECI message.
+
+  @param[in] Type                 Indicates the type of status code being reported.
+  @param[in] Value                Describes the current status of a hardware or software entity.
+                                  This included information about the class and subclass that is
+                                  used to classify the entity as well as an operation.
+  @param[in] Instance             The enumeration of a hardware or software entity within
+                                  the system. Valid instance numbers start with 1.
+  @param[in] CallerId             This optional parameter may be used to identify the caller.
+                                  This parameter allows the status code driver to apply different
+                                  rules to different callers.
+  @param[in] Data                 This optional parameter may be used to pass additional data.
+
+  @retval EFI_STATUS              HECI sent with success.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SEND_STATUS_CODE) (
+  IN EFI_STATUS_CODE_TYPE         Type,
+  IN EFI_STATUS_CODE_VALUE        Value,
+  IN UINT32                       Instance,
+  IN EFI_GUID                     *CallerId OPTIONAL,
+  IN EFI_STATUS_CODE_DATA         *Data OPTIONAL
+  );
+
+typedef struct _MDES_STATUS_CODE_PROTOCOL {
+  SEND_STATUS_CODE                SendMdesStatusCode;
+} MDES_STATUS_CODE_PROTOCOL;
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.inf b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.inf
new file mode 100644
index 0000000..1a77fa5
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.inf
@@ -0,0 +1,82 @@
+## @file
+#  Component description file for the MdesStatusCodeDrv DXE driver.
+#
+#@copyright
+#  Copyright (c)  2011 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains a 'Sample Driver' and is licensed as such
+#  under the terms of your license agreement with Intel or your
+#  vendor.  This file may be modified by the user, subject to
+#  the additional terms of the license agreement
+#
+
+
+[defines]
+BASE_NAME            = MdesStatusCodeDxe
+FILE_GUID            = df5cd25a-8e55-46ba-8cda-bc7db7bf9c64
+COMPONENT_TYPE       = BS_DRIVER
+
+[sources.common]
+  MdesStatusCodeDxe.c
+  MdesStatusCodeDxe.h
+#
+# Edk II Glue Driver Entry Point
+#
+  EdkIIGlueDxeDriverEntryPoint.c
+
+[includes.common]
+  $(EFI_SOURCE)/$(PROJECT_ME_ROOT)
+  $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Heci/Include
+  $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Dxe
+  $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Library/MeKernel/Include
+  $(EFI_SOURCE)/$(PROJECT_ME_ROOT)/Protocol/MePlatformPolicy
+  $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include
+
+#
+# EDK II Glue Library utilizes some standard headers from EDK
+#
+ $(EDK_SOURCE)/Foundation
+ $(EDK_SOURCE)/Foundation/Core/Dxe
+ $(EDK_SOURCE)/Foundation/Efi
+ $(EDK_SOURCE)/Foundation/Efi/Include
+ $(EDK_SOURCE)/Foundation/Framework
+ $(EDK_SOURCE)/Foundation/Framework/Include
+ $(EDK_SOURCE)/Foundation/Include
+ $(EDK_SOURCE)/Foundation/Include/IndustryStandard
+ $(EDK_SOURCE)/Foundation/Library/Dxe/Include
+ $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include
+
+[libraries.common]
+  MeProtocolLib
+  MeLib
+  MeGuidLib
+  MeChipsetLib
+  EdkProtocolLib
+  EdkFrameworkProtocolLib
+  EdkIIGlueBaseLib
+  EdkIIGlueBaseIoLibIntrinsic
+  EdkIIGlueDxeDebugLibReportStatusCode
+  EdkIIGlueDxeReportStatusCodeLib
+  EdkIIGlueUefiBootServicesTableLib
+  EdkIIGlueDxeServicesTableLib
+  EdkIIGlueEdkDxeRuntimeDriverLib
+  EdkIIGlueBasePciLibPciExpress
+
+[nmake.common]
+  IMAGE_ENTRY_POINT= _ModuleEntryPoint
+  DPX_SOURCE=MdesStatusCodeDxe.dxs
+  C_FLAGS = $(C_FLAGS)  -D __EDKII_GLUE_MODULE_ENTRY_POINT__=MdesStatusCodeDrvEntryPoint \
+                        -D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+                        -D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+                        -D __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__ \
+                        -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+                        -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+                        -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+                        -D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.mak b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.mak
new file mode 100644
index 0000000..6e49bcc
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.mak
@@ -0,0 +1,142 @@
+#*************************************************************************
+#*************************************************************************
+#**                                                                     **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.            **
+#**                                                                     **
+#**                       All Rights Reserved.                          **
+#**                                                                     **
+#**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+#**                                                                     **
+#**                       Phone: (770)-246-8600                         **
+#**                                                                     **
+#*************************************************************************
+#*************************************************************************
+#**********************************************************************
+#
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeSampleCode/MdesStatusCodeDxe/MdesStatusCodeDxe.mak 1     4/06/12 8:57a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 4/06/12 8:57a $
+#
+#**********************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeSampleCode/MdesStatusCodeDxe/MdesStatusCodeDxe.mak $
+# 
+# 1     4/06/12 8:57a Klzhan
+# 
+# 4     3/27/12 5:17a Klzhan
+# Correct TYPE of this modulepart.
+# 
+# 3     10/19/11 9:19a Calvinchen
+# [TAG]  		EIP65695
+# [Category]  	Bug Fix
+# [Severity]  	Normal
+# [Symptom]  	Support HECI protocol in SMM for ME 8.0
+# [Solution]  	Removed "EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB" from Make
+# file.
+# 
+# 2     9/27/11 5:03a Klzhan
+# Fix build error
+# 
+# 1     9/27/11 4:46a Klzhan
+# 
+# 
+#
+#**********************************************************************
+#
+#<AMI_FHDR_START>
+#----------------------------------------------------------------------------
+#
+# Name:            MdesStatusCodeDrv.mak
+#
+# Description:     Mdes Status Code driver
+#
+#----------------------------------------------------------------------------
+#<AMI_FHDR_END>
+all : MdesStatusCodeDrv
+
+MdesStatusCodeDrv : $(BUILD_DIR)\MdesStatusCodeDxe.mak MdesStatusCodeDrvBin
+
+$(BUILD_DIR)\MdesStatusCodeDxe.mak : $(MdesStatusCodeDrv_DIR)\$(@B).cif $(MdesStatusCodeDrv_DIR)\$(@B).mak $(BUILD_RULES)
+	$(CIF2MAK) $(MdesStatusCodeDrv_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+
+MdesStatusCodeDrv_INCLUDES=\
+  $(EDK_INCLUDES)\
+  $(ME_INCLUDES)\
+  $(EdkIIGlueLib_INCLUDES)\
+  $(EdkIIGlueInclude)\
+  $(IndustryStandard_INCLUDES)\
+  -I$(MeProtocolLib_DIR)\
+  -I$(INTEL_COUGAR_POINT_INCLUDE_DIR)
+
+MdesStatusCodeDrv_DEFINES = $(MY_DEFINES)\
+  /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=MdesStatusCodeDrvEntryPoint"\
+  /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+  /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+  /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+  /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+  /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+  /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__  
+
+
+MdesStatusCodeDrv_LIB_LINKS =\
+  $(EDKFRAMEWORKPROTOCOLLIB)\
+  $(INTEL_PCH_PROTOCOL_LIB)\
+  $(EdkIIGlueBasePrintLib_LIB) \
+  $(EdkIIGlueUefiLib_LIB)\
+  $(TdtProtocolLib_LIB)\
+  $(ProtocolLib_LIB)\
+  $(EFISCRIPTLIB)\
+  $(AmtLibDxe_LIB)\
+  $(MeLibDxe_LIB)\
+  $(EdkIIGlueBaseLib_LIB)\
+  $(AmtGuidLib_LIB)\
+  $(EFIGUIDLIB)\
+  $(EDKPROTOCOLLIB)\
+!IF "$(x64_BUILD)"=="1"
+  $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+  $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+  $(EdkIIGlueBaseMemoryLib_LIB)\
+  $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+  $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+  $(EdkIIGluePeiDxeDebugLibReportStatusCode_LIB)\
+  $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+  $(EdkIIGlueDxeMemoryAllocationLib_LIB)\
+  $(EdkIIGlueBasePciLibPciExpress_LIB)\
+  $(EFIDRIVERLIB)\
+  $(EdkIIGlueDxeServicesTableLib_LIB)\
+  $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+  $(MeProtocolLib_LIB)
+# MAK file for the eModule:TdtDxe
+
+MdesStatusCodeDrvBin : $(MdesStatusCodeDrv_LIB_LINKS)
+	$(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+		/f $(BUILD_DIR)\MdesStatusCodeDxe.mak all\
+		"MY_INCLUDES=$(MdesStatusCodeDrv_INCLUDES)"\
+        	"MY_DEFINES=$(MdesStatusCodeDrv_DEFINES)"\
+		GUID=df5cd25a-8e55-46ba-8cda-bc7db7bf9c64 \
+		ENTRY_POINT=_ModuleEntryPoint \
+		TYPE=BS_DRIVER \
+        	EDKIIModule=DXEDRIVER\
+		DEPEX1=$(MdesStatusCodeDrv_DIR)\MdesStatusCodeDxe.dxs \
+		DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX \
+		COMPRESS=1\
+
+#*************************************************************************
+#*************************************************************************
+#**                                                                     **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.            **
+#**                                                                     **
+#**                       All Rights Reserved.                          **
+#**                                                                     **
+#**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+#**                                                                     **
+#**                       Phone: (770)-246-8600                         **
+#**                                                                     **
+#*************************************************************************
+#*************************************************************************
\ No newline at end of file
diff --git a/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.sdl b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.sdl
new file mode 100644
index 0000000..f61edd3
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MdesStatusCode/Dxe/MdesStatusCodeDxe.sdl
@@ -0,0 +1,25 @@
+TOKEN
+	Name  = "MDES_STATUSCODE_DRV_SUPPORT"
+	Value  = "1"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	TargetH = Yes
+	Master = Yes
+	Help  = "Main switch to enable IccOverClocking support in Project"
+End
+
+MODULE
+	Help  = "Includes MebxSetupBrowser.mak to Project"
+	File  = "MdesStatusCodeDxe.mak"
+End
+
+PATH
+	Name  = "MdesStatusCodeDrv_DIR"
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\MdesStatusCodeDxe.ffs"
+	Parent  = "FV_MAIN"
+	InvokeOrder = AfterParent
+End
\ No newline at end of file
diff --git a/ReferenceCode/ME/SampleCode/MeSampleCode.cif b/ReferenceCode/ME/SampleCode/MeSampleCode.cif
new file mode 100644
index 0000000..3b8484e
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/MeSampleCode.cif
@@ -0,0 +1,28 @@
+<component>
+	name = "MeSampleCode"
+	category = ModulePart
+	LocalRoot = "ReferenceCode\ME\SampleCode\"
+	RefName = "MeSampleCode"
+[files]
+"Include\MeDxeLibSampleCode.dsc"	
+"Include\Acpi1_0.h"	
+"Include\Acpi2_0.h"	
+"Include\Acpi3_0.h"	
+"Include\AlertStandardFormatTable.h"	
+"Include\AslUpdateLib.h"	
+"AsfSupport\AsfSupport.h"	
+"AsfSupport\AsfSupport.c"	
+"Protocol\SmmVariable\SmmVariable.h"
+"Include\Guid\MemoryOverwriteControl\MemoryOverwriteControl.h"
+"Include\Guid\TrEEPhysicalPresenceData\TrEEPhysicalPresenceData.h"
+"Include\IndustryStandard\AcpiAml.h"
+"Include\IndustryStandard\Tpm20.h"
+"Include\IndustryStandard\Tpm20Implementation.h"
+"Include\IndustryStandard\Tpm2Acpi.h"
+"Include\IndustryStandard\Tpm2DeviceLib.h"
+[parts]
+"MeAslUpdateLib"
+"PlatformReset"
+"MePlatformGetResetTypeProtocolLib"
+"MdesStatusCodeDxe"
+<endComponent>
diff --git a/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.c b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.c
new file mode 100644
index 0000000..55cdf11
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.c
@@ -0,0 +1,168 @@
+/** @file
+  Provide the ResetSystem AP
+
+@copyright
+  Copyright (c) 2011 - 2013 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains an 'Intel Peripheral Driver' and uniquely
+  identified as "Intel Reference Module" and is
+  licensed for Intel CPUs and chipsets under the terms of your
+  license agreement with Intel or your vendor.  This file may
+  be modified by the user, subject to additional terms of the
+  license agreement
+**/
+#include "PlatformReset.h"
+#include "MeLib.h"
+PCH_RESET_PROTOCOL  *mPchReset;
+
+/**
+  Reset the system
+
+  @param[in] ResetType            Warm or cold
+  @param[in] ResetStatus          Possible cause of reset
+  @param[in] DataSize             Size of ResetData in bytes
+  @param[in] ResetData            Optional Unicode string
+
+  @retval Does not return if the reset takes place.
+**/
+VOID
+EFIAPI
+PlatformResetSystem (
+  IN EFI_RESET_TYPE               ResetType,
+  IN EFI_STATUS                   ResetStatus,
+  IN UINTN                        DataSize,
+  IN CHAR16                       *ResetData OPTIONAL
+  )
+{
+  EFI_STATUS                          Status;
+  ME_PLATFORM_GET_RESET_TYPE_PROTOCOL *MePlatformGetResetType;
+  PCH_RESET_TYPE                      OverridePchResetType;
+  PCH_RESET_TYPE                      PchResetType;
+  UINTN                               NumberMePlatformGetResetHandles;
+  EFI_HANDLE                          *MePlatformGetResetHandles;
+  UINTN                               Index;
+
+  PchResetType = ResetType;
+  OverridePchResetType = ResetType;
+
+  if (!EfiAtRuntime ()) {
+    Status = gBS->LocateHandleBuffer (
+                    ByProtocol,
+                    &gMePlatformGetResetTypeGuid,
+                    NULL,
+                    &NumberMePlatformGetResetHandles,
+                    &MePlatformGetResetHandles
+                    );
+    if (!EFI_ERROR (Status)) {
+      for (Index = 0; Index < NumberMePlatformGetResetHandles; Index++) {
+        Status = gBS->HandleProtocol (
+                        MePlatformGetResetHandles[Index],
+                        &gMePlatformGetResetTypeGuid,
+                        (VOID **) &MePlatformGetResetType
+                        );
+        if (!EFI_ERROR (Status)) {
+          PchResetType = MePlatformGetResetType->GetResetType (ResetType);
+          DEBUG ((EFI_D_INFO, "Returned Pch ResetType is: %x\n", PchResetType));
+          if (PchResetType >= MaxRestReq) {
+            DEBUG ((EFI_D_ERROR, "Platform Reset failed, invalid parameter\n"));
+            ASSERT (FALSE);
+          }
+          if (OverridePchResetType < PchResetType) {
+            DEBUG ((EFI_D_INFO, "Previous Pch ResetType is: %x\n", OverridePchResetType));
+            OverridePchResetType = PchResetType;
+          }
+          DEBUG ((EFI_D_INFO, "Current Pch ResetType is: %x\n", OverridePchResetType));
+        }
+      }
+    }
+    PchResetType = OverridePchResetType;
+    if ((PchResetType == GlobalReset) || (PchResetType == GlobalResetWithEc)) {
+      ///
+      /// Let ME do global reset if Me Fw is available
+      ///
+      Status = HeciSendCbmResetRequest (CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+      if (!EFI_ERROR (Status)) {
+        ///
+        /// ME Global Reset should fail after EOP is sent.
+        /// Go to use PCH Reset
+        ///
+        gBS->Stall (1000000);
+      }
+    }
+  }
+
+  mPchReset->Reset (mPchReset, PchResetType);
+
+  ASSERT (FALSE);
+}
+
+/**
+  Entry point of Platform Reset driver.
+
+  @param[in] ImageHandle          Standard entry point parameter
+  @param[in] SystemTable          Standard entry point parameter
+
+  @retval EFI_SUCCESS             Reset RT protocol installed
+  @retval All other error conditions encountered result in an ASSERT
+**/
+EFI_STATUS
+InitializePlatformReset (
+  IN EFI_HANDLE                   ImageHandle,
+  IN EFI_SYSTEM_TABLE             *SystemTable
+  )
+{
+  EFI_HANDLE                      Handle;
+  EFI_STATUS                      Status;
+
+  Status = gBS->LocateProtocol (&gPchResetProtocolGuid, NULL, (VOID **) &mPchReset);
+  ASSERT_EFI_ERROR (Status);
+
+  ///
+  /// Make sure the Reset Architectural Protocol is not already installed in the system
+  ///
+  ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiResetArchProtocolGuid);
+
+  ///
+  /// Hook the runtime service table
+  ///
+  SystemTable->RuntimeServices->ResetSystem = PlatformResetSystem;
+
+  ///
+  /// Now install the Reset RT AP on a new handle
+  ///
+  Handle = NULL;
+  Status = gBS->InstallMultipleProtocolInterfaces (
+                  &Handle,
+                  &gEfiResetArchProtocolGuid,
+                  NULL,
+                  NULL
+                  );
+  ASSERT_EFI_ERROR (Status);
+
+  return Status;
+}
+
+/**
+  Fixup internal data pointers so that the services can be called in virtual mode.
+
+  @param[in] Event                The event registered.
+  @param[in] Context              Event context. Not used in this event handler.
+
+  @retval None
+**/
+EFI_RUNTIMESERVICE
+VOID
+PchResetVirtualddressChangeEvent (
+  IN EFI_EVENT                    Event,
+  IN VOID                         *Context
+  )
+{
+  gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &mPchReset);
+}
diff --git a/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.cif b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.cif
new file mode 100644
index 0000000..6403a09
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.cif
@@ -0,0 +1,12 @@
+<component>
+	name = "PlatformReset"
+	category = ModulePart
+	LocalRoot = "ReferenceCode\ME\SampleCode\PlatformReset\RuntimeDxe"
+	RefName = "PlatformReset"
+[files]
+"PlatformReset.sdl"	
+"PlatformReset.mak"
+"PlatformReset.h"	
+"PlatformReset.c"	
+"PlatformReset.dxs"
+<endComponent>
diff --git a/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.dxs b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.dxs
new file mode 100644
index 0000000..62919fa
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.dxs
@@ -0,0 +1,41 @@
+/** @file
+  Dependency expression source file.
+
+@copyright
+  Copyright (c)  2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+
+**/
+
+
+//
+// Common for R8 and R9 codebase
+//
+#include "AutoGen.h"
+#include "DxeDepex.h"
+
+//
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase;
+// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version
+// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase.
+//
+#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB)
+#include "EfiDepex.h"
+#include EFI_PROTOCOL_DEFINITION (PchReset)
+#endif
+
+DEPENDENCY_START
+  PCH_RESET_PROTOCOL_GUID
+DEPENDENCY_END
+
diff --git a/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.h b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.h
new file mode 100644
index 0000000..9847b5e
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.h
@@ -0,0 +1,29 @@
+/** @file
+  Definitions for PlatformReset driver
+
+@copyright
+  Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains an 'Intel Peripheral Driver' and uniquely
+  identified as "Intel Reference Module" and is
+  licensed for Intel CPUs and chipsets under the terms of your
+  license agreement with Intel or your vendor.  This file may
+  be modified by the user, subject to additional terms of the
+  license agreement
+**/
+#ifndef _PLATFORM_RESET_H_
+#define _PLATFORM_RESET_H_
+
+#include "EdkIIGlueDxe.h"
+#include EFI_PROTOCOL_CONSUMER (PchReset)
+#include EFI_PROTOCOL_CONSUMER (MePlatformGetResetType)
+#include EFI_ARCH_PROTOCOL_DEFINITION (Reset)
+
+#endif // _PLATFORM_RESET_H_
diff --git a/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.mak b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.mak
new file mode 100644
index 0000000..7ad1b51
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.mak
@@ -0,0 +1,67 @@
+#---------------------------------------------------------------------------
+#   Create PlatformReset Driver
+#---------------------------------------------------------------------------
+
+All : PlatformReset
+
+PlatformReset : $(BUILD_DIR)\PlatformReset.mak PlatformResetBin
+
+$(BUILD_DIR)\PlatformReset.mak : $(PlatformReset_DIR)\$(@B).cif $(PlatformReset_DIR)\$(@B).mak $(BUILD_RULES)
+  $(CIF2MAK) $(PlatformReset_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+PlatformReset_INCLUDES=\
+    $(ME_INCLUDES) \
+    /I$(ME_DIR)\SampleCode \
+    $(INTEL_PCH_INCLUDES)\
+    $(EdkIIGlueLib_INCLUDES)\
+
+PlatformReset_DEFINES = $(MY_DEFINES)\
+  /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InitializePlatformReset"\
+  /D"__EDKII_GLUE_SET_VIRTUAL_ADDRESS_MAP_EVENT_HANDLER__=PchResetVirtualddressChangeEvent"\
+  /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \
+  /D __EDKII_GLUE_BASE_LIB__ \
+  /D __EDKII_GLUE_BASE_MEMORY_LIB__ \
+  /D __EDKII_GLUE_DXE_REPORT_STATUS_CODE_LIB__ \
+  /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \
+  /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
+  /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__\
+
+PlatformReset_LIBS=\
+    $(MeLibDxe_LIB)\
+    $(MeSampleCodeProtocolLib_LIB)\
+    $(INTEL_PCH_PROTOCOL_LIB)\
+    $(EDKPROTOCOLLIB)\
+    $(EDKFRAMEWORKPROTOCOLLIB)\
+    $(IntelMpgProtocolLib_LIB)\
+    $(EdkIIGlueBaseLib_LIB)\
+    $(EdkIIGlueBaseIoLibIntrinsic_LIB)\
+!IF "$(x64_BUILD)"=="1"
+    $(EdkIIGlueBaseLibX64_LIB)\
+!ELSE
+    $(EdkIIGlueBaseLibIA32_LIB)\
+!ENDIF
+    $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+    $(EdkIIGlueUefiBootServicesTableLib_LIB)\
+    $(EdkIIGlueDxeServicesTableLib_LIB)\
+    $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\
+    $(EdkIIGlueDxeReportStatusCodeLib_LIB)\
+    $(MePlatformGetResetTypeProtocolLib_LIB)
+#    $(EFIDRIVERLIB)\
+#    $(EdkIIGlueUefiRuntimeServicesTableLib_LIB)\
+#    $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
+
+
+PlatformResetBin : $(PlatformReset_LIBS)
+  $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
+    /f $(BUILD_DIR)\PlatformReset.mak all \
+    GUID=9A9A912B-5F53-4586-8820-704485A29D21\
+    "MY_INCLUDES=$(PlatformReset_INCLUDES)"\
+    "MY_DEFINES=$(PlatformReset_DEFINES)"\
+    ENTRY_POINT=_ModuleEntryPoint\
+    TYPE=RT_DRIVER\
+    EDKIIModule=DXEDRIVER\
+    DEPEX1=$(PlatformReset_DIR)\PlatformReset.dxs\
+    DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
+    COMPRESS=1
+
+
diff --git a/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.sdl b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.sdl
new file mode 100644
index 0000000..97fc45e
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/PlatformReset/RuntimeDxe/PlatformReset.sdl
@@ -0,0 +1,26 @@
+TOKEN
+	Name  = "PlatformReset_SUPPORT"
+	Value  = "1"
+	Help  = "Main switch to enable PlatformReset support in Project"
+	TokenType = Boolean
+	TargetEQU = Yes
+	TargetMAK = Yes
+	TargetH = Yes
+	Master = Yes
+End
+
+PATH
+	Name  = "PlatformReset_DIR"
+End
+
+MODULE
+	Help  = "Includes PlatformReset.mak to Project"
+	File  = "PlatformReset.mak"
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\PlatformReset.ffs"
+	Parent  = "FV_MAIN"
+	InvokeOrder = AfterParent
+End
+
diff --git a/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetType.c b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetType.c
new file mode 100644
index 0000000..43b748a
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetType.c
@@ -0,0 +1,42 @@
+/** @file
+  This file defines the EFI ME Platform Get Reset Type Protocol
+
+@copyright
+  Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+
+//
+// Statements that include other files
+//
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000)
+#include "EdkIIGlueDxe.h"
+//
+// Include the protocol header file
+//
+#include EFI_PROTOCOL_DEFINITION (MePlatformGetResetType)
+#endif
+//
+// Protocol GUID definition
+//
+EFI_GUID  gMePlatformGetResetTypeGuid = ME_PLATFORM_GET_RESET_TYPE_GUID;
+
+//
+// Protocol description
+//
+EFI_GUID_STRING(&gMePlatformGetResetTypeGuid, "MePlatformGetResetType Protocol", "Intel(R) ME Platform Reset Protocol");
diff --git a/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetType.h b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetType.h
new file mode 100644
index 0000000..5134b55
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetType.h
@@ -0,0 +1,57 @@
+/** @file
+  Interface definition Me Platform Get Reset Type.
+
+@copyright
+  Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains a 'Sample Driver' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may be modified by the user, subject to
+  the additional terms of the license agreement
+**/
+#ifndef _ME_PLATFORM_GET_RESET_TYPE_H_
+#define _ME_PLATFORM_GET_RESET_TYPE_H_
+
+#define ME_PLATFORM_GET_RESET_TYPE_GUID \
+  { \
+    0xb8cdced7, 0xbdc4, 0x4464, 0x9a, 0x1a, 0xff, 0x3f, 0xbd, 0xf7, 0x48, 0x69 \
+  }
+
+#define ME_PLATFORM_GET_RESET_TYPE_PROTOCOL_REVISION  1
+extern EFI_GUID gMePlatformGetResetTypeGuid;
+
+///
+/// ME_SPEICAL_RESET_TYPES must be aligned with PCH_EXTENDED_RESET_TYPES
+///
+typedef enum {
+  PowerCycleResetReq  = 3,
+  GlobalResetReq,
+  GlobalResetWithEcReq,
+  MaxRestReq
+} ME_SPEICAL_RESET_TYPES;
+
+/**
+  Get Platform requested reset type
+
+  @param[in] Type                 UEFI defined reset type
+
+  @retval ME_SPEICAL_RESET_TYPES  ME reset type aligned with PCH_EXTENDED_RESET_TYPES
+**/
+typedef
+ME_SPEICAL_RESET_TYPES
+(EFIAPI *GET_RESET_TYPE) (
+  IN EFI_RESET_TYPE               Type
+  );
+
+typedef struct _ME_PLATFORM_GET_RESET_TYPE_PROTOCOL {
+  GET_RESET_TYPE                  GetResetType;
+} ME_PLATFORM_GET_RESET_TYPE_PROTOCOL;
+
+#endif
diff --git a/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.cif b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.cif
new file mode 100644
index 0000000..2e4412e
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.cif
@@ -0,0 +1,11 @@
+<component>
+	name = "MePlatformGetResetTypeProtocolLib"
+	category = ModulePart
+	LocalRoot = "\ReferenceCode\ME\SampleCode\Protocol\MePlatformGetResetType\"
+	RefName = "MePlatformGetResetTypeProtocolLib"
+[files]
+"MePlatformGetResetTypeProtocolLib.sdl"	
+"MePlatformGetResetTypeProtocolLib.mak"	
+"MePlatformGetResetType.h"	
+"MePlatformGetResetType.c"	
+<endComponent>
diff --git a/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.mak b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.mak
new file mode 100644
index 0000000..504290e
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.mak
@@ -0,0 +1,67 @@
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**             6145-F Northbelt Pkwy, Norcross, GA 30071            **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
+#**********************************************************************
+# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/ME/MeSampleCode/MePlatformGetResetTypeProtocolLib/MePlatformGetResetTypeProtocolLib.mak 1     2/08/12 12:55a Klzhan $
+#
+# $Revision: 1 $
+#
+# $Date: 2/08/12 12:55a $
+#**********************************************************************
+# Revision History
+# ----------------
+# 
+#**********************************************************************
+#<AMI_FHDR_START>
+#
+# Name:	AmtWrapperProtocolLib.mak
+#
+# Description:	
+#
+#<AMI_FHDR_END>
+#**********************************************************************
+all : MePlatformGetResetTypeProtocolLib
+
+$(BUILD_DIR)\MePlatformGetResetTypeProtocolLib.lib : MePlatformGetResetTypeProtocolLib
+
+MePlatformGetResetTypeProtocolLib : $(BUILD_DIR)\MePlatformGetResetTypeProtocolLib.mak MePlatformGetResetTypeProtocolLibBin
+
+$(BUILD_DIR)\MePlatformGetResetTypeProtocolLib.mak : $(MePlatformGetResetTypeProtocolLib_DIR)\$(@B).cif $(MePlatformGetResetTypeProtocolLib_DIR)\$(@B).mak $(BUILD_RULES)
+	$(CIF2MAK) $(MePlatformGetResetTypeProtocolLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
+
+MePlatformGetResetTypeProtocolLib_INCLUDES=\
+		$(EDK_INCLUDES) \
+                $(EdkIIGlueLib_INCLUDES)\
+		$(ME_INCLUDES) \
+		$(MISCFRAMEWORK_INCLUDES) \
+                -I ReferenceCode\ME\SampleCode
+		
+MePlatformGetResetTypeProtocolLibBin :
+	$(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS)\
+		/f $(BUILD_DIR)\MePlatformGetResetTypeProtocolLib.mak all\
+		"MY_INCLUDES=$(MePlatformGetResetTypeProtocolLib_INCLUDES)" \
+		TYPE=LIBRARY \
+
+#**********************************************************************
+#**********************************************************************
+#**                                                                  **
+#**        (C)Copyright 1985-2010, American Megatrends, Inc.         **
+#**                                                                  **
+#**                       All Rights Reserved.                       **
+#**                                                                  **
+#**             6145-F Northbelt Pkwy, Norcross, GA 30071            **
+#**                                                                  **
+#**                       Phone: (770)-246-8600                      **
+#**                                                                  **
+#**********************************************************************
+#**********************************************************************
\ No newline at end of file
diff --git a/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.sdl b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.sdl
new file mode 100644
index 0000000..1c0cc7d
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Protocol/MePlatformGetResetType/MePlatformGetResetTypeProtocolLib.sdl
@@ -0,0 +1,34 @@
+TOKEN
+	Name  = "MePlatformGetResetTypeProtocolLib_SUPPORT"
+	Value  = "1"
+	Help  = "Main switch to enable AmtWrapperProtocolLib support in Project"
+	TokenType = Boolean
+	TargetMAK = Yes
+	Master = Yes
+End
+
+PATH
+	Name  = "MePlatformGetResetTypeProtocolLib_DIR"
+End
+
+ELINK
+	Name  = "/I$(MePlatformGetResetTypeProtocolLib_DIR)"
+	Parent  = "ME_INCLUDES"
+	InvokeOrder = AfterParent
+End
+
+MODULE
+	Help  = "Includes AmtWrapperProtocolLib.mak to Project"
+	File  = "MePlatformGetResetTypeProtocolLib.mak"
+End
+
+ELINK
+	Name  = "MePlatformGetResetTypeProtocolLib_LIB"
+	InvokeOrder = ReplaceParent
+End
+
+ELINK
+	Name  = "$(BUILD_DIR)\MePlatformGetResetTypeProtocolLib.lib"
+	Parent  = "MePlatformGetResetTypeProtocolLib_LIB"
+	InvokeOrder = AfterParent
+End
diff --git a/ReferenceCode/ME/SampleCode/Protocol/SmmVariable/SmmVariable.h b/ReferenceCode/ME/SampleCode/Protocol/SmmVariable/SmmVariable.h
new file mode 100644
index 0000000..06c7762
--- /dev/null
+++ b/ReferenceCode/ME/SampleCode/Protocol/SmmVariable/SmmVariable.h
@@ -0,0 +1,52 @@
+/*++ @file
+  SMM Variable Protocol
+
+@copyright
+  Copyright (c) 2010 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains 'Framework Code' and is licensed as such
+  under the terms of your license agreement with Intel or your
+  vendor.  This file may not be modified, except as allowed by
+  additional terms of your license agreement.
+--*/
+
+#ifndef _SMM_VARIABLE_H_
+#define _SMM_VARIABLE_H_
+
+//
+// SmmVariable Protocol GUID value
+//
+// Note: The GUID value is the same as the protocol produced in EDKII.
+#define EFI_SMM_VARIABLE_PROTOCOL_GUID \
+  { \
+    0xed32d533, 0x99e6, 0x4209, 0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7 \
+  }
+
+EFI_FORWARD_DECLARATION (EFI_SMM_VARIABLE_PROTOCOL);
+
+typedef struct _EFI_SMM_VARIABLE_PROTOCOL  EFI_SMM_VARIABLE_PROTOCOL;
+
+///
+/// EFI SMM Variable Protocol is intended for use as a means
+/// to store data in the EFI SMM environment.
+///
+struct _EFI_SMM_VARIABLE_PROTOCOL {
+  EFI_GET_VARIABLE            SmmGetVariable;
+  EFI_GET_NEXT_VARIABLE_NAME  SmmGetNextVariableName;
+  EFI_SET_VARIABLE            SmmSetVariable;
+  EFI_QUERY_VARIABLE_INFO     SmmQueryVariableInfo;
+};
+
+///
+/// SmmVariable Protocol GUID variable.
+///
+extern EFI_GUID gEfiSmmVariableProtocolGuid;
+
+#endif