init. 1AQQW051HEADmaster

10 files changed, 629 insertions, 0 deletions

diff --git a/ReferenceCode/RapidStart/Include/RapidStartAcpi.dsc b/ReferenceCode/RapidStart/Include/RapidStartAcpi.dsc
new file mode 100644
index 0000000..d4376fa
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartAcpi.dsc
@@ -0,0 +1,69 @@
+## @file
+#  Build description file for building the RapidStart ACPI tables
+#
+#@copyright
+#  Copyright (c)  1999 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains an 'Intel Peripheral Driver' and uniquely
+#  identified as "Intel Reference Module" and is
+#  licensed for Intel CPUs and chipsets under the terms of your
+#  license agreement with Intel or your vendor.  This file may
+#  be modified by the user, subject to additional terms of the
+#  license agreement
+#
+
+[=============================================================================]
+#
+# Instructions for building the RapidStart ACPI table storage file
+#
+[=============================================================================]
+[Build.Ia32.RAPID_START_ACPI_TABLES,Build.x64.RAPID_START_ACPI_TABLES]
+#
+# Check if we have any source to work with.
+#
+!IFNDEF SECTIONS
+!IFNDEF ASL_FILES
+!ERROR No ASL source files to build were defined in the INF file
+!ENDIF
+!ENDIF
+
+#
+# Define some macros to simplify changes
+#
+TARGET_FFS_FILE   = $(BIN_DIR)\$(FILE_GUID)-$(BASE_NAME).ffs
+
+$(DEST_DIR)\RapidStart.sec : $(ASL_SOURCE_FILES) $(ASL_FILES)
+    $(ASL) $(ASL_FLAGS) $(DEST_DIR)\Ssdt\RapidStart.asl
+    -copy $(DEST_DIR)\Ssdt\RapidStart.aml $(DEST_DIR)\RapidStart.acpi
+    $(GENSECTION) -I $(DEST_DIR)\RapidStart.acpi -O $(DEST_DIR)\RapidStart.sec -S EFI_SECTION_RAW
+
+#
+# Build FFS file
+#
+$(TARGET_FFS_FILE) : $(SECTIONS) $(DEST_DIR)\RapidStart.sec
+  $(GENFFSFILE) -B $(DEST_DIR) -P1 $(DEST_DIR)\$(BASE_NAME).pkg -V
+
+all : $(TARGET_FFS_FILE)
+
+[=============================================================================]
+[Package.RAPID_START_ACPI_TABLES.Default]
+PACKAGE.INF
+\[.]
+BASE_NAME                   = $(BASE_NAME)
+FFS_FILEGUID                = $(FILE_GUID)
+FFS_FILETYPE                = EFI_FV_FILETYPE_FREEFORM
+FFS_ATTRIB_CHECKSUM         = TRUE
+
+IMAGE_SCRIPT =
+{
+  Compress (Dummy) {
+    $(DEST_DIR)\RapidStart.sec
+  }
+}
diff --git a/ReferenceCode/RapidStart/Include/RapidStartAhciReg.h b/ReferenceCode/RapidStart/Include/RapidStartAhciReg.h
new file mode 100644
index 0000000..8e85370
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartAhciReg.h
@@ -0,0 +1,163 @@
+/** @file
+  Header file for Registers and Structure definitions
+
+@copyright
+  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains an 'Intel Peripheral Driver' and uniquely
+  identified as "Intel Reference Module" and is
+  licensed for Intel CPUs and chipsets under the terms of your
+  license agreement with Intel or your vendor.  This file may
+  be modified by the user, subject to additional terms of the
+  license agreement
+**/
+#ifndef RAPID_START_AHCIREG_H_
+#define RAPID_START_AHCIREG_H_
+
+#define SECTOR_SIZE                       0x200
+#define SECTOR_SHIFT                      9
+
+#define MEM_TO_SECT(mem)                  ((UINT32) RShiftU64 ((mem), SECTOR_SHIFT))
+
+//
+// Known issues with 3rd party SSDs : some 3rd party SSD was not compliant with the ATA spec (transfer size of 0 sector issue)
+// We have seen it on more than one vendor's drive so far,
+// The w/a does not cause performance issue to our code or any special checks
+// #define AHCI_MAX_SECTORS                  0x10000
+//
+#define AHCI_MAX_SECTORS                  0xFF80
+#define AHCI_MAX_TRANSFER                 (SECTOR_SIZE * AHCI_MAX_SECTORS)
+
+#define AHCI_NO_DATA                      0
+#define AHCI_DIR_HOST2DEV                 1
+#define AHCI_DIR_DEV2HOST                 0
+
+#define ATA_CMD_IDENTIFY_DEVICE           0xEC
+#define ATA_CMD_READ_DMA_EXT              0x25
+#define ATA_CMD_WRITE_DMA_EXT             0x35
+#define ATA_CMD_WRITE_DMA_FUA_EXT         0x3D
+#define ATA_CMD_STANDBY_IMMEDIATE         0xE0
+#define ATA_CMD_DATA_SET_MANAGEMENT       0x06
+#define   V_ATA_TRIM_FEATURE                0x01
+
+#define ATA_CMD_SECURITY_UNLOCK           0xF2
+#define ATA_CMD_SECURITY_FREEZE_LOCK      0xF5
+#define ATA_CMD_SECURITY_SET_PASSWORD     0xF1
+#define ATA_CMD_FLUSH_CACHE               0xE7
+
+#define ATA_CMD_SET_FEATURES              0xEF
+#define   V_ATA_FEATURE_ENABLE              0x10
+#define   V_ATA_FEATURE_DISABLE             0x90
+#define ATA_CMD_READ_LOG_EXT              0x2F
+
+#define ATA_ID_DEV_HYBRID_FEATURE_SUPPORT  78
+#define B_ATA_ID_DEV_HYBRID_FEATURE_SUPPORT  BIT9
+#define ATA_ID_DEV_HYBRID_FEATURE_ENABLE   79
+#define B_ATA_ID_DEV_HYBRID_FEATURE_ENABLE   BIT9
+
+#define ATA_ID_DEV_DATA_SET_MGMNT_BLOCKS  105
+#define ATA_ID_DEV_DATA_SET_MGMNT_SUPPORT 169
+#define B_ATA_ID_DEV_DATA_SET_TRIM        0x01
+
+#define ATA_ID_DEV_SECURITY_STATUS        128
+#define B_ATA_ID_DEV_SEC_SUPPORTED        0x01
+#define B_ATA_ID_DEV_SEC_ENABLED          0x02
+#define B_ATA_ID_DEV_SEC_LOCKED           0x04
+#define B_ATA_ID_DEV_SEC_FROZEN           0x08
+#define B_ATA_ID_DEV_SEC_COUNT_EXP        0x10
+
+#define ALIGN(v, a)                       ((((v) - 1) | ((a) - 1)) + 1)
+
+#define AHCI_HBA_SIZE                     0x100
+#define AHCI_PORT_SIZE                    0x80
+#define AHCI_PORT_BASE_X(Ahci, port)      (Ahci->Abar + AHCI_HBA_SIZE + AHCI_PORT_SIZE * port)
+#define AHCI_PORT_BASE(Ahci)              AHCI_PORT_BASE_X (Ahci, Ahci->Port)
+#define AHCI_MAX_CMD                      16
+#define AHCI_CMD_HEADER_SIZE              0x20
+#define AHCI_CMD_LIST_BASE(Ahci)          (Ahci->PortBase)
+#define AHCI_CMD_LIST_SIZE                (AHCI_MAX_CMD * AHCI_CMD_HEADER_SIZE)
+
+#define AHCI_RXFIS_BASE(Ahci)             ALIGN ((AHCI_CMD_LIST_BASE (Ahci) + AHCI_CMD_LIST_SIZE), 0x100) ///< align 256
+#define AHCI_RXFIS_SIZE                   0x100
+#define AHCI_CMD_TABLE_BASE(Ahci)         ALIGN ((AHCI_RXFIS_BASE (Ahci) + AHCI_RXFIS_SIZE), 0x80)        ///< align 128
+#define AHCI_CMD_TABLE_HEADER_SIZE        0x80
+#define AHCI_MAX_PRDT                     8192  ///< We need 8192 PRT entries of 4KB transfer size for single 32MB command
+#define AHCI_PRD_SIZE                     0x10
+#define AHCI_CMD_TABLE_SIZE               (AHCI_CMD_TABLE_HEADER_SIZE + AHCI_PRD_SIZE * AHCI_MAX_PRDT)
+
+#define AHCI_CMD_HEADER(Ahci, cmd)        (AHCI_CMD_LIST_BASE (Ahci) + (cmd) * AHCI_CMD_HEADER_SIZE)
+#define AHCI_CMD_TABLE(Ahci, cmd)         (AHCI_CMD_TABLE_BASE (Ahci) + (cmd) * AHCI_CMD_TABLE_SIZE)  ///< align 128
+
+#define AHCI_ID_BLOCK_SIZE                SECTOR_SIZE
+#define AHCI_ID_BLOCK(Ahci)               (AHCI_CMD_TABLE (Ahci, AHCI_MAX_CMD))
+
+#define AHCI_TMP_BLOCK_SIZE               SECTOR_SIZE
+#define AHCI_TMP_BLOCK(Ahci)              (AHCI_ID_BLOCK (Ahci) + AHCI_ID_BLOCK_SIZE)
+
+#define AHCI_MEM_MAX(Ahci)                (AHCI_TMP_BLOCK (Ahci) + AHCI_TMP_BLOCK_SIZE)
+#define AHCI_MEM_MAX_SIZE                 (AHCI_TMP_BLOCK_SIZE + \
+                                           AHCI_ID_BLOCK_SIZE + \
+                                           AHCI_MAX_CMD * \
+                                           AHCI_CMD_TABLE_SIZE + \
+                                           AHCI_RXFIS_SIZE + \
+                                           AHCI_CMD_LIST_SIZE \
+                                           )
+
+#define AHCI_INIT_WAIT                    10000     ///< us
+#define AHCI_INIT_TIMEOUT                 10000000  ///< us
+#define AHCI_INIT_RETRY_COUNT             3
+#define AHCI_CMD_WAIT                     100       ///< us
+#define AHCI_CMD_TIMEOUT                  20000000  ///< us
+
+#define AHCI_CMD_PRDTL(prdtl)             ((prdtl) << 16)
+#define AHCI_CMD_CFL(cfl)                 ((cfl) & 0x0F)
+#define AHCI_CMD_WRITE                    BIT6
+#define AHCI_CMD_PREFETCHABLE             BIT7
+
+#define AHCI_REGION_MAX                   0x400000  ///< 4MB
+#define R_PCH_SATA_AHCI_PXCLB             0x000
+#define R_PCH_SATA_AHCI_PXCLBU            0x004
+#define R_PCH_SATA_AHCI_PXFB              0x008
+#define R_PCH_SATA_AHCI_PXFBU             0x00C
+#define R_PCH_SATA_AHCI_PXIS              0x010
+#define R_PCH_SATA_AHCI_PXIE              0x014
+#define R_PCH_SATA_AHCI_PXCMD             0x018
+#define R_PCH_SATA_AHCI_PXTFD             0x020
+#define B_PCH_SATA_AHCI_PXTFD_STS_ERR     BIT0
+#define B_PCH_SATA_AHCI_PXTFD_STS_DRQ     BIT3
+#define B_PCH_SATA_AHCI_PXTFD_STS_BSY     BIT7
+#define R_PCH_SATA_AHCI_PXSIG             0x024
+#define R_PCH_SATA_AHCI_PXSSTS            0x028
+#define B_PCH_SATA_AHCI_PXSSTS_DET        0x0000000F
+#define R_PCH_SATA_AHCI_PXSCTL            0x02C
+#define R_PCH_SATA_AHCI_PXSERR            0x030
+#define R_PCH_SATA_AHCI_PXSACT            0x034
+#define R_PCH_SATA_AHCI_PXCI              0x038
+
+#define B_PCH_SATA_AHCI_PXIS_FATAL        (B_PCH_SATA_AHCI_PXIS_HBFS | \
+                                           B_PCH_SATA_AHCI_PXIS_HBDS | \
+                                           B_PCH_SATA_AHCI_PXIS_IFS | \
+                                           B_PCH_SATA_AHCI_PXIS_TFES | \
+                                           B_PCH_SATA_AHCI_PXIS_PCS \
+                                           )
+
+#define AHCI_ERROR(PxBase)                ((MmioRead32 ((PxBase) + R_PCH_SATA_AHCI_PXIS) & B_PCH_SATA_AHCI_PXIS_FATAL) != 0)
+
+#define SATA_FIS_HOST2DEVICE              0x27
+#define SATA_FIS_C                        0x8000
+#define SATA_FIS_CMD(cmd)                 (((cmd) & 0xFF) << 16)
+#define SATA_FIS_DEV_LBA                  0x40000000
+#define SATA_FIS_LBA(lba)                 ((UINT32) ((lba) & 0x00FFFFFF))
+#define SATA_FIS_LBA_EXP(lba)             ((UINT32) RShiftU64 ((lba), 24) & 0x00FFFFFF)
+#define SATA_FIS_SECT_COUNT(count)        ((UINT16) (count))
+#define SATA_FIS_FEAT(feat)               ((((UINT16) (feat)) & 0xFF) << 24)
+#define SATA_FIS_FEAT_EXP(feat)           ((((UINT16) (feat)) & 0xFF00) << 16)
+
+#endif
diff --git a/ReferenceCode/RapidStart/Include/RapidStartConfig.h b/ReferenceCode/RapidStart/Include/RapidStartConfig.h
new file mode 100644
index 0000000..a290606
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartConfig.h
@@ -0,0 +1,70 @@
+/** @file
+  Header file to define the default build options
+
+@copyright
+  Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains an 'Intel Peripheral Driver' and uniquely
+  identified as "Intel Reference Module" and is
+  licensed for Intel CPUs and chipsets under the terms of your
+  license agreement with Intel or your vendor.  This file may
+  be modified by the user, subject to additional terms of the
+  license agreement
+**/
+#ifndef RAPID_START_CONFIG_H_
+#define RAPID_START_CONFIG_H_
+
+///
+/// uncomment #define to enable the setting.
+/// Don't just change the value to 0 to disable setting.
+///
+#ifndef RAPID_START_TRIM_ON_RESUME
+#define RAPID_START_TRIM_ON_RESUME  1
+#endif
+
+#ifndef RAPID_START_NO_SMRAM_INTEGRITY_CHECK
+#define RAPID_START_NO_SMRAM_INTEGRITY_CHECK
+#endif
+
+#ifndef RAPID_START_USE_OLD_ACPI_VARIABLE_SET
+#define RAPID_START_USE_OLD_ACPI_VARIABLE_SET
+#endif
+
+#ifndef RAPID_START_WHOLE_MEMORY_CHECK
+// #define RAPID_START_WHOLE_MEMORY_CHECK
+#endif
+
+#ifndef RAPID_START_ON_MEMORY_INSTALLED
+#define RAPID_START_ON_MEMORY_INSTALLED
+#endif
+
+#ifndef RAPID_START_ON_START_PPI_INSTALLED
+// #define RAPID_START_ON_START_PPI_INSTALLED
+#endif
+
+#ifndef RAPID_START_SCAN_ZERO_PAGE
+#define RAPID_START_SCAN_ZERO_PAGE
+#endif
+
+#ifdef RAPID_START_WHOLE_MEMORY_CHECK
+///
+/// SW SMI callback function to check memory
+///
+#ifndef SW_SMI_WHOLE_MEMORY_CHECK
+#define SW_SMI_WHOLE_MEMORY_CHECK 0x51
+#endif
+///
+/// Default granularity 1MB
+///
+#ifndef MEMORY_CRC32_GRANULARITY
+#define MEMORY_CRC32_GRANULARITY  0x100000
+#endif
+#endif // RAPID_START_WHOLE_MEMORY_CHECK
+#endif
diff --git a/ReferenceCode/RapidStart/Include/RapidStartData.h b/ReferenceCode/RapidStart/Include/RapidStartData.h
new file mode 100644
index 0000000..132d6c6
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartData.h
@@ -0,0 +1,144 @@
+/** @file
+  Header file to define structure and GUID of RapidStart Persistent Data
+
+@copyright
+  Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved
+  This software and associated documentation (if any) is furnished
+  under a license and may only be used or copied in accordance
+  with the terms of the license. Except as permitted by such
+  license, no part of this software or documentation may be
+  reproduced, stored in a retrieval system, or transmitted in any
+  form or by any means without the express written consent of
+  Intel Corporation.
+
+  This file contains an 'Intel Peripheral Driver' and uniquely
+  identified as "Intel Reference Module" and is
+  licensed for Intel CPUs and chipsets under the terms of your
+  license agreement with Intel or your vendor.  This file may
+  be modified by the user, subject to additional terms of the
+  license agreement
+**/
+#ifndef RAPID_START_DATA_H_
+#define RAPID_START_DATA_H_
+
+#include EFI_GUID_DEFINITION (RapidStartPersistentData)
+
+#define MEM_EQU_4GB         0x100000000ULL
+#define MEM_EQU_1MB         0x100000
+#define LEGACY_SMRAM_BASE   0xA0000
+#define LEGACY_SMRAM_SIZE   0x20000
+#define LEGACY_SMRAM_BUFFER MEM_EQU_1MB
+
+//
+// RapidStart Flag definitions
+//
+#define RAPID_START_FLAG_ENTRY_DONE   BIT0
+#define RAPID_START_FLAG_STORE_CHANGE BIT1
+
+#define V_PCH_LAN_IO_LEN             32
+#define R_PCH_LAN_IOADDR             0
+#define R_PCH_LAN_IODATA             4
+#define R_PCH_LAN_MDIC               0x20
+#define B_PCH_LAN_MDIC_READY         BIT28
+#define B_PCH_LAN_MDIC_ERROR         BIT30
+#define V_PCH_LAN_MDIC_SET_PAGE      0x043F0000
+#define V_PCH_LAN_MDIC_SET_ADDR      0x04310000
+#define V_PCH_LAN_MDIC_WRITE         0x04320000
+#define V_PCH_LAN_MDIC_READ          0x08320000
+#define R_PCH_LAN_EXTCNF_CTRL        0x0F00
+#define B_PCH_LAN_EXTCNF_CTRL_SWFLAG BIT5
+#define R_PCH_LAN_FWSM_S             0x5B54
+#define B_PCH_LAN_FWSM_S_FW_VAL      BIT15
+#define R_PCH_LAN_FFVT               0x9800
+
+#define V_PHY_VALID_SIG              0x8086
+#define V_PHY_PAGE_WAKEUP            800
+#define R_LAN_PHY_RCTL               0x00
+#define R_LAN_PHY_IPAV               0x40
+#define R_LAN_PHY_PRXC               0x46
+
+#pragma pack(1)
+typedef struct {
+  UINT16  Year;
+  UINT8   Month;
+  UINT8   Date;
+  UINT8   Hour;
+  UINT8   Minute;
+  UINT8   Second;
+} RTC_TIME;
+
+typedef struct {
+  UINT32  RapidStartMem;
+  UINT32  MmioSpace;
+  UINT32  RapidStartGlobalNvsPtr;
+  UINT32  StoreSectors;
+  UINT64  StoreLbaAddr;
+  UINT8   StoreSataPort;
+  UINT8   SataPortConfiguration;
+  UINT32  Tolm;
+  UINT64  Tohm;
+  UINT64  TotalMem;
+  UINT32  RapidStartMemSize;
+  UINT32  ZeroBitmapSize;
+  UINT32  WlanMmioSpace;
+  UINT64  SystemMemoryLengthBelow4GB;
+  UINT64  SystemMemoryLengthAbove4GB;
+  UINT64  AcpiReservedMemoryBase;
+  UINT32  AcpiReservedMemorySize;
+  UINT32  Crc32RecordSize;
+  UINT64  RapidStartStoreUid;
+  UINT32  ActivePageThresholdSizeInSector;
+  UINT8   HybridHardDisk;
+  UINT8   DisplayType;
+  UINT64  DssAddress;
+  UINT64  DssSize;
+} RAPID_START_PERSISTENT_DATA;
+
+#define FFVT_SIZE 5
+
+typedef struct {
+  UINT32    GPE0;
+  UINT32    GPE0a;
+  UINT32    GPE0b;
+  UINT32    Ffvt[FFVT_SIZE];
+  RTC_TIME  OsWakeTime;
+  UINT8     OsWakeTimeEnabled;
+  UINT8     EntryCanceled;
+} RAPID_START_MEM_DATA;
+
+#pragma pack()
+
+#define RAPID_START_ACPI_RTC_WAKE   0x01
+#define RAPID_START_ACPI_BATT_WAKE  0x02
+
+#define RAPID_START_MEM_DATA_PTR(RapidStartData) \
+    ( \
+      (RAPID_START_MEM_DATA *) (VOID *) \
+        ( \
+          ((RapidStartData)->RapidStartMem) + ((RapidStartData)->RapidStartMemSize) - sizeof (RAPID_START_MEM_DATA) - \
+            ((RapidStartData)->ZeroBitmapSize) - ((RapidStartData)->Crc32RecordSize) \
+        ) \
+    )
+
+#define RAPID_START_ZERO_PAGE_BITMAP_PTR(RapidStartData) \
+    ( \
+      (UINT32 *) (UINTN) \
+        ( \
+          ((RapidStartData)->RapidStartMem) + \
+          ((RapidStartData)->RapidStartMemSize) - \
+          ((RapidStartData)->ZeroBitmapSize) - \
+          ((RapidStartData)->Crc32RecordSize) \
+        ) \
+    )
+
+#define RAPID_START_CRC32_RECORD_PTR(RapidStartData) \
+    ( \
+      (UINT32 *) (UINTN) ( \
+          ((RapidStartData)->RapidStartMem) + ((RapidStartData)->RapidStartMemSize) - ((RapidStartData)->Crc32RecordSize) \
+        ) \
+    )
+
+#define NUMBER_OF_PAGES(MemAddr)          RShiftU64 (MemAddr, 12)
+#define NUMBER_OF_PAGES_IN_DWORD(MemAddr) RShiftU64 (MemAddr, 17)
+#define ZERO_BITMAP_UNIT                  32  /* (sizeof (UINT32) * 8bits) */
+#endif
diff --git a/ReferenceCode/RapidStart/Include/RapidStartDxe.dsc b/ReferenceCode/RapidStart/Include/RapidStartDxe.dsc
new file mode 100644
index 0000000..36b1d76
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartDxe.dsc
@@ -0,0 +1,26 @@
+## @file
+#  Build description file for building the RapidStart DXE drivers
+#
+#@copyright
+#  Copyright (c)  2008 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains a 'Sample Driver' and is licensed as such
+#  under the terms of your license agreement with Intel or your
+#  vendor.  This file may be modified by the user, subject to
+#  the additional terms of the license agreement
+#
+
+$(PROJECT_RAPID_START_ROOT)\Dxe\RapidStartDxe.inf SOURCE_OVERRIDE_PATH = $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\EntryPoints
+$(PROJECT_RAPID_START_ROOT)\Smm\RapidStartSmm.inf SOURCE_OVERRIDE_PATH = $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\EntryPoints
+$(PROJECT_RAPID_START_ROOT)\AcpiTables\RapidStartAcpiTables.inf
+#
+# Please uncomment following line after download binary modules PeiGfxDriver.efi and DxeGfxDriver.efi from IRS UEFI Graphics Drivers Release 5.0.1.1001 and later.
+#
+# $(PROJECT_RAPID_START_ROOT)\GfxDisplay\FfsGfxDriver\Dxe\DxeFfsGfxDriver.inf SOURCE_OVERRIDE_PATH = $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\EntryPoints
diff --git a/ReferenceCode/RapidStart/Include/RapidStartDxeLib.dsc b/ReferenceCode/RapidStart/Include/RapidStartDxeLib.dsc
new file mode 100644
index 0000000..15d15b9
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartDxeLib.dsc
@@ -0,0 +1,24 @@
+## @file
+#  Build description file for building the RapidStart DXE Library
+#
+#@copyright
+#  Copyright (c)  2008 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains a 'Sample Driver' and is licensed as such
+#  under the terms of your license agreement with Intel or your
+#  vendor.  This file may be modified by the user, subject to
+#  the additional terms of the license agreement
+#
+
+$(PROJECT_RAPID_START_ROOT)\Protocol\RapidStartProtocolLib.inf
+$(PROJECT_RAPID_START_ROOT)\SampleCode\Library\RapidStartCommonLib\RapidStartCommonLib.inf
+$(PROJECT_RAPID_START_ROOT)\Guid\RapidStartGuidLib.inf
+$(PROJECT_RAPID_START_ROOT)\SampleCode\Library\RapidStartPlatformLib\Dxe\RapidStartDxeLib.inf
+$(PROJECT_RAPID_START_ROOT)\GfxDisplay\Library\Dxe\GfxDisplayLibDxe.inf
diff --git a/ReferenceCode/RapidStart/Include/RapidStartInclude.cif b/ReferenceCode/RapidStart/Include/RapidStartInclude.cif
new file mode 100644
index 0000000..8ea12e1
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartInclude.cif
@@ -0,0 +1,16 @@
+<component>
+	name = "RapidStartInclude"
+	category = ModulePart
+	LocalRoot = "ReferenceCode\RapidStart\Include"
+	RefName = "RapidStartInclude"
+[files]
+"RapidStartInclude.sdl"	
+"RapidStartAhciReg.h"	
+"RapidStartConfig.h"
+"RapidStartData.h"	
+"RapidStartAcpi.dsc"	
+"RapidStartDxe.dsc"	
+"RapidStartDxeLib.dsc"	
+"RapidStartPei.dsc"	
+"RapidStartPeiLib.dsc"	
+<endComponent>
diff --git a/ReferenceCode/RapidStart/Include/RapidStartInclude.sdl b/ReferenceCode/RapidStart/Include/RapidStartInclude.sdl
new file mode 100644
index 0000000..97b32fc
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartInclude.sdl
@@ -0,0 +1,68 @@
+#*************************************************************************
+#*************************************************************************
+#**                                                                     **
+#**        (C)Copyright 1985-2012, American Megatrends, Inc.            **
+#**                                                                     **
+#**                       All Rights Reserved.                          **
+#**                                                                     **
+#**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+#**                                                                     **
+#**                       Phone: (770)-246-8600                         **
+#**                                                                     **
+#*************************************************************************
+#*************************************************************************
+
+#*************************************************************************
+# $Header: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartInclude/RapidStartInclude.sdl 2     10/15/12 5:35a Bensonlai $
+#
+# $Revision: 2 $
+#
+# $Date: 10/15/12 5:35a $
+#*************************************************************************
+# Revision History
+# ----------------
+# $Log: /Alaska/SOURCE/Modules/Intel Fast Flash Standby/iRST_SharkBay/RapidStartInclude/RapidStartInclude.sdl $
+# 
+# 2     10/15/12 5:35a Bensonlai
+# [Category] Improvement
+# [Severity] Important
+# [Description] Update Shark Bay Rapid Start Reference Code Version
+# 0.7.1.0.
+# [Files] ReferenceCode\RapidStart\*.*
+# 
+# 1     4/19/12 8:09a Yurenlai
+# Initial check in.
+#
+#*************************************************************************
+TOKEN
+        Name  = "RapidStartInclude_SUPPORT"
+        Value  = 1
+        TokenType = Boolean
+        TargetEQU = Yes
+        TargetMAK = Yes
+        Master = Yes
+        Help  = "Main switch to enable RapidStartInclude support in Project"
+End
+
+PATH
+        Name  = "RapidStartInclude_DIR"
+End
+
+ELINK
+	Name  = "/I$(RapidStartInclude_DIR)"
+	Parent  = "RAPIDSTART_INCLUDES"
+	InvokeOrder = AfterParent
+End
+#*************************************************************************
+#*************************************************************************
+#**                                                                     **
+#**        (C)Copyright 1985-2012, American Megatrends, Inc.            **
+#**                                                                     **
+#**                       All Rights Reserved.                          **
+#**                                                                     **
+#**      5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093           **
+#**                                                                     **
+#**                       Phone: (770)-246-8600                         **
+#**                                                                     **
+#*************************************************************************
+#*************************************************************************
diff --git a/ReferenceCode/RapidStart/Include/RapidStartPei.dsc b/ReferenceCode/RapidStart/Include/RapidStartPei.dsc
new file mode 100644
index 0000000..15f7dfd
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartPei.dsc
@@ -0,0 +1,25 @@
+## @file
+#  Build description file for building the RapidStart PEI modules
+#
+#@copyright
+#  Copyright (c)  2008 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains a 'Sample Driver' and is licensed as such
+#  under the terms of your license agreement with Intel or your
+#  vendor.  This file may be modified by the user, subject to
+#  the additional terms of the license agreement
+#
+
+$(PROJECT_RAPID_START_ROOT)\Pei\RapidStartPei.inf SOURCE_OVERRIDE_PATH = $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\EntryPoints
+
+#
+# Please uncomment following line after download binary modules PeiGfxDriver.efi and DxeGfxDriver.efi from IRS UEFI Graphics Drivers Release 5.0.1.1001 and later.
+#
+# $(PROJECT_RAPID_START_ROOT)\GfxDisplay\FfsGfxDriver\Pei\PeiGfxDriver.inf SOURCE_OVERRIDE_PATH = $(EDK_SOURCE)\Foundation\Library\EdkIIGlueLib\EntryPoints
diff --git a/ReferenceCode/RapidStart/Include/RapidStartPeiLib.dsc b/ReferenceCode/RapidStart/Include/RapidStartPeiLib.dsc
new file mode 100644
index 0000000..d84bcb2
--- /dev/null
+++ b/ReferenceCode/RapidStart/Include/RapidStartPeiLib.dsc
@@ -0,0 +1,24 @@
+## @file
+#  Build description file for building the RapidStart PEI library
+#
+#@copyright
+#  Copyright (c)  2008 - 2012 Intel Corporation. All rights reserved
+#  This software and associated documentation (if any) is furnished
+#  under a license and may only be used or copied in accordance
+#  with the terms of the license. Except as permitted by such
+#  license, no part of this software or documentation may be
+#  reproduced, stored in a retrieval system, or transmitted in any
+#  form or by any means without the express written consent of
+#  Intel Corporation.
+#
+#  This file contains a 'Sample Driver' and is licensed as such
+#  under the terms of your license agreement with Intel or your
+#  vendor.  This file may be modified by the user, subject to
+#  the additional terms of the license agreement
+#
+
+$(PROJECT_RAPID_START_ROOT)\Ppi\RapidStartPpiLib.inf
+$(PROJECT_RAPID_START_ROOT)\Guid\RapidStartGuidLib.inf
+$(PROJECT_RAPID_START_ROOT)\SampleCode\Library\RapidStartCommonLib\RapidStartCommonLib.inf
+$(PROJECT_RAPID_START_ROOT)\SampleCode\Library\RapidStartPlatformLib\Pei\RapidStartPeiLib.inf
+$(PROJECT_RAPID_START_ROOT)\GfxDisplay\Library\Pei\GfxDisplayLibPei.inf