diff options
Diffstat (limited to 'EDK/Foundation/Framework/Guid/DataHubRecords')
7 files changed, 2580 insertions, 0 deletions
diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubRecords.c b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubRecords.c new file mode 100644 index 0000000..33cb53e --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubRecords.c @@ -0,0 +1,51 @@ +/*++ + +Copyright (c) 2004, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubRecords.c + +Abstract: + + This file defines GUIDs and associated data structures for records + posted to the Data Hub. + The producers of these records use these definitions to construct + records. + The consumers of these records use these definitions to retrieve, + filter and parse records. + + For more information please look at DataHub.doc + +--*/ + + + +#include "Tiano.h" +#include EFI_GUID_DEFINITION (DataHubRecords) + +EFI_GUID gProcessorProducerGuid = EFI_PROCESSOR_PRODUCER_GUID; + +EFI_GUID gProcessorSubClassName = EFI_PROCESSOR_SUBCLASS_GUID; + +EFI_GUID gCacheSubClassName = EFI_CACHE_SUBCLASS_GUID; + +EFI_GUID gMiscProducerGuid = EFI_MISC_PRODUCER_GUID; +EFI_GUID gMiscSubClassName = EFI_MISC_SUBCLASS_GUID; +EFI_GUID gEfiMiscSubClassGuid = EFI_MISC_SUBCLASS_GUID; + + +EFI_GUID gMemoryProducerGuid = EFI_MEMORY_PRODUCER_GUID; + +EFI_GUID gEfiMemorySubClassGuid = EFI_MEMORY_SUBCLASS_GUID; + + + +/* eof - DataHubRecords.c */ diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubRecords.h b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubRecords.h new file mode 100644 index 0000000..fe386be --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubRecords.h @@ -0,0 +1,112 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubRecords.h + +Abstract: + + This file defines GUIDs and associated data structures for records + posted to the Data Hub. + The producers of these records use these definitions to construct + records. + The consumers of these records use these definitions to retrieve, + filter and parse records. + + For more information please look at DataHub.doc + +--*/ + +#ifndef _DATAHUB_RECORDS_H_ +#define _DATAHUB_RECORDS_H_ + +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include "TianoHii.h" +#else +#include "EfiInternalFormRepresentation.h" +#endif +#include "DataHubSubClass.h" +#include "DataHubSubClassProcessor.h" +#include "DataHubSubClassCache.h" +#include "DataHubSubClassMemory.h" +#include "DataHubSubClassMisc.h" + +/*++ +BEGIN: Processor records definitions +--*/ + +extern EFI_GUID gProcessorProducerGuid; + +#define EFI_PROCESSOR_PRODUCER_GUID \ + { 0x1bf06aea, 0x5bec, 0x4a8d, 0x95, 0x76, 0x74, 0x9b, 0x09, 0x56, 0x2d, 0x30 } + + +extern EFI_GUID gProcessorSubClassName; + + +extern EFI_GUID gCacheSubClassName; + + +extern EFI_GUID gMiscSubClassName; + +/*++ +END: Processor records definitions +--*/ + + + +/*++ +BEGIN: Memory records definitions +--*/ + +extern EFI_GUID gMemoryProducerGuid; + +#define EFI_MEMORY_PRODUCER_GUID \ + { 0x1d7add6e, 0xb2da, 0x4b0b, 0xb2, 0x9f, 0x49, 0xcb, 0x42, 0xf4, 0x63, 0x56 } + +// +// ... need memory sub classes here... +// +extern EFI_GUID gEfiMemorySubClassGuid; + + + +/*++ +END: Memory records definitions +--*/ + + +/*++ +BEGIN: Misc records definitions +--*/ + +extern EFI_GUID gMiscProducerGuid; + +#define EFI_MISC_PRODUCER_GUID \ +{ 0x62512c92, 0x63c4, 0x4d80, 0x82, 0xb1, 0xc1, 0xa4, 0xdc, 0x44, 0x80, 0xe5 } + + + +// +// ... need misc sub classes here... +// +extern EFI_GUID gEfiMiscSubClassGuid; + + + + +/*++ +END: Misc records definitions +--*/ + + +#endif diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClass.h b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClass.h new file mode 100644 index 0000000..753dc17 --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClass.h @@ -0,0 +1,73 @@ +/*++ + +Copyright (c) 2004, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubSubClass.h + +Abstract: + + Definitions for data hub data records that contains a sub class header + +Revision History + +--*/ + +#ifndef _DATA_HUB_SUBCLASS_H_ +#define _DATA_HUB_SUBCLASS_H_ + +// +// Sub Class Header type1 +// + +#define EFI_SUBCLASS_INSTANCE_RESERVED 0 +#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF //16 bit + +typedef struct { + UINT32 Version; + UINT32 HeaderSize; + UINT16 Instance; + UINT16 SubInstance; + UINT32 RecordType; +} EFI_SUBCLASS_TYPE1_HEADER; + +// +// EXP data +// + +typedef struct { + INT16 Value; + INT16 Exponent; +} EFI_EXP_BASE10_DATA; + +typedef struct { + UINT16 Value; + UINT16 Exponent; +} EFI_EXP_BASE2_DATA; + +// +// Inter link data that references another data record +// + +typedef struct { + EFI_GUID ProducerName; + UINT16 Instance; + UINT16 SubInstance; +} EFI_INTER_LINK_DATA; + + +// +// String Token Definition +// +#define EFI_STRING_TOKEN UINT16 + + +#endif diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassCache.h b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassCache.h new file mode 100644 index 0000000..b46a434 --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassCache.h @@ -0,0 +1,161 @@ +/*++ + +Copyright (c) 2004 - 2011, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubSubClassCache.h + +Abstract: + + Definitions for Cache sub class data records + +Revision History + +--*/ + +#ifndef _DATAHUB_SUBCLASS_CACHE_H_ +#define _DATAHUB_SUBCLASS_CACHE_H_ + +#define EFI_CACHE_SUBCLASS_VERSION 0x00010000 + +#define EFI_CACHE_SUBCLASS_GUID \ +{ 0x7f0013a7, 0xdc79, 0x4b22, 0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d } + +typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA; + +typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA; + +typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA; + +typedef STRING_REF EFI_CACHE_SOCKET_DATA; + +typedef struct { + UINT32 Other :1; + UINT32 Unknown :1; + UINT32 NonBurst :1; + UINT32 Burst :1; + UINT32 PipelineBurst :1; + // + // Inconsistent between CacheSubclass 0.9 and SMBIOS specifications here: + // In CacheSubclass specification 0.9, the sequence of Asynchronous and Synchronous fileds + // are opposite to SMBIOS specification. + // + UINT32 Asynchronous :1; + UINT32 Synchronous :1; + UINT32 Reserved :25; +} EFI_CACHE_SRAM_TYPE_DATA; + +typedef enum { + EfiCacheErrorOther = 1, + EfiCacheErrorUnknown = 2, + EfiCacheErrorNone = 3, + EfiCacheErrorParity = 4, + EfiCacheErrorSingleBit = 5, + EfiCacheErrorMultiBit = 6 +} EFI_CACHE_ERROR_TYPE_DATA; + +typedef enum { + EfiCacheTypeOther = 1, + EfiCacheTypeUnknown = 2, + EfiCacheTypeInstruction = 3, + EfiCacheTypeData = 4, + EfiCacheTypeUnified = 5 +} EFI_CACHE_TYPE_DATA; + +typedef enum { + EfiCacheAssociativityOther = 0x01, + EfiCacheAssociativityUnknown = 0x02, + EfiCacheAssociativityDirectMapped = 0x03, + EfiCacheAssociativity2Way = 0x04, + EfiCacheAssociativity4Way = 0x05, + EfiCacheAssociativityFully = 0x06, + EfiCacheAssociativity8Way = 0x07, + EfiCacheAssociativity16Way = 0x08, + EfiCacheAssociativity12Way = 0x09, + EfiCacheAssociativity24Way = 0x0A, + EfiCacheAssociativity32Way = 0x0B, + EfiCacheAssociativity48Way = 0x0C, + EfiCacheAssociativity64Way = 0x0D +} EFI_CACHE_ASSOCIATIVITY_DATA; + +typedef struct { + UINT32 Level :3; + UINT32 Socketed :1; + UINT32 Reserved2 :1; + UINT32 Location :2; + UINT32 Enable :1; + UINT32 OperationalMode :2; + UINT32 Reserved1 :22; +} EFI_CACHE_CONFIGURATION_DATA; + +#define EFI_CACHE_L1 1 +#define EFI_CACHE_L2 2 +#define EFI_CACHE_L3 3 +#define EFI_CACHE_L4 4 +#define EFI_CACHE_LMAX EFI_CACHE_L4 + +#define EFI_CACHE_SOCKETED 1 +#define EFI_CACHE_NOT_SOCKETED 0 + +typedef enum { + EfiCacheInternal = 0, + EfiCacheExternal = 1, + EfiCacheReserved = 2, + EfiCacheUnknown = 3 +} EFI_CACHE_LOCATION; + +#define EFI_CACHE_ENABLED 1 +#define EFI_CACHE_DISABLED 0 + +typedef enum { + EfiCacheWriteThrough = 0, + EfiCacheWriteBack = 1, + EfiCacheDynamicMode = 2, + EfiCacheUnknownMode = 3 +} EFI_CACHE_OPERATIONAL_MODE; + + + +typedef enum { + CacheSizeRecordType = 1, + MaximumSizeCacheRecordType = 2, + CacheSpeedRecordType = 3, + CacheSocketRecordType = 4, + CacheSramTypeRecordType = 5, + CacheInstalledSramTypeRecordType = 6, + CacheErrorTypeRecordType = 7, + CacheTypeRecordType = 8, + CacheAssociativityRecordType = 9, + CacheConfigRecordType = 10 +} EFI_CACHE_VARIABLE_RECORD_TYPE; + + +typedef union { + EFI_CACHE_SIZE_DATA CacheSize; + EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize; + EFI_CACHE_SPEED_DATA CacheSpeed; + EFI_CACHE_SOCKET_DATA CacheSocket; + EFI_CACHE_SRAM_TYPE_DATA CacheSramType; + EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType; + EFI_CACHE_ERROR_TYPE_DATA CacheErrorType; + EFI_CACHE_TYPE_DATA CacheType; + EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity; + EFI_CACHE_CONFIGURATION_DATA CacheConfig; + EFI_CACHE_ASSOCIATION_DATA CacheAssociation; +} EFI_CACHE_VARIABLE_RECORD; + +typedef struct { + EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader; + EFI_CACHE_VARIABLE_RECORD VariableRecord; +} EFI_CACHE_DATA_RECORD; + + +#endif diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassMemory.h b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassMemory.h new file mode 100644 index 0000000..4d3eef7 --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassMemory.h @@ -0,0 +1,431 @@ +/*++ + +Copyright (c) 2004 - 2009, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubSubClassMemory.h + +Abstract: + + Definitions for memory sub class data records + +Revision History + +--*/ + +#ifndef _DATAHUB_SUBCLASS_MEMORY_H_ +#define _DATAHUB_SUBCLASS_MEMORY_H_ + +#include EFI_GUID_DEFINITION (DataHubRecords) + + +#define EFI_MEMORY_SUBCLASS_GUID \ + {0x4E8F4EBB, 0x64B9, 0x4e05, 0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} + +#define EFI_MEMORY_SUBCLASS_VERSION 0x0100 + + +#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001 + +typedef enum _EFI_MEMORY_REGION_TYPE { + EfiMemoryRegionMemory = 0x01, + EfiMemoryRegionReserved = 0x02, + EfiMemoryRegionAcpi = 0x03, + EfiMemoryRegionNvs = 0x04 +} EFI_MEMORY_REGION_TYPE; + +typedef struct { + UINT32 ProcessorNumber; + UINT16 StartBusNumber; + UINT16 EndBusNumber; + EFI_MEMORY_REGION_TYPE MemoryRegionType; + EFI_EXP_BASE2_DATA MemorySize; + EFI_PHYSICAL_ADDRESS MemoryStartAddress; +} EFI_MEMORY_SIZE_DATA; + + +#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002 + +typedef enum _EFI_MEMORY_ARRAY_LOCATION { + EfiMemoryArrayLocationOther = 0x01, + EfiMemoryArrayLocationUnknown = 0x02, + EfiMemoryArrayLocationSystemBoard = 0x03, + EfiMemoryArrayLocationIsaAddonCard = 0x04, + EfiMemoryArrayLocationEisaAddonCard = 0x05, + EfiMemoryArrayLocationPciAddonCard = 0x06, + EfiMemoryArrayLocationMcaAddonCard = 0x07, + EfiMemoryArrayLocationPcmciaAddonCard = 0x08, + EfiMemoryArrayLocationProprietaryAddonCard = 0x09, + EfiMemoryArrayLocationNuBus = 0x0A, + EfiMemoryArrayLocationPc98C20AddonCard = 0xA0, + EfiMemoryArrayLocationPc98C24AddonCard = 0xA1, + EfiMemoryArrayLocationPc98EAddonCard = 0xA2, + EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3 +} EFI_MEMORY_ARRAY_LOCATION; + +typedef enum _EFI_MEMORY_ARRAY_USE { + EfiMemoryArrayUseOther = 0x01, + EfiMemoryArrayUseUnknown = 0x02, + EfiMemoryArrayUseSystemMemory = 0x03, + EfiMemoryArrayUseVideoMemory = 0x04, + EfiMemoryArrayUseFlashMemory = 0x05, + EfiMemoryArrayUseNonVolatileRam = 0x06, + EfiMemoryArrayUseCacheMemory = 0x07, +} EFI_MEMORY_ARRAY_USE; + +typedef enum _EFI_MEMORY_ERROR_CORRECTION { + EfiMemoryErrorCorrectionOther = 0x01, + EfiMemoryErrorCorrectionUnknown = 0x02, + EfiMemoryErrorCorrectionNone = 0x03, + EfiMemoryErrorCorrectionParity = 0x04, + EfiMemoryErrorCorrectionSingleBitEcc = 0x05, + EfiMemoryErrorCorrectionMultiBitEcc = 0x06, + EfiMemoryErrorCorrectionCrc = 0x07, +} EFI_MEMORY_ERROR_CORRECTION; + +typedef struct { + EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation; + EFI_MEMORY_ARRAY_USE MemoryArrayUse; + EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection; + UINT32 MaximumMemoryCapacity; + UINT16 NumberMemoryDevices; +} EFI_MEMORY_ARRAY_LOCATION_DATA; + + +#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003 + +typedef enum _EFI_MEMORY_FORM_FACTOR { + EfiMemoryFormFactorOther = 0x01, + EfiMemoryFormFactorUnknown = 0x02, + EfiMemoryFormFactorSimm = 0x03, + EfiMemoryFormFactorSip = 0x04, + EfiMemoryFormFactorChip = 0x05, + EfiMemoryFormFactorDip = 0x06, + EfiMemoryFormFactorZip = 0x07, + EfiMemoryFormFactorProprietaryCard = 0x08, + EfiMemoryFormFactorDimm = 0x09, + EfiMemoryFormFactorTsop = 0x0A, + EfiMemoryFormFactorRowOfChips = 0x0B, + EfiMemoryFormFactorRimm = 0x0C, + EfiMemoryFormFactorSodimm = 0x0D, + EfiMemoryFormFactorSrimm = 0x0E, + EfiMemoryFormFactorFbDimm = 0x0F +} EFI_MEMORY_FORM_FACTOR; + +typedef enum _EFI_MEMORY_ARRAY_TYPE { + EfiMemoryTypeOther = 0x01, + EfiMemoryTypeUnknown = 0x02, + EfiMemoryTypeDram = 0x03, + EfiMemoryTypeEdram = 0x04, + EfiMemoryTypeVram = 0x05, + EfiMemoryTypeSram = 0x06, + EfiMemoryTypeRam = 0x07, + EfiMemoryTypeRom = 0x08, + EfiMemoryTypeFlash = 0x09, + EfiMemoryTypeEeprom = 0x0A, + EfiMemoryTypeFeprom = 0x0B, + EfiMemoryTypeEprom = 0x0C, + EfiMemoryTypeCdram = 0x0D, + EfiMemoryType3Dram = 0x0E, + EfiMemoryTypeSdram = 0x0F, + EfiMemoryTypeSgram = 0x10, + EfiMemoryTypeRdram = 0x11, + EfiMemoryTypeDdr = 0x12, + EfiMemoryTypeDdr2 = 0x13, + EfiMemoryTypeDdr2FbDimm = 0x14, + EfiMemoryTypeDdr3 = 0x18, + EfiMemoryTypeFbd2 = 0x19 +} EFI_MEMORY_ARRAY_TYPE; + +typedef struct { + UINT32 Reserved :1; + UINT32 Other :1; + UINT32 Unknown :1; + UINT32 FastPaged :1; + UINT32 StaticColumn :1; + UINT32 PseudoStatic :1; + UINT32 Rambus :1; + UINT32 Synchronous :1; + UINT32 Cmos :1; + UINT32 Edo :1; + UINT32 WindowDram :1; + UINT32 CacheDram :1; + UINT32 Nonvolatile :1; + UINT32 Reserved1 :19; +} EFI_MEMORY_TYPE_DETAIL; + +typedef enum { + EfiMemoryStateEnabled =0, + EfiMemoryStateUnknown, + EfiMemoryStateUnsupported, + EfiMemoryStateError, + EfiMemoryStateAbsent, + EfiMemoryStateDisabled, + EfiMemoryStatePartial +} EFI_MEMORY_STATE; + +typedef struct { + EFI_STRING_TOKEN MemoryDeviceLocator; + EFI_STRING_TOKEN MemoryBankLocator; + EFI_STRING_TOKEN MemoryManufacturer; + EFI_STRING_TOKEN MemorySerialNumber; + EFI_STRING_TOKEN MemoryAssetTag; + EFI_STRING_TOKEN MemoryPartNumber; + EFI_INTER_LINK_DATA MemoryArrayLink; + EFI_INTER_LINK_DATA MemorySubArrayLink; + UINT16 MemoryTotalWidth; + UINT16 MemoryDataWidth; + UINT64 MemoryDeviceSize; + EFI_MEMORY_FORM_FACTOR MemoryFormFactor; + UINT8 MemoryDeviceSet; + EFI_MEMORY_ARRAY_TYPE MemoryType; + EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail; + UINT16 MemorySpeed; + EFI_MEMORY_STATE MemoryState; + UINT8 MemoryAttributes; + UINT8 MemoryBankConnections; + UINT8 MemoryErrorStatus; +} EFI_MEMORY_ARRAY_LINK; + + +#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004 + +typedef struct { + EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress; + EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress; + EFI_INTER_LINK_DATA PhysicalMemoryArrayLink; + UINT16 MemoryArrayPartitionWidth; +} EFI_MEMORY_ARRAY_START_ADDRESS; + + +#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005 + +typedef struct { + EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress; + EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress; + EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink; + EFI_INTER_LINK_DATA PhysicalMemoryArrayLink; + UINT8 MemoryDevicePartitionRowPosition; + UINT8 MemoryDeviceInterleavePosition; + UINT8 MemoryDeviceInterleaveDataDepth; +} EFI_MEMORY_DEVICE_START_ADDRESS; + + +// +// Memory. Channel Device Type - SMBIOS Type 37 +// + +#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006 + +typedef enum _EFI_MEMORY_CHANNEL_TYPE { + EfiMemoryChannelTypeOther = 1, + EfiMemoryChannelTypeUnknown = 2, + EfiMemoryChannelTypeRambus = 3, + EfiMemoryChannelTypeSyncLink = 4 +} EFI_MEMORY_CHANNEL_TYPE; + +typedef struct { + EFI_MEMORY_CHANNEL_TYPE MemoryChannelType; + UINT8 MemoryChannelMaximumLoad; + UINT8 MemoryChannelDeviceCount; +} EFI_MEMORY_CHANNEL_TYPE_DATA; + +#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007 + +typedef struct { + UINT8 DeviceId; + EFI_INTER_LINK_DATA DeviceLink; + UINT8 MemoryChannelDeviceLoad; +} EFI_MEMORY_CHANNEL_DEVICE_DATA; + +// +// Memory. Controller Information - SMBIOS Type 5 +// +#define EFI_MEMORY_CONTROLLER_INFORMATION_RECORD_NUMBER 0x00000008 + +typedef enum { + EfiErrorDetectingMethodOther = 1, + EfiErrorDetectingMethodUnknown = 2, + EfiErrorDetectingMethodNone = 3, + EfiErrorDetectingMethodParity = 4, + EfiErrorDetectingMethod32Ecc = 5, + EfiErrorDetectingMethod64Ecc = 6, + EfiErrorDetectingMethod128Ecc = 7, + EfiErrorDetectingMethodCrc = 8 +} EFI_MEMORY_ERROR_DETECT_METHOD_TYPE; + +typedef struct { + UINT8 Other :1; + UINT8 Unknown :1; + UINT8 None :1; + UINT8 SingleBitErrorCorrect :1; + UINT8 DoubleBitErrorCorrect :1; + UINT8 ErrorScrubbing :1; + UINT8 Reserved :2; +} EFI_MEMORY_ERROR_CORRECT_CAPABILITY; + +typedef enum { + EfiMemoryInterleaveOther = 1, + EfiMemoryInterleaveUnknown = 2, + EfiMemoryInterleaveOneWay = 3, + EfiMemoryInterleaveTwoWay = 4, + EfiMemoryInterleaveFourWay = 5, + EfiMemoryInterleaveEightWay = 6, + EfiMemoryInterleaveSixteenWay = 7 +} EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE; + +typedef struct { + UINT16 Other :1; + UINT16 Unknown :1; + UINT16 SeventyNs :1; + UINT16 SixtyNs :1; + UINT16 FiftyNs :1; + UINT16 Reserved :11; +} EFI_MEMORY_SPEED_TYPE; + +typedef struct { + UINT16 Other :1; + UINT16 Unknown :1; + UINT16 Standard :1; + UINT16 FastPageMode :1; + UINT16 EDO :1; + UINT16 Parity :1; + UINT16 ECC :1; + UINT16 SIMM :1; + UINT16 DIMM :1; + UINT16 BurstEdo :1; + UINT16 SDRAM :1; + UINT16 Reserved :5; +} EFI_MEMORY_SUPPORTED_TYPE; + +typedef struct { + UINT8 Five :1; + UINT8 Three :1; + UINT8 Two :1; + UINT8 Reserved :5; +} EFI_MEMORY_MODULE_VOLTAGE_TYPE; + +// +// EFI_MEMORY_CONTROLLER_INFORMATION is obsolete +// Use EFI_MEMORY_CONTROLLER_INFORMATION_DATA instead +// +typedef struct { + EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod; + EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability; + EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave; + EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave; + UINT8 MaxMemoryModuleSize; + EFI_MEMORY_SPEED_TYPE MemorySpeedType; + EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType; + EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage; + UINT8 NumberofMemorySlot; + EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability; + UINT16 *MemoryModuleConfigHandles; +} EFI_MEMORY_CONTROLLER_INFORMATION; + +typedef struct { + EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod; + EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability; + EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave; + EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave; + UINT8 MaxMemoryModuleSize; + EFI_MEMORY_SPEED_TYPE MemorySpeedType; + EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType; + EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage; + UINT8 NumberofMemorySlot; + EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability; + EFI_INTER_LINK_DATA MemoryModuleConfig[1]; +} EFI_MEMORY_CONTROLLER_INFORMATION_DATA; + +// +// Memory. Error Information - SMBIOS Type 18 +// +#define EFI_MEMORY_32BIT_ERROR_INFORMATION_RECORD_NUMBER 0x00000009 + +typedef enum { + EfiMemoryErrorOther = 1, + EfiMemoryErrorUnknown = 2, + EfiMemoryErrorOk = 3, + EfiMemoryErrorBadRead = 4, + EfiMemoryErrorParity = 5, + EfiMemoryErrorSigleBit = 6, + EfiMemoryErrorDoubleBit = 7, + EfiMemoryErrorMultiBit = 8, + EfiMemoryErrorNibble = 9, + EfiMemoryErrorChecksum = 10, + EfiMemoryErrorCrc = 11, + EfiMemoryErrorCorrectSingleBit = 12, + EfiMemoryErrorCorrected = 13, + EfiMemoryErrorUnCorrectable = 14 +} EFI_MEMORY_ERROR_TYPE; + +typedef enum { + EfiMemoryGranularityOther = 1, + EfiMemoryGranularityOtherUnknown = 2, + EfiMemoryGranularityDeviceLevel = 3, + EfiMemoryGranularityMemPartitionLevel = 4 +} EFI_MEMORY_ERROR_GRANULARITY_TYPE; + +typedef enum { + EfiMemoryErrorOperationOther = 1, + EfiMemoryErrorOperationUnknown = 2, + EfiMemoryErrorOperationRead = 3, + EfiMemoryErrorOperationWrite = 4, + EfiMemoryErrorOperationPartialWrite = 5 +} EFI_MEMORY_ERROR_OPERATION_TYPE; + +typedef struct { + EFI_MEMORY_ERROR_TYPE MemoryErrorType; + EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity; + EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation; + UINT32 VendorSyndrome; + UINT32 MemoryArrayErrorAddress; + UINT32 DeviceErrorAddress; + UINT32 DeviceErrorResolution; +} EFI_MEMORY_32BIT_ERROR_INFORMATION; + +// +// Memory. Error Information - SMBIOS Type 33 +// +#define EFI_MEMORY_64BIT_ERROR_INFORMATION_RECORD_NUMBER 0x0000000A + +typedef struct { + EFI_MEMORY_ERROR_TYPE MemoryErrorType; + EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity; + EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation; + UINT32 VendorSyndrome; + UINT64 MemoryArrayErrorAddress; + UINT64 DeviceErrorAddress; + UINT32 DeviceErrorResolution; +} EFI_MEMORY_64BIT_ERROR_INFORMATION; + + +typedef union _EFI_MEMORY_SUBCLASS_RECORDS { + EFI_MEMORY_SIZE_DATA SizeData; + EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData; + EFI_MEMORY_ARRAY_LINK ArrayLink; + EFI_MEMORY_ARRAY_START_ADDRESS ArrayStartAddress; + EFI_MEMORY_DEVICE_START_ADDRESS DeviceStartAddress; + EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData; + EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData; + EFI_MEMORY_CONTROLLER_INFORMATION MemoryControllerInfo; + EFI_MEMORY_32BIT_ERROR_INFORMATION Memory32bitErrorInfo; + EFI_MEMORY_64BIT_ERROR_INFORMATION Memory64bitErrorInfo; +} EFI_MEMORY_SUBCLASS_RECORDS; + +typedef struct { + EFI_SUBCLASS_TYPE1_HEADER Header; + EFI_MEMORY_SUBCLASS_RECORDS Record; +} EFI_MEMORY_SUBCLASS_DRIVER_DATA; + + + +#endif diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassMisc.h b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassMisc.h new file mode 100644 index 0000000..368c91c --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassMisc.h @@ -0,0 +1,1260 @@ +/*++ + +Copyright (c) 2004 - 2009, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubSubClassMisc.h + +Abstract: + + Definitions for Misc sub class data records + +Revision History + +--*/ + +#ifndef _DATAHUB_SUBCLASS_MISC_H_ +#define _DATAHUB_SUBCLASS_MISC_H_ + +#include EFI_GUID_DEFINITION(DataHubRecords) + +#define EFI_MISC_SUBCLASS_GUID \ +{ 0x772484B2, 0x7482, 0x4b91, 0x9F, 0x9A, 0xAD, 0x43, 0xF8, 0x1C, 0x58, 0x81 } + +#define EFI_MISC_SUBCLASS_VERSION 0x0100 + +#pragma pack(1) +// +////////////////////////////////////////////////////////////////////////////// +// +// Last PCI Bus Number +// +#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001 + +typedef struct { + UINT8 LastPciBus; +} EFI_MISC_LAST_PCI_BUS; + +typedef struct { + UINT8 FunctionNum :3; + UINT8 DeviceNum :5; +} EFI_MISC_DEV_FUNC_NUM; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. BIOS Vendor - SMBIOS Type 0 +// +#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002 + +typedef struct { + UINT32 Reserved1 :2; + UINT32 Unknown :1; + UINT32 BiosCharacteristicsNotSupported :1; + UINT32 IsaIsSupported :1; + UINT32 McaIsSupported :1; + UINT32 EisaIsSupported :1; + UINT32 PciIsSupported :1; + UINT32 PcmciaIsSupported :1; + UINT32 PlugAndPlayIsSupported :1; + UINT32 ApmIsSupported :1; + UINT32 BiosIsUpgradable :1; + UINT32 BiosShadowingAllowed :1; + UINT32 VlVesaIsSupported :1; + UINT32 EscdSupportIsAvailable :1; + UINT32 BootFromCdIsSupported :1; + UINT32 SelectableBootIsSupported :1; + UINT32 RomBiosIsSocketed :1; + UINT32 BootFromPcmciaIsSupported :1; + UINT32 EDDSpecificationIsSupported :1; + UINT32 JapaneseNecFloppyIsSupported :1; + UINT32 JapaneseToshibaFloppyIsSupported :1; + UINT32 Floppy525_360IsSupported :1; + UINT32 Floppy525_12IsSupported :1; + UINT32 Floppy35_720IsSupported :1; + UINT32 Floppy35_288IsSupported :1; + UINT32 PrintScreenIsSupported :1; + UINT32 Keyboard8042IsSupported :1; + UINT32 SerialIsSupported :1; + UINT32 PrinterIsSupported :1; + UINT32 CgaMonoIsSupported :1; + UINT32 NecPc98 :1; + UINT32 AcpiIsSupported :1; + UINT32 UsbLegacyIsSupported :1; + UINT32 AgpIsSupported :1; + UINT32 I20BootIsSupported :1; + UINT32 Ls120BootIsSupported :1; + UINT32 AtapiZipDriveBootIsSupported :1; + UINT32 Boot1394IsSupported :1; + UINT32 SmartBatteryIsSupported :1; + UINT32 BiosBootSpecIsSupported :1; + UINT32 FunctionKeyNetworkBootIsSupported :1; + UINT32 TargetContentDistributionEnabled :1; + UINT32 Reserved :21; +} EFI_MISC_BIOS_CHARACTERISTICS; + +typedef struct { + UINT32 BiosReserved :16; + UINT32 SystemReserved :16; + UINT32 Reserved :32; +} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION; + +typedef UINT8 EFI_MISC_BIOS_MAJOR_RELEASE; +typedef UINT8 EFI_MISC_BIOS_MINOR_RELEASE; +typedef UINT8 EFI_MISC_FIRM_MAJOR_RELEASE; +typedef UINT8 EFI_MISC_FIRM_MINOR_RELEASE; + +typedef struct { + STRING_REF BiosVendor; + STRING_REF BiosVersion; + STRING_REF BiosReleaseDate; + EFI_PHYSICAL_ADDRESS BiosStartingAddress; + EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize; + EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1; + EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION BiosCharacteristics2; + UINT8 BiosMajorRelease; + UINT8 BiosMinorRelease; + UINT8 BiosEmbeddedFirmwareMajorRelease; + UINT8 BiosEmbeddedFirmwareMinorRelease; +} EFI_MISC_BIOS_VENDOR; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System Manufacturer - SMBIOS Type 1 +// +#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003 + +typedef enum { + EfiSystemWakeupTypeReserved = 0, + EfiSystemWakeupTypeOther = 1, + EfiSystemWakeupTypeUnknown = 2, + EfiSystemWakeupTypeApmTimer = 3, + EfiSystemWakeupTypeModemRing = 4, + EfiSystemWakeupTypeLanRemote = 5, + EfiSystemWakeupTypePowerSwitch = 6, + EfiSystemWakeupTypePciPme = 7, + EfiSystemWakeupTypeAcPowerRestored = 8, +} EFI_MISC_SYSTEM_WAKEUP_TYPE; + +typedef struct { + STRING_REF SystemManufacturer; + STRING_REF SystemProductName; + STRING_REF SystemVersion; + STRING_REF SystemSerialNumber; + EFI_GUID SystemUuid; + EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType; + STRING_REF SystemSKUNumber; + STRING_REF SystemFamily; +} EFI_MISC_SYSTEM_MANUFACTURER; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Base Board Manufacturer - SMBIOS Type 2 +// +#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004 + +typedef struct { + UINT32 Motherboard :1; + UINT32 RequiresDaughterCard :1; + UINT32 Removable :1; + UINT32 Replaceable :1; + UINT32 HotSwappable :1; + UINT32 Reserved :27; +} EFI_BASE_BOARD_FEATURE_FLAGS; + +typedef enum { + EfiBaseBoardTypeUnknown = 1, + EfiBaseBoardTypeOther = 2, + EfiBaseBoardTypeServerBlade = 3, + EfiBaseBoardTypeConnectivitySwitch = 4, + EfiBaseBoardTypeSystemManagementModule = 5, + EfiBaseBoardTypeProcessorModule = 6, + EfiBaseBoardTypeIOModule = 7, + EfiBaseBoardTypeMemoryModule = 8, + EfiBaseBoardTypeDaughterBoard = 9, + EfiBaseBoardTypeMotherBoard = 0xA, + EfiBaseBoardTypeProcessorMemoryModule = 0xB, + EfiBaseBoardTypeProcessorIOModule = 0xC, + EfiBaseBoardTypeInterconnectBoard = 0xD, +} EFI_BASE_BOARD_TYPE; + +typedef struct { + STRING_REF BaseBoardManufacturer; + STRING_REF BaseBoardProductName; + STRING_REF BaseBoardVersion; + STRING_REF BaseBoardSerialNumber; + STRING_REF BaseBoardAssetTag; + STRING_REF BaseBoardChassisLocation; + EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags; + EFI_BASE_BOARD_TYPE BaseBoardType; + EFI_INTER_LINK_DATA BaseBoardChassisLink; + UINT32 BaseBoardNumberLinks; + EFI_INTER_LINK_DATA LinkN; +} EFI_MISC_BASE_BOARD_MANUFACTURER; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System/Chassis Enclosure - SMBIOS Type 3 +// +#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005 + +typedef enum { + EfiMiscChassisTypeOther = 0x1, + EfiMiscChassisTypeUnknown = 0x2, + EfiMiscChassisTypeDeskTop = 0x3, + EfiMiscChassisTypeLowProfileDesktop = 0x4, + EfiMiscChassisTypePizzaBox = 0x5, + EfiMiscChassisTypeMiniTower = 0x6, + EfiMiscChassisTypeTower = 0x7, + EfiMiscChassisTypePortable = 0x8, + EfiMiscChassisTypeLapTop = 0x9, + EfiMiscChassisTypeNotebook = 0xA, + EfiMiscChassisTypeHandHeld = 0xB, + EfiMiscChassisTypeDockingStation = 0xC, + EfiMiscChassisTypeAllInOne = 0xD, + EfiMiscChassisTypeSubNotebook = 0xE, + EfiMiscChassisTypeSpaceSaving = 0xF, + EfiMiscChassisTypeLunchBox = 0x10, + EfiMiscChassisTypeMainServerChassis = 0x11, + EfiMiscChassisTypeExpansionChassis = 0x12, + EfiMiscChassisTypeSubChassis = 0x13, + EfiMiscChassisTypeBusExpansionChassis = 0x14, + EfiMiscChassisTypePeripheralChassis = 0x15, + EfiMiscChassisTypeRaidChassis = 0x16, + EfiMiscChassisTypeRackMountChassis = 0x17, + EfiMiscChassisTypeSealedCasePc = 0x18, + EfiMiscChassisMultiSystemChassis = 0x19, + EfiMiscChassisCompactPCI = 0x1A, + EfiMiscChassisAdvancedTCA = 0x1B, + EfiMiscChassisBlade = 0x1C, + EfiMiscChassisBladeEnclosure = 0x1D +} EFI_MISC_CHASSIS_TYPE; + +typedef struct { + UINT32 ChassisType :16; + UINT32 ChassisLockPresent:1; + UINT32 Reserved :15; +} EFI_MISC_CHASSIS_STATUS; + +typedef enum { + EfiChassisStateOther = 1, + EfiChassisStateUnknown = 2, + EfiChassisStateSafe = 3, + EfiChassisStateWarning = 4, + EfiChassisStateCritical = 5, + EfiChassisStateNonRecoverable = 6, +} EFI_MISC_CHASSIS_STATE; + +typedef enum { + EfiChassisSecurityStatusOther = 1, + EfiChassisSecurityStatusUnknown = 2, + EfiChassisSecurityStatusNone = 3, + EfiChassisSecurityStatusExternalInterfaceLockedOut = 4, + EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 5, +} EFI_MISC_CHASSIS_SECURITY_STATE; + +typedef struct { + UINT32 RecordType :1; + UINT32 Type :7; + UINT32 Reserved :24; +} EFI_MISC_ELEMENT_TYPE; + +typedef struct { + EFI_MISC_ELEMENT_TYPE ChassisElementType; + EFI_INTER_LINK_DATA ChassisElementStructure; + EFI_BASE_BOARD_TYPE ChassisBaseBoard; + UINT32 ChassisElementMinimum; + UINT32 ChassisElementMaximum; +} EFI_MISC_ELEMENTS; + +typedef struct { + STRING_REF ChassisManufacturer; + STRING_REF ChassisVersion; + STRING_REF ChassisSerialNumber; + STRING_REF ChassisAssetTag; + EFI_MISC_CHASSIS_STATUS ChassisType; + EFI_MISC_CHASSIS_STATE ChassisBootupState; + EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState; + EFI_MISC_CHASSIS_STATE ChassisThermalState; + EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState; + UINT32 ChassisOemDefined; + UINT32 ChassisHeight; + UINT32 ChassisNumberPowerCords; + UINT32 ChassisElementCount; + UINT32 ChassisElementRecordLength;// + EFI_MISC_ELEMENTS ChassisElements; +} EFI_MISC_CHASSIS_MANUFACTURER; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Port Connector Information - SMBIOS Type 8 +// +#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006 + +typedef enum { + EfiPortConnectorTypeNone = 0x0, + EfiPortConnectorTypeCentronics = 0x1, + EfiPortConnectorTypeMiniCentronics = 0x2, + EfiPortConnectorTypeProprietary = 0x3, + EfiPortConnectorTypeDB25Male = 0x4, + EfiPortConnectorTypeDB25Female = 0x5, + EfiPortConnectorTypeDB15Male = 0x6, + EfiPortConnectorTypeDB15Female = 0x7, + EfiPortConnectorTypeDB9Male = 0x8, + EfiPortConnectorTypeDB9Female = 0x9, + EfiPortConnectorTypeRJ11 = 0xA, + EfiPortConnectorTypeRJ45 = 0xB, + EfiPortConnectorType50PinMiniScsi = 0xC, + EfiPortConnectorTypeMiniDin = 0xD, + EfiPortConnectorTypeMicriDin = 0xE, + EfiPortConnectorTypePS2 = 0xF, + EfiPortConnectorTypeInfrared = 0x10, + EfiPortConnectorTypeHpHil = 0x11, + EfiPortConnectorTypeUsb = 0x12, + EfiPortConnectorTypeSsaScsi = 0x13, + EfiPortConnectorTypeCircularDin8Male = 0x14, + EfiPortConnectorTypeCircularDin8Female = 0x15, + EfiPortConnectorTypeOnboardIde = 0x16, + EfiPortConnectorTypeOnboardFloppy = 0x17, + EfiPortConnectorType9PinDualInline = 0x18, + EfiPortConnectorType25PinDualInline = 0x19, + EfiPortConnectorType50PinDualInline = 0x1A, + EfiPortConnectorType68PinDualInline = 0x1B, + EfiPortConnectorTypeOnboardSoundInput = 0x1C, + EfiPortConnectorTypeMiniCentronicsType14 = 0x1D, + EfiPortConnectorTypeMiniCentronicsType26 = 0x1E, + EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F, + EfiPortConnectorTypeBNC = 0x20, + EfiPortConnectorType1394 = 0x21, + EfiPortConnectorTypeSasSata = 0x22, + EfiPortConnectorTypePC98 = 0xA0, + EfiPortConnectorTypePC98Hireso = 0xA1, + EfiPortConnectorTypePCH98 = 0xA2, + EfiPortConnectorTypePC98Note = 0xA3, + EfiPortConnectorTypePC98Full = 0xA4, + EfiPortConnectorTypeOther = 0xFF, +} EFI_MISC_PORT_CONNECTOR_TYPE; + +typedef enum { + EfiPortTypeNone = 0x0, + EfiPortTypeParallelXtAtCompatible = 0x1, + EfiPortTypeParallelPortPs2 = 0x2, + EfiPortTypeParallelPortEcp = 0x3, + EfiPortTypeParallelPortEpp = 0x4, + EfiPortTypeParallelPortEcpEpp = 0x5, + EfiPortTypeSerialXtAtCompatible = 0x6, + EfiPortTypeSerial16450Compatible = 0x7, + EfiPortTypeSerial16550Compatible = 0x8, + EfiPortTypeSerial16550ACompatible = 0x9, + EfiPortTypeScsi = 0xA, + EfiPortTypeMidi = 0xB, + EfiPortTypeJoyStick = 0xC, + EfiPortTypeKeyboard = 0xD, + EfiPortTypeMouse = 0xE, + EfiPortTypeSsaScsi = 0xF, + EfiPortTypeUsb = 0x10, + EfiPortTypeFireWire = 0x11, + EfiPortTypePcmciaTypeI = 0x12, + EfiPortTypePcmciaTypeII = 0x13, + EfiPortTypePcmciaTypeIII = 0x14, + EfiPortTypeCardBus = 0x15, + EfiPortTypeAccessBusPort = 0x16, + EfiPortTypeScsiII = 0x17, + EfiPortTypeScsiWide = 0x18, + EfiPortTypePC98 = 0x19, + EfiPortTypePC98Hireso = 0x1A, + EfiPortTypePCH98 = 0x1B, + EfiPortTypeVideoPort = 0x1C, + EfiPortTypeAudioPort = 0x1D, + EfiPortTypeModemPort = 0x1E, + EfiPortTypeNetworkPort = 0x1F, + EfiPortTypeSata = 0x20, + EfiPortTypeSas = 0x21, + EfiPortType8251Compatible = 0xA0, + EfiPortType8251FifoCompatible = 0xA1, + EfiPortTypeOther = 0xFF, +} EFI_MISC_PORT_TYPE; + + +typedef struct { + EFI_STRING_TOKEN PortInternalConnectorDesignator; + EFI_STRING_TOKEN PortExternalConnectorDesignator; + EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType; + EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType; + EFI_MISC_PORT_TYPE PortType; + EFI_MISC_PORT_DEVICE_PATH PortPath; +} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System Slots - SMBIOS Type 9 +// +#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007 + +typedef enum { + EfiSlotTypeOther = 0x1, + EfiSlotTypeUnknown = 0x2, + EfiSlotTypeIsa = 0x3, + EfiSlotTypeMca = 0x4, + EfiSlotTypeEisa = 0x5, + EfiSlotTypePci = 0x6, + EfiSlotTypePcmcia = 0x7, + EfiSlotTypeVlVesa = 0x8, + EfiSlotTypeProprietary = 0x9, + EfiSlotTypeProcessorCardSlot = 0xA, + EfiSlotTypeProprietaryMemoryCardSlot = 0xB, + EfiSlotTypeIORiserCardSlot = 0xC, + EfiSlotTypeNuBus = 0xD, + EfiSlotTypePci66MhzCapable = 0xE, + EfiSlotTypeAgp = 0xF, + EfiSlotTypeApg2X = 0x10, + EfiSlotTypeAgp4X = 0x11, + EfiSlotTypePciX = 0x12, + EfiSlotTypeAgp8X = 0x13, + EfiSlotTypePC98C20 = 0xA0, + EfiSlotTypePC98C24 = 0xA1, + EfiSlotTypePC98E = 0xA2, + EfiSlotTypePC98LocalBus = 0xA3, + EfiSlotTypePC98Card = 0xA4, + EfiSlotTypePciExpress = 0xA5, + EfiSlotTypePciExpressX1 = 0xA6, + EfiSlotTypePciExpressX2 = 0xA7, + EfiSlotTypePciExpressX4 = 0xA8, + EfiSlotTypePciExpressX8 = 0xA9, + EfiSlotTypePciExpressX16 = 0xAA, + EfiSlotTypePciExpressGen2 = 0xAB, + EfiSlotTypePciExpressGen2X1 = 0xAC, + EfiSlotTypePciExpressGen2X2 = 0xAD, + EfiSlotTypePciExpressGen2X4 = 0xAE, + EfiSlotTypePciExpressGen2X8 = 0xAF, + EfiSlotTypePciExpressGen2X16 = 0xB0 +} EFI_MISC_SLOT_TYPE; + +typedef enum { + EfiSlotDataBusWidthOther = 1, + EfiSlotDataBusWidthUnknown = 2, + EfiSlotDataBusWidth8Bit = 3, + EfiSlotDataBusWidth16Bit = 4, + EfiSlotDataBusWidth32Bit = 5, + EfiSlotDataBusWidth64Bit = 6, + EfiSlotDataBusWidth128Bit = 7, + EfiSlotDataBusWidth1xOrx1 = 8, + EfiSlotDataBusWidth2xOrx2 = 9, + EfiSlotDataBusWidth4xOrx4 = 0xA, + EfiSlotDataBusWidth8xOrx8 = 0xB, + EfiSlotDataBusWidth12xOrx12 = 0xC, + EfiSlotDataBusWidth16xOrx16 = 0xD, + EfiSlotDataBusWidth32xOrx32 = 0xE, +} EFI_MISC_SLOT_DATA_BUS_WIDTH; + +typedef enum { + EfiSlotUsageOther = 1, + EfiSlotUsageUnknown = 2, + EfiSlotUsageAvailable = 3, + EfiSlotUsageInUse = 4, +} EFI_MISC_SLOT_USAGE; + +typedef enum { + EfiSlotLengthOther = 1, + EfiSlotLengthUnknown = 2, + EfiSlotLengthShort = 3, + EfiSlotLengthLong = 4 +} EFI_MISC_SLOT_LENGTH; + +typedef struct { + UINT32 CharacteristicsUnknown :1; + UINT32 Provides50Volts :1; + UINT32 Provides33Volts :1; + UINT32 SharedSlot :1; + UINT32 PcCard16Supported :1; + UINT32 CardBusSupported :1; + UINT32 ZoomVideoSupported :1; + UINT32 ModemRingResumeSupported:1; + UINT32 PmeSignalSupported :1; + UINT32 HotPlugDevicesSupported :1; + UINT32 SmbusSignalSupported :1; + UINT32 Reserved :21; +} EFI_MISC_SLOT_CHARACTERISTICS; + +typedef struct { + STRING_REF SlotDesignation; + EFI_MISC_SLOT_TYPE SlotType; + EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth; + EFI_MISC_SLOT_USAGE SlotUsage; + EFI_MISC_SLOT_LENGTH SlotLength; + UINT16 SlotId; + EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics; + EFI_DEVICE_PATH_PROTOCOL SlotDevicePath; + UINT16 SegmentGroupNum; + UINT8 BusNum; + EFI_MISC_DEV_FUNC_NUM DevFuncNum; +} EFI_MISC_SYSTEM_SLOT_DESIGNATION; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Onboard Device - SMBIOS Type 10 +// +#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008 + +typedef enum { + EfiOnBoardDeviceTypeOther = 1, + EfiOnBoardDeviceTypeUnknown = 2, + EfiOnBoardDeviceTypeVideo = 3, + EfiOnBoardDeviceTypeScsiController = 4, + EfiOnBoardDeviceTypeEthernet = 5, + EfiOnBoardDeviceTypeTokenRing = 6, + EfiOnBoardDeviceTypeSound = 7, + EfiOnBoardDeviceTypePataController = 8, + EfiOnBoardDeviceTypeSataController = 9, + EfiOnBoardDeviceTypeSasController = 10 +} EFI_MISC_ONBOARD_DEVICE_TYPE; + +typedef struct { + UINT32 DeviceType :16; + UINT32 DeviceEnabled :1; + UINT32 Reserved :15; +} EFI_MISC_ONBOARD_DEVICE_STATUS; + +typedef struct { + STRING_REF OnBoardDeviceDescription; + EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus; + EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath; +} EFI_MISC_ONBOARD_DEVICE; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. BIOS Language Information - SMBIOS Type 11 +// +#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009 + +typedef struct { + STRING_REF OemStringRef[1]; +} EFI_MISC_OEM_STRING; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System Options - SMBIOS Type 12 +// +typedef struct { + STRING_REF SystemOptionStringRef[1]; +} EFI_MISC_SYSTEM_OPTION_STRING; + +#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Number of Installable Languages - SMBIOS Type 13 +// +#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B + +typedef struct { + UINT32 AbbreviatedLanguageFormat :1; + UINT32 Reserved :31; +} EFI_MISC_LANGUAGE_FLAGS; + +typedef struct { + UINT16 NumberOfInstallableLanguages; + EFI_MISC_LANGUAGE_FLAGS LanguageFlags; + UINT16 CurrentLanguageNumber; +} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System Language String +// +#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C + +typedef struct { + UINT16 LanguageId; + STRING_REF SystemLanguageString; +} EFI_MISC_SYSTEM_LANGUAGE_STRING; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Group Associations - SMBIOS Type 14 +// +#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D + +typedef struct { + STRING_REF GroupName; + UINT16 NumberGroupItems; + UINT16 GroupId; +} EFI_MISC_GROUP_NAME_DATA; + +#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E + +typedef struct { + EFI_GUID SubClass; + EFI_INTER_LINK_DATA GroupLink; + UINT16 GroupId; + UINT16 GroupElementId; + UINT8 ItemType; +} EFI_MISC_GROUP_ITEM_SET_DATA; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Pointing Device Type - SMBIOS Type 21 +// +#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F + +typedef enum { + EfiPointingDeviceTypeOther = 1, + EfiPointingDeviceTypeUnknown = 2, + EfiPointingDeviceTypeMouse = 3, + EfiPointingDeviceTypeTrackBall = 4, + EfiPointingDeviceTypeTrackPoint = 5, + EfiPointingDeviceTypeGlidePoint = 6, + EfiPointingDeviceTouchPad = 7, + EfiPointingDeviceTouchScreen = 8, + EfiPointingDeviceOpticalSensor = 9, +} EFI_MISC_POINTING_DEVICE_TYPE; + +typedef enum { + EfiPointingDeviceInterfaceOther = 1, + EfiPointingDeviceInterfaceUnknown = 2, + EfiPointingDeviceInterfaceSerial = 3, + EfiPointingDeviceInterfacePs2 = 4, + EfiPointingDeviceInterfaceInfrared = 5, + EfiPointingDeviceInterfaceHpHil = 6, + EfiPointingDeviceInterfaceBusMouse = 7, + EfiPointingDeviceInterfaceADB = 8, + EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0, + EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1, + EfiPointingDeviceInterfaceUsb = 0xA2, +} EFI_MISC_POINTING_DEVICE_INTERFACE; + +typedef struct { + EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType; + EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface; + UINT16 NumberPointingDeviceButtons; + EFI_DEVICE_PATH_PROTOCOL PointingDevicePath; +} EFI_MISC_ONBOARD_DEVICE_TYPE_DATA; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Portable Battery - SMBIOS Type 22 +// +#define EFI_MISC_PORTABLE_BATTERY_RECORD_NUMBER 0x00000010 + +typedef enum { + EfiPortableBatteryDeviceChemistryOther = 1, + EfiPortableBatteryDeviceChemistryUnknown = 2, + EfiPortableBatteryDeviceChemistryLeadAcid = 3, + EfiPortableBatteryDeviceChemistryNickelCadmium = 4, + EfiPortableBatteryDeviceChemistryNickelMetalHydride = 5, + EfiPortableBatteryDeviceChemistryLithiumIon = 6, + EfiPortableBatteryDeviceChemistryZincAir = 7, + EfiPortableBatteryDeviceChemistryLithiumPolymer = 8, +} EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY; + +typedef struct { + STRING_REF Location; + STRING_REF Manufacturer; + STRING_REF ManufactureDate; + STRING_REF SerialNumber; + STRING_REF DeviceName; + EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY DeviceChemistry; + UINT16 DesignCapacity; + UINT16 DesignVoltage; + STRING_REF SBDSVersionNumber; + UINT8 MaximumError; + UINT16 SBDSSerialNumber; + UINT16 SBDSManufactureDate; + STRING_REF SBDSDeviceChemistry; + UINT8 DesignCapacityMultiplier; + UINT32 OEMSpecific; + UINT8 BatteryNumber; // Temporary + BOOLEAN Valid; // Is entry valid - Temporary +} EFI_MISC_PORTABLE_BATTERY; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Reset Capabilities - SMBIOS Type 23 +// +#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011 + +typedef struct { + UINT32 Status :1; + UINT32 BootOption :2; + UINT32 BootOptionOnLimit :2; + UINT32 WatchdogTimerPresent:1; + UINT32 Reserved :26; +} EFI_MISC_RESET_CAPABILITIES_TYPE; + +typedef struct { + EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities; + UINT16 ResetCount; + UINT16 ResetLimit; + UINT16 ResetTimerInterval; + UINT16 ResetTimeout; +} EFI_MISC_RESET_CAPABILITIES; + +typedef struct { + EFI_MISC_RESET_CAPABILITIES ResetCapabilities; + UINT16 ResetCount; + UINT16 ResetLimit; + UINT16 ResetTimerInterval; + UINT16 ResetTimeout; +} EFI_MISC_RESET_CAPABILITIES_DATA; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Hardware Security - SMBIOS Type 24 +// +#define EFI_MISC_HARDWARE_SECURITY_RECORD_NUMBER 0x00000012 + +// +// Backward Compatibility +// +#define EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA_RECORD_NUMBER EFI_MISC_HARDWARE_SECURITY_RECORD_NUMBER + +typedef enum { + EfiHardwareSecurityStatusDisabled = 0, + EfiHardwareSecurityStatusEnabled = 1, + EfiHardwareSecurityStatusNotImplemented = 2, + EfiHardwareSecurityStatusUnknown = 3 +} EFI_MISC_HARDWARE_SECURITY_STATUS; + +typedef struct { + EFI_MISC_HARDWARE_SECURITY_STATUS FrontPanelResetStatus :2; + EFI_MISC_HARDWARE_SECURITY_STATUS AdministratorPasswordStatus :2; + EFI_MISC_HARDWARE_SECURITY_STATUS KeyboardPasswordStatus :2; + EFI_MISC_HARDWARE_SECURITY_STATUS PowerOnPasswordStatus :2; + EFI_MISC_HARDWARE_SECURITY_STATUS Reserved :24; +} EFI_MISC_HARDWARE_SECURITY_SETTINGS; + +typedef struct { + EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings; +} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System Power Controls - SMBIOS Type 25 +// +#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013 + +typedef struct { + UINT8 ScheduledPoweronMonth; + UINT8 ScheduledPoweronDayOfMonth; + UINT8 ScheduledPoweronHour; + UINT8 ScheduledPoweronMinute; + UINT8 ScheduledPoweronSecond; +} EFI_MISC_SCHEDULED_POWER_ON_MONTH; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Voltage Probe - SMBIOS Type 26 +// +#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014 + +typedef struct { + UINT32 VoltageProbeSite :5; + UINT32 VoltageProbeStatus :3; + UINT32 Reserved :24; +} EFI_MISC_VOLTAGE_PROBE_LOCATION; + +typedef struct { + STRING_REF VoltageProbeDescription; + EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation; + UINT16 VoltageProbeMaximumValue; + UINT16 VoltageProbeMinimumValue; + UINT16 VoltageProbeResolution; + UINT16 VoltageProbeTolerance; + UINT16 VoltageProbeAccuracy; + UINT16 VoltageProbeNominalValue; + UINT16 MDLowerNoncriticalThreshold; + UINT16 MDUpperNoncriticalThreshold; + UINT16 MDLowerCriticalThreshold; + UINT16 MDUpperCriticalThreshold; + UINT16 MDLowerNonrecoverableThreshold; + UINT16 MDUpperNonrecoverableThreshold; + UINT32 VoltageProbeOemDefined; +} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Cooling Device - SMBIOS Type 27 +// +#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015 + +typedef struct { + UINT32 CoolingDevice :5; + UINT32 CoolingDeviceStatus :3; + UINT32 Reserved :24; +} EFI_MISC_COOLING_DEVICE_TYPE; + +typedef struct { + EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType; + EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink; + UINT8 CoolingDeviceUnitGroup; + UINT16 CoolingDeviceNominalSpeed; + UINT32 CoolingDeviceOemDefined; +} EFI_MISC_COOLING_DEVICE_TEMP_LINK; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Temperature Probe - SMBIOS Type 28 +// +#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016 + +typedef struct { + UINT32 TemperatureProbeSite :5; + UINT32 TemperatureProbeStatus :3; + UINT32 Reserved :24; +} EFI_MISC_TEMPERATURE_PROBE_LOCATION; + +typedef struct { + STRING_REF TemperatureProbeDescription; + EFI_MISC_TEMPERATURE_PROBE_LOCATION TemperatureProbeLocation; + UINT16 TemperatureProbeMaximumValue; + UINT16 TemperatureProbeMinimumValue; + UINT16 TemperatureProbeResolution; + UINT16 TemperatureProbeTolerance; + UINT16 TemperatureProbeAccuracy; + UINT16 TemperatureProbeNominalValue; + UINT16 MDLowerNoncriticalThreshold; + UINT16 MDUpperNoncriticalThreshold; + UINT16 MDLowerCriticalThreshold; + UINT16 MDUpperCriticalThreshold; + UINT16 MDLowerNonrecoverableThreshold; + UINT16 MDUpperNonrecoverableThreshold; + UINT32 TemperatureProbeOemDefined; +} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Electrical Current Probe - SMBIOS Type 29 +// +#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017 + +typedef struct { + UINT32 ElectricalCurrentProbeSite :5; + UINT32 ElectricalCurrentProbeStatus :3; + UINT32 Reserved :24; +} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION; + +typedef struct { + STRING_REF ElectricalCurrentProbeDescription; + EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION ElectricalCurrentProbeLocation; + UINT16 ElectricalCurrentProbeMaximumValue; + UINT16 ElectricalCurrentProbeMinimumValue; + UINT16 ElectricalCurrentProbeResolution; + UINT16 ElectricalCurrentProbeTolerance; + UINT16 ElectricalCurrentProbeAccuracy; + UINT16 ElectricalCurrentProbeNominalValue; + UINT16 MDLowerNoncriticalThreshold; + UINT16 MDUpperNoncriticalThreshold; + UINT16 MDLowerCriticalThreshold; + UINT16 MDUpperCriticalThreshold; + UINT16 MDLowerNonrecoverableThreshold; + UINT16 MDUpperNonrecoverableThreshold; + UINT32 ElectricalCurrentProbeOemDefined; +} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Out-of-Band Remote Access - SMBIOS Type 30 +// +#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018 + +typedef struct { + UINT32 InboundConnectionEnabled :1; + UINT32 OutboundConnectionEnabled :1; + UINT32 Reserved :30; +} EFI_MISC_REMOTE_ACCESS_CONNECTIONS; + +typedef struct { + STRING_REF RemoteAccessManufacturerNameDescription; + EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections; +} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION; +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. BIS Entry Point - SMBIOS Type 31 +// +#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019 + +typedef struct { + EFI_PHYSICAL_ADDRESS BisEntryPoint; +} EFI_MISC_BIS_ENTRY_POINT; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Boot Information - SMBIOS Type 32 +// +#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A + +typedef enum { + EfiBootInformationStatusNoError = 0, + EfiBootInformationStatusNoBootableMedia = 1, + EfiBootInformationStatusNormalOSFailedLoading = 2, + EfiBootInformationStatusFirmwareDetectedFailure = 3, + EfiBootInformationStatusOSDetectedFailure = 4, + EfiBootInformationStatusUserRequestedBoot = 5, + EfiBootInformationStatusSystemSecurityViolation = 6, + EfiBootInformationStatusPreviousRequestedImage = 7, + EfiBootInformationStatusWatchdogTimerExpired = 8, + EfiBootInformationStatusStartReserved = 9, + EfiBootInformationStatusStartOemSpecific = 128, + EfiBootInformationStatusStartProductSpecific = 192, +} EFI_MISC_BOOT_INFORMATION_STATUS_TYPE; + +typedef struct { + EFI_MISC_BOOT_INFORMATION_STATUS_TYPE BootInformationStatus; + UINT8 BootInformationData[9]; +} EFI_MISC_BOOT_INFORMATION_STATUS; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Management Device - SMBIOS Type 34 +// +#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B + +typedef enum { + EfiManagementDeviceTypeOther = 1, + EfiManagementDeviceTypeUnknown = 2, + EfiManagementDeviceTypeLm75 = 3, + EfiManagementDeviceTypeLm78 = 4, + EfiManagementDeviceTypeLm79 = 5, + EfiManagementDeviceTypeLm80 = 6, + EfiManagementDeviceTypeLm81 = 7, + EfiManagementDeviceTypeAdm9240 = 8, + EfiManagementDeviceTypeDs1780 = 9, + EfiManagementDeviceTypeMaxim1617 = 0xA, + EfiManagementDeviceTypeGl518Sm = 0xB, + EfiManagementDeviceTypeW83781D = 0xC, + EfiManagementDeviceTypeHt82H791 = 0xD +} EFI_MISC_MANAGEMENT_DEVICE_TYPE; + +typedef enum { + EfiManagementDeviceAddressTypeOther = 1, + EfiManagementDeviceAddressTypeUnknown = 2, + EfiManagementDeviceAddressTypeIOPort = 3, + EfiManagementDeviceAddressTypeMemory = 4, + EfiManagementDeviceAddressTypeSmbus = 5 +} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE; + +typedef struct { + STRING_REF ManagementDeviceDescription; + EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType; + UINTN ManagementDeviceAddress; + EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE ManagementDeviceAddressType; +} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION; + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. Management Device Component - SMBIOS Type 35 +// +#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C + +typedef struct { + STRING_REF ManagementDeviceComponentDescription; + EFI_INTER_LINK_DATA ManagementDeviceLink; + EFI_INTER_LINK_DATA ManagementDeviceComponentLink; + EFI_INTER_LINK_DATA ManagementDeviceThresholdLink; + UINT8 ComponentType; +} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION; + +// +////////////////////////////////////////////////////////////////////////////// +// +// IPMI Data Record - SMBIOS Type 38 +// +typedef enum { + EfiIpmiOther = 0, + EfiIpmiKcs = 1, + EfiIpmiSmic = 2, + EfiIpmiBt = 3, +} EFI_MISC_IPMI_INTERFACE_TYPE; + +typedef struct { + UINT16 IpmiSpecLeastSignificantDigit:4; + UINT16 IpmiSpecMostSignificantDigit:4; + UINT16 Reserved:8; +} EFI_MISC_IPMI_SPECIFICATION_REVISION; + +typedef struct { + EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType; + EFI_MISC_IPMI_SPECIFICATION_REVISION IpmiSpecificationRevision; + UINT16 IpmiI2CSlaveAddress; + UINT16 IpmiNvDeviceAddress; + UINT64 IpmiBaseAddress; + EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath; +} EFI_MISC_IPMI_INTERFACE_TYPE_DATA; + +#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D + +// +////////////////////////////////////////////////////////////////////////////// +// +//System Power supply Record - SMBIOS Type 39 +// +typedef struct { + UINT16 PowerSupplyHotReplaceable :1; + UINT16 PowerSupplyPresent :1; + UINT16 PowerSupplyUnplugged :1; + UINT16 InputVoltageRangeSwitch :4; + UINT16 PowerSupplyStatus :3; + UINT16 PowerSupplyType :4; + UINT16 Reserved :2; +} POWER_SUPPLY_CHARACTERISTICS; + +typedef struct { + UINT16 PowerUnitGroup; + STRING_REF PowerSupplyLocation; + STRING_REF PowerSupplyDeviceName; + STRING_REF PowerSupplyManufacturer; + STRING_REF PowerSupplySerialNumber; + STRING_REF PowerSupplyAssetTagNumber; + STRING_REF PowerSupplyModelPartNumber; + STRING_REF PowerSupplyRevisionLevel; + UINT16 PowerSupplyMaxPowerCapacity; + POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics; + EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink; + EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink; + EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink; +} EFI_MISC_SYSTEM_POWER_SUPPLY; + +#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E + +// +////////////////////////////////////////////////////////////////////////////// +// +//Additional Information Record - SMBIOS Type 40 +// +typedef struct { + UINT8 EntryLength; + UINT8 ReferencedSmbiosType; + EFI_INTER_LINK_DATA ReferencedLink; + UINT8 ReferencedOffset; + STRING_REF EntryString; + EFI_PHYSICAL_ADDRESS ValueAddress; +} EFI_MISC_ADDITIONAL_INFORMATION_ENTRY; + +typedef struct { + UINT8 NumberOfAdditionalInformationEntries; + EFI_PHYSICAL_ADDRESS AdditionalInfoEntriesAddr; +} EFI_MISC_ADDITIONAL_INFORMATION; + +#define EFI_MISC_ADDITIONAL_INFORMATION_RECORD_NUMBER 0x00000022 + +// +////////////////////////////////////////////////////////////////////////////// +// +//Onboard Devices Extended Infomation Record - SMBIOS Type 41 +// +typedef struct { + UINT8 TypeOfDevice:7; + UINT8 DeviceStatus:1; +} EFI_MISC_DEVICE_TYPE; + +typedef struct { + STRING_REF ReferenceDesignation; + EFI_MISC_DEVICE_TYPE DeviceType; + UINT8 DeviceTypeInstance; + UINT16 SegmentGroupNum; + UINT8 BusNum; + EFI_MISC_DEV_FUNC_NUM DevFuncNum; +} EFI_MISC_ONBOARD_DEVICES_EXTENDED_INFORMATION; + +#define EFI_MISC_ONBOARD_DEVICES_EXTENDED_INFORMATION_RECORD_NUMBER 0x00000023 + +// +////////////////////////////////////////////////////////////////////////////// +// +// Generic Data Record - All SMBIOS Type +// Put smbios raw data into one datahub record directly. Smbios driver would +// copy smbios raw data into smbios table but not take any translation. +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Handle; +} SMBIOS_STRUCTURE_HDR; + +typedef struct { + SMBIOS_STRUCTURE_HDR Header; + UINT8 RawData[1]; +} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION; + +#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F + +// +////////////////////////////////////////////////////////////////////////////// +// +// Misc. System Event Log - SMBIOS Type 15 +// +#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x00000020 + +typedef enum { + EfiEventLogTypeReserved1 = 0, + EfiEventLogTypeSingleBitEccMemoryError = 1, + EfiEventLogTypeMultiBitEccMemoryError = 2, + EfiEventLogTypeParityMemoryError = 3, + EfiEventLogTypeBusTimeOut = 4, + EfiEventLogTypeIoChannelCheck = 5, + EfiEventLogTypeSoftwareNmi = 6, + EfiEventLogTypePostMemoryResize = 7, + EfiEventLogTypePostError = 8, + EfiEventLogTypePciParityError = 9, + EfiEventLogTypePciSystemError = 0xA, + EfiEventLogTypeCpuFailure = 0xB, + EfiEventLogTypeEisaFailSafeTimerTimeOut = 0xC, + EfiEventLogTypeCorrectableMemoryLogDisabled = 0xD, + EfiEventLogTypeLoggingDisabled = 0xE, + EfiEventLogTypeReserved2 = 0xF, + EfiEventLogTypeSystemLimitExceeded = 0x10, + EfiEventLogTypeAsynchronousHardwareTimerExpired = 0x11, + EfiEventLogTypeSystemConfigurationInformation = 0x12, + EfiEventLogTypeHardDiskInformation = 0x13, + EfiEventLogTypeSystemReconfigured = 0x14, + EfiEventLogTypeUncorrectableCpuComplexError = 0x15, + EfiEventLogTypeLogAreaResetCleared = 0x16, + EfiEventLogTypeSystemBoot = 0x17, + EfiEventLogTypeEndOfLog = 0xFF +} EFI_MISC_LOG_TYPE; + +typedef enum { + EfiEventLogDataFormatTypeNone = 0, + EfiEventLogDataFormatTypeHandle = 1, + EfiEventLogDataFormatTypeMultipleEvent = 2, + EfiEventLogDataFormatTypeMultipleEventHandle = 3, + EfiEventLogDataFormatTypePostResultsBitmap = 4, + EfiEventLogDataFormatTypeSystemManagement = 5, + EfiEventLogDataFormatTypeMultipleEventSystemManagement = 6 +} EFI_MISC_VARIABLE_DATA_FORMAT_TYPE; + +typedef struct { + UINT8 LogType; + UINT8 DataFormatType; +} EFI_MISC_EVENT_LOG_TYPE; + +typedef struct { + UINT16 LogAreaLength; + UINT16 LogHeaderStartOffset; + UINT16 LogDataStartOffset; + UINT8 AccessMethod; + UINT8 LogStatus; + UINT32 LogChangeToken; + UINT32 AccessMethodAddress; + UINT8 LogHeaderFormat; + UINT8 NumberOfSupportedLogType; + UINT8 LengthOfLogDescriptor; + EFI_PHYSICAL_ADDRESS EventLogTypeDescriptors; // Pointer to EFI_MISC_EVENT_LOG_TYPE +} EFI_MISC_SYSTEM_EVENT_LOG; + +// +// Access Method. +// 0x00~0x04: as following definition +// 0x05~0x7f: Available for future assignment. +// 0x80~0xff: BIOS Vendor/OEM-specific. +// +#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00 +#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01 +#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02 +#define ACCESS_MEMORY_MAPPED 0x03 +#define ACCESS_GPNV 0x04 + +// +////////////////////////////////////////////////////////////////////////////// +// +//Management Device Threshold Data Record - SMBIOS Type 36 +// +#define EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD_RECORD_NUMBER 0x00000021 + +typedef struct { + UINT16 LowerThresNonCritical; + UINT16 UpperThresNonCritical; + UINT16 LowerThresCritical; + UINT16 UpperThresCritical; + UINT16 LowerThresNonRecover; + UINT16 UpperThresNonRecover; +} EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD; + +// +////////////////////////////////////////////////////////////////////////////// +// +// +// +typedef union { + EFI_MISC_LAST_PCI_BUS LastPciBus; + EFI_MISC_BIOS_VENDOR MiscBiosVendor; + EFI_MISC_SYSTEM_MANUFACTURER MiscSystemManufacturer; + EFI_MISC_BASE_BOARD_MANUFACTURER MiscBaseBoardManufacturer; + EFI_MISC_CHASSIS_MANUFACTURER MiscChassisManufacturer; + EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR MiscPortInternalConnectorDesignator; + EFI_MISC_SYSTEM_SLOT_DESIGNATION MiscSystemSlotDesignation; + EFI_MISC_ONBOARD_DEVICE MiscOnboardDevice; + EFI_MISC_OEM_STRING MiscOemString; + EFI_MISC_SYSTEM_OPTION_STRING MiscOptionString; + EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES NumberOfInstallableLanguages; + EFI_MISC_SYSTEM_LANGUAGE_STRING MiscSystemLanguageString; + EFI_MISC_GROUP_NAME_DATA MiscGroupNameData; + EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData; + EFI_MISC_SYSTEM_EVENT_LOG MiscSystemEventLog; + EFI_MISC_ONBOARD_DEVICE_TYPE_DATA MiscOnboardDeviceTypeData; + EFI_MISC_PORTABLE_BATTERY MiscPortableBattery; + EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData; + EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData; + EFI_MISC_SCHEDULED_POWER_ON_MONTH MiscScheduledPowerOnMonth; + EFI_MISC_VOLTAGE_PROBE_DESCRIPTION MiscVoltageProbeDescription; + EFI_MISC_COOLING_DEVICE_TEMP_LINK MiscCoolingDeviceTempLink; + EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION MiscTemperatureProbeDescription; + EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION MiscElectricalCurrentProbeDescription; + EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION MiscRemoteAccessManufacturerDescription; + EFI_MISC_BIS_ENTRY_POINT MiscBisEntryPoint; + EFI_MISC_BOOT_INFORMATION_STATUS MiscBootInformationStatus; + EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION MiscManagementDeviceDescription; + EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION MiscManagementDeviceComponentDescription; + EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData; + EFI_MISC_SYSTEM_POWER_SUPPLY MiscPowerSupplyInfo; + EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION MiscSmbiosStructEncapsulation; + EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD MiscManagementDeviceThreshold; + EFI_MISC_ADDITIONAL_INFORMATION MiscAdditionalInformation; + EFI_MISC_ONBOARD_DEVICES_EXTENDED_INFORMATION MiscOnBoardDevicesExtendedInformation; +} EFI_MISC_SUBCLASS_RECORDS; + +// +// +// +typedef struct { + EFI_SUBCLASS_TYPE1_HEADER Header; + EFI_MISC_SUBCLASS_RECORDS Record; +} EFI_MISC_SUBCLASS_DRIVER_DATA; + +#pragma pack() + +#endif /* _DATAHUB_SUBCLASS_MISC_H_ */ +/* eof - DataHubSubClassMisc.h */ diff --git a/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassProcessor.h b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassProcessor.h new file mode 100644 index 0000000..578cb87 --- /dev/null +++ b/EDK/Foundation/Framework/Guid/DataHubRecords/DataHubSubClassProcessor.h @@ -0,0 +1,492 @@ +/*++ + +Copyright (c) 2004 - 2009, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubSubClassProcessor.h + +Abstract: + + Definitions for processor sub class data records + +Revision History + +--*/ + +#ifndef _DATAHUB_SUBCLASS_PROCESSOR_H_ +#define _DATAHUB_SUBCLASS_PROCESSOR_H_ + +#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000 + +#define EFI_PROCESSOR_SUBCLASS_GUID \ + { 0x26fdeb7e, 0xb8af, 0x4ccf, 0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } + + +typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA; + +typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA; + +typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA; + +typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA; + +typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA; + +typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA; + +typedef STRING_REF EFI_PROCESSOR_VERSION_DATA; + +typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA; + +typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA; + +typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA; + +typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA; + +typedef struct { + UINT32 ProcessorSteppingId:4; + UINT32 ProcessorModel: 4; + UINT32 ProcessorFamily: 4; + UINT32 ProcessorType: 2; + UINT32 ProcessorReserved1: 2; + UINT32 ProcessorXModel: 4; + UINT32 ProcessorXFamily: 8; + UINT32 ProcessorReserved2: 4; +} EFI_PROCESSOR_SIGNATURE; + +typedef struct { + UINT32 ProcessorBrandIndex :8; + UINT32 ProcessorClflush :8; + UINT32 ProcessorReserved :8; + UINT32 ProcessorDfltApicId :8; +} EFI_PROCESSOR_MISC_INFO; + +typedef struct { + UINT32 ProcessorFpu: 1; + UINT32 ProcessorVme: 1; + UINT32 ProcessorDe: 1; + UINT32 ProcessorPse: 1; + UINT32 ProcessorTsc: 1; + UINT32 ProcessorMsr: 1; + UINT32 ProcessorPae: 1; + UINT32 ProcessorMce: 1; + UINT32 ProcessorCx8: 1; + UINT32 ProcessorApic: 1; + UINT32 ProcessorReserved1: 1; + UINT32 ProcessorSep: 1; + UINT32 ProcessorMtrr: 1; + UINT32 ProcessorPge: 1; + UINT32 ProcessorMca: 1; + UINT32 ProcessorCmov: 1; + UINT32 ProcessorPat: 1; + UINT32 ProcessorPse36: 1; + UINT32 ProcessorPsn: 1; + UINT32 ProcessorClfsh: 1; + UINT32 ProcessorReserved2: 1; + UINT32 ProcessorDs: 1; + UINT32 ProcessorAcpi: 1; + UINT32 ProcessorMmx: 1; + UINT32 ProcessorFxsr: 1; + UINT32 ProcessorSse: 1; + UINT32 ProcessorSse2: 1; + UINT32 ProcessorSs: 1; + UINT32 ProcessorReserved3: 1; + UINT32 ProcessorTm: 1; + UINT32 ProcessorReserved4: 2; +} EFI_PROCESSOR_FEATURE_FLAGS; + +typedef struct { + EFI_PROCESSOR_SIGNATURE Signature; + EFI_PROCESSOR_MISC_INFO MiscInfo; + UINT32 Reserved; + EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags; +} EFI_PROCESSOR_ID_DATA; + +typedef enum { + EfiProcessorOther = 1, + EfiProcessorUnknown = 2, + EfiCentralProcessor = 3, + EfiMathProcessor = 4, + EfiDspProcessor = 5, + EfiVideoProcessor = 6 +} EFI_PROCESSOR_TYPE_DATA; + +typedef enum { + EfiProcessorFamilyOther = 1, + EfiProcessorFamilyUnknown = 2, + EfiProcessorFamily8086 = 3, + EfiProcessorFamily80286 = 4, + EfiProcessorFamilyIntel386 = 5, + EfiProcessorFamilyIntel486 = 6, + EfiProcessorFamily8087 = 7, + EfiProcessorFamily80287 = 8, + EfiProcessorFamily80387 = 9, + EfiProcessorFamily80487 = 0x0A, + EfiProcessorFamilyPentium = 0x0B, + EfiProcessorFamilyPentiumPro = 0x0C, + EfiProcessorFamilyPentiumII = 0x0D, + EfiProcessorFamilyPentiumMMX = 0x0E, + EfiProcessorFamilyCeleron = 0x0F, + EfiProcessorFamilyPentiumIIXeon = 0x10, + EfiProcessorFamilyPentiumIII = 0x11, + EfiProcessorFamilyM1 = 0x12, + EfiProcessorFamilyM2 = 0x13, + EfiProcessorFamilyM1Reserved2 = 0x14, + EfiProcessorFamilyM1Reserved3 = 0x15, + EfiProcessorFamilyM1Reserved4 = 0x16, + EfiProcessorFamilyM1Reserved5 = 0x17, + EfiProcessorFamilyAmdDuron = 0x18, + EfiProcessorFamilyK5 = 0x19, + EfiProcessorFamilyK6 = 0x1A, + EfiProcessorFamilyK6_2 = 0x1B, + EfiProcessorFamilyK6_3 = 0x1C, + EfiProcessorFamilyAmdAthlon = 0x1D, + EfiProcessorFamilyK6_2Plus = 0x1E, + EfiProcessorFamilyK5Reserved6 = 0x1F, + EfiProcessorFamilyPowerPC = 0x20, + EfiProcessorFamilyPowerPC601 = 0x21, + EfiProcessorFamilyPowerPC603 = 0x22, + EfiProcessorFamilyPowerPC603Plus = 0x23, + EfiProcessorFamilyPowerPC604 = 0x24, + EfiProcessorFamilyPowerPC620 = 0x25, + EfiProcessorFamilyPowerPC704 = 0x26, + EfiProcessorFamilyPowerPC750 = 0x27, + EfiProcessorFamilyIntelCoreDuo = 0x28, + EfiProcessorFamilyIntelCoreDuoMobile = 0x29, + EfiProcessorFamilyIntelCoreSoloMobile = 0x2A, + EfiProcessorFamilyIntelAtom = 0x2B, + EfiProcessorFamilyAlpha2 = 0x30, + EfiProcessorFamilyAlpha21064 = 0x31, + EfiProcessorFamilyAlpha21066 = 0x32, + EfiProcessorFamilyAlpha21164 = 0x33, + EfiProcessorFamilyAlpha21164PC = 0x34, + EfiProcessorFamilyAlpha21164a = 0x35, + EfiProcessorFamilyAlpha21264 = 0x36, + EfiProcessorFamilyAlpha21364 = 0x37, + EfiProcessorFamilyMips = 0x40, + EfiProcessorFamilyMIPSR4000 = 0x41, + EfiProcessorFamilyMIPSR4200 = 0x42, + EfiProcessorFamilyMIPSR4400 = 0x43, + EfiProcessorFamilyMIPSR4600 = 0x44, + EfiProcessorFamilyMIPSR10000 = 0x45, + EfiProcessorFamilySparc = 0x50, + EfiProcessorFamilySuperSparc = 0x51, + EfiProcessorFamilymicroSparcII = 0x52, + EfiProcessorFamilymicroSparcIIep = 0x53, + EfiProcessorFamilyUltraSparc = 0x54, + EfiProcessorFamilyUltraSparcII = 0x55, + EfiProcessorFamilyUltraSparcIIi = 0x56, + EfiProcessorFamilyUltraSparcIII = 0x57, + EfiProcessorFamilyUltraSparcIIIi = 0x58, + EfiProcessorFamily68040 = 0x60, + EfiProcessorFamily68xxx = 0x61, + EfiProcessorFamily68000 = 0x62, + EfiProcessorFamily68010 = 0x63, + EfiProcessorFamily68020 = 0x64, + EfiProcessorFamily68030 = 0x65, + EfiProcessorFamilyHobbit = 0x70, + EfiProcessorFamilyCrusoeTM5000 = 0x78, + EfiProcessorFamilyCrusoeTM3000 = 0x79, + EfiProcessorFamilyEfficeonTM8000 = 0x7A, + EfiProcessorFamilyWeitek = 0x80, + EfiProcessorFamilyItanium = 0x82, + EfiProcessorFamilyAmdAthlon64 = 0x83, + EfiProcessorFamilyAmdOpteron = 0x84, + EfiProcessorFamilyAmdSempron = 0x85, + EfiProcessorFamilyAmdTurion64Mobile = 0x86, + EfiProcessorFamilyDualCoreAmdOpteron = 0x87, + EfiProcessorFamilyAmdAthlon64X2DualCore = 0x88, + EfiProcessorFamilyAmdTurion64X2Mobile = 0x89, + EfiProcessorFamilyQuadCoreAmdOpteron = 0x8A, + EfiProcessorFamilyThirdGenerationAmdOpteron = 0x8B, + EfiProcessorFamilyAmdPhenomFxQuadCore = 0x8C, + EfiProcessorFamilyAmdPhenomX4QuadCore = 0x8D, + EfiProcessorFamilyAmdPhenomX2DualCore = 0x8E, + EfiProcessorFamilyAmdAthlonX2DualCore = 0x8F, + EfiProcessorFamilyPARISC = 0x90, + EfiProcessorFamilyPaRisc8500 = 0x91, + EfiProcessorFamilyPaRisc8000 = 0x92, + EfiProcessorFamilyPaRisc7300LC = 0x93, + EfiProcessorFamilyPaRisc7200 = 0x94, + EfiProcessorFamilyPaRisc7100LC = 0x95, + EfiProcessorFamilyPaRisc7100 = 0x96, + EfiProcessorFamilyV30 = 0xA0, + EfiProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1, + EfiProcessorFamilyDualCoreIntelXeon3000Series = 0xA2, + EfiProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3, + EfiProcessorFamilyDualCoreIntelXeon5100Series = 0xA4, + EfiProcessorFamilyDualCoreIntelXeon5000Series = 0xA5, + EfiProcessorFamilyDualCoreIntelXeonLV = 0xA6, + EfiProcessorFamilyDualCoreIntelXeonULV = 0xA7, + EfiProcessorFamilyDualCoreIntelXeon7100Series = 0xA8, + EfiProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9, + EfiProcessorFamilyQuadCoreIntelXeon = 0xAA, + EfiProcessorFamilyDualCoreIntelXeon5200Series = 0xAB, + EfiProcessorFamilyDualCoreIntelXeon7200Series = 0xAC, + EfiProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD, + EfiProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE, + EfiProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF, + EfiProcessorFamilyPentiumIIIXeon = 0xB0, + EfiProcessorFamilyPentiumIIISpeedStep = 0xB1, + EfiProcessorFamilyPentium4 = 0xB2, + EfiProcessorFamilyIntelXeon = 0xB3, + EfiProcessorFamilyAS400 = 0xB4, + EfiProcessorFamilyIntelXeonMP = 0xB5, + EfiProcessorFamilyAMDAthlonXP = 0xB6, + EfiProcessorFamilyAMDAthlonMP = 0xB7, + EfiProcessorFamilyIntelItanium2 = 0xB8, + EfiProcessorFamilyIntelPentiumM = 0xB9, + EfiProcessorFamilyIntelCeleronD = 0xBA, + EfiProcessorFamilyIntelPentiumD = 0xBB, + EfiProcessorFamilyIntelPentiumEx = 0xBC, + EfiProcessorFamilyIntelCoreSolo = 0xBD, // SMBIOS spec 2.6 correct this value + EfiProcessorFamilyReserved = 0xBE, + EfiProcessorFamilyIntelCore2 = 0xBF, + EfiProcessorFamilyIntelCore2Solo = 0xC0, + EfiProcessorFamilyIntelCore2Extreme = 0xC1, + EfiProcessorFamilyIntelCore2Quad = 0xC2, + EfiProcessorFamilyIntelCore2ExtremeMobile = 0xC3, + EfiProcessorFamilyIntelCore2DuoMobile = 0xC4, + EfiProcessorFamilyIntelCore2SoloMobile = 0xC5, + EfiProcessorFamilyIntelCoreI7 = 0xC6, + EfiProcessorFamilyDualCoreIntelCeleron = 0xC7, + EfiProcessorFamilyIBM390 = 0xC8, + EfiProcessorFamilyG4 = 0xC9, + EfiProcessorFamilyG5 = 0xCA, + EfiProcessorFamilyG6 = 0xCB, + EfiProcessorFamilyzArchitectur = 0xCC, + EfiProcessorFamilyViaC7M = 0xD2, + EfiProcessorFamilyViaC7D = 0xD3, + EfiProcessorFamilyViaC7 = 0xD4, + EfiProcessorFamilyViaEden = 0xD5, + EfiProcessorFamilyMultiCoreIntelXeon = 0xD6, + EfiProcessorFamilyDualCoreIntelXeon3Series = 0xD7, + EfiProcessorFamilyQuadCoreIntelXeon3Series = 0xD8, + EfiProcessorFamilyDualCoreIntelXeon5Series = 0xDA, + EfiProcessorFamilyQuadCoreIntelXeon5Series = 0xDB, + EfiProcessorFamilyDualCoreIntelXeon7Series = 0xDD, + EfiProcessorFamilyQuadCoreIntelXeon7Series = 0xDE, + EfiProcessorFamilyMultiCoreIntelXeon7Series = 0xDF, + EfiProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6, + EfiProcessorFamilyAmdPhenomTripleCore = 0xE7, + EfiProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8, + EfiProcessorFamilyAmdTurionDualCoreMobile = 0xE9, + EfiProcessorFamilyAmdAthlonDualCore = 0xEA, + EfiProcessorFamilyAmdSempronSI = 0xEB, + EfiProcessorFamilyi860 = 0xFA, + EfiProcessorFamilyi960 = 0xFB, + EfiProcessorFamilyIndicatorFamily2 = 0xFE +} EFI_PROCESSOR_FAMILY_DATA; + +typedef enum { + EfiProcessorFamilySh3 = 0x104, + EfiProcessorFamilySh4 = 0x105, + EfiProcessorFamilyArm = 0x118, + EfiProcessorFamilyStrongArm = 0x119, + EfiProcessorFamily6x86 = 0x12C, + EfiProcessorFamilyMediaGx = 0x12D, + EfiProcessorFamilyMii = 0x12E, + EfiProcessorFamilyWinChip = 0x140, + EfiProcessorFamilyDsp = 0x15E, + EfiProcessorFamilyVideo = 0x1F4 +} EFI_PROCESSOR_FAMILY2_DATA; + +typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA; + +typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA; + +typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA; + +typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA; + +typedef enum { + EfiProcessorIa32Microcode = 1, + EfiProcessorIpfPalAMicrocode = 2, + EfiProcessorIpfPalBMicrocode = 3 +} EFI_PROCESSOR_MICROCODE_TYPE; + +typedef struct { + EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType; + UINT32 ProcessorMicrocodeRevisionNumber; +} EFI_PROCESSOR_MICROCODE_REVISION_DATA; + +typedef struct { + UINT32 CpuStatus :3; + UINT32 Reserved1 :3; + UINT32 SocketPopulated :1; + UINT32 Reserved2 :1; + UINT32 ApicEnable :1; + UINT32 BootApplicationProcessor :1; + UINT32 Reserved3 :22; +} EFI_PROCESSOR_STATUS_DATA; + +typedef enum { + EfiCpuStatusUnknown = 0, + EfiCpuStatusEnabled = 1, + EfiCpuStatusDisabledByUser = 2, + EfiCpuStatusDisabledbyBios = 3, + EfiCpuStatusIdle = 4, + EfiCpuStatusOther = 7 +} EFI_CPU_STATUS; + +typedef enum { + EfiProcessorSocketOther = 1, + EfiProcessorSocketUnknown = 2, + EfiProcessorSocketDaughterBoard = 3, + EfiProcessorSocketZIF = 4, + EfiProcessorSocketReplacePiggyBack = 5, + EfiProcessorSocketNone = 6, + EfiProcessorSocketLIF = 7, + EfiProcessorSocketSlot1 = 8, + EfiProcessorSocketSlot2 = 9, + EfiProcessorSocket370Pin = 0xA, + EfiProcessorSocketSlotA = 0xB, + EfiProcessorSocketSlotM = 0xC, + EfiProcessorSocket423 = 0xD, + EfiProcessorSocketA462 = 0xE, + EfiProcessorSocket478 = 0xF, + EfiProcessorSocket754 = 0x10, + EfiProcessorSocket940 = 0x11, + EfiProcessorSocket939 = 0x12, + EfiProcessorSocketmPGA604 = 0x13, + EfiProcessorSocketLGA771 = 0x14, + EfiProcessorSocketLGA775 = 0x15, + EfiProcessorSocketS1 = 0x16, + EfiProcessorSocketAm2 = 0x17, + EfiProcessorSocketF = 0x18, + EfiProcessorSocketLGA1366 = 0x19 +} EFI_PROCESSOR_SOCKET_TYPE_DATA; + +typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA; + +typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA; + +typedef enum { + EfiProcessorHealthy = 1, + EfiProcessorPerfRestricted = 2, + EfiProcessorFuncRestricted = 3 +} EFI_PROCESSOR_HEALTH_STATUS; + +typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA; + +typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA; +typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA; +typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA; + +typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA; + +typedef struct { + UINT16 Reserved :1; + UINT16 Unknown :1; + UINT16 Capable64Bit :1; + UINT16 Reserved2 :13; +} EFI_PROCESSOR_CHARACTERISTICS_DATA; + +typedef struct { + EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName; + EFI_PROCESSOR_TYPE_DATA ProcessorType; + EFI_PROCESSOR_FAMILY_DATA ProcessorFamily; + EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer; + EFI_PROCESSOR_ID_DATA ProcessorId; + EFI_PROCESSOR_VERSION_DATA ProcessorVersion; + EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage; + EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency; + EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency; + EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency; + EFI_PROCESSOR_STATUS_DATA ProcessorStatus; + EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType; + EFI_CACHE_ASSOCIATION_DATA ProcessorL1LinkData; + EFI_CACHE_ASSOCIATION_DATA ProcessorL2LinkData; + EFI_CACHE_ASSOCIATION_DATA ProcessorL3LinkData; + EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber; + EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag; + EFI_PROCESSOR_PART_NUMBER_DATA ProcessorPartNumber; + EFI_PROCESSOR_CORE_COUNT_DATA ProcessorCoreCount; + EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA ProcessorEnabledCoreCount; + EFI_PROCESSOR_THREAD_COUNT_DATA ProcessorThreadCount; + EFI_PROCESSOR_CHARACTERISTICS_DATA ProcessorCharacteristics; + EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2; +} EFI_PROCESSOR_SOCKET_DATA; + +typedef enum { + ProcessorCoreFrequencyRecordType = 1, + ProcessorFsbFrequencyRecordType = 2, + ProcessorVersionRecordType = 3, + ProcessorManufacturerRecordType = 4, + ProcessorSerialNumberRecordType = 5, + ProcessorIdRecordType = 6, + ProcessorTypeRecordType = 7, + ProcessorFamilyRecordType = 8, + ProcessorVoltageRecordType = 9, + ProcessorApicBaseAddressRecordType = 10, + ProcessorApicIdRecordType = 11, + ProcessorApicVersionNumberRecordType = 12, + CpuUcodeRevisionDataRecordType = 13, + ProcessorStatusRecordType = 14, + ProcessorSocketTypeRecordType = 15, + ProcessorSocketNameRecordType = 16, + CacheAssociationRecordType = 17, + ProcessorMaxCoreFrequencyRecordType = 18, + ProcessorAssetTagRecordType = 19, + ProcessorMaxFsbFrequencyRecordType = 20, + ProcessorPackageNumberRecordType = 21, + ProcessorCoreFrequencyListRecordType = 22, + ProcessorFsbFrequencyListRecordType = 23, + ProcessorHealthStatusRecordType = 24, + ProcessorCoreCountRecordType = 25, + ProcessorEnabledCoreCountRecordType = 26, + ProcessorThreadCountRecordType = 27, + ProcessorCharacteristicsRecordType = 28, + ProcessorFamily2RecordType = 29, + ProcessorPartNumberRecordType = 30, + ProcessorSocketRecordType = 31 +} EFI_CPU_VARIABLE_RECORD_TYPE; + +typedef union { + EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList; + EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList; + EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber; + EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency; + EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency; + EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency; + EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency; + EFI_PROCESSOR_VERSION_DATA ProcessorVersion; + EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer; + EFI_PROCESSOR_ID_DATA ProcessorId; + EFI_PROCESSOR_TYPE_DATA ProcessorType; + EFI_PROCESSOR_FAMILY_DATA ProcessorFamily; + EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage; + EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase; + EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId; + EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber; + EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData; + EFI_PROCESSOR_STATUS_DATA ProcessorStatus; + EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType; + EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName; + EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag; + EFI_PROCESSOR_PART_NUMBER_DATA ProcessorPartNumber; + EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus; + EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber; + EFI_PROCESSOR_CORE_COUNT_DATA ProcessorCoreCount; + EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA ProcessorEnabledCoreCount; + EFI_PROCESSOR_THREAD_COUNT_DATA ProcessorThreadCount; + EFI_PROCESSOR_CHARACTERISTICS_DATA ProcessorCharacteristics; + EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2; + EFI_PROCESSOR_SOCKET_DATA ProcessorSocket; +} EFI_CPU_VARIABLE_RECORD; + +typedef struct { + EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader; + EFI_CPU_VARIABLE_RECORD VariableRecord; +} EFI_CPU_DATA_RECORD; + +#endif |