diff options
Diffstat (limited to 'EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib')
5 files changed, 457 insertions, 0 deletions
diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf new file mode 100644 index 0000000..15c2656 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf @@ -0,0 +1,76 @@ +#/*++ +# +# Copyright (c) 2004 - 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# BaseCacheMaintenanceLib.inf +# +# Abstract: +# +# Component description file for BaseCacheMaintenanceLib. +# +#--*/ + +[defines] +BASE_NAME = EdkIIGlueBaseCacheMaintenanceLib +COMPONENT_TYPE = LIBRARY + +[sources.common] + +[sources.ia32] + x86Cache.c + +[sources.x64] + x86Cache.c + +[sources.ipf] + +[sources.ebc] + +[includes.common] + . + ..\..\Include + ..\..\Include\Library + $(EDK_SOURCE)\Foundation + $(EDK_SOURCE)\Foundation\Framework + $(EDK_SOURCE)\Foundation\Efi + $(EDK_SOURCE)\Foundation\Include + $(EDK_SOURCE)\Foundation\Efi\Include + $(EDK_SOURCE)\Foundation\Framework\Include + $(EDK_SOURCE)\Foundation\Include\IndustryStandard + $(EDK_SOURCE)\Foundation\Core\Dxe + $(EDK_SOURCE)\Foundation\Library\Dxe\Include + $(EDK_SOURCE)\Foundation\Cpu\Pentium\Include + +[libraries.common] + EdkIIGlueBaseLib + +[libraries.ia32] + + +[libraries.x64] + + +[nmake.common] + C_FLAGS = $(C_FLAGS) /D EDKII_GLUE_LIBRARY_IMPLEMENTATION + LIB_STD_FLAGS = /NOLOGO /IGNORE:4006 + +[nmake.ia32] + C_FLAGS = $(C_FLAGS) /D MDE_CPU_IA32 + +[nmake.x64] + C_FLAGS = $(C_FLAGS) /D MDE_CPU_X64 + +[nmake.ipf] + C_FLAGS = $(C_FLAGS) /D MDE_CPU_IPF + +[nmake.ebc] + C_FLAGS = $(C_FLAGS) /D MDE_CPU_EBC
\ No newline at end of file diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.cif b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.cif new file mode 100644 index 0000000..44016b9 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.cif @@ -0,0 +1,11 @@ +<component> + name = "EdkIIGlueBaseCacheMaintenanceLib" + category = ModulePart + LocalRoot = "Edk\Foundation\Library\EdkIIGlueLib\Library\BaseCacheMaintenanceLib" + RefName = "EdkIIGlueBaseCacheMaintenanceLib" +[files] +"EdkIIGlueBaseCacheMaintenanceLib.sdl" +"EdkIIGlueBaseCacheMaintenanceLib.mak" +"BaseCacheMaintenanceLib.inf" +"x86Cache.c" +<endComponent>
\ No newline at end of file diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.mak b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.mak new file mode 100644 index 0000000..99b73ce --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.mak @@ -0,0 +1,90 @@ +#********************************************************************** +#********************************************************************** +#** ** +#** (C)Copyright 1985-2009, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#********************************************************************** +#********************************************************************** + +#********************************************************************** +# $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK/EdkIIGlue/EdkIIGlueBaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.mak 1 1/20/12 3:48a Jeffch $ +# +# $Revision: 1 $ +# +# $Date: 1/20/12 3:48a $ +#********************************************************************** +# Revision History +# ---------------- +# $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/IntelEDK/EdkIIGlue/EdkIIGlueBaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.mak $ +# +# 1 1/20/12 3:48a Jeffch +# Create Intel EDK 1117 Patch 7. +# +# 1 1/20/12 3:27a Jeffch +# Create Intel EDK 1117 Patch 7. +# +# 1 9/27/11 6:09a Wesleychen +# Intel EDK initially releases. +# +# 1 9/18/09 1:49a Iminglin +# +#********************************************************************** +#<AMI_FHDR_START> +# +# Name: EdkIIGlueBaseCacheMaintenanceLib.mak +# +# Description: +# +#<AMI_FHDR_END> +#********************************************************************** + +!IF "$(PROCESSOR)"=="IA32" || "$(PROCESSOR)"=="x64" +EdkIIGlueBaseCacheMaintenanceLib_OBJECTS=\ +$$(BUILD_DIR)\$(EdkIIGlueBaseCacheMaintenanceLib_DIR)\x86Cache.obj +!ENDIF + +$(EdkIIGlueBaseCacheMaintenanceLib_LIB) : EdkIIGlueBaseCacheMaintenanceLib + +EdkIIGlueBaseCacheMaintenanceLib : $(BUILD_DIR)\EdkIIGlueBaseCacheMaintenanceLib.mak EdkIIGlueBaseCacheMaintenanceLibBin + +$(BUILD_DIR)\EdkIIGlueBaseCacheMaintenanceLib.mak : $(EdkIIGlueBaseCacheMaintenanceLib_DIR)\$(@B).cif $(EdkIIGlueBaseCacheMaintenanceLib_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(EdkIIGlueBaseCacheMaintenanceLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +EdkIIGlueBaseCacheMaintenanceLibBin : $(EdkIIGlueBaseLib_LIB) +!IF "$(x64_BUILD)"=="1" + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + BUILD_DIR=$(BUILD_DIR)\ + /f $(BUILD_DIR)\EdkIIGlueBaseCacheMaintenanceLib.mak all\ + TYPE=LIBRARY "PARAMETERS=LIBRARY_NAME=$$(EdkIIGlueBaseCacheMaintenanceLib_LIB)"\ + "OBJECTS=$(EdkIIGlueBaseCacheMaintenanceLib_OBJECTS)" + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + BUILD_DIR=$(BUILD_DIR)\IA32\ + /f $(BUILD_DIR)\EdkIIGlueBaseCacheMaintenanceLib.mak all\ + TYPE=PEI_LIBRARY "PARAMETERS=LIBRARY_NAME=$$(EdkIIGlueBaseCacheMaintenanceLib_LIB)"\ + "OBJECTS=$(EdkIIGlueBaseCacheMaintenanceLib_OBJECTS)" +!ELSE + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + BUILD_DIR=$(BUILD_DIR)\ + /f $(BUILD_DIR)\EdkIIGlueBaseCacheMaintenanceLib.mak all\ + TYPE=LIBRARY "PARAMETERS=LIBRARY_NAME=$$(EdkIIGlueBaseCacheMaintenanceLib_LIB)"\ + "OBJECTS=$(EdkIIGlueBaseCacheMaintenanceLib_OBJECTS)" +!ENDIF +#********************************************************************** +#********************************************************************** +#** ** +#** (C)Copyright 1985-2009, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#********************************************************************** +#********************************************************************** diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.sdl b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.sdl new file mode 100644 index 0000000..3d51d7c --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/EdkIIGlueBaseCacheMaintenanceLib.sdl @@ -0,0 +1,26 @@ +TOKEN + Name = "EdkIIGlueBaseCacheMaintenanceLib_SUPPORT" + Value = "1" + Help = "Main switch to enable EdkIIGlueBaseCacheMaintenanceLib support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes +End + +TOKEN + Name = "EdkIIGlueBaseCacheMaintenanceLib_LIB" + Value = "$$(LIB_BUILD_DIR)\EdkIIGlueBaseCacheMaintenanceLib.lib" + TokenType = Expression + TargetMAK = Yes +End + +PATH + Name = "EdkIIGlueBaseCacheMaintenanceLib_DIR" +End + +MODULE + Help = "Includes EdkIIGlueBaseCacheMaintenanceLib.mak to Project" + File = "EdkIIGlueBaseCacheMaintenanceLib.mak" +End + diff --git a/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/x86Cache.c b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/x86Cache.c new file mode 100644 index 0000000..9abbf39 --- /dev/null +++ b/EDK/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/x86Cache.c @@ -0,0 +1,254 @@ +/*++ + +Copyright (c) 2004 - 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +Module Name: + + x86Cache.c + +Abstract: + + Cache Maintenance Functions. + +--*/ + +#include "EdkIIGlueBase.h" + +/** + Invalidates the entire instruction cache in cache coherency domain of the + calling CPU. + + Invalidates the entire instruction cache in cache coherency domain of the + calling CPU. + +**/ +VOID +EFIAPI +GlueInvalidateInstructionCache ( + VOID + ) +{ +} + +/** + Invalidates a range of instruction cache lines in the cache coherency domain + of the calling CPU. + + Invalidates the instruction cache lines specified by Address and Length. If + Address is not aligned on a cache line boundary, then entire instruction + cache line containing Address is invalidated. If Address + Length is not + aligned on a cache line boundary, then the entire instruction cache line + containing Address + Length -1 is invalidated. This function may choose to + invalidate the entire instruction cache if that is more efficient than + invalidating the specified range. If Length is 0, the no instruction cache + lines are invalidated. Address is returned. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the instruction cache lines to + invalidate. If the CPU is in a physical addressing mode, then + Address is a physical address. If the CPU is in a virtual + addressing mode, then Address is a virtual address. + + @param Length The number of bytes to invalidate from the instruction cache. + + @return Address + +**/ +VOID * +EFIAPI +InvalidateInstructionCacheRange ( + IN VOID *Address, + IN UINTN Length + ) +{ + ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1); + return Address; +} + +/** + Writes Back and Invalidates the entire data cache in cache coherency domain + of the calling CPU. + + Writes Back and Invalidates the entire data cache in cache coherency domain + of the calling CPU. This function guarantees that all dirty cache lines are + written back to system memory, and also invalidates all the data cache lines + in the cache coherency domain of the calling CPU. + +**/ +VOID +EFIAPI +WriteBackInvalidateDataCache ( + VOID + ) +{ + AsmWbinvd (); +} + +/** + Writes Back and Invalidates a range of data cache lines in the cache + coherency domain of the calling CPU. + + Writes Back and Invalidate the data cache lines specified by Address and + Length. If Address is not aligned on a cache line boundary, then entire data + cache line containing Address is written back and invalidated. If Address + + Length is not aligned on a cache line boundary, then the entire data cache + line containing Address + Length -1 is written back and invalidated. This + function may choose to write back and invalidate the entire data cache if + that is more efficient than writing back and invalidating the specified + range. If Length is 0, the no data cache lines are written back and + invalidated. Address is returned. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the data cache lines to write back and + invalidate. If the CPU is in a physical addressing mode, then + Address is a physical address. If the CPU is in a virtual + addressing mode, then Address is a virtual address. + @param Length The number of bytes to write back and invalidate from the + data cache. + + @return Address + +**/ +VOID * +EFIAPI +WriteBackInvalidateDataCacheRange ( + IN VOID *Address, + IN UINTN Length + ) +{ + UINT8 (*Uint8Ptr)[32]; + + ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1); + + Uint8Ptr = Address; + while (Length > sizeof (*Uint8Ptr)) { + AsmFlushCacheLine (Uint8Ptr++); + Length -= sizeof (*Uint8Ptr); + } + if (Length > 0) { + AsmFlushCacheLine (Uint8Ptr); + AsmFlushCacheLine (&(*Uint8Ptr)[Length - 1]); + } + return Address; +} + +/** + Writes Back the entire data cache in cache coherency domain of the calling + CPU. + + Writes Back the entire data cache in cache coherency domain of the calling + CPU. This function guarantees that all dirty cache lines are written back to + system memory. This function may also invalidate all the data cache lines in + the cache coherency domain of the calling CPU. + +**/ +VOID +EFIAPI +WriteBackDataCache ( + VOID + ) +{ + WriteBackInvalidateDataCache (); +} + +/** + Writes Back a range of data cache lines in the cache coherency domain of the + calling CPU. + + Writes Back the data cache lines specified by Address and Length. If Address + is not aligned on a cache line boundary, then entire data cache line + containing Address is written back. If Address + Length is not aligned on a + cache line boundary, then the entire data cache line containing Address + + Length -1 is written back. This function may choose to write back the entire + data cache if that is more efficient than writing back the specified range. + If Length is 0, the no data cache lines are written back. This function may + also invalidate all the data cache lines in the specified range of the cache + coherency domain of the calling CPU. Address is returned. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the data cache lines to write back. If + the CPU is in a physical addressing mode, then Address is a + physical address. If the CPU is in a virtual addressing + mode, then Address is a virtual address. + @param Length The number of bytes to write back from the data cache. + + @return Address + +**/ +VOID * +EFIAPI +WriteBackDataCacheRange ( + IN VOID *Address, + IN UINTN Length + ) +{ + return WriteBackInvalidateDataCacheRange (Address, Length); +} + +/** + Invalidates the entire data cache in cache coherency domain of the calling + CPU. + + Invalidates the entire data cache in cache coherency domain of the calling + CPU. This function must be used with care because dirty cache lines are not + written back to system memory. It is typically used for cache diagnostics. If + the CPU does not support invalidation of the entire data cache, then a write + back and invalidate operation should be performed on the entire data cache. + +**/ +VOID +EFIAPI +InvalidateDataCache ( + VOID + ) +{ + AsmInvd (); +} + +/** + Invalidates a range of data cache lines in the cache coherency domain of the + calling CPU. + + Invalidates the data cache lines specified by Address and Length. If Address + is not aligned on a cache line boundary, then entire data cache line + containing Address is invalidated. If Address + Length is not aligned on a + cache line boundary, then the entire data cache line containing Address + + Length -1 is invalidated. This function must never invalidate any cache lines + outside the specified range. If Length is 0, the no data cache lines are + invalidated. Address is returned. This function must be used with care + because dirty cache lines are not written back to system memory. It is + typically used for cache diagnostics. If the CPU does not support + invalidation of a data cache range, then a write back and invalidate + operation should be performed on the data cache range. + + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT(). + + @param Address The base address of the data cache lines to invalidate. If + the CPU is in a physical addressing mode, then Address is a + physical address. If the CPU is in a virtual addressing mode, + then Address is a virtual address. + @param Length The number of bytes to invalidate from the data cache. + + @return Address + +**/ +VOID * +EFIAPI +InvalidateDataCacheRange ( + IN VOID *Address, + IN UINTN Length + ) +{ + return WriteBackInvalidateDataCacheRange (Address, Length); +} |