diff options
Diffstat (limited to 'Include/PPI')
51 files changed, 4807 insertions, 0 deletions
diff --git a/Include/PPI/AmiEarlyBistPpi.h b/Include/PPI/AmiEarlyBistPpi.h new file mode 100644 index 0000000..6e18f11 --- /dev/null +++ b/Include/PPI/AmiEarlyBistPpi.h @@ -0,0 +1,88 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//********************************************************************** +// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Haswell/AMI Cpu PKG/CPU Core/CpuPPIs/AmiEarlyBistPpi.h 1 2/07/12 3:58a Davidhsieh $ +// +// $Revision: 1 $ +// +// $Date: 2/07/12 3:58a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Haswell/AMI Cpu PKG/CPU Core/CpuPPIs/AmiEarlyBistPpi.h $ +// +// 1 2/07/12 3:58a Davidhsieh +// +// 1 5/06/11 6:07a Davidhsieh +// First release +// +// 2 3/04/09 10:42a Markw +// Update copyright header. +// +// 1 10/03/08 1:18p Markw +// +//********************************************************************** + +//<AMI_FHDR_START> +//--------------------------------------------------------------------------- +// +// Name: AmiEarlyBistPpi.h +// +// Description: AmiEarlyBistPpi.h +// +//--------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef __AMI_EARLY_BIST_PPI_H__ +#define __AMI_EARLY_BIST_PPI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +//a7e2ce72-dc32-4bc0-9e35-feb30ae5cc47 +#define AMI_EARLY_BIST_PPI_GUID \ + {0xa7e2ce72, 0xdc32, 0x4bc0, 0x9e, 0x35, 0xfe, 0xb3, 0xa, 0xe5, 0xcc, 0x47} + +typedef struct { + UINT32 ApicId; + UINT32 Bist; +} CPU_BIST; + + +typedef struct { + UINT32 NumBists; //Number of Bists in array. + CPU_BIST CpuBist[1]; //Variable length array +} AMI_EARLY_BIST_PPI; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Include/PPI/AmiKeyCodePpi.h b/Include/PPI/AmiKeyCodePpi.h new file mode 100644 index 0000000..0da3b26 --- /dev/null +++ b/Include/PPI/AmiKeyCodePpi.h @@ -0,0 +1,117 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/AmiKeycodePpi.h 2 10/07/11 5:03a Rameshr $ +// +// $Revision: 2 $ +// +// $Date: 10/07/11 5:03a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/AmiKeycodePpi.h $ +// +// 2 10/07/11 5:03a Rameshr +// [TAG] - EIP 64356 +// [Category]- IMPROVEMENT +// [Description]- Check-in the AmiKeyCodePPI.h as a generic PPI +// [Files] - AmiKeycodePpi.h +// +// 1 8/09/11 4:40p Olegi +// Initial Amikeycode PPI header file check in. +// +//************************************************************************* + +//<AMI_FHDR_START> +//--------------------------------------------------------------------------- +// +// Name: AmiKeycodePpi.h +// +// Description: Interface with the input devices in PEI +// +//--------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef __AMI_AMIKEYCODE_PPI_H__ +#define __AMI_AMIKEYCODE_PPI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +#include "KeyboardCommonDefinitions.h" + +// +//Guid for Normal AmiKeycodePPI ( Ex: Ps2 and USB) +// +// {20B0F1C2-B0D8-4c5d-AAD9-F44580DFDF8B} +#define EFI_PEI_AMI_KEYCODE_PPI_GUID \ + {0x20b0f1c2, 0xb0d8, 0x4c5d, 0xaa, 0xd9, 0xf4, 0x45, 0x80, 0xdf, 0xdf, 0x8b} + +// +// Guid for PEI Consplitter AmiKeyCodePPI +// +// {73DDB5E1-5FB4-4751-AF1E-83CF75BECBB6} +#define EFI_PEI_CONSPLIT_AMI_KEYCODE_PPI_GUID \ + {0x73ddb5e1, 0x5fb4, 0x4751, 0xaf, 0x1e, 0x83, 0xcf, 0x75, 0xbe, 0xcb, 0xb6} + +GUID_VARIABLE_DECLARATION(gPeiAmikeycodeInputPpiGuid,EFI_PEI_AMI_KEYCODE_PPI_GUID); + +GUID_VARIABLE_DECLARATION(gPeiConsplitAmikeycodeInputPpiGuid,EFI_PEI_CONSPLIT_AMI_KEYCODE_PPI_GUID); + +typedef struct { + EFI_INPUT_KEY Key; + EFI_KEY_STATE KeyState; + EFI_KEY EfiKey; + UINT8 PS2ScanCode; +} EFI_PEI_AMIKEYCODE_DATA; + +typedef struct _EFI_PEI_AMIKEYCODE_PPI EFI_PEI_AMIKEYCODE_PPI; + +typedef EFI_STATUS (EFIAPI * EFI_PEI_AMIKEYCODE_READKEY) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_AMIKEYCODE_PPI *This, + OUT EFI_PEI_AMIKEYCODE_DATA *KeyData +); + +typedef EFI_STATUS (EFIAPI * EFI_PEI_AMIKEYCODE_SETLEDSTATE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_AMIKEYCODE_PPI *This, + IN EFI_KEY_TOGGLE_STATE KeyToggleState +); + +struct _EFI_PEI_AMIKEYCODE_PPI { + EFI_PEI_AMIKEYCODE_READKEY ReadKey; + EFI_PEI_AMIKEYCODE_SETLEDSTATE SetLedState; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Include/PPI/AmiTcgPlatformPpi.cif b/Include/PPI/AmiTcgPlatformPpi.cif new file mode 100644 index 0000000..edd1b59 --- /dev/null +++ b/Include/PPI/AmiTcgPlatformPpi.cif @@ -0,0 +1,8 @@ +<component> + name = "AmiTcgPlatformPpi" + category = ModulePart + LocalRoot = "Include\PPI" + RefName = "AmiTcgPlatformPpi" +[files] +"AmiTcgPlatformPpi.h" +<endComponent>
\ No newline at end of file diff --git a/Include/PPI/AmiTcgPlatformPpi.h b/Include/PPI/AmiTcgPlatformPpi.h new file mode 100644 index 0000000..a96f227 --- /dev/null +++ b/Include/PPI/AmiTcgPlatformPpi.h @@ -0,0 +1,105 @@ +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2012, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// +//**********************************************************************// +// $Header: /Alaska/SOURCE/Modules/TCG2/CommonHeaders/AmiTcgPlatformPpi/AmiTcgPlatformPpi.h 1 4/21/14 2:16p Fredericko $ +// +// $Revision: 1 $ +// +// $Date: 4/21/14 2:16p $ +//**********************************************************************// +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/TCG2/CommonHeaders/AmiTcgPlatformPpi/AmiTcgPlatformPpi.h $ +// +// 1 4/21/14 2:16p Fredericko +// +// 1 10/08/13 12:02p Fredericko +// Initial Check-In for Tpm-Next module +// +// 1 7/10/13 6:00p Fredericko +// [TAG] EIP120969 +// [Category] New Feature +// [Description] TCG (TPM20) +// +// 1 12/12/11 3:06p Fredericko +// [TAG] EIP76865 +// [Category] Improvement +// [Description] Dual Support for TCM and TPM. System could hang in TXT +// if txt is enabled in setup +// [Files] AmiTcgPlatfompeilib.c, AmiTcgPlatformPpi.cif, +// AmiTcgPlatformPpi.h, AmiTcgPlatformProtocol.cif, +// AmiTcgPlatformProtocol.h, +// EMpTcmPei.c, TcgDxe.cif, TcgPei.cif, TcgPeiAfterMem.cif, +// TcgPeiAfterMem.mak, TcgTcmPeiAfterMem.c, xTcgDxe.c, xTcgPei.c, +// xTcgPeiAfterMem.c +// +// 1 12/12/11 2:58p Fredericko +// [TAG] EIP76865 +// [Category] Improvement +// [Description] Dual Support for TCM and TPM. System could hang in TXT +// if txt is enabled in setup +// [Files] AmiTcgPlatfompeilib.c, AmiTcgPlatformPpi.cif, +// AmiTcgPlatformPpi.h, AmiTcgPlatformProtocol.cif, +// AmiTcgPlatformProtocol.h, +// EMpTcmPei.c, TcgDxe.cif, TcgPei.cif, TcgPeiAfterMem.cif, +// TcgPeiAfterMem.mak, TcgTcmPeiAfterMem.c, xTcgDxe.c, xTcgPei.c, +// xTcgPeiAfterMem.c +// +//**********************************************************************// +#ifndef _AMI_TCG_PLATFORM_PPI_H_ +#define _AMI_TCG_PLATFORM_PPI_H_ +#include <PEI.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +#define AMI_TCG_PLATFORM_PPI_GUID \ + {0x5687f4a, 0x3ca7, 0x4d19, 0x9b, 0xc5, 0xe1, 0x80, 0xce, 0xa3, 0x56, 0x9f} + +typedef struct _AMI_TCG_PLATFORM_PPI AMI_TCG_PLATFORM_PPI; + +// for now all it does is return the platform security support type +typedef UINT8 (EFIAPI *GET_TCG_SUPPORT_TYPE)(); + +struct _AMI_TCG_PLATFORM_PPI { + GET_TCG_SUPPORT_TYPE GetPlatformSecurityType; +}; + +typedef struct _AMI_TPM20SUPPORTTYPE_PPI AMI_TPM20SUPPORTTYPE_PPI; + +// for now all it does is return the platform security support type +struct _AMI_TPM20SUPPORTTYPE_PPI { + GET_TCG_SUPPORT_TYPE Tpm20SupportType; +}; + +#ifdef __cplusplus +} +#endif +#endif + +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2012, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// diff --git a/Include/PPI/AtaController.h b/Include/PPI/AtaController.h new file mode 100644 index 0000000..c924c72 --- /dev/null +++ b/Include/PPI/AtaController.h @@ -0,0 +1,85 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/Core/Modules/Recovery/AtaController.h 2 4/10/06 9:52a Ambikas $ +// +// $Revision: 2 $ +// +// $Date: 4/10/06 9:52a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Modules/Recovery/AtaController.h $ +// +// 2 4/10/06 9:52a Ambikas +// +// 1 12/01/05 9:35a Felixp +// +// 1 10/10/05 11:40a Radhikav +// Initial Release. +// +// +// +// +//***************************************************************************** + + + + +#ifndef _PEI_ATA_CONTROLLER_PPI_H +#define _PEI_ATA_CONTROLLER_PPI_H +#ifdef __cplusplus +extern "C" { +#endif + +#include "EFI.h" +#include "PEI.h" + +#define PEI_ATA_CONTROLLER_PPI_GUID \ + { 0xa1e2176f, 0xcbda, 0x4f32, 0x87, 0x56, 0x7d, 0x7a, 0xe5, 0x22, 0xd6, 0x93 } + +typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI; + +typedef +EFI_STATUS +(EFIAPI *PEI_ENABLE_ATA) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_ATA_CONTROLLER_PPI *This, + IN UINT8 ChannelMask + ); + +typedef struct _PEI_ATA_CONTROLLER_PPI { + PEI_ENABLE_ATA EnableAtaChannel; +} PEI_ATA_CONTROLLER_PPI; + + +#define PEI_ICH_IDE_PRIMARY 0x01 +#define PEI_ICH_IDE_SECONDARY 0x02 + +#define PEI_IDE_RECOVERY_NATIVE_MODE_PPI_GUID \ + { 0x7e13637a, 0xc3f8, 0x43d1, 0xb0, 0x51, 0xed, 0x19, 0xd7, 0x8, 0xec, 0x7a } + +typedef struct { + UINT16 PCMDBarAddress; + UINT16 PCNLBarAddress; + UINT16 SCMDBarAddress; + UINT16 SCNLBarAddress; +} PEI_IDE_RECOVERY_NATIVE_MODE_PPI; + +#ifdef __cplusplus +} +#endif +#endif + + + diff --git a/Include/PPI/BaseMemoryTest.h b/Include/PPI/BaseMemoryTest.h new file mode 100644 index 0000000..84c094d --- /dev/null +++ b/Include/PPI/BaseMemoryTest.h @@ -0,0 +1,82 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset/NB PPI/BaseMemoryTest.h 1 2/08/12 4:35a Yurenlai $ +// +// $Revision: 1 $ +// +// $Date: 2/08/12 4:35a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset/NB PPI/BaseMemoryTest.h $ +// +// 1 2/08/12 4:35a Yurenlai +// Intel Haswell/NB eChipset initially releases. +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: BaseMemoryTest.h +// +// Description: This header file contains the PPI definition for the Base +// Memory Test, +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifndef _BASE_MEMORY_TEST_H_ +#define _BASE_MEMORY_TEST_H_ + +#define PEI_BASE_MEMORY_TEST_GUID \ + {0xb6ec423c, 0x21d2, 0x490d, 0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74} + +typedef struct _PEI_BASE_MEMORY_TEST_PPI PEI_BASE_MEMORY_TEST_PPI; + +typedef enum { + Ignore, + Quick, + Sparse, + Extensive +} PEI_MEMORY_TEST_OP; + +typedef EFI_STATUS (EFIAPI *PEI_BASE_MEMORY_TEST) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_BASE_MEMORY_TEST_PPI *This, + IN EFI_PHYSICAL_ADDRESS BeginAddress, + IN UINT64 MemoryLength, + IN PEI_MEMORY_TEST_OP Operation, + OUT EFI_PHYSICAL_ADDRESS *ErrorAddress + ); + +typedef struct _PEI_BASE_MEMORY_TEST_PPI { + PEI_BASE_MEMORY_TEST BaseMemoryTest; +} PEI_BASE_MEMORY_TEST_PPI; + +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Include/PPI/BootScriptExecuter.h b/Include/PPI/BootScriptExecuter.h new file mode 100644 index 0000000..05dc757 --- /dev/null +++ b/Include/PPI/BootScriptExecuter.h @@ -0,0 +1,88 @@ +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2003, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/BootScriptExecuter.h 2 3/13/06 1:16a Felixp $ +// +// $Revision: 2 $ +// +// $Date: 3/13/06 1:16a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/BootScriptExecuter.h $ +// +// 2 3/13/06 1:16a Felixp +// +// 1 1/28/05 12:44p Felixp +// +// 1 12/23/04 9:41a Felixp +// +// 1 2/26/04 2:45p Markw +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: BootScriptExecuter_h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __BOOT_SCRIPT_EXECUTER_PPI__H__ +#define __BOOT_SCRIPT_EXECUTER_PPI__H__ +#include <PEI.h> + +#ifdef __cplusplus +extern "C" { +#endif + +#define EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID \ + {0xabd42895,0x78cf,0x4872,0x84,0x44,0x1b,0x5c,0x18,0x0b,0xfb,0xff} + +GUID_VARIABLE_DECLARATION(gPeiBootScriptExecuterPpiGuid,EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID); + +typedef struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI; + +typedef EFI_STATUS (EFIAPI * EFI_PEI_BOOT_SCRIPT_EXECUTE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI *This, + IN EFI_PHYSICAL_ADDRESS Address, + IN EFI_GUID *FvFile OPTIONAL +); + +struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI { + EFI_PEI_BOOT_SCRIPT_EXECUTE Execute; +}; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2003, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// diff --git a/Include/PPI/CPUPolicy.h b/Include/PPI/CPUPolicy.h new file mode 100644 index 0000000..5f12a99 --- /dev/null +++ b/Include/PPI/CPUPolicy.h @@ -0,0 +1,91 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//********************************************************************** +// $Header: /Alaska/SOURCE/Modules/SharkBayRefCodes/Haswell/AMI Cpu PKG/CPU Core/CpuPPIs/CPUPolicy.h 1 2/07/12 3:58a Davidhsieh $ +// +// $Revision: 1 $ +// +// $Date: 2/07/12 3:58a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/SharkBayRefCodes/Haswell/AMI Cpu PKG/CPU Core/CpuPPIs/CPUPolicy.h $ +// +// 1 2/07/12 3:58a Davidhsieh +// +// 1 5/06/11 6:07a Davidhsieh +// First release +// +// 2 3/04/09 10:42a Markw +// Add Copyright header. +// +// 1 11/02/07 1:59p Markw +// +// 1 11/02/07 1:45p Markw +// +// 3 3/23/07 9:54a Markw +// Updated headers. +// +// 2 2/20/07 10:56a Markw +// Update headers. +// +// 1 4/01/05 12:55p Robert +// Initial Checkin +// +// +//***************************************************************************** + +//<AMI_FHDR_START> +//--------------------------------------------------------------------------- +// +// Name: CPUPolicy.h +// +// Description: This forces NB to load after CPU. +// +//--------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef FILE_PEI_CPUINIT_POLICY_PPI_H_ +#define FILE_PEI_CPUINIT_POLICY_PPI_H_ + +// {F824CCBB-D8E0-4522-8AA8-65F04B463DB5} +#define AMI_PEI_CPUINIT_POLICY_PPI_GUID \ + {0xf824ccbb, 0xd8e0, 0x4522, 0x8a, 0xa8, 0x65, 0xf0, 0x4b, 0x46, 0x3d, 0xb5} + +//EFI_GUID_STRING(AMI_PEI_CPUINIT_POLICY_PPI_GUID, "AMICPUPeiInitPolicy", "AMI Generic CPU PEI Init Policy"); + + +typedef struct _AMI_PEI_CPUINIT_POLICY_PPI AMI_PEI_CPUINIT_POLICY_PPI; + +typedef struct _AMI_PEI_CPUINIT_POLICY_PPI { + UINTN unFlag; +} AMI_PEI_CPUINIT_POLICY_PPI; + + +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Include/PPI/Capsule.h b/Include/PPI/Capsule.h new file mode 100644 index 0000000..ad1116a --- /dev/null +++ b/Include/PPI/Capsule.h @@ -0,0 +1,100 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/Capsule.h 1 5/24/12 3:15p Artems $ +// +// $Revision: 1 $ +// +// $Date: 5/24/12 3:15p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/Capsule.h $ +// +// 1 5/24/12 3:15p Artems +// [TAG] EIP74625 +// [Category] New Feature +// [Description] added new capsule ppi used by Intel's MRC code +// [Files] Capsule.h +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: Capsule.h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef _PEI_CAPSULE_PPI_H_ +#define _PEI_CAPSULE_PPI_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#include <Efi.h> +#include <Pei.h> + +#define PEI_CAPSULE_PPI_GUID \ + { 0x3acf33ee, 0xd892, 0x40f4, 0xa2, 0xfc, 0x38, 0x54, 0xd2, 0xe1, 0x32, 0x3d } + +GUID_VARIABLE_DECLARATION(gPeiCapsulePpiGuid, PEI_CAPSULE_PPI_GUID); + +typedef struct _PEI_CAPSULE_PPI PEI_CAPSULE_PPI; + +typedef EFI_STATUS +(EFIAPI *PEI_CAPSULE_COALESCE)( + IN EFI_PEI_SERVICES **PeiServices, + IN OUT VOID **MemoryBase, + IN OUT UINTN *MemSize +); + +typedef EFI_STATUS +(EFIAPI *PEI_CAPSULE_CHECK_CAPSULE_UPDATE)( + IN EFI_PEI_SERVICES **PeiServices +); + +typedef EFI_STATUS +(EFIAPI *PEI_CAPSULE_CREATE_STATE)( + IN EFI_PEI_SERVICES **PeiServices, + IN VOID *CapsuleBase, + IN UINTN CapsuleSize +); + +struct _PEI_CAPSULE_PPI { + PEI_CAPSULE_COALESCE Coalesce; + PEI_CAPSULE_CHECK_CAPSULE_UPDATE CheckCapsuleUpdate; + PEI_CAPSULE_CREATE_STATE CreateState; +}; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Include/PPI/CpuIo.h b/Include/PPI/CpuIo.h new file mode 100644 index 0000000..4b869bf --- /dev/null +++ b/Include/PPI/CpuIo.h @@ -0,0 +1,92 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2004, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/CpuIo.h 4 3/13/06 1:16a Felixp $ +// +// $Revision: 4 $ +// +// $Date: 3/13/06 1:16a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/CpuIo.h $ +// +// 4 3/13/06 1:16a Felixp +// +// 3 6/06/05 1:24p Felixp +// +// 2 6/03/05 3:44p Felixp +// Updated to support changes introduced in PEI CIS 0.91 +// +// 1 1/28/05 12:44p Felixp +// +// 1 12/23/04 9:41a Felixp +// +// 7 12/19/03 10:15a Robert +// +// 6 12/18/03 3:08p Robert +// +// 5 12/18/03 2:46p Robert +// +// 4 12/16/03 4:03p Robert +// +// 3 12/15/03 4:21p Robert +// +// 2 12/15/03 3:01p Robert +// Added SmBus SubComponent +// +// 1 12/11/03 5:35p Robert +// Initial Check in of the Cpu I/O PPI +// +//***************************************************************************** +//<AMI_FHDR_START> +// +// Name: CpuIo.h +// +// Description: This file is an include file used to define the PPI for the +// CPU I/O PPI. For questions about the specification refer to the PEI CIS +// +//<AMI_FHDR_END> +//***************************************************************************** +#ifndef _PEI_CPUIO_PPI_H_ +#define _PEI_CPUIO_PPI_H_ +#ifdef __cplusplus +extern "C" { +#endif +#include<PEI.h> + +// This is an indicator GUID without any data. It represents the fact that a PEIM +// has written the address of the EFI_PEI_CPU_IO_PPI into the EFI_PEI_SERVICES +#define EFI_PEI_CPU_IO_PPI_INSTALLED_GUID \ + {0xe6af1f7b, 0xfc3f, 0x46da, 0xa8, 0x28, 0xa3, 0xb4, 0x57, 0xa4, 0x42, 0x82} + +GUID_VARIABLE_DECLARATION(gPeiCpuIoPpiInServiceTableGuid,EFI_PEI_CPU_IO_PPI_INSTALLED_GUID); +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2004, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/CpuPPIs.cif b/Include/PPI/CpuPPIs.cif new file mode 100644 index 0000000..b738fc8 --- /dev/null +++ b/Include/PPI/CpuPPIs.cif @@ -0,0 +1,9 @@ +<component> + name = "CpuPPIs" + category = ModulePart + LocalRoot = "Include\ppi\" + RefName = "CpuPPIs" +[files] +"CPUPolicy.h" +"AmiEarlyBistPpi.h" +<endComponent> diff --git a/Include/PPI/CryptoPPI.h b/Include/PPI/CryptoPPI.h new file mode 100644 index 0000000..669a6d2 --- /dev/null +++ b/Include/PPI/CryptoPPI.h @@ -0,0 +1,162 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2010, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/Modules/CryptoPkg/PPI/CryptoPPI.h 2 11/13/12 11:47a Alexp $ +// +// $Revision: 2 $ +// +// $Date: 11/13/12 11:47a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Modules/CryptoPkg/PPI/CryptoPPI.h $ +// +// 2 11/13/12 11:47a Alexp +// EIP#105015 +// Add GUID defines for x509 Public Key file type and +// Pkcs#7 Cert verification function in Crypto PPI +// +// 1 6/13/11 5:19p Alexp +// +// 1 5/06/11 6:11p Alexp +// initial module release +// +// 3 4/11/11 12:53p Alexp +// remove Verify Capsule from Crypto PPI. +// +// 2 3/10/11 4:53p Alexp +// +// 1 2/28/11 6:46p Alexp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: CryptoPPI.h +// +// Description: AMI Digital Signature Protocol Definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef ___AMI_DIGITAL_SIGNATURE_PEI__H__ +#define ___AMI_DIGITAL_SIGNATURE_PEI__H__ + +#ifdef __cplusplus +extern "C" { +#endif + +// Flags to define type of signature to process +#define EFI_CRYPT_RSASSA_PKCS1V15 1 +#define EFI_CRYPT_RSASSA_PSS 2 + +/// +/// SHA-1 digest size in bytes. +/// +#define SHA1_DIGEST_SIZE 20 +/// +/// SHA-256 digest size in bytes +/// +#define SHA256_DIGEST_SIZE 32 + +#define DEFAULT_RSA_KEY_MODULUS_LEN 256 // 2048 bits +#define DEFAULT_RSA_SIG_LEN DEFAULT_RSA_KEY_MODULUS_LEN // This is true as long as > data + +#define AMI_DIGITAL_SIGNATURE_PPI_GUID \ + { 0x86c29aa5, 0xdb0, 0x4343, 0xbd, 0x52, 0x7a, 0x72, 0x9f, 0x37, 0xc9, 0x6d } + +GUID_VARIABLE_DECLARATION(gAmiDigitalSignaturePPIGuid, AMI_DIGITAL_SIGNATURE_PPI_GUID); + +typedef struct _AMI_CRYPT_DIGITAL_SIGNATURE_PPI AMI_CRYPT_DIGITAL_SIGNATURE_PPI; + +typedef struct{ + EFI_GUID AlgGuid; + UINT32 BlobSize; + UINT8 *Blob; +} PEI_CRYPT_HANDLE; + +typedef +EFI_STATUS +(EFIAPI *PEI_CRYPT_DS_VERIFY_SIG) ( + IN CONST AMI_CRYPT_DIGITAL_SIGNATURE_PPI *This, + IN PEI_CRYPT_HANDLE *PublicKey, + IN PEI_CRYPT_HANDLE *Hash, + IN VOID *Signature, + IN UINTN SignatureSize, + IN UINT32 Flags + ); + +typedef +EFI_STATUS +(EFIAPI *PEI_CRYPT_DS_VERIFY_PKCS7SIG) ( + IN CONST AMI_CRYPT_DIGITAL_SIGNATURE_PPI *This, + IN CONST UINT8 *P7Data, + IN UINTN P7Size, + IN CONST UINT8 *TrustedCert, + IN UINTN CertSize, + IN OUT UINT8 **Data, + IN OUT UINTN *DataSize + ); + +typedef +EFI_STATUS +(EFIAPI *PEI_CRYPT_DS_GET_KEY) ( + IN CONST AMI_CRYPT_DIGITAL_SIGNATURE_PPI *This, + IN CONST EFI_GUID *KeyAlgorithm, // supported PKPUB_KEY_GUID only + IN PEI_CRYPT_HANDLE *PublicKey + ); + +typedef +EFI_STATUS +(EFIAPI *PEI_CRYPT_DS_VERIFY_KEY) ( + IN CONST AMI_CRYPT_DIGITAL_SIGNATURE_PPI *This, + IN CONST EFI_GUID *KeyAlgorithm, // supported PKPUB_KEY_GUID only + IN PEI_CRYPT_HANDLE *PublicKey + ); + +typedef +EFI_STATUS +(EFIAPI *PEI_CRYPT_DS_HASH)( + IN CONST AMI_CRYPT_DIGITAL_SIGNATURE_PPI *This, + IN CONST EFI_GUID *HashAlgorithm, + IN UINTN num_elem, + IN CONST UINT8 *addr[], + IN CONST UINTN *len, + OUT UINT8 *Hash + ); + +typedef struct _AMI_CRYPT_DIGITAL_SIGNATURE_PPI { + PEI_CRYPT_DS_HASH Hash; + PEI_CRYPT_DS_VERIFY_KEY VerifyKey; // compares Key with Platform Signing key(PKpub) + PEI_CRYPT_DS_VERIFY_SIG VerifySig; // Rsa2048_sha256 Pkcs1v1.5 + PEI_CRYPT_DS_GET_KEY GetKey; + PEI_CRYPT_DS_VERIFY_PKCS7SIG VerifyPkcs7Sig; +}; +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif + +#endif // ___AMI_DIGITAL_SIGNATURE_PEI__H__ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2010, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/CspLibPPI.CIF b/Include/PPI/CspLibPPI.CIF new file mode 100644 index 0000000..c326f60 --- /dev/null +++ b/Include/PPI/CspLibPPI.CIF @@ -0,0 +1,9 @@ +<component> + name = "CSP Library PPIs" + category = ModulePart + LocalRoot = "INCLUDE\PPI" + RefName = "CSP Library PPIs" +[files] +"\CspLibPPI.h" +"\FwVersion.h" +<endComponent> diff --git a/Include/PPI/CspLibPPI.h b/Include/PPI/CspLibPPI.h new file mode 100644 index 0000000..cd5cf80 --- /dev/null +++ b/Include/PPI/CspLibPPI.h @@ -0,0 +1,223 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//********************************************************************** +// $Header: /Alaska/BIN/Chipset/Template/CSPLibrary/CspLibPPI.h 7 7/14/11 2:45p Artems $ +// +// $Revision: 7 $ +// +// $Date: 7/14/11 2:45p $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Template/CSPLibrary/CspLibPPI.h $ +// +// 7 7/14/11 2:45p Artems +// EIP 64106: Updated source to be UEFI 2.3.1 and PI 1.2 compliant +// +// 6 2/22/11 4:41p Artems +// EIP 51548 - Added AMI copyright headers, replaced TABs with spaces +// +// 5 6/12/09 10:55a Robert +// updated headers +// +// 4 6/12/09 10:51a Robert +// CHM and comment updates +// +// 3 10/13/07 11:53p Michaela +// Added ProgramPciTable to AMI_PEI_PCI_TABLE_INIT_PPI to +// support multiple access widths +// +// 2 3/13/06 3:42p Felixp +// +// 1 1/21/05 12:46p Sivagarn +// Initial Checkin - Version 0.05 +// +// +//***************************************************************************** + +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: CspLibPPI.h +// +// Description: +// This file contains PPI definitions that are defined in the CSP Library +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> +#ifndef __CSP_LIB_PPI_H__ +#define __CSP_LIB_PPI_H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +//<AMI_GHDR_START> +//============================================================================ +// +// Name: AMI_PEI_PCI_TABLE_INIT_PPI_GUID +// +// Description: +// This is the GUID to use to locate the the instance of the +// AMI_PEI_PCI_TABLE_INIT_PPI +// +// Notes: +// #define AMI_PEI_PCI_TABLE_INIT_PPI_GUID \ +// { 0x97f91e78, 0xea12, 0x4ea6, 0xb7, 0xb3, 0x7b, 0x6, 0x78, 0xc2, 0x86, 0x73 } +// +//============================================================================ +//<AMI_GHDR_END> +#define AMI_PEI_PCI_TABLE_INIT_PPI_GUID \ +{ 0x97f91e78, 0xea12, 0x4ea6, 0xb7, 0xb3, 0x7b, 0x6, 0x78, 0xc2, 0x86, 0x73 } + +GUID_VARIABLE_DECLARATION(gPeiPciTableInitPpiGuid,AMI_PEI_PCI_TABLE_INIT_PPI_GUID); + +#ifndef GUID_VARIABLE_DEFINITION +#include <PPI/PciCfg2.h> + +typedef struct _AMI_PEI_PCI_TABLE_INIT_PPI AMI_PEI_PCI_TABLE_INIT_PPI; + +//<AMI_GHDR_START> +//------------------------------------------------------------------ +// +// Name: AMI_PEI_PCI_INIT_TABLE_STRUCT +// +// Fields: Type ParameterName Description +//------------------------------------------------------------------ +// UINT8 bRegIndex - PCI Register to program +// UINT8 bANDMask - AND mask to apply to data in PCI register +// UINT8 bORMask - OR mask to apply to data in PCI register after AND mask +// +// Description: +// This data structure contains the information that is used to +// modify PCI register of a PCI specific device +// +// +// Notes: +// Only can modify a one byte register at a time. +// See AMI_PEI_PCI_INIT_TABLE_STRUCT2 to modify lager register +// at once +// +//------------------------------------------------------------------ +//<AMI_GHDR_END> +typedef struct _AMI_PEI_PCI_INIT_TABLE_STRUCT +{ + UINT8 bRegIndex; + UINT8 bANDMask; + UINT8 bORMask; +} AMI_PEI_PCI_INIT_TABLE_STRUCT; + +//<AMI_GHDR_START> +//------------------------------------------------------------------ +// +// Name: AMI_PEI_PCI_INIT_TABLE_STRUCT2 +// +// Fields: Type ParameterName Description +//------------------------------------------------------------------ +// UINT8 bRegIndex - PCI Register to program +// UINTN bANDMask - AND mask to apply to data in PCI register +// UINTN bORMask - OR mask to apply to data in PCI register after AND mask +// +// Description: +// This data structure contains the information that is used to +// modify PCI register of a PCI specific device +// +// +// Notes: +// This Structure is almost the same as AMI_PEI_PCI_INIT_TABLE_STRUCT +// The difference is in the size of the AND and OR masks. to allow +// modification of PCI registers larger than one byte +// +//------------------------------------------------------------------ +//<AMI_GHDR_END> +typedef struct +{ + UINT8 bRegIndex; // register offset to modify + UINTN bANDMask; // specified bits will be cleared + UINTN bORMask; // specified bits will be set +} AMI_PEI_PCI_INIT_TABLE_STRUCT2; + +typedef +EFI_STATUS +(EFIAPI * AMI_PEI_PCI_TABLE_INIT_FUNCTION) ( + IN EFI_PEI_SERVICES **PeiServices, + IN AMI_PEI_PCI_TABLE_INIT_PPI *This, + IN EFI_PEI_PCI_CFG2_PPI *PciCfg, // OPTIONAL + IN UINT64 Address, + IN AMI_PEI_PCI_INIT_TABLE_STRUCT PCIInitTable[], + IN UINT16 wSize + ); + +// This version allows a table of specified access width up to UINTN +typedef +EFI_STATUS +(EFIAPI * AMI_PEI_PCI_TABLE_INIT_FUNCTION_VARACCESS) ( + IN EFI_PEI_SERVICES **PeiServices, + IN AMI_PEI_PCI_TABLE_INIT_PPI *This, + IN EFI_PEI_PCI_CFG2_PPI *PciCfg, // OPTIONAL + IN UINT64 CfgAddress, + IN AMI_PEI_PCI_INIT_TABLE_STRUCT2 *PciInitTable, + IN UINT16 TableEntries, + IN EFI_PEI_PCI_CFG_PPI_WIDTH AccessWidth +); + +//<AMI_GHDR_START> +//------------------------------------------------------------------ +// +// Name: AMI_PEI_PCI_TABLE_INIT_PPI +// +// Description: +// This data structure is the AMI_PEI_PCI_TABLE_INIT_PPI definition +// This provides this PPI to any module that includes the chipset +// library. This provides a mechanism to program a table full of +// PCI information in one function call +// +// Fields: Type ParameterName Description +//------------------------------------------------------------------ +// AMI_PEI_PCI_TABLE_INIT_FUNCTION AMIPEIProgramPCITable - PciTableInit +// AMI_PEI_PCI_TABLE_INIT_FUNCTION_VARACCESS ProgramPciTable - PciTableInit2 +// +// Notes: +// See the function headers for descriptions +// +//------------------------------------------------------------------ +//<AMI_GHDR_END> +typedef struct _AMI_PEI_PCI_TABLE_INIT_PPI +{ + AMI_PEI_PCI_TABLE_INIT_FUNCTION AMIPEIProgramPCITable; + AMI_PEI_PCI_TABLE_INIT_FUNCTION_VARACCESS ProgramPciTable; +} AMI_PEI_PCI_TABLE_INIT_PPI; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#endif // #ifndef GUID_VARIABLE_DEFINITION +#ifdef __cplusplus +} +#endif + +#endif +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//*************************************************************************
\ No newline at end of file diff --git a/Include/PPI/Decompress.h b/Include/PPI/Decompress.h new file mode 100644 index 0000000..e87d307 --- /dev/null +++ b/Include/PPI/Decompress.h @@ -0,0 +1,85 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/Decompress.h 2 3/09/11 5:41p Artems $ +// +// $Revision: 2 $ +// +// $Date: 3/09/11 5:41p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/Decompress.h $ +// +// 2 3/09/11 5:41p Artems +// Modified to comply with AMI coding standard +// +//********************************************************************** + +//<AMI_FHDR_START> +//--------------------------------------------------------------------------- +// +// Name: Decompress.h +// +// Description: Decompress PPI definition file +// +//--------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef __DECOMPRESS_PPI_H__ +#define __DECOMPRESS_PPI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define EFI_PEI_DECOMPRESS_PPI_GUID \ + { 0x1a36e4e7, 0xfab6, 0x476a, 0x8e, 0x75, 0x69, 0x5a, 0x5, 0x76, 0xfd, 0xd7 } + +GUID_VARIABLE_DECLARATION(gEfiPeiDecompressPpiGuid, EFI_PEI_DECOMPRESS_PPI_GUID); + +typedef struct _EFI_PEI_DECOMPRESS_PPI EFI_PEI_DECOMPRESS_PPI; + +typedef EFI_STATUS +(EFIAPI *EFI_PEI_DECOMPRESS_DECOMPRESS)( + IN CONST EFI_PEI_DECOMPRESS_PPI *This, + IN CONST EFI_COMPRESSION_SECTION *InputSection, + OUT VOID **OutputBuffer, + OUT UINTN *OutputSize +); + +struct _EFI_PEI_DECOMPRESS_PPI { + EFI_PEI_DECOMPRESS_DECOMPRESS Decompress; +}; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/DeviceRecoveryBlockIo.h b/Include/PPI/DeviceRecoveryBlockIo.h new file mode 100644 index 0000000..7f1f70e --- /dev/null +++ b/Include/PPI/DeviceRecoveryBlockIo.h @@ -0,0 +1,121 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Modules/Recovery/DeviceRecoveryBlockIo.h 1 12/01/05 9:35a Felixp $ +// +// $Revision: 1 $ +// +// $Date: 12/01/05 9:35a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Modules/Recovery/DeviceRecoveryBlockIo.h $ +// +// 1 12/01/05 9:35a Felixp +// +// 2 3/22/05 9:33p Felixp +// +// 1 3/22/05 9:16p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: DeviceRecoveryBlockIo.h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __DeviceRecoveryBlockIo__H__ +#define __DeviceRecoveryBlockIo__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_VIRTUAL_BLOCK_IO_PPI \ +{ 0x695d8aa1, 0x42ee, 0x4c46, 0x80, 0x5c,0x6e, 0xa6, 0xbc, 0xe7, 0x99, 0xe3 } + +typedef struct _EFI_PEI_RECOVERY_BLOCK_IO_PPI EFI_PEI_RECOVERY_BLOCK_IO_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_GET_NUMBER_BLOCK_DEVICES) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This, + OUT UINTN *NumberBlockDevices +); + +//*********************************************************** +// EFI_PEI_BLOCK_DEVICE_TYPE +//*********************************************************** +typedef enum { + LegacyFloppy = 0, + IdeCDROM = 1, + IdeLS120 = 2, + UsbMassStorage = 3, + MaxDeviceType +} EFI_PEI_BLOCK_DEVICE_TYPE; + +//*************************************************** +// EFI_PEI_BLOCK_IO_MEDIA +//*************************************************** +typedef struct { + EFI_PEI_BLOCK_DEVICE_TYPE DeviceType; + BOOLEAN MediaPresent; + UINTN LastBlock; + UINTN BlockSize; +} EFI_PEI_BLOCK_IO_MEDIA; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_GET_DEVICE_MEDIA_INFORMATION) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This, + IN UINTN DeviceIndex, OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo +); + +//***************************************************** +// EFI_PEI_LBA +//***************************************************** +typedef UINT64 EFI_PEI_LBA; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_READ_BLOCKS) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This, + IN UINTN DeviceIndex, IN EFI_PEI_LBA StartLBA, + IN UINTN BufferSize, OUT VOID *Buffer +); + +struct _EFI_PEI_RECOVERY_BLOCK_IO_PPI { + EFI_PEI_GET_NUMBER_BLOCK_DEVICES GetNumberOfBlockDevices; + EFI_PEI_GET_DEVICE_MEDIA_INFORMATION GetBlockDeviceMediaInfo; + EFI_PEI_READ_BLOCKS ReadBlocks; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/DeviceRecoveryModule.h b/Include/PPI/DeviceRecoveryModule.h new file mode 100644 index 0000000..a925419 --- /dev/null +++ b/Include/PPI/DeviceRecoveryModule.h @@ -0,0 +1,97 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Modules/Recovery/DeviceRecoveryModule.h 1 12/01/05 9:35a Felixp $ +// +// $Revision: 1 $ +// +// $Date: 12/01/05 9:35a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Modules/Recovery/DeviceRecoveryModule.h $ +// +// 1 12/01/05 9:35a Felixp +// +// 3 3/22/05 9:33p Felixp +// +// 2 3/22/05 8:21p Felixp +// +// 1 3/22/05 8:04p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: DeviceRecoveryModule.h +// +// Description: EFI_PEI_DEVICE_RECOVERY_MODULE_PPI PPI definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __DeviceRecoveryModule__H__ +#define __DeviceRecoveryModule__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_DEVICE_RECOVERY_MODULE_PPI_GUID \ +{ 0x0DE2CE25, 0x446A, 0x45a7, 0xBF, 0xC9, 0x37, 0xDA, 0x26, 0x34, 0x4B, 0x37} + +typedef struct _EFI_PEI_DEVICE_RECOVERY_MODULE_PPI EFI_PEI_DEVICE_RECOVERY_MODULE_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_DEVICE_GET_NUMBER_RECOVERY_CAPSULE)( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This, + OUT UINTN *NumberRecoveryCapsules +); + +typedef EFI_STATUS (EFIAPI *EFI_PEI_DEVICE_GET_RECOVERY_CAPSULE_INFO)( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This, + IN UINTN CapsuleInstance, OUT UINTN *Size, + OUT EFI_GUID *CapsuleType +); + +typedef EFI_STATUS (EFIAPI *EFI_PEI_DEVICE_LOAD_RECOVERY_CAPSULE)( + IN OUT EFI_PEI_SERVICES **PeiServices, + IN struct _EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This, + IN UINTN CapsuleInstance, OUT VOID *Buffer +); + +struct _EFI_PEI_DEVICE_RECOVERY_MODULE_PPI { + EFI_PEI_DEVICE_GET_NUMBER_RECOVERY_CAPSULE GetNumberRecoveryCapsules; + EFI_PEI_DEVICE_GET_RECOVERY_CAPSULE_INFO GetRecoveryCapsuleInfo; + EFI_PEI_DEVICE_LOAD_RECOVERY_CAPSULE LoadRecoveryCapsule; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/FirmwareVolumeInfo.h b/Include/PPI/FirmwareVolumeInfo.h new file mode 100644 index 0000000..006b488 --- /dev/null +++ b/Include/PPI/FirmwareVolumeInfo.h @@ -0,0 +1,76 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/FirmwareVolumeInfo.h 1 2/05/11 2:15p Artems $ +// +// $Revision: 1 $ +// +// $Date: 2/05/11 2:15p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/FirmwareVolumeInfo.h $ +// +// 1 2/05/11 2:15p Artems +// EFI_PEI_FIRMWARE_VOLUME_INFO definition +// +// 6 1/13/10 2:13p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: <This File's Name> +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __FIRMWARE_VOLUME_INFO__H__ +#define __FIRMWARE_VOLUME_INFO__H__ +#ifdef __cplusplus +extern "C" { +#endif + +#define EFI_PEI_FIRMWARE_VOLUME_INFO_PPI_GUID \ + { 0x49edb1c1, 0xbf21, 0x4761, { 0xbb, 0x12, 0xeb, 0x0, 0x31, 0xaa, 0xbb, 0x39 } } + +GUID_VARIABLE_DECLARATION(gEfiFirmwareVolumeInfoPpiGuid, EFI_PEI_FIRMWARE_VOLUME_INFO_PPI_GUID); + +typedef struct _EFI_PEI_FIRMWARE_VOLUME_INFO_PPI { + EFI_GUID FvFormat; + VOID *FvInfo; + UINT32 FvInfoSize; + EFI_GUID *ParentFvName; + EFI_GUID *ParentFileName; +} EFI_PEI_FIRMWARE_VOLUME_INFO_PPI; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/FwVersion.h b/Include/PPI/FwVersion.h new file mode 100644 index 0000000..a957515 --- /dev/null +++ b/Include/PPI/FwVersion.h @@ -0,0 +1,156 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//********************************************************************** +// $Header: /Alaska/BIN/Chipset/Template/CSPLibrary/FwVersion.h 11 2/22/11 4:41p Artems $ +// +// $Revision: 11 $ +// +// $Date: 2/22/11 4:41p $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Template/CSPLibrary/FwVersion.h $ +// +// 11 2/22/11 4:41p Artems +// EIP 51548 - Added AMI copyright headers, replaced TABs with spaces +// +// 10 12/17/10 4:41p Artems +// Added OEM activation key support +// +// 9 5/21/10 4:29p Artems +// Changed to version 3 as per Utility specification +// +// 8 4/05/10 6:15p Artems +// Added Core 4.6.3 backward compatibility fix +// +// 7 12/03/09 12:07p Robert +// updated table header information +// +// 6 12/02/09 4:55p Robert +// Added changes for support for Revision 2 of the Firmware Version +// Structure +// +// 5 6/12/09 1:40p Robert +// added source safe headers +// +// +//***************************************************************************** + +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: FwVersion.h +// +// Description: +// This file the FW_VERSION data structure which is used by AMI utilities to +// provide information about the BIOS +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef __FW_VERSION_H__ +#define __FW_VERSION_H__ +#ifdef __cplusplus +extern "C" { +#endif + + +#define FID_SIGNATURE 0x24464944 //'$FID' signature of the FW VERSION STRUCTURE +#pragma pack (1) + + +//<AMI_GHDR_START> +//------------------------------------------------------------------ +// +// Name: FW_VERSION +// +// Fields: Type ParameterName Description +//------------------------------------------------------------------ +// CHAR8 "FirmwareID[4]" - Signature '$FID' +// UINT8 StructVersion - Version of the FW_VERSION Structure +// UINT16 Size - Size of this structure +// CHAR8 "BiosTag[9]" - BIOS Tag +// EFI_GUID FirmwareGuid - Firmware GUID +// CHAR8 "CoreMajorVersion[3]" - Aptio Core Major Version +// CHAR8 "CoreMinorVersion[3]" - Aptio Core Minor Version +// CHAR8 "ProjectMajorVersion[3]" - Project Major Version +// CHAR8 "ProjectMinorVersion[3]" - Project Minor Version +// UINT16 Year - Build Year +// UINT8 Month - Build Month +// UINT8 Day - Build Day +// UINT8 Hour - Build Hour +// UINT8 Minute - Build Minute +// UINT8 Second - Build Second +// UINT32 OemActivationKeyLength - Length of the OEM Activation key +// UINT8 OemActivationKey[49] - OEM Activation key +// +// Description: +// This data structure contains the information used by AMI utilities +// to provide information about the current BIOS +// +// +// Notes: +// Data structure changed for version 2 of the Firmware Version Structure +// Version 1 is no longer supported +// +//------------------------------------------------------------------ +//<AMI_GHDR_END> +typedef struct{ +CHAR8 FirmwareID[4]; //Signature '$FID' +UINT8 StructVersion; //Version of the FW_VERSION Struct +UINT16 Size; //Size of this structure +CHAR8 BiosTag[9]; //BIOS Tag +EFI_GUID FirmwareGuid; //Firmware GUID +CHAR8 CoreMajorVersion[3]; +CHAR8 CoreMinorVersion[3]; +CHAR8 ProjectMajorVersion[3]; +CHAR8 ProjectMinorVersion[3]; +UINT16 Year; +UINT8 Month; +UINT8 Day; +UINT8 Hour; +UINT8 Minute; +UINT8 Second; +UINT16 SignOnStringId; +UINT8 OemId[6]; +UINT8 OemTableId[8]; +UINT32 OemActivationKeyLength; +UINT8 OemActivationKey[49]; +}FW_VERSION; +#pragma pack () + + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif + +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2008, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Include/PPI/LoadFile.h b/Include/PPI/LoadFile.h new file mode 100644 index 0000000..47660e4 --- /dev/null +++ b/Include/PPI/LoadFile.h @@ -0,0 +1,136 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/LoadFile.h 7 6/16/11 3:18p Felixp $ +// +// $Revision: 7 $ +// +// $Date: 6/16/11 3:18p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/LoadFile.h $ +// +// 7 6/16/11 3:18p Felixp +// Surround backward compatibility definitions with #if +// BACKWARD_COMPATIBLE_MODE +// +// 6 5/27/11 5:52p Felixp +// Headers are updated to improve separation of the Framework and PI +// interfaces. +// The definitions that will be removed in the future versions are marked +// with the comments. +// +// 5 2/05/11 2:10p Artems +// Added PI 1.0 support +// +// 4 3/13/06 1:16a Felixp +// +// 3 3/24/05 11:45a Felixp +// +// 2 3/04/05 10:26a Mandal +// +// 1 1/28/05 12:44p Felixp +// +// 2 1/18/05 3:21p Felixp +// PrintDebugMessage renamed to Trace +// +// 1 12/23/04 9:41a Felixp +// +// 1 10/14/04 12:06p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: LoadFile.h +// +// Description: EFI_PEI_FV_FILE_LOADER_PPI PPI definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __LoadFile__H__ +#define __LoadFile__H__ +#ifdef __cplusplus +extern "C" { +#endif + +#include <PEI.h> + +#if PI_SPECIFICATION_VERSION >= 0x00010000 +#define EFI_PEI_LOAD_FILE_PPI_GUID \ + { 0xb9e0abfe, 0x5979, 0x4914, 0x97, 0x7f, 0x6d, 0xee, 0x78, 0xc2, 0x78, 0xa6 } +#if BACKWARD_COMPATIBLE_MODE +#define EFI_PEI_FV_FILE_LOADER_GUID EFI_PEI_LOAD_FILE_PPI_GUID +#endif +#else +#define EFI_PEI_FV_FILE_LOADER_GUID \ + { 0x7e1f0d85, 0x4ff, 0x4bb2, 0x86, 0x6a, 0x31, 0xa2, 0x99, 0x6a, 0x48, 0xa8 } +GUID_VARIABLE_DECLARATION(gPeiFvFileLoaderPpiGuid, EFI_PEI_FV_FILE_LOADER_GUID); +#define EFI_PEI_LOAD_FILE_PPI_GUID EFI_PEI_FV_FILE_LOADER_GUID +#endif //#if PI_SPECIFICATION_VERSION >= 0x00010000 + +GUID_VARIABLE_DECLARATION(gEfiPeiLoadFilePpiGuid, EFI_PEI_LOAD_FILE_PPI_GUID); + +#if PI_SPECIFICATION_VERSION >= 0x00010000 +typedef struct _EFI_PEI_LOAD_FILE_PPI EFI_PEI_LOAD_FILE_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_LOAD_FILE)( + IN CONST EFI_PEI_LOAD_FILE_PPI *This, + IN EFI_PEI_FILE_HANDLE FileHandle, + OUT EFI_PHYSICAL_ADDRESS *ImageAddress, + OUT UINT64 *ImageSize, + OUT EFI_PHYSICAL_ADDRESS *EntryPoint, + OUT UINT32 *AuthenticationState +); + +struct _EFI_PEI_LOAD_FILE_PPI { + EFI_PEI_LOAD_FILE LoadFile; +}; + +#else //#if PI_SPECIFICATION_VERSION >= 0x00010000 + +typedef struct _EFI_PEI_FV_FILE_LOADER_PPI EFI_PEI_FV_FILE_LOADER_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_FV_LOAD_FILE) ( + IN EFI_PEI_FV_FILE_LOADER_PPI *This, + IN EFI_FFS_FILE_HEADER *FfsHeader, + OUT EFI_PHYSICAL_ADDRESS *ImageAddress, + OUT UINT64 *ImageSize, + OUT EFI_PHYSICAL_ADDRESS *EntryPoint +); + +struct _EFI_PEI_FV_FILE_LOADER_PPI { + EFI_PEI_FV_LOAD_FILE FvLoadFile; +}; +#endif //#if PI_SPECIFICATION_VERSION >= 0x00010000 + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/LoadedImagePpi.h b/Include/PPI/LoadedImagePpi.h new file mode 100644 index 0000000..4d14959 --- /dev/null +++ b/Include/PPI/LoadedImagePpi.h @@ -0,0 +1,83 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/LoadedImagePpi.h 4 2/05/11 2:12p Artems $ +// +// $Revision: 4 $ +// +// $Date: 2/05/11 2:12p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/LoadedImagePpi.h $ +// +// 4 2/05/11 2:12p Artems +// Removed EFI_PEI_FILE_HANDLE definition +// +// 3 3/12/07 9:49a Felixp +// +// 2 3/12/07 9:48a Felixp +// FileHandle type changed +// +// 1 2/19/07 11:19a Pats +// Add definition for Loaded Image PPI, required for AMI debugger support. +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: LoadedImagePpi.h +// +// Description: EFI_PEI_LOADED_IMAGE_PPI PPI definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __LoadedImagePpi__H__ +#define __LoadedImagePpi__H__ +#ifdef __cplusplus +extern "C" { +#endif + +#include <PEI.h> +#include <FFS.h> + +// {A62A3FFF-97F0-4332-8CFD-1E343D3631F2} +#define EFI_PEI_LOADED_IMAGE_PPI_GUID \ +{ 0xa62a3fff, 0x97f0, 0x4332, 0x8c, 0xfd, 0x1e, 0x34, 0x3d, 0x36, 0x31, 0xf2 } + +GUID_VARIABLE_DECLARATION(gEfiPeiLoadedImagePpiGuid, EFI_PEI_LOADED_IMAGE_PPI_GUID); + +typedef struct _EFI_PEI_LOADED_IMAGE_PPI { + EFI_PHYSICAL_ADDRESS ImageAddress; + UINT64 ImageSize; + EFI_PEI_FILE_HANDLE FileHandle; +} EFI_PEI_LOADED_IMAGE_PPI; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/NBPPI.CIF b/Include/PPI/NBPPI.CIF new file mode 100644 index 0000000..84f8cb3 --- /dev/null +++ b/Include/PPI/NBPPI.CIF @@ -0,0 +1,9 @@ +<component> + name = "NB PPI" + category = ModulePart + LocalRoot = "INCLUDE\PPI" + RefName = "NB PPI" +[files] +"\NBPPI.h" +"\BaseMemoryTest.h" +<endComponent> diff --git a/Include/PPI/NBPPI.h b/Include/PPI/NBPPI.h new file mode 100644 index 0000000..1ba73bc --- /dev/null +++ b/Include/PPI/NBPPI.h @@ -0,0 +1,395 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset/NB PPI/NBPPI.h 6 4/08/13 8:13a Ireneyang $ +// +// $Revision: 6 $ +// +// $Date: 4/08/13 8:13a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/NorthBridge/Haswell/Intel SystemAgent NB Chipset/NB PPI/NBPPI.h $ +// +// 6 4/08/13 8:13a Ireneyang +// Update SA RC to 1.4.0.0. +// +// 5 4/08/13 7:22a Ireneyang +// Update SA RC to 1.4.0.0. +// +// 4 4/01/13 11:49p Ireneyang +// [TAG] None +// [Severity] Improvement +// [Description] Reduce boot time through PEG. +// [Files] NB.mak; NBDxe.c; NBPEI.c; NBPPI.h; Sa.asl; +// PcieComplex.c; GraphicsInit.c; PciExpressInit.c; +// +// 3 12/03/12 5:53a Jeffch +// [TAG] None +// [Category] Improvement +// [Description] optimize DetectNonComplaint function. +// [Description] NBPEI.c, NBPPI.h, NBDxe.c +// +// 2 6/14/12 4:29a Yurenlai +// [TAG] None +// [Category] Improvement +// [Description] Add Notify BeforeMrc and AfterMrc. +// [Description] NBPEI.c, NBPPI.h, MemoryInit.c +// +// 1 2/08/12 4:35a Yurenlai +// Intel Haswell/NB eChipset initially releases. +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: NBPPI.h +// +// Description: This header file contains the PPI definition for the NB. +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifndef FILE_PEI_NBINIT_POLICY_PPI_H_ +#define FILE_PEI_NBINIT_POLICY_PPI_H_ + +#include "HOB.h" + +// {9CE4D938-9C87-41d0-9E55-34923FAF8B4F} +#define AMI_PEI_NBINIT_POLICY_PPI_GUID \ + {0x9ce4d938, 0x9c87, 0x41d0, 0x9e, 0x55, 0x34, 0x92, 0x3f, 0xaf, 0x8b, 0x4f} + +// {E813E116-C099-4D21-9c34-A552D5E9A5D0} +#define AMI_PEI_MRC_DEFAULT_GUID \ + {0xe813e116, 0xc099, 0x4d21, 0x9c, 0x34, 0xa5, 0x52, 0xd5, 0xe9, 0xa5, 0xd0} + +// {71A8917B-0891-4E27-8A73-A9B334840393} +#define AMI_PEI_BEFORE_MRC_GUID \ + {0x71a8917b, 0x891, 0x4e27, 0x8a, 0x73, 0xa9, 0xb3, 0x34, 0x84, 0x3, 0x93} + +// {64C96700-6B4C-480C-A3E1-B8BDE8F602B2} +#define AMI_PEI_AFTER_MRC_GUID \ + {0x64c96700, 0x6b4c, 0x480c, 0xa3, 0xe1, 0xb8, 0xbd, 0xe8, 0xf6, 0x2, 0xb2} + +// {633194BE-1697-11E1-B5F0-2CB24824019B} +#define AMI_PEI_END_OF_MRC_GUID \ + {0x633194be, 0x1697, 0x11e1, 0xb5, 0xf0, 0x2c, 0xb2, 0x48, 0x24, 0x01, 0x9b} + +// {9F58E424-B96B-45A5-ADDC-D2FE394A99D9} +#define AMI_PEI_END_MEMORY_DETECT_GUID \ + {0x9f58e424, 0xb96b, 0x45a5, 0xad, 0xdc, 0xd2, 0xfe, 0x39, 0x4a, 0x99, 0xd9} + +// {584CC99F-4BE8-43d1-A45A-933DC39479FC} +#define AMI_PEI_SET_NB_SUBID_PPI_GUID \ + {0x584cc99f, 0x4be8, 0x43d1, 0xa4, 0x5a, 0x93, 0x3d, 0xc3, 0x94, 0x79, 0xfc} + +// {1F0F049E-3A68-4c97-865A-BC5EED7920E7} +#define AMI_PEI_NB_CPU_ONLY_RESET_PPI_GUID \ + {0x1f0f049e, 0x3a68, 0x4c97, 0x86, 0x5a, 0xbc, 0x5e, 0xed, 0x79, 0x20, 0xe7} + +// {584CC99F-4BE8-43d1-A45A-933DC39479FC} +#define AMI_PEI_NB_CUSTOM_PPI_GUID \ + {0x584cc99f, 0x4be8, 0x43d1, 0xa4, 0x5a, 0x93, 0x3d, 0xc3, 0x94, 0x79, 0xfc} + +//-MrcErrorInfo Example +#ifndef GUID_VARIABLE_DECLARATION +#define GUID_VARIABLE_DECLARATION(Variable, Guid) extern EFI_GUID Variable +#endif +//-MrcErrorInfo Example end +GUID_VARIABLE_DECLARATION(gAmiPeiNBCustomPpiGuid, AMI_PEI_NB_CUSTOM_PPI_GUID); + +#define PEI_MEMORY_RANGE_OPTION_ROM UINT32 + +#define PEI_MR_OPTION_ROM_ALL 0xFFFFFFFF +#define PEI_MR_OPTION_ROM_NONE 0x00000000 +#define PEI_MR_OPTION_ROM_C0000_16K 0x00000001 +#define PEI_MR_OPTION_ROM_C4000_16K 0x00000002 +#define PEI_MR_OPTION_ROM_C8000_16K 0x00000004 +#define PEI_MR_OPTION_ROM_CC000_16K 0x00000008 +#define PEI_MR_OPTION_ROM_D0000_16K 0x00000010 +#define PEI_MR_OPTION_ROM_D4000_16K 0x00000020 +#define PEI_MR_OPTION_ROM_D8000_16K 0x00000040 +#define PEI_MR_OPTION_ROM_DC000_16K 0x00000080 +#define PEI_MR_OPTION_ROM_E0000_16K 0x00000100 +#define PEI_MR_OPTION_ROM_E4000_16K 0x00000200 +#define PEI_MR_OPTION_ROM_E8000_16K 0x00000400 +#define PEI_MR_OPTION_ROM_EC000_16K 0x00000800 +#define PEI_MR_OPTION_ROM_F0000_16K 0x00001000 +#define PEI_MR_OPTION_ROM_F4000_16K 0x00002000 +#define PEI_MR_OPTION_ROM_F8000_16K 0x00004000 +#define PEI_MR_OPTION_ROM_FC000_16K 0x00008000 + +// +// SMRAM Memory Range +// +#define PEI_MEMORY_RANGE_SMRAM UINT32 +#define PEI_MR_SMRAM_ALL 0xFFFFFFFF +#define PEI_MR_SMRAM_NONE 0x00000000 +#define PEI_MR_SMRAM_CACHEABLE_MASK 0x80000000 +#define PEI_MR_SMRAM_SEGTYPE_MASK 0x00FF0000 +#define PEI_MR_SMRAM_ABSEG_MASK 0x00010000 +#define PEI_MR_SMRAM_HSEG_MASK 0x00020000 +#define PEI_MR_SMRAM_TSEG_MASK 0x00040000 +// +// If adding additional entries, SMRAM Size +// is a multiple of 128KB. +// +#define PEI_MR_SMRAM_SIZE_MASK 0x0000FFFF +#define PEI_MR_SMRAM_SIZE_128K_MASK 0x00000001 +#define PEI_MR_SMRAM_SIZE_256K_MASK 0x00000002 +#define PEI_MR_SMRAM_SIZE_512K_MASK 0x00000004 +#define PEI_MR_SMRAM_SIZE_1024K_MASK 0x00000008 +#define PEI_MR_SMRAM_SIZE_2048K_MASK 0x00000010 +#define PEI_MR_SMRAM_SIZE_4096K_MASK 0x00000020 +#define PEI_MR_SMRAM_SIZE_8192K_MASK 0x00000040 + + +#define PEI_MR_SMRAM_ABSEG_128K_NOCACHE 0x00010001 +#define PEI_MR_SMRAM_HSEG_128K_CACHE 0x80020001 +#define PEI_MR_SMRAM_HSEG_128K_NOCACHE 0x00020001 +#define PEI_MR_SMRAM_TSEG_128K_CACHE 0x80040001 +#define PEI_MR_SMRAM_TSEG_128K_NOCACHE 0x00040001 +#define PEI_MR_SMRAM_TSEG_256K_CACHE 0x80040002 +#define PEI_MR_SMRAM_TSEG_256K_NOCACHE 0x00040002 +#define PEI_MR_SMRAM_TSEG_512K_CACHE 0x80040004 +#define PEI_MR_SMRAM_TSEG_512K_NOCACHE 0x00040004 +#define PEI_MR_SMRAM_TSEG_1024K_CACHE 0x80040008 +#define PEI_MR_SMRAM_TSEG_1024K_NOCACHE 0x00040008 +#define PEI_MR_SMRAM_TSEG_8192K_CACHE 0x80040040 +#define PEI_MR_SMRAM_TSEG_8192K_NOCACHE 0x00040040 + +// +// Graphics Memory Range +// +#define PEI_MEMORY_RANGE_GRAPHICS_MEMORY UINT32 +#define PEI_MR_GRAPHICS_MEMORY_ALL 0xFFFFFFFF +#define PEI_MR_GRAPHICS_MEMORY_NONE 0x00000000 +#define PEI_MR_GRAPHICS_MEMORY_CACHEABLE 0x80000000 +// +// If adding additional entries, Graphics Memory Size +// is a multiple of 512KB. +// +#define PEI_MR_GRAPHICS_MEMORY_SIZE_MASK 0x0000FFFF +#define PEI_MR_GRAPHICS_MEMORY_512K_NOCACHE 0x00000001 +#define PEI_MR_GRAPHICS_MEMORY_512K_CACHE 0x80000001 +#define PEI_MR_GRAPHICS_MEMORY_1M_NOCACHE 0x00000002 +#define PEI_MR_GRAPHICS_MEMORY_1M_CACHE 0x80000002 +#define PEI_MR_GRAPHICS_MEMORY_2M_NOCACHE 0x00000004 +#define PEI_MR_GRAPHICS_MEMORY_2M_CACHE 0x80000004 +#define PEI_MR_GRAPHICS_MEMORY_4M_NOCACHE 0x00000008 +#define PEI_MR_GRAPHICS_MEMORY_4M_CACHE 0x80000008 +#define PEI_MR_GRAPHICS_MEMORY_8M_NOCACHE 0x00000010 +#define PEI_MR_GRAPHICS_MEMORY_8M_CACHE 0x80000010 +#define PEI_MR_GRAPHICS_MEMORY_16M_NOCACHE 0x00000020 +#define PEI_MR_GRAPHICS_MEMORY_16M_CACHE 0x80000020 +#define PEI_MR_GRAPHICS_MEMORY_32M_NOCACHE 0x00000040 +#define PEI_MR_GRAPHICS_MEMORY_32M_CACHE 0x80000040 +#define PEI_MR_GRAPHICS_MEMORY_48M_NOCACHE 0x00000060 +#define PEI_MR_GRAPHICS_MEMORY_48M_CACHE 0x80000060 +#define PEI_MR_GRAPHICS_MEMORY_64M_NOCACHE 0x00000080 +#define PEI_MR_GRAPHICS_MEMORY_64M_CACHE 0x80000080 +#define PEI_MR_GRAPHICS_MEMORY_96M_NOCACHE 0x000000C0 +#define PEI_MR_GRAPHICS_MEMORY_96M_CACHE 0x800000C0 +#define PEI_MR_GRAPHICS_MEMORY_128M_NOCACHE 0x00000100 +#define PEI_MR_GRAPHICS_MEMORY_128M_CACHE 0x80000100 +#define PEI_MR_GRAPHICS_MEMORY_256M_NOCACHE 0x00000200 +#define PEI_MR_GRAPHICS_MEMORY_256M_CACHE 0x80000200 +#define PEI_MR_GRAPHICS_MEMORY_96M_NOCACHE 0x000000C0 +#define PEI_MR_GRAPHICS_MEMORY_96M_CACHE 0x800000C0 +#define PEI_MR_GRAPHICS_MEMORY_160M_NOCACHE 0x00000140 +#define PEI_MR_GRAPHICS_MEMORY_160M_CACHE 0x80000140 +#define PEI_MR_GRAPHICS_MEMORY_192M_NOCACHE 0x00000180 +#define PEI_MR_GRAPHICS_MEMORY_192M_CACHE 0x80000180 +#define PEI_MR_GRAPHICS_MEMORY_224M_NOCACHE 0x000001C0 +#define PEI_MR_GRAPHICS_MEMORY_224M_CACHE 0x800001C0 +#define PEI_MR_GRAPHICS_MEMORY_256M_NOCACHE 0x00000200 +#define PEI_MR_GRAPHICS_MEMORY_256M_CACHE 0x80000200 +#define PEI_MR_GRAPHICS_MEMORY_288M_NOCACHE 0x00000240 +#define PEI_MR_GRAPHICS_MEMORY_288M_CACHE 0x80000240 +#define PEI_MR_GRAPHICS_MEMORY_320M_NOCACHE 0x00000280 +#define PEI_MR_GRAPHICS_MEMORY_320M_CACHE 0x80000280 +#define PEI_MR_GRAPHICS_MEMORY_352M_NOCACHE 0x000002C0 +#define PEI_MR_GRAPHICS_MEMORY_352M_CACHE 0x800002C0 +#define PEI_MR_GRAPHICS_MEMORY_384M_NOCACHE 0x00000300 +#define PEI_MR_GRAPHICS_MEMORY_384M_CACHE 0x80000300 +#define PEI_MR_GRAPHICS_MEMORY_416M_NOCACHE 0x00000340 +#define PEI_MR_GRAPHICS_MEMORY_416M_CACHE 0x80000340 +#define PEI_MR_GRAPHICS_MEMORY_448M_NOCACHE 0x00000380 +#define PEI_MR_GRAPHICS_MEMORY_448M_CACHE 0x80000380 +#define PEI_MR_GRAPHICS_MEMORY_480M_NOCACHE 0x000003C0 +#define PEI_MR_GRAPHICS_MEMORY_480M_CACHE 0x800003C0 +#define PEI_MR_GRAPHICS_MEMORY_512M_NOCACHE 0x00000400 +#define PEI_MR_GRAPHICS_MEMORY_512M_CACHE 0x80000400 + +// +// Pci Memory Hole +// +#define PEI_MEMORY_RANGE_PCI_MEMORY UINT32 +#define PEI_MR_PCI_MEMORY_SIZE_512M_MASK 0x00000001 + + +GUID_VARIABLE_DECLARATION(gAmiPeiMrcDefaultGuid, AMI_PEI_MRC_DEFAULT_GUID); +GUID_VARIABLE_DECLARATION(gAmiPeiBeforeMrcGuid, AMI_PEI_BEFORE_MRC_GUID); +GUID_VARIABLE_DECLARATION(gAmiPeiAfterMrcGuid, AMI_PEI_AFTER_MRC_GUID); +GUID_VARIABLE_DECLARATION(gAmiPeiEndOfMemDetectGuid, AMI_PEI_END_OF_MRC_GUID); +GUID_VARIABLE_DECLARATION(gSetNBSubIdPpiGuid, AMI_PEI_SET_NB_SUBID_PPI_GUID); +GUID_VARIABLE_DECLARATION(gAmiPeiNBCpuOnlyResetPpiGuid, \ + AMI_PEI_NB_CPU_ONLY_RESET_PPI_GUID); + +typedef struct _AMI_PEI_NBINIT_POLICY_PPI AMI_PEI_NBINIT_POLICY_PPI; + +typedef struct _AMI_PEI_NBINIT_POLICY_PPI { + UINTN unFlag; +} AMI_PEI_NBINIT_POLICY_PPI; + +#define AMI_MRC_INFO_HOB_GUID \ + {0xa6351a87, 0x2965, 0x4718, 0x88, 0xc7, 0x0b, 0x5b, 0x5a, 0xc0, 0xb5, 0xe4} + +#define AMI_NB_MRC_INFO_GUID \ + {0x6737934b, 0xa27e, 0x4c05, 0xad, 0x5b, 0x6a, 0xb8, 0x62, 0x73, 0x68, 0x0b} + +//85226559-0def-48d8-a8c9-b746d6a4df01 +#define AMI_MEMORY_ERROR_REPORT_PPI_GUID \ + { 0x85226559, 0x0def, 0x48d8, 0xa8, 0xc9, 0xb7, 0x46, 0xd6, 0xa4, 0xdf, 0x01 } + +// {7D971640-6815-408a-AC4F-BCB7A3BD9336} +#define AMI_NB_PEG_INFO_GUID \ + { 0x7d971640, 0x6815, 0x408a, 0xac, 0x4f, 0xbc, 0xb7, 0xa3, 0xbd, 0x93, 0x36 } + +// {E1E2A446-0365-4c65-919C-0371C3F9F5FF} +#define AMI_NB_PEG_GEN3_PRESET_SEARCH_GUID \ + { 0xe1e2a446, 0x365, 0x4c65, 0x91, 0x9c, 0x03, 0x71, 0xc3, 0xf9, 0xf5, 0xff } + + +#define NB_MRC_INFO_VARIABLE L"NBMrcInfo" + +typedef struct _EFI_PEI_SET_NB_SID_PPI EFI_PEI_SET_NB_SID_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_NB_SUBID_SET) ( + IN EFI_PEI_SERVICES **PeiServices +); + +typedef struct _EFI_PEI_SET_NB_SID_PPI { + EFI_PEI_NB_SUBID_SET PeiSetNBSubId; +} EFI_PEI_SET_NB_SID_PPI; + +typedef struct _EFI_PEI_NB_CPU_ONLY_RESET_PPI EFI_PEI_NB_CPU_ONLY_RESET_PPI; + +typedef VOID (EFIAPI *EFI_PEI_NB_CPU_ONLY_RESET) ( + IN EFI_PEI_SERVICES **PeiServices +); + +typedef +EFI_STATUS +(EFIAPI *PEI_AMI_MEMORY_ERROR_READ) ( + IN EFI_PEI_SERVICES **PeiServices, ///< Pointer to PeiServices + IN struct _PEI_MEMORY_ERROR_REPORT_PPI *This, ///< Pointer to the PPI structure + IN OUT UINT32 MemErrData ///< Memory Error Data Buffer +); + +typedef struct _EFI_PEI_NB_CPU_ONLY_RESET_PPI { + EFI_PEI_NB_CPU_ONLY_RESET GenerateCpuOnlyReset; +} EFI_PEI_NB_CPU_ONLY_RESET_PPI; + +typedef enum { + FreqAuto = 0, + Freq800 = 800, + Freq1067 = 1067, + Freq1333 = 1333, + Freq1600 = 1600, + Freq1867 = 1867, + Freq2133 = 2133, + FreqUnSupport +} MemFrequency; + + +// Porting Request. +typedef struct { + UINT32 dRegEBP; + UINT32 dRegEBX; + UINT16 wMmioSSKPD; + UINT8 bMmioC0DRT1; + UINT8 bMmioC1DRT1; + UINT8 bRCVENMT; + UINT32 dMmioC0REOST; + UINT32 dMmioC1REOST; +} NB_MRC_INFO; + +typedef struct { + EFI_HOB_GUID_TYPE Guid; + NB_MRC_INFO pMrcInfo; +} MRC_INFO_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Guid; + UINT8 tCKminMTBUnits; +} MRC_DEFAULT_HOB; + +#ifndef _PEI_HOB_H_ +#ifndef __HOB__H__ +typedef struct _EFI_HOB_GENERIC_HEADER { + UINT16 HobType; + UINT16 HobLength; + UINT32 Reserved; +} EFI_HOB_GENERIC_HEADER; + +typedef struct _EFI_HOB_GUID_TYPE { + EFI_HOB_GENERIC_HEADER Header; + EFI_GUID Name; +} EFI_HOB_GUID_TYPE; +#endif +#endif + +typedef struct { + EFI_HOB_GUID_TYPE Header; + UINT8 PegDeOverride[3]; +} NB_PEG_INFO_HOB; + +typedef struct _AMI_NB_PCI_SSID_TABLE_STRUCT AMI_NB_PCI_SSID_TABLE_STRUCT; + +typedef struct _AMI_NB_PCI_SSID_TABLE_STRUCT { + UINT64 PciAddr; + UINT32 Sid; +} AMI_NB_PCI_SSID_TABLE_STRUCT; + +typedef struct _AMI_NB_PCH_SKU_DEVICE_ID_TABLE_STRUCT { + UINT16 VenderID; + UINT16 DeviceID; +} AMI_NB_PCH_SKU_DEVICE_ID_TABLE_STRUCT; + +typedef struct _AMI_PEI_NB_CUSTOM_PPI AMI_PEI_NB_CUSTOM_PPI; + +typedef struct _AMI_PEI_NB_CUSTOM_PPI { + AMI_NB_PCI_SSID_TABLE_STRUCT *SsidTable; +} AMI_PEI_NB_CUSTOM_PPI; + +typedef struct _PEI_MEMORY_ERROR_REPORT_PPI { + PEI_AMI_MEMORY_ERROR_READ AmiMemoryErrorRead; +} PEI_MEMORY_ERROR_REPORT_PPI; + +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Include/PPI/OHCIPPI.cif b/Include/PPI/OHCIPPI.cif new file mode 100644 index 0000000..8ef7edb --- /dev/null +++ b/Include/PPI/OHCIPPI.cif @@ -0,0 +1,8 @@ +<component> + name = "OHCI PPI" + category = ModulePart + LocalRoot = "INCLUDE\PPI" + RefName = "OHCI PPI" +[files] +"\OhciPPI.h" +<endComponent> diff --git a/Include/PPI/OhciPPI.h b/Include/PPI/OhciPPI.h new file mode 100644 index 0000000..73fa912 --- /dev/null +++ b/Include/PPI/OhciPPI.h @@ -0,0 +1,67 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// +// $Header: /Alaska/SOURCE/Modules/USBRecovery/OhciPPI.h 3 7/10/08 6:36p Michaela $ +// +// $Revision: 3 $ +// +// $Date: 7/10/08 6:36p $ +// +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/USBRecovery/OhciPPI.h $ +// +// 3 7/10/08 6:36p Michaela +// Updated to support OHCI controllers +// +// 2 9/22/06 12:22p Sivagarn +// - Included appropriate headers for flies and functions +// - Updated copyright messages +// +// +//********************************************************************** + +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: OhciPpi.h +// +// Description: This header file contains the PPI definition for the OHCI +// host controller PPI +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef _PEI_OHCIPPI_H_ +#define _PEI_OHCIPPI_H_ + + +#endif + +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/PPI.cif b/Include/PPI/PPI.cif new file mode 100644 index 0000000..08d2f54 --- /dev/null +++ b/Include/PPI/PPI.cif @@ -0,0 +1,30 @@ +<component> + name = "PPI" + category = ModulePart + LocalRoot = "Include\PPI\" + RefName = "PPI" +[files] +"AmiKeyCodePpi.h" +"CpuIo.h" +"PciCfg.h" +"PciCfg2.h" +"SmBus.h" +"SmBus2.h" +"Stall.h" +"ProgressCode.h" +"ReadOnlyVariable.h" +"ReadOnlyVariable2.h" +"Reset.h" +"BootScriptExecuter.h" +"LoadFile.h" +"S3Resume.h" +"S3Resume2.h" +"SmmControl.h" +"RecoveryModule.h" +"LoadedImagePpi.h" +"Decompress.h" +"TemporaryRamSupport.h" +"FirmwareVolumeInfo.h" +"ReportStatusCodeHandler.h" +"Capsule.h" +<endComponent> diff --git a/Include/PPI/PciCfg.h b/Include/PPI/PciCfg.h new file mode 100644 index 0000000..088d3fd --- /dev/null +++ b/Include/PPI/PciCfg.h @@ -0,0 +1,111 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/PciCfg.h 7 6/16/11 3:18p Felixp $ +// +// $Revision: 7 $ +// +// $Date: 6/16/11 3:18p $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/PciCfg.h $ +// +// 7 6/16/11 3:18p Felixp +// Surround backward compatibility definitions with #if +// BACKWARD_COMPATIBLE_MODE +// +// 6 5/27/11 5:52p Felixp +// Headers are updated to improve separation of the Framework and PI +// interfaces. +// The definitions that will be removed in the future versions are marked +// with the comments. +// +// 5 2/05/11 2:09p Artems +// Added PI 1.0 compatibility definitions +// +// 4 3/13/06 1:16a Felixp +// +// 3 6/06/05 1:24p Felixp +// +// 2 6/03/05 3:44p Felixp +// Updated to support changes introduced in PEI CIS 0.91 +// +// 1 1/28/05 12:44p Felixp +// +// 1 12/23/04 9:41a Felixp +// +// 5 12/18/03 3:08p Robert +// +// 4 12/18/03 2:46p Robert +// +// 3 12/16/03 4:03p Robert +// +// 2 12/15/03 4:21p Robert +// +// 1 12/11/03 5:36p Robert +// Initial Check in of the PCI Cfg PPI +// +//***************************************************************************** +//<AMI_FHDR_START> +// +// Name: PciCfg.h +// +// Description: This file is an include file used to define the PPI for the +// PCI CFG PPI. For questions about the specification refer to the PEI CIS +// +//<AMI_FHDR_END> +//***************************************************************************** +#ifndef _PCI_CFG_PPI_H_ +#define _PCI_CFG_PPI_H_ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#if BACKWARD_COMPATIBLE_MODE +#include <Ppi/PciCfg2.h> +#if PI_SPECIFICATION_VERSION >= 0x00010000 +//Compatibility definition +#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID EFI_PEI_PCI_CFG2_PPI_GUID +#endif +#endif + +//Remove the #ifndef-clause when backward compatibility definitions above are removed. +#ifndef EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID +#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \ + { 0xe1f2eba0, 0xf7b9, 0x4a26, 0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } +#endif + +GUID_VARIABLE_DECLARATION(gPeiPciCfgPpiInServiceTableGuid,EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID); + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/PciCfg2.h b/Include/PPI/PciCfg2.h new file mode 100644 index 0000000..c527c49 --- /dev/null +++ b/Include/PPI/PciCfg2.h @@ -0,0 +1,76 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/PciCfg2.h 1 5/27/11 5:50p Felixp $ +// +// $Revision: 1 $ +// +// $Date: 5/27/11 5:50p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/PciCfg2.h $ +// +// 1 5/27/11 5:50p Felixp +// +// 6 1/13/10 2:13p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: PciCfg2.h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __PCI_CFG2_PPI__H__ +#define __PCI_CFG2_PPI__H__ +#ifdef __cplusplus +extern "C" { +#endif + +#include <PEI.h> + +#if PI_SPECIFICATION_VERSION<0x00010000 +//Compatibility definition +//#define EFI_PEI_PCI_CFG2_PPI_GUID EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID +#define EFI_PEI_PCI_CFG2_PPI_GUID \ + { 0xe1f2eba0, 0xf7b9, 0x4a26, 0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } +#else +#define EFI_PEI_PCI_CFG2_PPI_GUID \ + { 0x57a449a, 0x1fdc, 0x4c06, 0xbf, 0xc9, 0xf5, 0x3f, 0x6a, 0x99, 0xbb, 0x92 } +#endif + +GUID_VARIABLE_DECLARATION(gEfiPciCfg2PpiGuid,EFI_PEI_PCI_CFG2_PPI_GUID); + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/PeiGetUCtrl.h b/Include/PPI/PeiGetUCtrl.h new file mode 100644 index 0000000..ce143ab --- /dev/null +++ b/Include/PPI/PeiGetUCtrl.h @@ -0,0 +1,96 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// +// $Header: /Alaska/SOURCE/Modules/USBRecovery/PeiGetUCtrl.h 3 7/10/08 6:34p Michaela $ +// +// $Revision: 3 $ +// +// $Date: 7/10/08 6:34p $ +// +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/USBRecovery/PeiGetUCtrl.h $ +// +// 3 7/10/08 6:34p Michaela +// Updated to support OHCI controllers +// +// 2 9/22/06 12:25p Sivagarn +// - Included appropriate headers for flies and functions +// - Updated copyright messages +// +//***************************************************************************** + +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: PeiGetUCtrl.H +// +// Description: This header file contains PPI information for the Get UHCI +// controller PPI +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef __PEIGETUCTRL__H__ +#define __PEIGETUCTRL__H__ +#ifdef __cplusplus +extern "C" { +#endif + +// {C12DAA49-A061-47fc-955E-EAE34513511D} +#define EFI_PEI_GET_UHCI_CTRLER_GUID \ + {0x3bc1f6de, 0x693e, 0x4547, 0xa3, 0x0, 0x21, 0x82, 0x3c, 0xa4, 0x20,\ + 0xb2} + + +typedef struct _EFI_PEI_USB_CONTROLLER_PPI EFI_PEI_USB_CONTROLLER_PPI; + +#define PEI_UHCI_CONTROLLER 0x01 +#define PEI_OHCI_CONTROLLER 0x02 + +typedef EFI_STATUS (EFIAPI * EFI_PEI_GET_UHCI_CTRLER)( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_USB_CONTROLLER_PPI *This, + IN UINT8 UsbControllerId, + IN UINTN *ControllerType, + IN UINTN *IoBaseAddress +); + +struct _EFI_PEI_USB_CONTROLLER_PPI +{ + EFI_PEI_GET_UHCI_CTRLER GetUhciControllerPpi; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/ProgressCode.h b/Include/PPI/ProgressCode.h new file mode 100644 index 0000000..f89f747 --- /dev/null +++ b/Include/PPI/ProgressCode.h @@ -0,0 +1,90 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/ProgressCode.h 2 3/13/06 1:16a Felixp $ +// +// $Revision: 2 $ +// +// $Date: 3/13/06 1:16a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/ProgressCode.h $ +// +// 2 3/13/06 1:16a Felixp +// +// 1 1/28/05 12:44p Felixp +// +// 2 1/18/05 3:21p Felixp +// PrintDebugMessage renamed to Trace +// +// 1 12/23/04 9:41a Felixp +// +// 1 1/15/04 5:18p Robert +// +//***************************************************************************** +//<AMI_FHDR_START> +// +// Name: +// +// Description: This file contains +// +//<AMI_FHDR_END> +//***************************************************************************** +#ifndef _PEI_PROGRESS_CODE_PPI_H +#define _PEI_PROGRESS_CODE_PPI_H +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_REPORT_PROGRESS_CODE_PPI_GUID \ + {0x229832d3, 0x7a30, 0x4b36, 0xb8, 0x27, 0xf4, 0xc, 0xb7, 0xd4, 0x54, 0x36} + +GUID_VARIABLE_DECLARATION(gPeiStatusCodePpiGuid,EFI_PEI_REPORT_PROGRESS_CODE_PPI_GUID); + +typedef +EFI_STATUS (EFIAPI *PEI_REPORT_STATUS_CODE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_STATUS_CODE_TYPE CodeType, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN EFI_GUID *CallerId OPTIONAL, + IN EFI_STATUS_CODE_DATA *Data OPTIONAL + ); + +typedef +struct _EFI_PEI_PROGRESS_CODE_PPI { + PEI_REPORT_STATUS_CODE ReportStatusCode; +} EFI_PEI_PROGRESS_CODE_PPI; + + +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/ReadOnlyVariable.h b/Include/PPI/ReadOnlyVariable.h new file mode 100644 index 0000000..465dba4 --- /dev/null +++ b/Include/PPI/ReadOnlyVariable.h @@ -0,0 +1,122 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2007, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/ReadOnlyVariable.h 7 6/16/11 3:18p Felixp $ +// +// $Revision: 7 $ +// +// $Date: 6/16/11 3:18p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/ReadOnlyVariable.h $ +// +// 7 6/16/11 3:18p Felixp +// Surround backward compatibility definitions with #if +// BACKWARD_COMPATIBLE_MODE +// +// 6 5/27/11 5:52p Felixp +// Headers are updated to improve separation of the Framework and PI +// interfaces. +// The definitions that will be removed in the future versions are marked +// with the comments. +// +// 5 8/30/07 11:06p Felixp +// EFI_PEI_READ_ONLY_VARIABLE2_PPI added +// +// 4 3/13/06 1:16a Felixp +// +// 3 3/22/05 9:23p Felixp +// +// 2 3/04/05 10:26a Mandal +// +// 1 1/28/05 12:44p Felixp +// +// 2 1/18/05 3:21p Felixp +// PrintDebugMessage renamed to Trace +// +// 1 12/23/04 9:41a Felixp +// +// 1 1/22/04 12:47p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: ReadOnlyVariable.h +// +// Description: Defines Read Only Variable PPI +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __ReadOnlyVariable__H__ +#define __ReadOnlyVariable__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID \ + {0x3cdc90c6, 0x13fb, 0x4a75, 0x9e, 0x79, 0x59, 0xe9, 0xdd, 0x78, 0xb9, 0xfa} + +GUID_VARIABLE_DECLARATION(gPeiReadOnlyVariablePpiGuid,EFI_PEI_READ_ONLY_VARIABLE_PPI_GUID); + +typedef EFI_STATUS (EFIAPI *EFI_PEI_GET_VARIABLE) +( + IN EFI_PEI_SERVICES **PeiServices, + IN CHAR16 *VariableName, + IN EFI_GUID *VendorGuid, + OUT UINT32 *Attributes OPTIONAL, + IN OUT UINTN *DataSize, + OUT VOID *Data +); + +typedef EFI_STATUS (EFIAPI *EFI_PEI_GET_NEXT_VARIABLE_NAME) +( + IN EFI_PEI_SERVICES **PeiServices, + IN OUT UINTN *VariableNameSize, + IN OUT CHAR16 *VariableName, + IN OUT EFI_GUID *VendorGuid +); + +//PPI Interface Structure +typedef struct _EFI_PEI_READ_ONLY_VARIABLE_PPI { + EFI_PEI_GET_VARIABLE GetVariable; + EFI_PEI_GET_NEXT_VARIABLE_NAME GetNextVariableName; +} EFI_PEI_READ_ONLY_VARIABLE_PPI; +//=============================================================================== +#if BACKWARD_COMPATIBLE_MODE +#include <Ppi/ReadOnlyVariable2.h> + +GUID_VARIABLE_DECLARATION(gPeiReadOnlyVariable2PpiGuid,EFI_PEI_READ_ONLY_VARIABLE2_PPI_GUID); +#endif + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2007, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/ReadOnlyVariable2.h b/Include/PPI/ReadOnlyVariable2.h new file mode 100644 index 0000000..2c1397a --- /dev/null +++ b/Include/PPI/ReadOnlyVariable2.h @@ -0,0 +1,101 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/ReadOnlyVariable2.h 3 6/16/11 5:30p Felixp $ +// +// $Revision: 3 $ +// +// $Date: 6/16/11 5:30p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/ReadOnlyVariable2.h $ +// +// 3 6/16/11 5:30p Felixp +// FORWARD_COMPATIBLE_MODE definitions removed (they are not needed in the +// Core version of the header). +// +// 1 6/16/11 4:56p Felixp +// +// 2 5/27/11 6:02p Felixp +// +// 1 5/27/11 5:50p Felixp +// +// 6 1/13/10 2:13p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: ReadOnlyVariable2.h +// +// Description: ReadOnlyVariable2 PPI Definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __READ_ONLY_VARIABLE2_PPI__H__ +#define __READ_ONLY_VARIABLE2_PPI__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <Pei.h> + +#define EFI_PEI_READ_ONLY_VARIABLE2_PPI_GUID \ + { 0x2ab86ef5, 0xecb5, 0x4134, 0xb5, 0x56, 0x38, 0x54, 0xca, 0x1f, 0xe1, 0xb4 } + +GUID_VARIABLE_DECLARATION(gEfiPeiReadOnlyVariable2PpiGuid, EFI_PEI_READ_ONLY_VARIABLE2_PPI_GUID); + +typedef struct _EFI_PEI_READ_ONLY_VARIABLE2_PPI EFI_PEI_READ_ONLY_VARIABLE2_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_GET_VARIABLE2) +( + IN CONST EFI_PEI_READ_ONLY_VARIABLE2_PPI *This, + IN CONST CHAR16 *VariableName, + IN CONST EFI_GUID *VariableGuid, + OUT UINT32 *Attributes, + IN OUT UINTN *DataSize, + OUT VOID *Data +); + +typedef EFI_STATUS (EFIAPI *EFI_PEI_GET_NEXT_VARIABLE_NAME2) +( + IN CONST EFI_PEI_READ_ONLY_VARIABLE2_PPI *This, + IN OUT UINTN *VariableNameSize, + IN OUT CHAR16 *VariableName, + IN OUT EFI_GUID *VariableGuid +); + +struct _EFI_PEI_READ_ONLY_VARIABLE2_PPI { + EFI_PEI_GET_VARIABLE2 GetVariable; + EFI_PEI_GET_NEXT_VARIABLE_NAME2 NextVariableName; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/RecoveryModule.h b/Include/PPI/RecoveryModule.h new file mode 100644 index 0000000..606bc4d --- /dev/null +++ b/Include/PPI/RecoveryModule.h @@ -0,0 +1,76 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/RecoveryModule.h 2 3/13/06 1:16a Felixp $ +// +// $Revision: 2 $ +// +// $Date: 3/13/06 1:16a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/RecoveryModule.h $ +// +// 2 3/13/06 1:16a Felixp +// +// 1 12/01/05 9:48a Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: RecoveryModule.h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __RECOVERY_MODULE__H__ +#define __RECOVERY_MODULE__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include<PEI.h> + +#define EFI_PEI_RECOVERY_MODULE_PPI_GUID \ + {0xFB6D9542, 0x612D, 0x4f45, 0x87, 0x2F, 0x5C, 0xFF, 0x52, 0xE9, 0x3D, 0xCF} + +GUID_VARIABLE_DECLARATION(gPeiRecoveryModulePpiGuid,EFI_PEI_RECOVERY_MODULE_PPI_GUID); + +typedef EFI_STATUS (EFIAPI *EFI_PEI_LOAD_RECOVERY_CAPSULE)( + IN EFI_PEI_SERVICES **PeiServices, + IN struct _EFI_PEI_RECOVERY_MODULE_PPI *This +); + +typedef struct _EFI_PEI_RECOVERY_MODULE_PPI { + EFI_PEI_LOAD_RECOVERY_CAPSULE LoadRecoveryCapsule; +} EFI_PEI_RECOVERY_MODULE_PPI; +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2005, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/RecoveryPpi.cif b/Include/PPI/RecoveryPpi.cif new file mode 100644 index 0000000..359e2e5 --- /dev/null +++ b/Include/PPI/RecoveryPpi.cif @@ -0,0 +1,11 @@ +<component> + name = "RecoveryPpi" + category = ModulePart + LocalRoot = "Include\PPI\" + RefName = "RecoveryPpi" +[files] +"DeviceRecoveryModule.h" +"DeviceRecoveryBlockIo.h" +"AtaController.h" +"SerialDevice.h" +<endComponent> diff --git a/Include/PPI/ReportStatusCodeHandler.h b/Include/PPI/ReportStatusCodeHandler.h new file mode 100644 index 0000000..d5ebd10 --- /dev/null +++ b/Include/PPI/ReportStatusCodeHandler.h @@ -0,0 +1,97 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/ReportStatusCodeHandler.h 1 6/16/11 9:45a Felixp $ +// +// $Revision: 1 $ +// +// $Date: 6/16/11 9:45a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/ReportStatusCodeHandler.h $ +// +// 1 6/16/11 9:45a Felixp +// +// 6 1/13/10 2:13p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: ReportStatusCodeHandler.h +// +// Description: Report Status Code Handler PPI definitions header. +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __REPORT_STATUS_CODE_HANDLER_PPI_H__ +#define __REPORT_STATUS_CODE_HANDLER_PPI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +#define EFI_PEI_RSC_HANDLER_PPI_GUID \ + { 0x65d394, 0x9951, 0x4144, 0x82, 0xa3, 0xa, 0xfc, 0x85, 0x79, 0xc2, 0x51 } + +GUID_VARIABLE_DECLARATION(gEfiPeiRscHandlerPpiGuid, EFI_PEI_RSC_HANDLER_PPI_GUID); + +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_RSC_HANDLER_CALLBACK)( + IN CONST EFI_PEI_SERVICES **PeiServices, + IN EFI_STATUS_CODE_TYPE Type, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN CONST EFI_GUID *CallerId, + IN CONST EFI_STATUS_CODE_DATA *Data +); + +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_RSC_HANDLER_REGISTER)( + IN EFI_PEI_RSC_HANDLER_CALLBACK Callback //A pointer to a function of type EFI_PEI_RSC_HANDLER_CALLBACK that + //is called when a call to ReportStatusCode() occurs. +); + +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_RSC_HANDLER_UNREGISTER)( + IN EFI_PEI_RSC_HANDLER_CALLBACK Callback //A pointer to a function of type EFI_PEI_RSC_HANDLER_CALLBACK that + // is to be unregistered +); + +typedef struct _EFI_PEI_RSC_HANDLER_PPI { + EFI_PEI_RSC_HANDLER_REGISTER Register; //Register the callback for notification of status code messages. + EFI_PEI_RSC_HANDLER_UNREGISTER Unregister; //Unregister the callback. +} EFI_PEI_RSC_HANDLER_PPI; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif // __REPORT_STATUS_CODE_HANDLER_PPI_H__ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/Reset.h b/Include/PPI/Reset.h new file mode 100644 index 0000000..38840e5 --- /dev/null +++ b/Include/PPI/Reset.h @@ -0,0 +1,87 @@ +//************************************************************************ +//************************************************************************ +//** ** +//** (C)Copyright 1985-2004, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************ +//************************************************************************ +//************************************************************************ +// $Header: /Alaska/BIN/Core/Include/PPI/Reset.h 2 3/13/06 1:16a Felixp $ +// +// $Revision: 2 $ +// +// $Date: 3/13/06 1:16a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/Reset.h $ +// +// 2 3/13/06 1:16a Felixp +// +// 1 1/28/05 12:44p Felixp +// +// 1 12/23/04 9:41a Felixp +// +// 2 2/16/04 11:48a Robert +// +// 1 2/13/04 11:15a Robert +// +//***************************************************************************** +//<AMI_FHDR_START> +// +// Name: Reset.h +// +// Description: This file is used to define the Reset PPI used to reset the +// system when the PeiServices ResetSystem function is called +// +//<AMI_FHDR_END> +//***************************************************************************** +#ifndef _RESET_PPI_H_ +#define _RESET_PPI_H_ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_RESET_PPI_GUID \ + {0xef398d58, 0x9dfd, 0x4103, 0xbf, 0x94, 0x78, 0xc6, 0xf4, 0xfe, 0x71, 0x2f} + +GUID_VARIABLE_DECLARATION(gPeiResetPpiGuid, EFI_PEI_RESET_PPI_GUID); + +typedef struct _EFI_PEI_RESET_PPI EFI_RESET_PPI; + +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_RESET) ( + IN EFI_PEI_SERVICES **PeiServices + ); + + +typedef struct _EFI_PEI_RESET_PPI { + EFI_PEI_RESET ResetSystem; + } EFI_PEI_RESET_PPI; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2004, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/S3Resume.h b/Include/PPI/S3Resume.h new file mode 100644 index 0000000..5c0ed52 --- /dev/null +++ b/Include/PPI/S3Resume.h @@ -0,0 +1,79 @@ +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2003, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/S3Resume.h 3 3/13/06 1:16a Felixp $ +// +// $Revision: 3 $ +// +// $Date: 3/13/06 1:16a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/S3Resume.h $ +// +// 3 3/13/06 1:16a Felixp +// +// 2 3/25/05 4:02p Markw +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: S3Resume.h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __S3_RESUME_PPI__H__ +#define __S3_RESUME_PPI__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_S3_RESUME_PPI_GUID \ + {0x4426CCB2,0xE684,0x4a8a,0xAE,0x40,0x20,0xD4,0xB0,0x25,0xB7,0x10} + +GUID_VARIABLE_DECLARATION(gPeiS3ResumePpiGuid,EFI_PEI_S3_RESUME_PPI_GUID); + +typedef struct _EFI_PEI_S3_RESUME_PPI EFI_PEI_S3_RESUME_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG) ( + IN EFI_PEI_SERVICES **PeiServices +); + +struct _EFI_PEI_S3_RESUME_PPI { + EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG S3RestoreConfig; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2003, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// diff --git a/Include/PPI/S3Resume2.h b/Include/PPI/S3Resume2.h new file mode 100644 index 0000000..6fa6d55 --- /dev/null +++ b/Include/PPI/S3Resume2.h @@ -0,0 +1,78 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/S3Resume2.h 1 5/27/11 5:50p Felixp $ +// +// $Revision: 1 $ +// +// $Date: 5/27/11 5:50p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/S3Resume2.h $ +// +// 1 5/27/11 5:50p Felixp +// +// 6 1/13/10 2:13p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: S3Resume2.h +// +// Description: S3Resume2 PPI definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __S3_RESUME2_PPI__H__ +#define __S3_RESUME2_PPI__H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_S3_RESUME2_PPI_GUID \ + { 0x6D582DBC, 0xDB85, 0x4514, 0x8F, 0xCC, 0x5A, 0xDF, 0x62, 0x27, 0xB1, 0x47 } + +GUID_VARIABLE_DECLARATION(gEfiPeiS3Resume2PpiGuid,EFI_PEI_S3_RESUME2_PPI_GUID); + +typedef struct _EFI_PEI_S3_RESUME2_PPI EFI_PEI_S3_RESUME2_PPI; + +typedef EFI_STATUS (EFIAPI *EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG2)( + IN EFI_PEI_S3_RESUME2_PPI *This +); + +struct _EFI_PEI_S3_RESUME2_PPI { + EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG2 S3RestoreConfig2; +}; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/SBPPI.h b/Include/PPI/SBPPI.h new file mode 100644 index 0000000..faccd3b --- /dev/null +++ b/Include/PPI/SBPPI.h @@ -0,0 +1,142 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + +//************************************************************************* +// $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/SB PPI/SBPPI.h 3 4/24/13 2:16a Scottyang $ +// +// $Revision: 3 $ +// +// $Date: 4/24/13 2:16a $ +//************************************************************************* +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Chipset/SB PPI/SBPPI.h $ +// +// 3 4/24/13 2:16a Scottyang +// [TAG] None +// [Category] Improvement +// [Description] Porting GPI interrupt by LPT-LP EDS 1.5. +// [Files] SB.sdl, SB.H, SBPPI.h, SBPEI.c +// +// 2 7/27/12 6:14a Victortu +// [TAG] None +// [Category] Improvement +// [Description] Update to support ULT Platform. +// [Files] SB.H, SB.mak, SB.sdl, SB.sd, SBSetup.c, +// AcpiModeEnable.c, SBDxe.c, SBPEI.c, SBSMI.c, SleepSmi.c, +// SmiHandlerPorting.c, SmiHandlerPorting2.c, SBPPI.h, Pch.sdl +// +// 1 2/08/12 8:25a Yurenlai +// Intel Lynx Point/SB eChipset initially releases. +// +//************************************************************************* +//<AMI_FHDR_START> +// +// Name: SBPPI.h +// +// Description: This header file contains the PPI definition for the SB. +// +//<AMI_FHDR_END> +//************************************************************************* + +#ifndef FILE_PEI_SBINIT_POLICY_PPI_H_ +#define FILE_PEI_SBINIT_POLICY_PPI_H_ + +// {95E8152B-1B98-4f11-8A77-DB26583EBC42} +#define AMI_PEI_SBINIT_POLICY_PPI_GUID \ + {0x95e8152b, 0x1b98, 0x4f11, 0x8a, 0x77, 0xdb, 0x26, 0x58, 0x3e, 0xbc, 0x42} + +#define AMI_PEI_SB_OEM_PLATFORM_POLICY_OVERRIDE_PPI_GUID \ + {0x61187967, 0x9a77, 0x419d, 0xaa, 0xea, 0x64, 0xdd, 0x56, 0x19, 0x08, 0x15} + +// {38965BB5-8097-40f5-B742-8CC14A649B64} +#define AMI_PEI_SB_CUSTOM_PPI_GUID \ + {0x38965bb5, 0x8097, 0x40f5, 0xb7, 0x42, 0x8c, 0xc1, 0x4a, 0x64, 0x9b, 0x64} +GUID_VARIABLE_DECLARATION(gAmiPeiSBCustomPpiGuid, AMI_PEI_SB_CUSTOM_PPI_GUID); + +typedef struct _AMI_PEI_SBINIT_POLICY_PPI AMI_PEI_SBINIT_POLICY_PPI; + +typedef struct _AMI_PEI_SBINIT_POLICY_PPI { + UINTN unFlag; +} AMI_PEI_SBINIT_POLICY_PPI; + +typedef struct _AMI_SB_PCI_SSID_TABLE_STRUCT AMI_SB_PCI_SSID_TABLE_STRUCT; + +typedef struct _AMI_SB_PCI_DEVICES_TABLE_STRUCT { + UINT64 PciAddr; + UINT8 PciSidReg; +} AMI_SB_PCI_DEVICES_TABLE_STRUCT; + +typedef struct _AMI_SB_PCI_SSID_TABLE_STRUCT { + UINT64 PciAddr; + UINT32 Sid; +} AMI_SB_PCI_SSID_TABLE_STRUCT; + +typedef struct _AMI_GPIO_INIT_TABLE_STRUCT AMI_GPIO_INIT_TABLE_STRUCT; + +typedef union _AMI_GPIO_STRUCT +{ + UINT16 Dword; + struct + { + UINT16 USE:1; + UINT16 IO :1; + UINT16 LVL:1; + UINT16 INV:1; + UINT16 BLK:1; + UINT16 RST:1; + UINT16 OWN:1; + UINT16 LEB:1; + UINT16 DIS:1; + UINT16 WP :2; + UINT16 INT:1; + UINT16 RESERVED:4; + } Fileds; +} AMI_GPIO_STRUCT; + +typedef struct _AMI_GPIO_INIT_TABLE_STRUCT { + UINT16 GpioNo; + AMI_GPIO_STRUCT GpioCfg; +} AMI_GPIO_INIT_TABLE_STRUCT; + +typedef struct _AMI_GPIO_INIT_PPI AMI_GPIO_INIT_PPI; + +typedef struct _AMI_GPIO_INIT_PPI { + UINT32 GpioBaseAddr; + AMI_GPIO_INIT_TABLE_STRUCT *GpioTable; + BOOLEAN InitDefaultGpioSetting; +} AMI_GPIO_INIT_PPI; + +typedef struct _AMI_PEI_SB_CUSTOM_PPI AMI_PEI_SB_CUSTOM_PPI; + +typedef struct _AMI_PEI_SB_CUSTOM_PPI { + AMI_GPIO_INIT_PPI *GpioInit; + AMI_SB_PCI_SSID_TABLE_STRUCT *SsidTable; +} AMI_PEI_SB_CUSTOM_PPI; + +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* diff --git a/Include/PPI/SerialDevice.h b/Include/PPI/SerialDevice.h new file mode 100644 index 0000000..dc42755 --- /dev/null +++ b/Include/PPI/SerialDevice.h @@ -0,0 +1,110 @@ +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* +// $Header: /Alaska/BIN/Core/Modules/Recovery/SerialDevice.h 2 2/13/12 4:14a Rajeshms $ +// +// $Revision: 2 $ +// +// $Date: 2/13/12 4:14a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Modules/Recovery/SerialDevice.h $ +// +// 2 2/13/12 4:14a Rajeshms +// [TAG] EIP80704 +// [Category] New Feature +// [Description] Serial Recovery support through PCI Serial Port . +// [Files] PciSerialRecovery.mak, PciSerialRecovery.sdl, +// PciSerialRecovery.c, PciSerialRecovery.h, PciSerialRecovery.chm, +// PciSerialRecovery.dxs, SerialRecovery.c, SerialDevice.h +// +// 1 7/10/09 10:40a Rameshr +// Initial Check-in +// -Recovery from Multiple Serial Device support Added +// +// +//***************************************************************************** +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: SerialDevice.h +// +// Description: Protocol Header for the Serial Recovery Device. +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef _PEI_SERIAL_DEVICE_PPI_H +#define _PEI_SERIAL_DEVICE_PPI_H +#ifdef __cplusplus +extern "C" { +#endif + +#include "EFI.h" +#include "PEI.h" + +#define PEI_RECOVERY_SERIAL_MODE_PPI_GUID \ + { 0x5e7063d3, 0xc12, 0x475b, 0x98, 0x35, 0x14, 0xab, 0xb1, 0xcb, 0xe, 0xe9 } + + +enum { + SerialDataReg, + InteruptEnableReg, + FifoControlReg, + LineControlReg, + ModemControlReg, + LineStatusReg, + ModemStatusReg +}; + +typedef struct _PEI_RECOVERY_SERIAL_MODE_PPI PEI_RECOVERY_SERIAL_MODE_PPI; + +typedef UINT8 (EFIAPI *SERIAL_READ) ( + IN PEI_RECOVERY_SERIAL_MODE_PPI *This, + IN UINT8 Offset +); + +typedef VOID (EFIAPI *SERIAL_WRITE) ( + IN PEI_RECOVERY_SERIAL_MODE_PPI *This, + IN UINT8 Offset, + IN UINT8 Data +); + +#pragma pack(1) +struct _PEI_RECOVERY_SERIAL_MODE_PPI { + UINT64 SerialDeviceBaseAddress; + SERIAL_READ ReadSerialDevice; + SERIAL_WRITE WriteSerialDevice; +}; +#pragma pack() + +#ifdef __cplusplus +} +#endif +#endif + +//************************************************************************* +//************************************************************************* +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//************************************************************************* +//************************************************************************* + diff --git a/Include/PPI/SmBus.h b/Include/PPI/SmBus.h new file mode 100644 index 0000000..3ef2363 --- /dev/null +++ b/Include/PPI/SmBus.h @@ -0,0 +1,167 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/SmBus.h 7 6/16/11 3:18p Felixp $ +// +// $Revision: 7 $ +// +// $Date: 6/16/11 3:18p $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/SmBus.h $ +// +// 7 6/16/11 3:18p Felixp +// Surround backward compatibility definitions with #if +// BACKWARD_COMPATIBLE_MODE +// +// 6 5/27/11 5:52p Felixp +// Headers are updated to improve separation of the Framework and PI +// interfaces. +// The definitions that will be removed in the future versions are marked +// with the comments. +// +// 5 1/16/09 9:49a Felixp +// SM Bus Protocol and PPI headers are updated. Common code moved into +// newly created header file (Include\SmBus.h). +// +// 4 9/04/07 12:31p Felixp +// Added EFI_PEI_SMBUS2_PPI GUID and structures as defined in Platform +// Initialization Specification version 1.0. +// +// 2 6/23/05 10:51a Robert +// Updated to reflect the new public spec from Intel +// +// 1 12/12/03 11:03a Robert +// Initial checkin of the SmBus PPI and the PPI subcomponent +// +//***************************************************************************** +//<AMI_FHDR_START> +// +// Name: SmBus.h.c +// +// Description: This file contains SmBus PPI definitions +// +//<AMI_FHDR_END> +//***************************************************************************** +#ifndef _SM_BUS_PPI_H +#define _SM_BUS_PPI_H +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> +#include <SmBus.h> + +//---------------------------------------------------------------------------- +// Definition for EFI_PEI_SMBUS_PPI +//---------------------------------------------------------------------------- +#define EFI_PEI_SMBUS_PPI_GUID \ + {0xabd42895, 0x78cf, 0x4872, 0x84, 0x44, 0x1b, 0x5c, 0x18, 0xb, 0xfb, 0xda} + +GUID_VARIABLE_DECLARATION(gPeiSmbusPpiGuid,EFI_PEI_SMBUS_PPI_GUID); + +typedef struct _EFI_PEI_SMBUS_PPI EFI_PEI_SMBUS_PPI; + + +//******************************************************* +// EFI_SMBUS_NOTIFY_FUNCTION +//******************************************************* +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_SMBUS_NOTIFY_FUNCTION) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_SMBUS_PPI *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN UINTN Data +); +//******************************************************* +// EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_SMBUS_PPI *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN EFI_SMBUS_DEVICE_COMMAND Command, + IN EFI_SMBUS_OPERATION Operation, + IN BOOLEAN PecCheck, + IN OUT UINTN *Length, + IN OUT VOID *Buffer + ); +//******************************************************* +// EFI_PEI_SMBUS_PPI_ARP_DEVICE +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS_PPI_ARP_DEVICE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_SMBUS_PPI *This, + IN BOOLEAN ArpAll, + IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL + IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL + ); +//******************************************************* +// EFI_PEI_SMBUS_PPI_GET_ARP_MAP +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS_PPI_GET_ARP_MAP) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_SMBUS_PPI *This, + IN OUT UINTN *Length, + IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap + ); +//******************************************************* +// EFI_PEI_SMBUS_PPI_NOTIFY +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS_PPI_NOTIFY) ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_SMBUS_PPI *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN UINTN Data, + IN EFI_PEI_SMBUS_NOTIFY_FUNCTION NotifyFunction + ); +//******************************************************* +// EFI_PEI_SMBUS_PPI +//******************************************************* +typedef struct _EFI_PEI_SMBUS_PPI { + EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION Execute; + EFI_PEI_SMBUS_PPI_ARP_DEVICE ArpDevice; + EFI_PEI_SMBUS_PPI_GET_ARP_MAP GetArpMap; + EFI_PEI_SMBUS_PPI_NOTIFY Notify; +} EFI_PEI_SMBUS_PPI; +//---------------------------------------------------------------------------- + +//---------------------------------------------------------------------------- +// Definition for EFI_PEI_SMBUS2_PPI +//---------------------------------------------------------------------------- +#if BACKWARD_COMPATIBLE_MODE +#include <Ppi/SmBus2.h> +#pragma warning ( disable : 4090 4028) +GUID_VARIABLE_DECLARATION(gPeiSmbus2PpiGuid,EFI_PEI_SMBUS2_PPI_GUID); +#endif + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2009, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/SmBus2.h b/Include/PPI/SmBus2.h new file mode 100644 index 0000000..c458fc5 --- /dev/null +++ b/Include/PPI/SmBus2.h @@ -0,0 +1,137 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/SmBus2.h 1 5/27/11 5:50p Felixp $ +// +// $Revision: 1 $ +// +// $Date: 5/27/11 5:50p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/SmBus2.h $ +// +// 1 5/27/11 5:50p Felixp +// +// 6 1/13/10 2:13p Felixp +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: SmBus2.h +// +// Description: SmBus2 PPI definition +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef __SMBUS2_PPI__H__ +#define __SMBUS2_PPI__H__ +#ifdef __cplusplus +extern "C" { +#endif + +#include <PEI.h> +#include <SmBus.h> + +#define EFI_PEI_SMBUS2_PPI_GUID \ + {0x9ca93627, 0xb65b, 0x4324, 0xa2, 0x2, 0xc0, 0xb4, 0x61, 0x76, 0x45, 0x43} + +GUID_VARIABLE_DECLARATION(gEfiPeiSmbus2PpiGuid, EFI_PEI_SMBUS2_PPI_GUID); + +typedef struct _EFI_PEI_SMBUS2_PPI EFI_PEI_SMBUS2_PPI; + +//******************************************************* +// EFI_PEI_SMBUS2_PPI_EXECUTE_OPERATION +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS2_PPI_EXECUTE_OPERATION) ( + IN CONST EFI_PEI_SMBUS2_PPI *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN EFI_SMBUS_DEVICE_COMMAND Command, + IN EFI_SMBUS_OPERATION Operation, + IN BOOLEAN PecCheck, + IN OUT UINTN *Length, + IN OUT VOID *Buffer + ); + + +//******************************************************* +// EFI_PEI_SMBUS2_PPI_ARP_DEVICE +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS2_PPI_ARP_DEVICE) ( + IN CONST EFI_PEI_SMBUS2_PPI *This, + IN BOOLEAN ArpAll, + IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL + IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL + ); + +//******************************************************* +// EFI_PEI_SMBUS2_PPI_GET_ARP_MAP +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS2_PPI_GET_ARP_MAP) ( + IN CONST EFI_PEI_SMBUS2_PPI *This, + IN OUT UINTN *Length, + IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap + ); + +//******************************************************* +// EFI_SMBUS_NOTIFY2_FUNCTION +//******************************************************* +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_SMBUS_NOTIFY2_FUNCTION) ( + IN CONST EFI_PEI_SMBUS2_PPI *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN UINTN Data +); + +//******************************************************* +// EFI_PEI_SMBUS_PPI_NOTIFY +//******************************************************* +typedef EFI_STATUS (EFIAPI *EFI_PEI_SMBUS2_PPI_NOTIFY) ( + IN EFI_PEI_SMBUS2_PPI *This, + IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress, + IN UINTN Data, + IN EFI_PEI_SMBUS_NOTIFY2_FUNCTION NotifyFunction + ); + +//******************************************************* +// EFI_PEI_SMBUS2_PPI +//******************************************************* +typedef struct _EFI_PEI_SMBUS2_PPI { + EFI_PEI_SMBUS2_PPI_EXECUTE_OPERATION Execute; + EFI_PEI_SMBUS2_PPI_ARP_DEVICE ArpDevice; + EFI_PEI_SMBUS2_PPI_GET_ARP_MAP GetArpMap; + EFI_PEI_SMBUS2_PPI_NOTIFY Notify; + EFI_GUID Identifier; +} EFI_PEI_SMBUS2_PPI; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/SmmControl.h b/Include/PPI/SmmControl.h new file mode 100644 index 0000000..0f94d9a --- /dev/null +++ b/Include/PPI/SmmControl.h @@ -0,0 +1,92 @@ +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2005, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/SmmControl.h 2 3/13/06 1:16a Felixp $ +// +// $Revision: 2 $ +// +// $Date: 3/13/06 1:16a $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/SmmControl.h $ +// +// 2 3/13/06 1:16a Felixp +// +// 1 6/21/05 7:12p Markw +// +//********************************************************************** +//<AMI_FHDR_START> +// +// Name: SmmControl.h +// +// Description: +// +//<AMI_FHDR_END> +//********************************************************************** +#ifndef _SMM_CONTROL_PPI_H__ +#define _SMM_CONTROL_PPI_H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define PEI_SMM_CONTROL_PPI_GUID \ + {0x61c68702,0x4d7e,0x4f43,0x8d,0xef,0xa7,0x43,0x5,0xce,0x74,0xc5} + +GUID_VARIABLE_DECLARATION(gPeiSmmControlPpiGuid,PEI_SMM_CONTROL_PPI_GUID); + +typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI; + +typedef EFI_STATUS (EFIAPI *PEI_SMM_ACTIVATE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_SMM_CONTROL_PPI *This, + IN OUT INT8 *ArgumentBuffer OPTIONAL, + IN OUT UINTN *ArgumentBufferSize OPTIONAL, + IN BOOLEAN Periodic OPTIONAL, + IN UINTN ActivationInterval OPTIONAL +); + +typedef EFI_STATUS (EFIAPI *PEI_SMM_DEACTIVATE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_SMM_CONTROL_PPI *This, + IN BOOLEAN Periodic OPTIONAL +); + +typedef struct _PEI_SMM_CONTROL_PPI { + PEI_SMM_ACTIVATE Trigger; + PEI_SMM_DEACTIVATE Clear; +}; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif + +//**********************************************************************// +//**********************************************************************// +//** **// +//** (C)Copyright 1985-2005, American Megatrends, Inc. **// +//** **// +//** All Rights Reserved. **// +//** **// +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 **// +//** **// +//** Phone: (770)-246-8600 **// +//** **// +//**********************************************************************// +//**********************************************************************// diff --git a/Include/PPI/Stall.h b/Include/PPI/Stall.h new file mode 100644 index 0000000..ffc78d1 --- /dev/null +++ b/Include/PPI/Stall.h @@ -0,0 +1,91 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2004, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/Stall.h 2 3/13/06 1:16a Felixp $ +// +// $Revision: 2 $ +// +// $Date: 3/13/06 1:16a $ +//***************************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/Stall.h $ +// +// 2 3/13/06 1:16a Felixp +// +// 1 1/28/05 12:44p Felixp +// +// 1 12/23/04 9:41a Felixp +// +// 2 2/12/04 5:07p Robert +// +// 1 1/06/04 2:53p Robert +// +//***************************************************************************** +//<AMI_FHDR_START> +// +// Name: Stall.h +// +// Description: This file is an include file used to define the PPI for the +// Stall PPI. For questions about the specification refer to the PEI CIS +// +//<AMI_FHDR_END> +//***************************************************************************** +#ifndef _STALL_PPI_H_ +#define _STALL_PPI_H_ +#ifdef __cplusplus +extern "C" { +#endif +#include <PEI.h> + +#define EFI_PEI_STALL_PPI_GUID \ +{ 0x1f4c6f90, 0xb06b, 0x48d8, 0xa2, 0x01, 0xba, 0xe5, 0xf1, 0xcd, 0x7d, 0x56 } + +GUID_VARIABLE_DECLARATION(gPeiStallPpiGuid,EFI_PEI_STALL_PPI_GUID); + +typedef struct _EFI_PEI_STALL_PPI EFI_PEI_STALL_PPI; + +typedef +EFI_STATUS +(EFIAPI *EFI_PEI_STALL) ( + IN EFI_PEI_SERVICES **PeiServices, + IN struct _EFI_PEI_STALL_PPI *This, + IN UINTN Microseconds + ); + + +typedef +struct _EFI_PEI_STALL_PPI { + UINTN Resolution; + EFI_PEI_STALL Stall; + } EFI_PEI_STALL_PPI; + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2004, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 6145-F Northbelt Pkwy, Norcross, GA 30071 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/TemporaryRamSupport.h b/Include/PPI/TemporaryRamSupport.h new file mode 100644 index 0000000..1506134 --- /dev/null +++ b/Include/PPI/TemporaryRamSupport.h @@ -0,0 +1,89 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** + +//********************************************************************** +// $Header: /Alaska/BIN/Core/Include/PPI/TemporaryRamSupport.h 3 3/25/11 12:50p Felixp $ +// +// $Revision: 3 $ +// +// $Date: 3/25/11 12:50p $ +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/BIN/Core/Include/PPI/TemporaryRamSupport.h $ +// +// 3 3/25/11 12:50p Felixp +// Identifiers are renamed based on PI errata (EFI_PEI_ prefix is added.) +// +// 2 3/09/11 5:42p Artems +// Modified to comply with AMI coding standard +// +//********************************************************************** + +//<AMI_FHDR_START> +//--------------------------------------------------------------------------- +// +// Name: TemporaryRamSupport.h +// +// Description: In SEC-to-PEI Handoff phase, this copies memory content +// from temporary RAM to permanent RAM. +// +//--------------------------------------------------------------------------- +//<AMI_FHDR_END> + +#ifndef __TEMPORARY_RAM_SUPPORT_H__ +#define __TEMPORARY_RAM_SUPPORT_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +// {DBE23AA9-A345-4B97-85B6-B226F1617389} +#define EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI_GUID \ + { 0xdbe23aa9, 0xa345, 0x4b97, 0x85, 0xb6, 0xb2, 0x26, 0xf1, 0x61, 0x73, 0x89 } + +GUID_VARIABLE_DECLARATION(gEfiTemporaryRamSupportPpiGuid, EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI_GUID); + +typedef EFI_STATUS (EFIAPI *TEMPORARY_RAM_MIGRATION) +( + IN CONST EFI_PEI_SERVICES **PeiServices, + IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase, + IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase, + IN UINTN CopySize +); + +typedef struct +{ + TEMPORARY_RAM_MIGRATION TemporaryRamMigration; +} EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI; + + +/****** DO NOT WRITE BELOW THIS LINE *******/ +#ifdef __cplusplus +} +#endif +#endif +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2011, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** diff --git a/Include/PPI/UhciPPI.CIF b/Include/PPI/UhciPPI.CIF new file mode 100644 index 0000000..9dbdef2 --- /dev/null +++ b/Include/PPI/UhciPPI.CIF @@ -0,0 +1,8 @@ +<component> + name = "UHCI PPI" + category = ModulePart + LocalRoot = "INCLUDE\PPI" + RefName = "UHCI PPI" +[files] +"\PeiGetUCtrl.h" +<endComponent> diff --git a/Include/PPI/UsbHCPpi.cif b/Include/PPI/UsbHCPpi.cif new file mode 100644 index 0000000..a3efdb4 --- /dev/null +++ b/Include/PPI/UsbHCPpi.cif @@ -0,0 +1,8 @@ +<component> + name = "UsbHCPpi" + category = ModulePart + LocalRoot = "Include\Ppi" + RefName = "UsbHCPpi" +[files] +"UsbHostController.h" +<endComponent> diff --git a/Include/PPI/UsbHostController.h b/Include/PPI/UsbHostController.h new file mode 100644 index 0000000..e8fdb0a --- /dev/null +++ b/Include/PPI/UsbHostController.h @@ -0,0 +1,236 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// +// $Header: /Alaska/SOURCE/Modules/USBRecovery/UhcPeimSrc/UsbHostController.h 8 1/18/11 1:04a Ryanchou $ +// +// $Revision: 8 $ +// +// $Date: 1/18/11 1:04a $ +// +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/USBRecovery/UhcPeimSrc/UsbHostController.h $ +// +// 8 1/18/11 1:04a Ryanchou +// [TAG] EIP47931 +// [Category] Improvement +// [Description] Added USB 3.0 hub support. +// [Files] EhciPei.c, EhciPei.h, HubPeim.c, HubPeim.h, OhciPei.c, +// OhciPei.h, UhcPeim.c, UhcPeim.h, usb.h, UsbHostController.h, +// UsbIoPeim.c, UsbPeim.c, UsbPeim.h, XhciPei.c, XhciPei.h +// +// 7 10/22/10 2:56a Rameshr +// [TAG]- EIP 43687 +// [Category]-IMPROVEMENT +// [Description]- Build warning from UsbRecovery driver - +// UsbHostController.obj : warning LNK4221: no public symbols found; +// archive member will be inaccessible. +// [Files]- uhcpeim.c, usbpeim.c, UsbHostcontroller.h +// +// 6 10/12/10 11:19a Olegi +// XHCI support added. +// +// 5 4/26/10 4:17p Krishnakumarg +// DebugRx causes the system to hang in Recovery mode EIP#34401 +// +// 4 3/17/09 5:08p Olegi +// Added TransactionTranslator for slow/full speed devices behind USB2 +// hub. +// +// 3 3/03/09 7:27p Olegi +// MaximumPacketLength changed from UINT8 to UINT16. +// +// 2 7/10/08 6:37p Michaela +// Updated to support OHCI controllers +// +// 1 9/22/06 12:21p Sivagarn +// +//***************************************************************************** + +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: UsbHostController.h +// +// Description: This file belongs to "Framework". +// This file is modified by AMI to include copyright message, +// appropriate header and integration code. +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> + +// +// This file contains 'Framework Code' and is licensed as such +// under the terms of your license agreement with Intel or your +// vendor. This file may not be modified, except as allowed by +// additional terms of your license agreement. +// + +/*++ + + Copyright (c) 1999 - 2002 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + + Module Name: + + UsbHostController.h + + Abstract: + + Usb Host Controller PPI as defined in EFI 2.0 + + This code abstracts the PEI core to provide Usb Host Contrller + access services. + + --*/ + +#ifndef _PEI_USB_HOST_CONTROLLER_PPI_H_ +#define _PEI_USB_HOST_CONTROLLER_PPI_H_ + +#include "core\em\usbrecovery\usb.h" + +#define PEI_USB_HOST_CONTROLLER_PPI_GUID {\ + 0x652b38a9, 0x77f4, 0x453f, 0x89, 0xd5, 0xe7, \ + 0xbd, 0xc3, 0x52, 0xfc, 0x53} + +GUID_VARIABLE_DECLARATION(gPeiUsbHostControllerPpiGuid,PEI_USB_HOST_CONTROLLER_PPI_GUID); +EFI_FORWARD_DECLARATION( PEI_USB_HOST_CONTROLLER_PPI ); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_CONTROL_TRANSFER)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 DeviceAddress, + IN UINT8 DeviceSpeed, + IN UINT8 MaximumPacketLength, + IN UINT16 TransactionTranslator, + IN EFI_USB_DEVICE_REQUEST *Request, + IN EFI_USB_DATA_DIRECTION TransferDirection, + IN OUT VOID *Data OPTIONAL, + IN OUT UINTN *DataLength OPTIONAL, + IN UINTN TimeOut, + OUT UINT32 *TransferResult +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_BULK_TRANSFER)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress, + IN UINT8 DeviceSpeed, + IN UINT16 MaximumPacketLength, + IN UINT16 TransactionTranslator, + IN OUT VOID *Data, + IN OUT UINTN *DataLength, + IN OUT UINT8 *DataToggle, + IN UINTN TimeOut, + OUT UINT32 *TransferResult +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_NUMBER)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + OUT UINT8 *PortNumber +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_STATUS)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 PortNumber, + OUT EFI_USB_PORT_STATUS *PortStatus +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_SET_ROOTHUB_PORT_FEATURE)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 PortNumber, + IN EFI_USB_PORT_FEATURE PortFeature +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_CLEAR_ROOTHUB_PORT_FEATURE)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 PortNumber, + IN EFI_USB_PORT_FEATURE PortFeature +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_PRECONFIGURE_DEVICE) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 PortNumber, + IN UINT8 Speed, + IN UINT16 TransactionTranslator +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_HOST_CONTROLLER_ENABLE_ENDPOINTS) ( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_HOST_CONTROLLER_PPI *This, + IN UINT8 *ConfigurationData +); + +typedef struct _PEI_USB_HOST_CONTROLLER_PPI +{ + PEI_USB_HOST_CONTROLLER_CONTROL_TRANSFER ControlTransfer; + PEI_USB_HOST_CONTROLLER_BULK_TRANSFER BulkTransfer; + PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_NUMBER GetRootHubPortNumber; + PEI_USB_HOST_CONTROLLER_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus; + PEI_USB_HOST_CONTROLLER_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature; + PEI_USB_HOST_CONTROLLER_CLEAR_ROOTHUB_PORT_FEATURE + ClearRootHubPortFeature; + BOOLEAN DebugPortUsed; + PEI_USB_HOST_CONTROLLER_PRECONFIGURE_DEVICE PreConfigureDevice; + PEI_USB_HOST_CONTROLLER_ENABLE_ENDPOINTS EnableEndpoints; +} PEI_USB_HOST_CONTROLLER_PPI; + + +#endif + +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/UsbIo.h b/Include/PPI/UsbIo.h new file mode 100644 index 0000000..99f7713 --- /dev/null +++ b/Include/PPI/UsbIo.h @@ -0,0 +1,165 @@ +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//********************************************************************** +// +// $Header: /Alaska/SOURCE/Modules/USBRecovery/UsbPeimSrc/UsbIo.h 2 7/10/08 6:37p Michaela $ +// +// $Revision: 2 $ +// +// $Date: 7/10/08 6:37p $ +// +//********************************************************************** +// Revision History +// ---------------- +// $Log: /Alaska/SOURCE/Modules/USBRecovery/UsbPeimSrc/UsbIo.h $ +// +// 2 7/10/08 6:37p Michaela +// Updated to support OHCI controllers +// +// 1 9/22/06 12:19p Sivagarn +// - Initial Check-in +// - Included Recovery code in Source +// +//***************************************************************************** + +//<AMI_FHDR_START> +//---------------------------------------------------------------------------- +// +// Name: UsbIo.h +// +// Description: This file belongs to "Framework". +// This file is modified by AMI to include copyright message, +// appropriate header and integration code. +// +//---------------------------------------------------------------------------- +//<AMI_FHDR_END> + +// +// This file contains 'Framework Code' and is licensed as such +// under the terms of your license agreement with Intel or your +// vendor. This file may not be modified, except as allowed by +// additional terms of your license agreement. +// + +/*++ + + Copyright (c) 1999 - 2002 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + + Module Name: + + UsbIo.h + + Abstract: + + Usb access PPI as defined in EFI 2.0 + + This code abstracts the PEI core to provide Usb access services. + + --*/ + +#ifndef _PEI_USB_IO_PPI_H_ +#define _PEI_USB_IO_PPI_H_ + +#include "core\em\usbrecovery\usb.h" + +#define PEI_USB_IO_PPI_GUID \ + {\ + 0x7c29785c, 0x66b9, 0x49fc, 0xb7, 0x97, 0x1c, 0xa5, 0x55, 0xe, 0xf2,\ + 0x83 \ + } + +EFI_FORWARD_DECLARATION( PEI_USB_IO_PPI ); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_CONTROL_TRANSFER)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_IO_PPI *This, + IN EFI_USB_DEVICE_REQUEST *Request, + IN EFI_USB_DATA_DIRECTION Direction, + IN UINT32 Timeout, + IN OUT VOID *Data OPTIONAL, + IN UINTN DataLength OPTIONAL +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_BULK_TRANSFER)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_IO_PPI *This, + IN UINT8 DeviceEndpoint, + IN OUT VOID *Data, + IN OUT UINTN *DataLength, + IN UINTN Timeout +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_GET_INTERFACE_DESCRIPTOR)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_IO_PPI *This, + IN EFI_USB_INTERFACE_DESCRIPTOR **InterfaceDescriptor +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_GET_ENDPOINT_DESCRIPTOR)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_IO_PPI *This, + IN UINT8 EndpointIndex, + IN EFI_USB_ENDPOINT_DESCRIPTOR **EndpointDescriptor +); + +typedef +EFI_STATUS +(EFIAPI * PEI_USB_PORT_RESET)( + IN EFI_PEI_SERVICES **PeiServices, + IN PEI_USB_IO_PPI *This +); + +typedef struct _PEI_USB_IO_PPI +{ + PEI_USB_CONTROL_TRANSFER UsbControlTransfer; + PEI_USB_BULK_TRANSFER UsbBulkTransfer; + PEI_USB_GET_INTERFACE_DESCRIPTOR UsbGetInterfaceDescriptor; + PEI_USB_GET_ENDPOINT_DESCRIPTOR UsbGetEndpointDescriptor; + PEI_USB_PORT_RESET UsbPortReset; +} PEI_USB_IO_PPI; + +extern EFI_GUID gPeiUsbIoPpiGuid; + +#endif + +//********************************************************************** +//********************************************************************** +//** ** +//** (C)Copyright 1985-2006, American Megatrends, Inc. ** +//** ** +//** All Rights Reserved. ** +//** ** +//** 5555 Oakbrook Pkwy, Suite 200, Norcross, GA 30093 ** +//** ** +//** Phone: (770)-246-8600 ** +//** ** +//********************************************************************** +//********************************************************************** +//**********************************************************************
\ No newline at end of file diff --git a/Include/PPI/UsbIoPpi.cif b/Include/PPI/UsbIoPpi.cif new file mode 100644 index 0000000..9927341 --- /dev/null +++ b/Include/PPI/UsbIoPpi.cif @@ -0,0 +1,8 @@ +<component> + name = "UsbIoPpi" + category = ModulePart + LocalRoot = "Include\Ppi\" + RefName = "UsbIoPpi" +[files] +"UsbIo.h" +<endComponent> diff --git a/Include/PPI/sbPPI.CIF b/Include/PPI/sbPPI.CIF new file mode 100644 index 0000000..c8b1f24 --- /dev/null +++ b/Include/PPI/sbPPI.CIF @@ -0,0 +1,8 @@ +<component> + name = "SB PPI" + category = ModulePart + LocalRoot = "INCLUDE\PPI" + RefName = "SB PPI" +[files] +"\SBPPI.h" +<endComponent> |