diff options
Diffstat (limited to 'ReferenceCode/Chipset/LynxPoint/Reset')
19 files changed, 1978 insertions, 0 deletions
diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommon.c b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommon.c new file mode 100644 index 0000000..4516b1f --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommon.c @@ -0,0 +1,254 @@ +/** @file + PCH RESET Common Library implements the Pch Reset Interface. + +@copyright + Copyright (c) 2011 - 2013 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ +#include "PchReset.h" + +/** + Initialize an Pch Reset protocol instance. + The function will assert in debug if PCH RCBA has not been initialized + + @param[in] PchResetInstance Pointer to PchResetInstance to initialize + + @retval EFI_SUCCESS The protocol instance was properly initialized + @exception EFI_UNSUPPORTED The PCH is not supported by this module +**/ +EFI_STATUS +PchResetProtocolConstructor ( + PCH_RESET_INSTANCE *PchResetInstance + ) +{ + /// + /// Check if the current PCH is known and supported by this code + /// + if (!IsPchSupported ()) { + DEBUG ((EFI_D_ERROR, "PCH Reset Protocol not supported due to no proper PCH LPC found!\n")); + return EFI_UNSUPPORTED; + } + /// + /// Initialize the Reset protocol instance + /// + PchResetInstance->Signature = PCH_RESET_SIGNATURE; + PchResetInstance->Handle = NULL; + PchResetInstance->PchResetProtocol.Reset = PchReset; + + /// + /// Sanity check to ensure PCH RCBA initialization has occurred previously. + /// + PchResetInstance->PchRootComplexBar = PCH_RCRB_BASE; + ASSERT (PchResetInstance->PchRootComplexBar != 0); + + return EFI_SUCCESS; +} + +/** + Execute Pch Reset from the host controller. + + @param[in] This Pointer to the PCH_RESET_PROTOCOL instance. + @param[in] PchResetType Pch Reset Types which includes ColdReset, WarmReset, ShutdownReset, + PowerCycleReset, GlobalReset, GlobalResetWithEc + + @retval EFI_SUCCESS Successfully completed. + @retval EFI_INVALID_PARAMETER If ResetType is invalid. +**/ +EFI_STATUS +EFIAPI +PchReset ( + IN PCH_RESET_PROTOCOL *This, + IN PCH_RESET_TYPE PchResetType + ) +{ + PCH_RESET_INSTANCE *PchResetInstance; + UINTN PchRootComplexBar; + UINT16 PmBase; + UINT16 GpioBase; + UINT8 OutputData; + UINT32 Data32; + UINT16 Data16; + EFI_STATUS Status; + PCH_SERIES PchSeries; + + PchSeries = GetPchSeries(); + PchResetInstance = PCH_RESET_INSTANCE_FROM_THIS (This); + PchRootComplexBar = PchResetInstance->PchRootComplexBar; + PmBase = PciRead16 ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + R_PCH_LPC_ACPI_BASE) + ) & B_PCH_LPC_ACPI_BASE_BAR; + + GpioBase = PciRead16 ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + R_PCH_LPC_GPIO_BASE) + ) & B_PCH_LPC_GPIO_BASE_BAR; + + switch (PchResetType) { + case WarmReset: + IoWrite8 ((UINTN) R_PCH_RST_CNT, (UINT8) V_PCH_RST_CNT_SOFTSTARTSTATE); + OutputData = V_PCH_RST_CNT_SOFTRESET; + break; + + case ColdReset: + IoWrite8 ((UINTN) R_PCH_RST_CNT, (UINT8) V_PCH_RST_CNT_HARDSTARTSTATE); + +// AMI_OVERRIDE, [EIP81593] >>> +#ifdef COLD_RESET_WITH_POWER_CYCLE + OutputData = V_PCH_RST_CNT_FULLRESET; +#else + OutputData = V_PCH_RST_CNT_HARDRESET; +#endif +// AMI_OVERRIDE, [EIP81593] <<< + break; + + case ShutdownReset: + /// + /// Firstly, ACPI decode must be enabled + /// + PciOr8 ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + R_PCH_LPC_ACPI_CNT), + (UINT8) (B_PCH_LPC_ACPI_CNT_ACPI_EN) + ); + + /// + /// Then, GPE0_EN should be disabled to avoid any GPI waking up the system from S5 + /// + if (PchSeries == PchLp) { + IoWrite32 ((UINTN) (PmBase + R_PCH_ACPI_GPE0_EN_127_96), 0); + } else if (PchSeries == PchH) { + IoWrite16 ((UINTN) (PmBase + R_PCH_ACPI_GPE0a_EN), 0); + IoWrite16 ((UINTN) (PmBase + R_PCH_ACPI_GPE0b_EN), 0); + } + + /// + /// Secondly, PwrSts register must be cleared + /// + /// Write a "1" to bit[8] of power button status register at + /// (PM_BASE + PM1_STS_OFFSET) to clear this bit + /// + Data16 = B_PCH_SMI_STS_PM1_STS_REG; +// AMI_OVERWRITE >>> EIP136638 + IoWrite16 ((UINTN) (PmBase + R_PCH_ACPI_PM1_STS), Data16); +// AMI_OVERWRITE <<< + + /// + /// Finally, transform system into S5 sleep state + /// + Data32 = IoRead32 ((UINTN) (PmBase + R_PCH_ACPI_PM1_CNT)); + + Data32 = (UINT32) ((Data32 &~(B_PCH_ACPI_PM1_CNT_SLP_TYP + B_PCH_ACPI_PM1_CNT_SLP_EN)) | V_PCH_ACPI_PM1_CNT_S5); + + IoWrite32 ((UINTN) (PmBase + R_PCH_ACPI_PM1_CNT), Data32); + + Data32 = Data32 | B_PCH_ACPI_PM1_CNT_SLP_EN; + + IoWrite32 ((UINTN) (PmBase + R_PCH_ACPI_PM1_CNT), Data32); + + return EFI_SUCCESS; + + case PowerCycleReset: + case GlobalReset: + case GlobalResetWithEc: + /// + /// PCH BIOS Spec Rev 0.5.0, Section 4.6 GPIO Reset Requirement + /// System BIOS is recommended to clear "GPIO Reset Select" registers [GP_RST_SEL1 (GPIOBASE + offset 60h), + /// GP_RST_SEL2 (GPIOBASE + offset 64h) and GP_RST_SEL3 (GPIOBASE + offset 68h)] before issuing a hard or + /// global reset unless specially requested by the platform designer. + /// + IoWrite32 ((UINTN) (GpioBase + R_PCH_GP_RST_SEL), 0); + IoWrite32 ((UINTN) (GpioBase + R_PCH_GP_RST_SEL2), 0); + IoWrite32 ((UINTN) (GpioBase + R_PCH_GP_RST_SEL3), 0); + + if ((PchResetType == GlobalReset) || (PchResetType == GlobalResetWithEc)) { + PciOr32 ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + R_PCH_LPC_PMIR), + (UINT32) (B_PCH_LPC_PMIR_CF9GR) + ); + } + + if ((PchResetType == GlobalResetWithEc) && + ((MmioRead32 (PchRootComplexBar + R_PCH_RCRB_DEEP_S4_POL) & + (B_PCH_RCRB_DEEP_S4_POL_DPS4_EN_AC | B_PCH_RCRB_DEEP_S4_POL_DPS4_EN_DC)) == 0) && + ((MmioRead32 (PchRootComplexBar + R_PCH_RCRB_DEEP_S5_POL) & + (B_PCH_RCRB_DEEP_S5_POL_DPS5_EN_AC | B_PCH_RCRB_DEEP_S5_POL_DPS5_EN_DC)) == 0)) { + /// + /// PCH BIOS Spec Rev 0.5.0, Section 4.5 Global Reset + /// For systems with an embedded controller, System BIOS should also take these additional steps when it performs the Global Reset: + /// CF9h Global Reset: + /// + if (PchSeries == PchH) { + /// 1. Set GPIOBASE + offset 00h[30] = 1b (for non-Deep Sx enabled platforms) + /// 2. Set GPIOBASE + offset 04h[30] = 0b (for non-Deep Sx enabled platforms) + /// 3. Set GPIOBASE + offset 0Ch[30] = 0b (for non-Deep Sx enabled platforms) + /// 4. Set GPIOBASE + offset 60h[30] = 1b (for non-Deep Sx enabled platforms) + /// NOTE: For Deep Sx enabled platforms steps 1,2 and 3 should be skipped and pin should be left in native mode + /// 5. Set CF9GR bit, D31:F0:ACh[20], issue a Global Reset through a 0xCF9 write of either 06h or 0Eh commands. + /// Global Reset MEI Message + /// 1. BIOS makes sure GPIO30 is left in native mode (default mode) before sending a Global Reset MEI message. + /// + IoOr32 ((UINTN) (GpioBase + R_PCH_GPIO_USE_SEL), (UINT32) (BIT30)); + IoAnd32 ((UINTN) (GpioBase + R_PCH_GPIO_IO_SEL), (UINT32) (~BIT30)); + IoAnd32 ((UINTN) (GpioBase + R_PCH_GPIO_LVL), (UINT32) (~BIT30)); + } + + if (PchSeries == PchLp) { + /// 1. Set GPIOBASE + offset 1F0h[0] = 1b (for non-Deep Sx enabled platforms) + /// 2. Set GPIOBASE + offset 1F0h[2] = 0b (for non-Deep Sx enabled platforms) + /// 3. Set GPIOBASE + offset 1F0h[31] = 0b (for non-Deep Sx enabled platforms) + /// 4. Set GPIOBASE + offset 60h[30] = 1h (for non-Deep Sx enabled platforms) + /// NOTE: For Deep Sx enabled platforms steps 1,2 and 3 should be skipped and pin should be left in native mode + /// 5. Set CF9GR bit, D31:F0:ACh[20], issue a Global Reset through a 0xCF9 write of either 06h or 0Eh commands. + /// Global Reset MEI Message + /// 1. BIOS makes sure GPIO30 is left in native mode (default mode) before sending a Global Reset MEI message. + /// + IoOr32 ((UINTN) (GpioBase + R_PCH_GP_30_CONFIG0), (UINT32) (B_PCH_GPIO_OWN0_GPIO_USE_SEL)); + IoAnd32 ((UINTN) (GpioBase + R_PCH_GP_30_CONFIG0), (UINT32) (~B_PCH_GPIO_OWN0_GPIO_IO_SEL)); + IoAnd32 ((UINTN) (GpioBase + R_PCH_GP_30_CONFIG0), (UINT32) (~B_PCH_GPIO_OWN0_GPO_LVL)); + } + IoOr32 ((UINTN) (GpioBase + R_PCH_GP_RST_SEL), (UINT32) (BIT30)); + } + + OutputData = V_PCH_RST_CNT_FULLRESET; + break; + + default: + return EFI_INVALID_PARAMETER; + } + + Status = PchResetCallback (PchResetType); + + if ((Status == EFI_SUCCESS) || (Status == EFI_NOT_FOUND)) { + IoWrite8 ((UINTN) R_PCH_RST_CNT, OutputData); + /// + /// Waiting for system reset + /// + EFI_DEADLOOP (); + } + + return Status; +} diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommon.h b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommon.h new file mode 100644 index 0000000..a9020a7 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommon.h @@ -0,0 +1,86 @@ +/** @file + Header file for PCH RESET Common Library. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _RESET_COMMON_H_ +#define _RESET_COMMON_H_ + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "PchAccess.h" +#include "PchPlatformLib.h" +#endif +/// +/// Private data structure definitions for the driver +/// +#define PCH_RESET_SIGNATURE EFI_SIGNATURE_32 ('I', 'E', 'R', 'S') + +typedef struct { + UINT32 Signature; + EFI_HANDLE Handle; + PCH_RESET_PROTOCOL PchResetProtocol; + UINTN PchRootComplexBar; +} PCH_RESET_INSTANCE; + +#define PCH_RESET_INSTANCE_FROM_THIS(a) \ + CR ( \ + a, \ + PCH_RESET_INSTANCE, \ + PchResetProtocol, \ + PCH_RESET_SIGNATURE \ + ) + +// +// Function prototypes used by the Pch Reset protocol. +// + +/** + Initialize an Pch Reset protocol instance. + The function will assert in debug if PCH RCBA has not been initialized + + @param[in] PchResetInstance Pointer to PchResetInstance to initialize + + @retval EFI_SUCCESS The protocol instance was properly initialized + @exception EFI_UNSUPPORTED The PCH is not supported by this module +**/ +EFI_STATUS +PchResetProtocolConstructor ( + PCH_RESET_INSTANCE *PchResetInstance + ); + +/** + Execute Pch Reset from the host controller. + + @param[in] This Pointer to the PCH_RESET_PROTOCOL instance. + @param[in] PchResetType Pch Reset Types which includes ColdReset, WarmReset, ShutdownReset, + PowerCycleReset, GlobalReset, GlobalResetWithEc + + @retval EFI_SUCCESS Successfully completed. + @retval EFI_INVALID_PARAMETER If ResetType is invalid. +**/ +EFI_STATUS +EFIAPI +PchReset ( + IN PCH_RESET_PROTOCOL *This, + IN PCH_RESET_TYPE PchResetType + ); +#endif diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.cif b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.cif new file mode 100644 index 0000000..8fad0d9 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.cif @@ -0,0 +1,11 @@ +<component> + name = "PchResetCommonLib" + category = ModulePart + LocalRoot = "ReferenceCode\Chipset\LynxPoint\Reset\Common" + RefName = "PchResetCommonLib" +[files] +"PchResetCommonLib.sdl" +"PchResetCommonLib.mak" +"PchResetCommon.h" +"PchResetCommon.c" +<endComponent> diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.mak b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.mak new file mode 100644 index 0000000..eecda96 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.mak @@ -0,0 +1,124 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetCommonLib/PchResetCommonLib.mak 1 2/08/12 9:06a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 9:06a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetCommonLib/PchResetCommonLib.mak $ +# +# 1 2/08/12 9:06a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +all : PchResetCommonLib + +!IF "$(PchInitPeim_SUPPORT)" == "1" +PchResetCommonLib : PchResetCommonPeiLib +!ENDIF + +!IF "$(PchInitDxe_SUPPORT)" == "1" +PchResetCommonLib : PchResetCommonDxeLib +!ENDIF + +!IF "$(PchInitPeim_SUPPORT)" == "1" +!IF "$(PchInitDxe_SUPPORT)" == "1" +PchResetCommonLib : PchResetCommonDxeLib PchResetCommonPeiLib +!ENDIF +!ENDIF + +!IF "$(PchInitDxe_SUPPORT)" == "1" +$(PchResetCommonDxeLib_LIB) : PchResetCommonDxeLib +!ENDIF + +!IF "$(PchInitPeim_SUPPORT)" == "1" +$(PchResetCommonPeiLib_LIB) : PchResetCommonPeiLib +!ENDIF + +PchResetCommonDxeLib : $(BUILD_DIR)\PchResetCommonLib.mak PchResetCommonLibDxeBin + +PchResetCommonPeiLib : $(BUILD_DIR)\PchResetCommonLib.mak PchResetCommonLibPeiBin + +$(BUILD_DIR)\PchResetCommonLib.mak : $(PchResetCommonLib_DIR)\$(@B).cif $(PchResetCommonLib_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PchResetCommonLib_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PchResetCommonLib_INCLUDES=\ + $(EDK_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + $(INTEL_PCH_INCLUDES)\ + +PchResetCommonLibDxe_INCLUDES=\ + $(PchResetCommonLib_INCLUDES) $(PCH_INITDXE_INCLUDES) + +PchResetCommonLibPeim_INCLUDES=\ + $(PchResetCommonLib_INCLUDES) $(PCH_INITPEI_INCLUDES) + +PchResetCommonLib_DEFINES = \ + $(CFLAGS) + +DxeCpuBuildDefine = \ +!IF "$(x64_BUILD)"=="1" + /DMDE_CPU_X64\ +!ELSE + /DMDE_CPU_IA32\ +!ENDIF + +PeimCpuBuildDefine = \ + /DMDE_CPU_IA32\ + +PchResetCommonLibPeim_DEFINES = \ + $(PchResetCommonLib_DEFINES)\ + $(PeimCpuBuildDefine)\ + +PchResetCommonLibDxe_DEFINES = \ + $(PchResetCommonLib_DEFINES)\ + $(DxeCpuBuildDefine)\ + +PchResetCommonLibDxeBin : + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS) \ + /f $(BUILD_DIR)\PchResetCommonLib.mak all\ + "MY_INCLUDES=$(PchResetCommonLibDxe_INCLUDES)" \ + "CFLAGS=$(PchResetCommonLibDxe_DEFINES)"\ + TYPE=LIBRARY \ + LIBRARY_NAME=$(PchResetCommonDxeLib_LIB) + +PchResetCommonLibPeiBin : $(EFISCRIPTLIB) $(EDKFRAMEWORKPROTOCOLLIB) +!IF "$(x64_BUILD)"=="1" + $(MAKE) /$(MAKEFLAGS) $(EDK_DEFAULTS) BUILD_DIR=$(BUILD_DIR)\IA32 \ +!ELSE + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS) \ +!ENDIF + /f $(BUILD_DIR)\PchResetCommonLib.mak all\ + "MY_INCLUDES=$(PchResetCommonLibPeim_INCLUDES)" \ + "CFLAGS=$(PchResetCommonLibPeim_DEFINES)"\ + TYPE=PEI_LIBRARY \ + LIBRARY_NAME=$(PchResetCommonPeiLib_LIB) +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.sdl b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.sdl new file mode 100644 index 0000000..745b6bd --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Common/PchResetCommonLib.sdl @@ -0,0 +1,97 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetCommonLib/PchResetCommonLib.sdl 2 1/11/13 12:47a Scottyang $ +# +# $Revision: 2 $ +# +# $Date: 1/11/13 12:47a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetCommonLib/PchResetCommonLib.sdl $ +# +# 2 1/11/13 12:47a Scottyang +# [TAG] EIP81593 +# [Category] Improvement +# [Description] Added new SDL token "COLD_RESET_WITH_POWER_CYCLE". +# [Files] SB.sdl, SBGeneric.c, PchResetCommon.c, +# PchResetCommonLib.sdl +# +# 1 2/08/12 9:06a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "PchResetCommonLib_SUPPORT" + Value = "1" + Help = "Main switch to enable PchUsbCommonLib support in Project" + TokenType = Boolean + TargetMAK = Yes + Master = Yes +End + +PATH + Name = "PchResetCommonLib_DIR" +End + +MODULE + Help = "Includes PchResetCommonLib.mak to Project" + File = "PchResetCommonLib.mak" +End + +ELINK + Name = "PchResetCommonDxeLib_LIB" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "$$(LIB_BUILD_DIR)\PchResetCommonDxeLib.lib" + Parent = "PchResetCommonDxeLib_LIB" + InvokeOrder = AfterParent +End + +ELINK + Name = "PchResetCommonPeiLib_LIB" + InvokeOrder = ReplaceParent +End + +ELINK + Name = "$$(LIB_BUILD_DIR)\PchResetCommonPeiLib.lib" + Parent = "PchResetCommonPeiLib_LIB" + InvokeOrder = AfterParent +End + + # [EIP81593]> +ELINK + Name = "/D COLD_RESET_WITH_POWER_CYCLE" + Parent = "GLOBAL_DEFINES" + InvokeOrder = AfterParent + Token = "COLD_RESET_WITH_POWER_CYCLE" "=" "1" +End + # <[EIP81593] +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c new file mode 100644 index 0000000..5993d67 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.c @@ -0,0 +1,134 @@ +/** @file + PCH RESET PEIM DRIVER. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#include "PchReset.h" + +/** + Installs PCH RESET PPI + + @param[in] FfsHeader Not used. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS PCH SPI PPI is installed successfully + @retval EFI_OUT_OF_RESOURCES Can't allocate pool +**/ +EFI_STATUS +InstallPchReset ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + PEI_PCH_RESET_INSTANCE *PeiPchResetInstance; + PCH_RESET_INSTANCE *PchResetInstance; + + DEBUG ((EFI_D_INFO, "InstallPchReset() Start\n")); + + PeiPchResetInstance = (PEI_PCH_RESET_INSTANCE *) AllocateZeroPool (sizeof (PEI_PCH_RESET_INSTANCE)); + if (NULL == PeiPchResetInstance) { + return EFI_OUT_OF_RESOURCES; + } + + PchResetInstance = &(PeiPchResetInstance->PchResetInstance); + PchResetProtocolConstructor (PchResetInstance); + + PeiPchResetInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; + PeiPchResetInstance->PpiDescriptor.Guid = &gPchResetPpiGuid; + PeiPchResetInstance->PpiDescriptor.Ppi = &(PchResetInstance->PchResetProtocol); + + /// + /// Install the PCH RESET PPI + /// + Status = (**PeiServices).InstallPpi (PeiServices, &PeiPchResetInstance->PpiDescriptor); + ASSERT_EFI_ERROR (Status); + + DEBUG ((EFI_D_INFO, "PCH RESET PPI Installed\n")); + + DEBUG ((EFI_D_INFO, "InstallPchReset() End\n")); + + return Status; +} + +/** + Execute call back function for Pch Reset. + + @param[in] PchResetType Pch Reset Types which includes PowerCycle, Globalreset. + + @retval EFI_SUCCESS The callback function has been done successfully + @exception EFI_UNSUPPORTED Do not do any reset from PCH +**/ +EFI_STATUS +PchResetCallback ( + IN PCH_RESET_TYPE PchResetType + ) +{ + EFI_STATUS Status; + UINTN Instance; + PCH_RESET_CALLBACK_PPI *PchResetCallbackPpi; + + if ((PchResetType == GlobalReset) || (PchResetType == GlobalResetWithEc)) { + /// + /// After MRC is done, DRAM Init Done message will be sent to ME FW. + /// + Status = PeiServicesLocatePpi ( + &gEfiPeiMemoryDiscoveredPpiGuid, + 0, + NULL, + NULL + ); + + if (Status == EFI_SUCCESS) { + /// + /// After sending DRAM Init Done to ME FW, please do the global reset through HECI. + /// + DEBUG ((EFI_D_ERROR, "Please do the global reset through HECI \n")); + return EFI_UNSUPPORTED; + } + } + + Instance = 0; + + do { + /// + /// Those drivers that need to install Pch Reset Callback Ppi have the responsibility + /// to make sure themselves execute before Pch Reset PEI driver. + /// + Status = PeiServicesLocatePpi ( + &gPchResetCallbackPpiGuid, + Instance, + NULL, + (VOID**) &PchResetCallbackPpi + ); + + if (Status == EFI_SUCCESS) { + PchResetCallbackPpi->ResetCallback (PchResetType); + } else { + if ((Instance == 0) && (Status == EFI_NOT_FOUND)) { + DEBUG ((EFI_D_ERROR | EFI_D_INFO, "None of Pch Reset Callback Ppi is found .\n")); + } else { + DEBUG ((EFI_D_INFO, "Failed to locate Pch Reset Callback Ppi.\n")); + } + } + + Instance++; + } while (Status != EFI_NOT_FOUND); + + return EFI_SUCCESS; +}
\ No newline at end of file diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs new file mode 100644 index 0000000..5e18cb4 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.dxs @@ -0,0 +1,39 @@ +/** @file + Dependency expression source file. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "PeimDepex.h" + +// +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase; +// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase. +// +#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB) +#include "EfiDepex.h" +#endif + +DEPENDENCY_START + TRUE +DEPENDENCY_END diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h new file mode 100644 index 0000000..fa6ddc0 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchReset.h @@ -0,0 +1,65 @@ +/** @file + Header file for PCH RESET PEIM Driver. + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _PCH_RESET_H +#define _PCH_RESET_H + +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGluePeim.h" +#include EFI_PPI_PRODUCER (PchReset) +#include "PchResetCommon.h" +#include EFI_PPI_CONSUMER (MemoryDiscovered) +#include "PchAccess.h" +#endif + +typedef struct { + EFI_PEI_PPI_DESCRIPTOR PpiDescriptor; + PCH_RESET_INSTANCE PchResetInstance; +} PEI_PCH_RESET_INSTANCE; + +/** + Installs PCH RESET PPI + + @param[in] FfsHeader Not used. + @param[in] PeiServices General purpose services available to every PEIM. + + @retval EFI_SUCCESS PCH SPI PPI is installed successfully + @retval EFI_OUT_OF_RESOURCES Can't allocate pool +**/ +EFI_STATUS +InstallPchReset ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN EFI_PEI_SERVICES **PeiServices + ); + +/** + Execute call back function for Pch Reset. + + @param[in] PchResetType Pch Reset Types which includes PowerCycle, Globalreset. + + @retval EFI_SUCCESS The callback function has been done successfully + @exception EFI_UNSUPPORTED Do not do any reset from PCH +**/ +EFI_STATUS +EFIAPI +PchResetCallback ( + IN PCH_RESET_TYPE PchResetType + ); +#endif diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif new file mode 100644 index 0000000..294cf3c --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.cif @@ -0,0 +1,13 @@ +<component> + name = "PchResetPeim" + category = ModulePart + LocalRoot = "ReferenceCode\Chipset\LynxPoint\Reset\Pei" + RefName = "PchResetPeim" +[files] +"PchResetPeim.sdl" +"PchResetPeim.mak" +"PchReset.h" +"PchReset.c" +"PchReset.dxs" +"PchResetPeim.inf" +<endComponent> diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf new file mode 100644 index 0000000..cd135c0 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.inf @@ -0,0 +1,84 @@ +## @file +# Component description file for the Pch Reset PEIM. +# +#@copyright +# Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +# + + +[defines] +BASE_NAME = PchResetPeim +FILE_GUID = 147B4839-5DBE-413f-917F-DFEB687C6312 +COMPONENT_TYPE = PE32_PEIM + +[sources.common] + PchReset.h + PchReset.c + ../Common/PchResetCommon.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGluePeimEntryPoint.c + +[includes.common] + . + ../Common + $(EDK_SOURCE)/Foundation/Efi + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT) + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EFI_SOURCE) + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + $(PROJECT_PCH_FAMILY)PpiLib + EdkIIGlueBaseIoLibIntrinsic + EdkIIGlueBaseMemoryLib + EdkIIGluePeiDebugLibReportStatusCode + EdkIIGluePeiReportStatusCodeLib + EdkIIGluePeiServicesLib + EdkIIGluePeiMemoryAllocationLib + EdkIIGlueBasePciLibPciExpress + EdkPpiLib + PchPlatformLib + EdkFrameworkPpiLib + +[nmake.common] + IMAGE_ENTRY_POINT = _ModuleEntryPoint + DPX_SOURCE = PchReset.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=InstallPchReset + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + -D __EDKII_GLUE_BASE_MEMORY_LIB__ \ + -D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_PEI_SERVICES_LIB__ \ + -D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \ + -D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak new file mode 100644 index 0000000..541ee4f --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.mak @@ -0,0 +1,99 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.mak 2 2/24/12 2:17a Victortu $ +# +# $Revision: 2 $ +# +# $Date: 2/24/12 2:17a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.mak $ +# +# 2 2/24/12 2:17a Victortu +# Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00. +# +# 1 2/08/12 9:05a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* + +#--------------------------------------------------------------------------- +# Create PchResetPeim module +#--------------------------------------------------------------------------- +EDK : PchResetPeim +PchResetPeim : $(BUILD_DIR)\PchResetPeim.mak PchResetPeimBin + + +$(BUILD_DIR)\PchResetPeim.mak : $(PchResetPeim_DIR)\$(@B).cif $(PchResetPeim_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PchResetPeim_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PchResetPeim_INCLUDES=\ + $(INTEL_PCH_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + +PchResetPeim_DEFINES = $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InstallPchReset"\ + /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + /D __EDKII_GLUE_PEI_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_PEI_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_PEI_SERVICES_LIB__ \ + /D __EDKII_GLUE_PEI_MEMORY_ALLOCATION_LIB__ \ + /D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ + +PchResetPeim_LIB_LINKS =\ + $(GuidLib_LIB) \ + $(PchPlatformPeiLib_LIB) \ + $(IntelPchPpiLib_LIB)\ + $(EDKFRAMEWORKPPILIB) \ + $(EdkIIGlueBaseLib_LIB)\ + $(EdkIIGlueBaseLibIA32_LIB)\ + $(EdkIIGlueBaseIoLibIntrinsic_LIB) \ + $(EdkIIGluePeiDebugLibReportStatusCode_LIB) \ + $(EdkIIGluePeiReportStatusCodeLib_LIB) \ + $(EdkIIGluePeiServicesLib_LIB) \ + $(EdkIIGluePeiMemoryAllocationLib_LIB) \ + $(EdkIIGlueBasePciLibCf8_LIB) \ + $(PchResetCommonPeiLib_LIB)\ + $(EdkIIGlueBasePciLibPciExpress_LIB)\ + +PchResetPeimBin: $(PchResetPeim_LIB_LINKS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\PchResetPeim.mak all \ + "MY_INCLUDES=$(PchResetPeim_INCLUDES)"\ + "MY_DEFINES=$(PchResetPeim_DEFINES)"\ + NAME=PchResetPeim\ + MAKEFILE=$(BUILD_DIR)\PchResetPeim.mak \ + GUID=FF259F16-18D1-4298-8DD2-BD87FF2894A9\ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=PEIM \ + EDKIIModule=PEIM\ + DEPEX1=$(PchResetPeim_DIR)\PchReset.dxs\ + DEPEX1_TYPE=EFI_SECTION_PEI_DEPEX\ + COMPRESS=0 +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl new file mode 100644 index 0000000..b213204 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/Pei/PchResetPeim.sdl @@ -0,0 +1,67 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.sdl 1 2/08/12 9:05a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 9:05a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchResetPeim/PchResetPeim.sdl $ +# +# 1 2/08/12 9:05a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "PchResetPeim_SUPPORT" + Value = "1" + Help = "Main switch to enable PchInitPeim support in Project" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes +End + +PATH + Name = "PchResetPeim_DIR" +End + +MODULE + File = "PchResetPeim.mak" + Help = "Includes PchResetPeim.mak to Project" +End + +ELINK + Name = "$(BUILD_DIR)\PchResetPeim.ffs" + Parent = "FV_BB" + InvokeOrder = AfterParent +End + +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.c b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.c new file mode 100644 index 0000000..8f4b925 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.c @@ -0,0 +1,496 @@ +/** @file + PCH RESET Runtime Driver + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement + +**/ +#include "PchReset.h" + +PCH_RESET_INSTANCE *mPchResetInstance; + +STATIC UINT8 mDaysOfMonthInfo[] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; + +/** + Check if it is leap year + + @param[in] Year year to be check + + @retval True year is leap year + @retval FALSE year is not a leap year +**/ +BOOLEAN +IsLeapYear ( + IN UINT16 Year + ) +{ + return (Year % 4 == 0) && ((Year % 100 != 0) || (Year % 400 == 0)); +} + +/** + Set System Wakeup Alarm. + + @param[in] WakeAfter Time offset in seconds to wake from S3 + + @retval EFI_SUCCESS Timer started successfully +**/ + +STATIC +EFI_STATUS +SetSystemWakeupAlarm ( + IN UINT32 WakeAfter + ) +{ + EFI_STATUS Status; + EFI_TIME Time; + EFI_TIME_CAPABILITIES Capabilities; + UINT32 Reminder; + UINT16 PmBase; + UINT8 DayOfMonth; + /// + /// For an instant wake 2 seconds is a safe value + /// + if (WakeAfter < 2) { + WakeAfter = 2; + } + + Status = EfiGetTime (&Time, &Capabilities); + if (EFI_ERROR (Status)) { + return Status; + } + + Reminder = WakeAfter + (UINT32) Time.Second; + Time.Second = Reminder % 60; + Reminder = Reminder / 60; + Reminder = Reminder + (UINT32) Time.Minute; + Time.Minute = Reminder % 60; + Reminder = Reminder / 60; + Reminder = Reminder + (UINT32) Time.Hour; + Time.Hour = Reminder % 24; + Reminder = Reminder / 24; + + if (Reminder > 0) { + Reminder = Reminder + (UINT32) Time.Day; + if ((Time.Month == 2) && IsLeapYear (Time.Year)) { + DayOfMonth = 29; + } else { + DayOfMonth = mDaysOfMonthInfo[Time.Month - 1]; + } + if (Reminder > DayOfMonth) { + Time.Day = (UINT8)Reminder - DayOfMonth; + Reminder = 1; + } else { + Time.Day = (UINT8)Reminder; + Reminder = 0; + } + } + + if (Reminder > 0) { + if (Time.Month == 12) { + Time.Month = 1; + Time.Year = Time.Year + 1; + } else { + Time.Month = Time.Month + 1; + } + } + + Status = EfiSetWakeupTime (TRUE, &Time); + if (EFI_ERROR (Status)) { + return Status; + } + + PmBase = (UINT16) (PciRead32 ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + R_PCH_LPC_ACPI_BASE) + ) & B_PCH_LPC_ACPI_BASE_BAR); + + /// + /// Clear RTC PM1 status + /// + IoWrite16 (PmBase + R_PCH_ACPI_PM1_STS, B_PCH_ACPI_PM1_STS_RTC); + + /// + /// set RTC_EN bit in PM1_EN to wake up from the alarm + /// + IoWrite16 ( + PmBase + R_PCH_ACPI_PM1_EN, + (IoRead16 (PmBase + R_PCH_ACPI_PM1_EN) | B_PCH_ACPI_PM1_EN_RTC) + ); + return Status; +} + +// AMI_OVERRIDE, [EIP111666] >>> +EFI_GUID gPchGetResetTypeGuid = PCH_RESET_PROTOCOL_GUID; + +EFI_STATUS +EFIAPI +PchResetExitBootServicesEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +/*++ + +Routine Description: + + PCH initialization before ExitBootServices / LegacyBoot events + Useful for operations which must happen later than at EndOfPost event + +Arguments: + + Event A pointer to the Event that triggered the callback. + Context A pointer to private data registered with the callback function. + +Returns: + + EFI_SUCCESS The function completed successfully + + --*/ +{ + // + // Closed the event to avoid call twice + // + UINT8 LegacyBoot; + gBS->CloseEvent (Event); + + gRT->SetVariable ( + L"InLegacyBoot", + &gPchGetResetTypeGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + sizeof(UINT8), + &LegacyBoot + ); + return EFI_SUCCESS; +} +// AMI_OVERRIDE, [EIP111666] <<< + +/** + Initialize the state information for the Timer Architectural Protocol + + @param[in] ImageHandle Image handle of the loaded driver + @param[in] SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Thread can be successfully created + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Cannot create the timer service +**/ +EFI_STATUS +EFIAPI +InstallPchReset ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + UINT64 Length; +// AMI_OVERRIDE, NBDXE.c already done. >>> +/* UINT64 BaseAddress; + EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemorySpaceDescriptor; + UINT64 Attributes;*/ +// AMI_OVERRIDE, NBDXE.c already done. <<< +// AMI_OVERRIDE, [EIP111666] >>> + EFI_EVENT LegacyBootEvent; +// AMI_OVERRIDE, [EIP111666] <<< + + DEBUG ((EFI_D_INFO, "InstallPchReset() Start\n")); + + Status = PciLibConstructor (); + ASSERT_EFI_ERROR (Status); +// AMI_OVERRIDE, NBDXE.c already done. >>> +/* + BaseAddress = MmPciAddress(0, + DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + 0 + ); + Length = 4096; + + Status = gDS->GetMemorySpaceDescriptor (BaseAddress, &MemorySpaceDescriptor); + ASSERT_EFI_ERROR (Status); + + Attributes = MemorySpaceDescriptor.Attributes | EFI_MEMORY_RUNTIME; + + Status = gDS->SetMemorySpaceAttributes ( + BaseAddress, + Length, + Attributes + ); + DEBUG ((EFI_D_INFO, "Status = %r\n",Status)); + ASSERT_EFI_ERROR (Status);*/ +// AMI_OVERRIDE, NBDXE.c already done. <<< + + Length = 4096; + // AMI_OVERRIDE_FOR_FIRST_BOOT + Status = PciLibRegisterMemory ( + PCI_LIB_ADDRESS (0, + 0, + 0, + 0), + (UINTN) Length + ); + // AMI_OVERRIDE_FOR_FIRST_BOOT + + Status = PciLibRegisterMemory ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + 0), + (UINTN) Length + ); + ASSERT_EFI_ERROR (Status); + /// + /// Allocate Runtime memory for the PchReset protocol instance. + /// + mPchResetInstance = AllocateRuntimeZeroPool (sizeof (PCH_RESET_INSTANCE)); + if (mPchResetInstance == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Status = PchResetProtocolConstructor (mPchResetInstance); + if (EFI_ERROR (Status)) { + return Status; + } + /// + /// Install protocol interface + /// + Status = gBS->InstallMultipleProtocolInterfaces ( + &mPchResetInstance->Handle, + &gPchResetProtocolGuid, + &mPchResetInstance->PchResetProtocol, + NULL + ); + ASSERT_EFI_ERROR (Status); + +// AMI_OVERRIDE, [EIP111666] >>> + Status = EfiCreateEventLegacyBootEx ( + EFI_TPL_CALLBACK, + PchResetExitBootServicesEvent, + NULL, + &LegacyBootEvent + ); +// AMI_OVERRIDE, [EIP111666] <<< + + /// + /// The Lib Deconstruct will automatically be called when entrypoint return error. + /// + DEBUG ((EFI_D_INFO, "InstallPchReset() End\n")); + + return Status; +} + +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +/** + If need be, do any special reset required for capsules. For this + implementation where we're called from the ResetSystem() api, + just set our capsule variable and return to let the caller + do a soft reset. + + @param[in] None + + @retval None +**/ +VOID +CapsuleReset ( + VOID + ) +{ + EFI_STATUS Status; + UINTN Size; + UINTN CapsuleDataPtr; + UINT32 Data32; + UINT32 Eflags; + UINT16 PmBase; + + /// + /// Check if there are pending capsules to process + /// + Size = sizeof (CapsuleDataPtr); + Status = EfiGetVariable ( + EFI_CAPSULE_VARIABLE_NAME, + &gEfiCapsuleVendorGuid, + NULL, + &Size, + (VOID *) &CapsuleDataPtr + ); + + if (Status == EFI_SUCCESS) { + /// + /// Wake up system 2 seconds after putting system into S3 to complete the reset operation. + /// + SetSystemWakeupAlarm (2); + /// + /// Process capsules across a system reset. + /// + PmBase = PciRead16 ( + PCI_LIB_ADDRESS (DEFAULT_PCI_BUS_NUMBER_PCH, + PCI_DEVICE_NUMBER_PCH_LPC, + PCI_FUNCTION_NUMBER_PCH_LPC, + R_PCH_LPC_ACPI_BASE) + ) & B_PCH_LPC_ACPI_BASE_BAR; + + ASSERT (PmBase != 0); + + Data32 = IoRead32 ((UINTN) (PmBase + R_PCH_ACPI_PM1_CNT)); + + Data32 = (UINT32) ((Data32 & ~(B_PCH_ACPI_PM1_CNT_SLP_TYP + B_PCH_ACPI_PM1_CNT_SLP_EN)) | V_PCH_ACPI_PM1_CNT_S3); + + Eflags = (UINT32) AsmReadEflags (); + + if ((Eflags & 0x200)) { + DisableInterrupts (); + } + + AsmWbinvd (); + AsmWriteCr0 (AsmReadCr0 () | 0x060000000); + + IoWrite32 ( + (UINTN) (PmBase + R_PCH_ACPI_PM1_CNT), + (UINT32) Data32 + ); + + Data32 = Data32 | B_PCH_ACPI_PM1_CNT_SLP_EN; + + IoWrite32 ( + (UINTN) (PmBase + R_PCH_ACPI_PM1_CNT), + (UINT32) Data32 + ); + + if ((Eflags & 0x200)) { + EnableInterrupts (); + } + /// + /// Should not return + /// + EFI_DEADLOOP (); + } +} +#endif + +/** + Execute call back function for Pch Reset. + + @param[in] PchResetType Pch Reset Types which includes PowerCycle, Globalreset. + + @retval EFI_SUCCESS The callback function has been done successfully + @retval EFI_NOT_FOUND Failed to find Pch Reset Callback protocol. Or, none of + callback protocol is installed. + @retval Others Do not do any reset from PCH +**/ +EFI_STATUS +EFIAPI +PchResetCallback ( + IN PCH_RESET_TYPE PchResetType + ) +{ + EFI_STATUS Status; + UINTN NumHandles; + EFI_HANDLE *HandleBuffer; + UINTN Index; + PCH_RESET_CALLBACK_PROTOCOL *PchResetCallback; +// AMI_OVERRIDE, [EIP111666] >>> + UINTN VariableSize = 1; + UINT8 TempBuffer; + BOOLEAN LegacyBoot = FALSE; +// AMI_OVERRIDE, [EIP111666] <<< + +// AMI_OVERRIDE, [EIP111666] >>> + Status = gRT->GetVariable ( + L"InLegacyBoot", + &gPchGetResetTypeGuid, + NULL, + &VariableSize, + &TempBuffer + ); + + // If variable found, we are in runtime. + if(!EFI_ERROR(Status)) + LegacyBoot = TRUE; + + if (!(EfiAtRuntime () || LegacyBoot)) { +// AMI_OVERRIDE, [EIP111666] <<< + + /// + /// Retrieve all instances of Pch Reset Callback protocol + /// + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gPchResetCallbackProtocolGuid, + NULL, + &NumHandles, + &HandleBuffer + ); + + if (EFI_ERROR (Status)) { + /// + /// Those drivers that need to install Pch Reset Callback protocol have the responsibility + /// to make sure themselves execute before Pch Reset Runtime driver. + /// + if (Status == EFI_NOT_FOUND) { + DEBUG ((EFI_D_ERROR | EFI_D_INFO, "Or, none of Pch Reset callback protocol is installed.\n")); + } + + return Status; + } + + for (Index = 0; Index < NumHandles; Index++) { + Status = gBS->HandleProtocol ( + HandleBuffer[Index], + &gPchResetCallbackProtocolGuid, + (VOID **) &PchResetCallback + ); + ASSERT_EFI_ERROR (Status); + + if (!EFI_ERROR (Status)) { + PchResetCallback->ResetCallback (PchResetType); + } else { + DEBUG ((EFI_D_ERROR | EFI_D_INFO, "Failed to locate Pch Reset Callback protocol.\n")); + return Status; + } + } + } + +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) + if (PchResetType == WarmReset) { + CapsuleReset (); + } +#endif + + return EFI_SUCCESS; +} + +/** + Fixup internal data pointers so that the services can be called in virtual mode. + + @param[in] Event The event registered. + @param[in] Context Event context. Not used in this event handler. + + @retval None +**/ +EFI_RUNTIMESERVICE +VOID +PchResetVirtualAddressChangeEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mPchResetInstance->PchResetProtocol.Reset)); + gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mPchResetInstance->PchRootComplexBar)); + gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mPchResetInstance)); +} diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.cif b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.cif new file mode 100644 index 0000000..ba1456a --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.cif @@ -0,0 +1,13 @@ +<component> + name = "PchReset" + category = ModulePart + LocalRoot = "ReferenceCode\Chipset\LynxPoint\Reset\RuntimeDxe" + RefName = "PchReset" +[files] +"PchReset.sdl" +"PchReset.mak" +"PchReset.c" +"PchReset.h" +"PchReset.dxs" +"PchResetRuntime.inf" +<endComponent> diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.dxs b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.dxs new file mode 100644 index 0000000..7047c3a --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.dxs @@ -0,0 +1,39 @@ +/** @file + Dependency expression file. + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains a 'Sample Driver' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may be modified by the user, subject to + the additional terms of the license agreement + +**/ + + +// +// Common for R8 and R9 codebase +// +#include "AutoGen.h" +#include "DxeDepex.h" + +// +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are both "defined" in R8 codebase; +// BUILD_WITH_EDKII_GLUE_LIB is defined in Edk-Dev-Snapshot-20070228 and later version +// BUILD_WITH_GLUELIB and BUILD_WITH_EDKII_GLUE_LIB are "not defined" in R9 codebase. +// +#if defined (BUILD_WITH_GLUELIB) || defined (BUILD_WITH_EDKII_GLUE_LIB) +#include "EfiDepex.h" +#endif + +DEPENDENCY_START + TRUE +DEPENDENCY_END diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.h b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.h new file mode 100644 index 0000000..4a43703 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.h @@ -0,0 +1,83 @@ +/** @file + Header file for PCH RESET Runtime Driver + +@copyright + Copyright (c) 2011 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains an 'Intel Peripheral Driver' and uniquely + identified as "Intel Reference Module" and is + licensed for Intel CPUs and chipsets under the terms of your + license agreement with Intel or your vendor. This file may + be modified by the user, subject to additional terms of the + license agreement +**/ +#ifndef _PCH_RESET_H +#define _PCH_RESET_H + +// +// External include files do NOT need to be explicitly specified in real EDKII +// environment +// +#if !defined(EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x00020000) +#include "EdkIIGlueDxe.h" +#include EFI_PROTOCOL_PRODUCER (PchReset) +#include EFI_PROTOCOL_CONSUMER (PchPlatformPolicy) +#include EFI_GUID_DEFINITION (Capsule) +#include "PchResetCommon.h" +#include "DxeRuntimePciLibPciExpress.h" +#endif + +/** + Initialize the state information for the Timer Architectural Protocol + + @param[in] ImageHandle Image handle of the loaded driver + @param[in] SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Thread can be successfully created + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Cannot create the timer service +**/ +EFI_STATUS +EFIAPI +InstallPchReset ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +/** + Execute call back function for Pch Reset. + + @param[in] PchResetType Pch Reset Types which includes PowerCycle, Globalreset. + + @retval EFI_SUCCESS The callback function has been done successfully + @retval EFI_NOT_FOUND Failed to find Pch Reset Callback protocol. Or, none of + callback protocol is installed. + @retval Others Do not do any reset from PCH +**/ +EFI_STATUS +EFIAPI +PchResetCallback ( + IN PCH_RESET_TYPE PchResetType + ); + +/** + Fixup internal data pointers so that the services can be called in virtual mode. + + @param[in] Event The event registered. + @param[in] Context Event context. Not used in this event handler. + + @retval None +**/ +VOID +PchResetVirtualAddressChangeEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ); +#endif diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.mak b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.mak new file mode 100644 index 0000000..9e3ae14 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.mak @@ -0,0 +1,117 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchReset/PchReset.mak 3 6/24/13 6:21a Scottyang $ +# +# $Revision: 3 $ +# +# $Date: 6/24/13 6:21a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchReset/PchReset.mak $ +# +# 3 6/24/13 6:21a Scottyang +# [TAG] EIP127297 +# [Category] Improvement +# [Description] Update PCH RC 1.6.0. +# [Files] SB.sd, SBDxe.c, ..\ReferenceCode\Chipset\LynxPoint\*.* +# +# 2 2/24/12 2:16a Victortu +# Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00. +# +# 1 2/08/12 9:04a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* + +#--------------------------------------------------------------------------- +# Create PchReset Driver +#--------------------------------------------------------------------------- +EDK : PchReset +PchReset : $(BUILD_DIR)\PchReset.mak PchResetBin + + +PchReset_OBJECTS = \ +$(BUILD_DIR)\$(PchReset_DIR)\PchReset.obj + +$(BUILD_DIR)\PchReset.mak : $(PchReset_DIR)\$(@B).cif $(PchReset_DIR)\$(@B).mak $(BUILD_RULES) + $(CIF2MAK) $(PchReset_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS) + +PchReset_INCLUDES=\ + $(INTEL_PCH_INCLUDES)\ + $(EdkIIGlueLib_INCLUDES)\ + +PchReset_DEFINES = $(MY_DEFINES)\ + /D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InstallPchReset"\ + /D"__EDKII_GLUE_SET_VIRTUAL_ADDRESS_MAP_EVENT_HANDLER__=PchResetVirtualAddressChangeEvent"\ + /D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + /D __EDKII_GLUE_BASE_LIB__ \ + /D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + /D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + /D __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__ \ + /D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \ + /D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \ + /D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ \ + +PchReset_LIB_LINKS =\ +!IF "$(x64_BUILD)"=="1" + $(EdkIIGlueBaseLibX64_LIB)\ +!ELSE + $(EdkIIGlueBaseLibIA32_LIB)\ +!ENDIF + $(EdkIIGlueBaseIoLibIntrinsic_LIB)\ + $(EdkIIGlueBaseLib_LIB)\ + $(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\ + $(EdkIIGlueUefiBootServicesTableLib_LIB)\ + $(EdkIIGlueEdkDxeRuntimeDriverLib_LIB)\ + $(EdkIIGlueDxeMemoryAllocationLib_LIB)\ + $(ArchProtocolLib)\ + $(INTEL_PCH_PROTOCOL_LIB)\ + $(EDKPROTOCOLLIB)\ + $(PchPlatformDxeLib_LIB)\ + $(DxeRuntimePciLibPciExpressLib_LIB)\ + $(PchResetCommonDxeLib_LIB)\ + $(EdkIIGlueSmmRuntimeDxeReportStatusCodeLib_LIB)\ + $(EdkIIGlueUefiRuntimeServicesTableLib_LIB)\ + $(EDKFRAMEWORKPROTOCOLLIB)\ + $(EdkIIGlueDxeServicesTableLib_LIB)\ + +PchResetBin: $(PchReset_LIB_LINKS) + $(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\ + /f $(BUILD_DIR)\PchReset.mak all \ + "MY_INCLUDES=$(PchReset_INCLUDES)"\ + "MY_DEFINES=$(PchReset_DEFINES)"\ + GUID=BB1FBD4F-2E30-4793-9BED-74F672BC8FFE\ + ENTRY_POINT=_ModuleEntryPoint \ + TYPE=RT_DRIVER\ + EDKIIModule=DXEDRIVER\ + "OBJECTS=$(PchReset_OBJECTS)" \ + DEPEX1=$(PchReset_DIR)\PchReset.dxs\ + DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\ + COMPRESS=1 +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.sdl b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.sdl new file mode 100644 index 0000000..40d618b --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchReset.sdl @@ -0,0 +1,67 @@ +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* + +#************************************************************************* +# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchReset/PchReset.sdl 1 2/08/12 9:04a Yurenlai $ +# +# $Revision: 1 $ +# +# $Date: 2/08/12 9:04a $ +#************************************************************************* +# Revision History +# ---------------- +# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchReset/PchReset.sdl $ +# +# 1 2/08/12 9:04a Yurenlai +# Intel Lynx Point/SB eChipset initially releases. +# +#************************************************************************* +TOKEN + Name = "PchReset_SUPPORT" + Value = "1" + TokenType = Boolean + TargetEQU = Yes + TargetMAK = Yes + Master = Yes + Help = "Main switch to enable PchReset support in Project" +End + +PATH + Name = "PchReset_DIR" + Help = "PchReset file source directory" +End + +MODULE + File = "PchReset.mak" + Help = "Includes PchReset to Project" +End + +ELINK + Name = "$(BUILD_DIR)\PchReset.ffs" + Parent = "FV_MAIN" + InvokeOrder = AfterParent +End +#************************************************************************* +#************************************************************************* +#** ** +#** (C)Copyright 1985-2011, American Megatrends, Inc. ** +#** ** +#** All Rights Reserved. ** +#** ** +#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 ** +#** ** +#** Phone: (770)-246-8600 ** +#** ** +#************************************************************************* +#************************************************************************* diff --git a/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchResetRuntime.inf b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchResetRuntime.inf new file mode 100644 index 0000000..e099032 --- /dev/null +++ b/ReferenceCode/Chipset/LynxPoint/Reset/RuntimeDxe/PchResetRuntime.inf @@ -0,0 +1,90 @@ +## @file +# Component description file for Pch Reset Runtime module +# +#@copyright +# Copyright (c) 2011 - 2013 Intel Corporation. All rights reserved +# This software and associated documentation (if any) is furnished +# under a license and may only be used or copied in accordance +# with the terms of the license. Except as permitted by such +# license, no part of this software or documentation may be +# reproduced, stored in a retrieval system, or transmitted in any +# form or by any means without the express written consent of +# Intel Corporation. +# +# This file contains a 'Sample Driver' and is licensed as such +# under the terms of your license agreement with Intel or your +# vendor. This file may be modified by the user, subject to +# the additional terms of the license agreement +## + +[defines] +BASE_NAME = PchResetRuntime +FILE_GUID = AF59F2F5-5E28-4e03-80E2-4727545AF811 +COMPONENT_TYPE = RT_DRIVER + +[sources.common] + PchReset.c + PchReset.h + ../Common/PchResetCommon.c + +# +# Edk II Glue Driver Entry Point +# + EdkIIGlueDxeDriverEntryPoint.c + +[includes.common] + $(EDK_SOURCE)/Foundation/Efi + . + ../Common + $(EDK_SOURCE)/Foundation/Include + $(EDK_SOURCE)/Foundation/Efi/Include + $(EDK_SOURCE)/Foundation/Framework/Include + $(EDK_SOURCE)/Foundation/Cpu/Pentium/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT) + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include + $(EFI_SOURCE)/$(PROJECT_PCH_ROOT)/Include/Library +# +# EDK II Glue Library utilizes some standard headers from EDK +# + $(EFI_SOURCE) + $(EDK_SOURCE)/Foundation + $(EDK_SOURCE)/Foundation/Framework + $(EDK_SOURCE)/Foundation/Include/IndustryStandard + $(EDK_SOURCE)/Foundation/Core/Dxe + $(EDK_SOURCE)/Foundation/Include/Pei + $(EDK_SOURCE)/Foundation/Library/Dxe/Include + $(EDK_SOURCE)/Foundation/Library/EdkIIGlueLib/Include + +[libraries.common] + EdkIIGlueBaseIoLibIntrinsic + EdkIIGlueBaseLib + EdkIIGlueSmmRuntimeDxeReportStatusCodeLib + EdkIIGlueDxeDebugLibReportStatusCode + EdkIIGlueUefiBootServicesTableLib + EdkIIGlueUefiRuntimeServicesTableLib + EdkIIGlueEdkDxeRuntimeDriverLib + EdkIIGlueDxeMemoryAllocationLib + EdkIIGlueDxeServicesTableLib + ArchProtocolLib + $(PROJECT_PCH_FAMILY)ProtocolLib + PchDxeRuntimePciLibPciExpress + EdkProtocolLib + PchPlatformLib + EdkFrameworkProtocolLib + +[nmake.common] + IMAGE_ENTRY_POINT=_ModuleEntryPoint + DPX_SOURCE=PchReset.dxs +# +# Module Entry Point +# + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_MODULE_ENTRY_POINT__=InstallPchReset + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_SET_VIRTUAL_ADDRESS_MAP_EVENT_HANDLER__=PchResetVirtualAddressChangeEvent + C_FLAGS = $(C_FLAGS) -D __EDKII_GLUE_BASE_IO_LIB_INTRINSIC__ \ + -D __EDKII_GLUE_BASE_LIB__ \ + -D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \ + -D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \ + -D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \ + -D __EDKII_GLUE_EDK_DXE_RUNTIME_DRIVER_LIB__ \ + -D __EDKII_GLUE_DXE_SERVICES_TABLE_LIB__ |