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Diffstat (limited to 'ReferenceCode/Haswell/Ppi/Cache/Cache.c')
-rw-r--r-- | ReferenceCode/Haswell/Ppi/Cache/Cache.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/ReferenceCode/Haswell/Ppi/Cache/Cache.c b/ReferenceCode/Haswell/Ppi/Cache/Cache.c new file mode 100644 index 0000000..75e8535 --- /dev/null +++ b/ReferenceCode/Haswell/Ppi/Cache/Cache.c @@ -0,0 +1,25 @@ +/** @file + CPU IO PPI GUID as defined in EFI 2.0 + +@copyright + Copyright (c) 1999 - 2012 Intel Corporation. All rights reserved + This software and associated documentation (if any) is furnished + under a license and may only be used or copied in accordance + with the terms of the license. Except as permitted by such + license, no part of this software or documentation may be + reproduced, stored in a retrieval system, or transmitted in any + form or by any means without the express written consent of + Intel Corporation. + + This file contains 'Framework Code' and is licensed as such + under the terms of your license agreement with Intel or your + vendor. This file may not be modified, except as allowed by + additional terms of your license agreement. +**/ +#include "Tiano.h" +#include "Pei.h" +#include EFI_PPI_DEFINITION (Cache) + +EFI_GUID gPeiCachePpiGuid = PEI_CACHE_PPI_GUID; + +EFI_GUID_STRING(&gPeiCachePpiGuid, "Cache", "Cache PPI"); |