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Diffstat (limited to 'ReferenceCode/Haswell/SampleCode/SecCore/Sec/Ia32/CpuRcSec.asm')
-rw-r--r--ReferenceCode/Haswell/SampleCode/SecCore/Sec/Ia32/CpuRcSec.asm38
1 files changed, 38 insertions, 0 deletions
diff --git a/ReferenceCode/Haswell/SampleCode/SecCore/Sec/Ia32/CpuRcSec.asm b/ReferenceCode/Haswell/SampleCode/SecCore/Sec/Ia32/CpuRcSec.asm
new file mode 100644
index 0000000..1460ddf
--- /dev/null
+++ b/ReferenceCode/Haswell/SampleCode/SecCore/Sec/Ia32/CpuRcSec.asm
@@ -0,0 +1,38 @@
+
+ INCLUDE Token.equ
+ INCLUDE Platform.inc
+ INCLUDE Ia32.inc
+
+CPU_HEC_BASE EQU MKF_PCIEX_BASE_ADDRESS ; Must defined before include Chipset.inc
+ INCLUDE Chipset.inc
+
+ INCLUDE SecCore.inc
+
+ .686p
+ .xmm
+ .model small
+
+ extern FindMicrocode:NEAR32
+ extern GainestownSecRcEntryEnd:NEAR32
+
+STARTUP_SEG SEGMENT PARA PUBLIC USE32 'CODE'
+ ASSUME CS:STARTUP_SEG, DS:STARTUP_SEG
+
+ INCLUDE SecFlat32.inc
+
+GainestownSecRcEntry PROC
+
+ jmp ProtectedModeSECStart ; Jump to IvyBridge SEC sample code
+
+CallPeiCoreEntryPoint PROC
+ ; Set stack top pointer
+ mov esp, DATA_STACK_BASE_ADDRESS + DATA_STACK_SIZE
+
+ jmp GainestownSecRcEntryEnd ; Exit the eLink
+CallPeiCoreEntryPoint ENDP
+
+GainestownSecRcEntry ENDP
+
+STARTUP_SEG ENDS
+END
+