blob: a2d41814d71a266306fc8b333f58357a091c42a5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
|
#*************************************************************************
#*************************************************************************
#** **
#** (C)Copyright 1985-2011, American Megatrends, Inc. **
#** **
#** All Rights Reserved. **
#** **
#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
#** **
#** Phone: (770)-246-8600 **
#** **
#*************************************************************************
#*************************************************************************
#*************************************************************************
# $Header: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchPcieSmm/PchPcieSmm.mak 2 2/24/12 2:14a Victortu $
#
# $Revision: 2 $
#
# $Date: 2/24/12 2:14a $
#*************************************************************************
# Revision History
# ----------------
# $Log: /Alaska/BIN/Chipset/Intel/SouthBridge/LynxPoint/Intel Pch SB Refcode/PchPcieSmm/PchPcieSmm.mak $
#
# 2 2/24/12 2:14a Victortu
# Updated to support 4.6.5.3_IntelEDK_1117_Patch7_00.
#
# 1 2/08/12 8:57a Yurenlai
# Intel Lynx Point/SB eChipset initially releases.
#
#*************************************************************************
#---------------------------------------------------------------------------
# Create PchPcieSmm Driver
#---------------------------------------------------------------------------
EDK : PchPcieSmm
PchPcieSmm : $(BUILD_DIR)\PchPcieSmm.mak PchPcieSmmBin
$(BUILD_DIR)\PchPcieSmm.mak : $(PchPcieSmm_DIR)\$(@B).cif $(PchPcieSmm_DIR)\$(@B).mak $(BUILD_RULES)
$(CIF2MAK) $(PchPcieSmm_DIR)\$(@B).cif $(CIF2MAK_DEFAULTS)
PchPcieSmm_INCLUDES=\
$(INTEL_PCH_INCLUDES)\
$(EdkIIGlueLib_INCLUDES)\
$(EDK_INCLUDES)
PchPcieSmm_DEFINES = $(MY_DEFINES)\
/D"__EDKII_GLUE_MODULE_ENTRY_POINT__=InitializePchPcieSmm"\
/D __EDKII_GLUE_DXE_DEBUG_LIB_REPORT_STATUS_CODE__ \
/D __EDKII_GLUE_UEFI_BOOT_SERVICES_TABLE_LIB__ \
/D __EDKII_GLUE_SMM_RUNTIME_DXE_REPORT_STATUS_CODE_LIB__ \
/D __EDKII_GLUE_BASE_PCI_LIB_PCI_EXPRESS__ \
/D __EDKII_GLUE_UEFI_RUNTIME_SERVICES_TABLE_LIB__ \
PchPcieSmm_LIB_LINKS =\
!IF "$(x64_BUILD)"=="1"
$(EdkIIGlueBaseLibX64_LIB)\
!ELSE
$(EdkIIGlueBaseLibIA32_LIB)\
!ENDIF
$(EDKFRAMEWORKPROTOCOLLIB)\
$(INTEL_PCH_PROTOCOL_LIB)\
$(PchPlatformSmmLib_LIB)\
$(EdkIIGlueDxeDebugLibReportStatusCode_LIB)\
$(EdkIIGlueSmmRuntimeDxeReportStatusCodeLib_LIB)\
$(EdkIIGlueUefiBootServicesTableLib_LIB)\
$(EdkIIGlueBasePciLibPciExpress_LIB)\
$(EDKPROTOCOLLIB)\
$(PchPciExpressHelpersDxeLib_LIB)\
$(EFISCRIPTLIB)\
$(EFIPROTOCOLLIB)\
$(EdkIIGlueUefiRuntimeServicesTableLib_LIB)\
PchPcieSmmBin: $(PchPcieSmm_LIB_LINKS)
$(MAKE) /$(MAKEFLAGS) $(EDKIIGLUE_DEFAULTS)\
/f $(BUILD_DIR)\PchPcieSmm.mak all \
"MY_INCLUDES=$(PchPcieSmm_INCLUDES)" \
"MY_DEFINES=$(PchPcieSmm_DEFINES)" \
GUID=ACAEAA7A-C039-4424-88DA-F42212EA0E55\
ENTRY_POINT=_ModuleEntryPoint \
TYPE=BS_DRIVER\
EDKIIModule=SMMDRIVER\
DEPEX1=$(PchPcieSmm_DIR)\PchPcieSmm.dxs\
DEPEX1_TYPE=EFI_SECTION_DXE_DEPEX\
COMPRESS=1
#*************************************************************************
#*************************************************************************
#** **
#** (C)Copyright 1985-2011, American Megatrends, Inc. **
#** **
#** All Rights Reserved. **
#** **
#** 5555 Oakbrook Parkway, Suite 200, Norcross, GA 30093 **
#** **
#** Phone: (770)-246-8600 **
#** **
#*************************************************************************
#*************************************************************************
|