ArmPlatformPkg/PL35xSmc: Clean SMC driver to replace hardcoded Chip Select into the driver itself by passing SMC configuration to the driver

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11959 6f19259b-4bc3-4df7-8a09-765794883524

6 files changed, 238 insertions, 105 deletions

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
index 5670fab7c4..f160622d78 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
@@ -31,7 +31,6 @@
   ArmLib
   ArmTrustZoneLib
   MemoryAllocationLib
-  PL354SmcLib
   PL341DmcLib
   PL301AxiLib
   L2X0CacheLib
@@ -40,6 +39,8 @@
 [Sources.common]
   CTA9x4.c
   CTA9x4Mem.c
+  CTA9x4Helper.asm   | RVCT
+  CTA9x4Helper.S     | GCC
 
 [Protocols]
 
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
index 0a1054a28b..3f08784ff5 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
@@ -34,7 +34,7 @@
   L2X0CacheLib

   PL301AxiLib

   PL341DmcLib

-  PL354SmcLib

+  PL35xSmcLib

   SerialPortLib

 

 [Sources.common]

@@ -42,6 +42,8 @@
   CTA9x4.c

   CTA9x4Helper.asm   | RVCT

   CTA9x4Helper.S     | GCC

+  CTA9x4Boot.asm     | RVCT

+  CTA9x4Boot.S       | GCC

 

 [Protocols]

 

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.S
new file mode 100755
index 0000000000..c53c11f370
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.S
@@ -0,0 +1,110 @@
+//

+//  Copyright (c) 2011, ARM Limited. All rights reserved.

+//

+//  This program and the accompanying materials

+//  are licensed and made available under the terms and conditions of the BSD License

+//  which accompanies this distribution.  The full text of the license may be found at

+//  http://opensource.org/licenses/bsd-license.php

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/ArmPlatformLib.h>

+#include <Drivers/PL35xSmc.h>

+#include <ArmPlatform.h>

+#include <AutoGen.h>

+

+.text

+.align 3

+

+GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)

+GCC_ASM_IMPORT(PL35xSmcInitialize)

+

+//

+// For each Chip Select: ChipSelect / SetCycle / SetOpMode

+//

+VersatileExpressSmcConfiguration:

+    // NOR Flash 0

+    .word     PL350_SMC_DIRECT_CMD_ADDR_CS(0)

+    .word     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)

+    .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV

+

+    // NOR Flash 1

+    .word     PL350_SMC_DIRECT_CMD_ADDR_CS(4)

+    .word     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)

+    .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV

+

+    // SRAM

+    .word     PL350_SMC_DIRECT_CMD_ADDR_CS(2)

+    .word     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)

+    .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV

+

+    // Usb/Eth/VRAM

+    .word     PL350_SMC_DIRECT_CMD_ADDR_CS(3)

+    .word     PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)

+    .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC

+

+    // Memory Mapped Peripherals

+    .word     PL350_SMC_DIRECT_CMD_ADDR_CS(7)

+    .word     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)

+    .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC

+

+    // VRAM

+    .word     PL350_SMC_DIRECT_CMD_ADDR_CS(1)

+    .word     0x00049249

+    .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC

+VersatileExpressSmcConfigurationEnd:

+

+/**

+  Initialize the memory where the initial stacks will reside

+

+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

+  In some platform, this region is already initialized and the implementation of this function can

+  do nothing. This memory can also represent the Secure RAM.

+  This function is called before the satck has been set up. Its implementation must ensure the stack

+  pointer is not used (probably required to use assembly language)

+

+**/

+ASM_PFX(ArmPlatformInitializeBootMemory):

+  mov   r5, lr

+

+  //

+  // Initialize PL354 SMC

+  //

+  LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)

+  ldr   r2, =VersatileExpressSmcConfiguration

+  ldr   r3, =VersatileExpressSmcConfigurationEnd

+  blx   ASM_PFX(PL35xSmcInitialize)

+

+  //

+  // Page mode setup for VRAM

+  //

+  LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)

+

+  // Read current state

+  ldr     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+  ldr     r0, = 0x00000000

+  str     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+

+  // Enable page mode

+  ldr     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+  ldr     r0, = 0x00000000

+  str     r0, [r2, #0]

+  ldr     r0, = 0x00900090

+  str     r0, [r2, #0]

+

+  // Confirm page mode enabled

+  ldr     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+  ldr     r0, = 0x00000000

+  str     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+

+  bx    r5

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.asm
new file mode 100755
index 0000000000..5a08307e13
--- /dev/null
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.asm
@@ -0,0 +1,112 @@
+//

+//  Copyright (c) 2011, ARM Limited. All rights reserved.

+//

+//  This program and the accompanying materials

+//  are licensed and made available under the terms and conditions of the BSD License

+//  which accompanies this distribution.  The full text of the license may be found at

+//  http://opensource.org/licenses/bsd-license.php

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/ArmPlatformLib.h>

+#include <Drivers/PL35xSmc.h>

+#include <ArmPlatform.h>

+#include <AutoGen.h>

+

+  INCLUDE AsmMacroIoLib.inc

+

+  EXPORT  ArmPlatformInitializeBootMemory

+  IMPORT  PL35xSmcInitialize

+

+  PRESERVE8

+  AREA    CTA9x4BootMode, CODE, READONLY

+

+//

+// For each Chip Select: ChipSelect / SetCycle / SetOpMode

+//

+VersatileExpressSmcConfiguration

+    // NOR Flash 0

+    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(0)

+    DCD     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)

+    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV

+

+    // NOR Flash 1

+    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(4)

+    DCD     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)

+    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV

+

+    // SRAM

+    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(2)

+    DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)

+    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV

+

+    // Usb/Eth/VRAM

+    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(3)

+    DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)

+    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC

+

+    // Memory Mapped Peripherals

+    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(7)

+    DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)

+    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC

+

+    // VRAM

+    DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(1)

+    DCD     0x00049249

+    DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC

+VersatileExpressSmcConfigurationEnd

+

+/**

+  Initialize the memory where the initial stacks will reside

+

+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

+  In some platform, this region is already initialized and the implementation of this function can

+  do nothing. This memory can also represent the Secure RAM.

+  This function is called before the satck has been set up. Its implementation must ensure the stack

+  pointer is not used (probably required to use assembly language)

+

+**/

+ArmPlatformInitializeBootMemory

+  mov   r5, lr

+

+  //

+  // Initialize PL354 SMC

+  //

+  LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)

+  ldr   r2, =VersatileExpressSmcConfiguration

+  ldr   r3, =VersatileExpressSmcConfigurationEnd

+  blx   PL35xSmcInitialize

+

+  //

+  // Page mode setup for VRAM

+  //

+  LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)

+

+  // Read current state

+  ldr     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+  ldr     r0, = 0x00000000

+  str     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+

+  // Enable page mode

+  ldr     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+  ldr     r0, = 0x00000000

+  str     r0, [r2, #0]

+  ldr     r0, = 0x00900090

+  str     r0, [r2, #0]

+

+  // Confirm page mode enabled

+  ldr     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+  ldr     r0, = 0x00000000

+  str     r0, [r2, #0]

+  ldr     r0, [r2, #0]

+

+  bx    r5

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
index 2987cbee53..b66b051907 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
@@ -15,18 +15,13 @@
 #include <Base.h>

 #include <Library/PcdLib.h>

 #include <Library/ArmPlatformLib.h>

-#include <Drivers/PL354Smc.h>

+#include <ArmPlatform.h>

 #include <AutoGen.h>

 

 .text

 .align 3

 

 GCC_ASM_EXPORT(ArmPlatformIsMemoryInitialized)

-GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)

-.extern ASM_PFX(SMCInitializeNOR)

-.extern ASM_PFX(SMCInitializeSRAM)

-.extern ASM_PFX(SMCInitializePeripherals)

-.extern ASM_PFX(SMCInitializeVRAM)

 

 /**

   Called at the early stage of the Boot phase to know if the memory has already been initialized

@@ -49,44 +44,3 @@ ASM_PFX(ArmPlatformIsMemoryInitialized):
   tst   r0, #0x40000000

   bx	lr

 

-/**

-  Initialize the memory where the initial stacks will reside

-

-  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

-  In some platform, this region is already initialized and the implementation of this function can

-  do nothing. This memory can also represent the Secure RAM.

-  This function is called before the satck has been set up. Its implementation must ensure the stack

-  pointer is not used (probably required to use assembly language)

-

-**/

-ASM_PFX(ArmPlatformInitializeBootMemory):

-  mov   r5, lr

-

-  //

-  // Initialize PL354 SMC

-  //

-  LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)

-

-  // NOR Flash 0

-  LoadConstantToReg (PL354_SMC_DIRECT_CMD_ADDR_CS(0,0), r2)

-  blx   ASM_PFX(SMCInitializeNOR)

-

-  // NOR Flash 1

-  LoadConstantToReg (PL354_SMC_DIRECT_CMD_ADDR_CS(1,0), r2)

-  blx   ASM_PFX(SMCInitializeNOR)

-

-  // Setup SRAM

-  blx   ASM_PFX(SMCInitializeSRAM)

-

-  // Memory Mapped Peripherals

-  blx   ASM_PFX(SMCInitializePeripherals)

-

-  // Initialize VRAM

-  //TODO: Check if we really must inititialize Video SRAM in UEFI. Does Linux can do it ? Does the Video driver can do it ?

-  //      It will be faster (only initialize if required) and easier (remove assembly code because of a stack available) to move this initialization.

-  LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)

-  blx   ASM_PFX(SMCInitializeVRAM)

-

-  bx	r5

-

-.end

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
index 3b353558e6..e81888c9fb 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
@@ -1,32 +1,27 @@
 //

 //  Copyright (c) 2011, ARM Limited. All rights reserved.

-//  

-//  This program and the accompanying materials                          

-//  are licensed and made available under the terms and conditions of the BSD License         

-//  which accompanies this distribution.  The full text of the license may be found at        

-//  http://opensource.org/licenses/bsd-license.php                                            

 //

-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+//  This program and the accompanying materials

+//  are licensed and made available under the terms and conditions of the BSD License

+//  which accompanies this distribution.  The full text of the license may be found at

+//  http://opensource.org/licenses/bsd-license.php

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

 //

 //

 

 #include <AsmMacroIoLib.h>

 #include <Base.h>

 #include <Library/PcdLib.h>

+#include <Library/ArmPlatformLib.h>

 #include <ArmPlatform.h>

-#include <Drivers/PL354Smc.h>

 #include <AutoGen.h>

 

   INCLUDE AsmMacroIoLib.inc

-  

-  EXPORT  ArmPlatformIsMemoryInitialized

+

   EXPORT  ArmPlatformInitializeBootMemory

-  IMPORT  SMCInitializeNOR

-  IMPORT  SMCInitializeSRAM

-  IMPORT  SMCInitializePeripherals

-  IMPORT  SMCInitializeVRAM

-  

+

   PRESERVE8

   AREA    CTA9x4Helper, CODE, READONLY

 

@@ -51,44 +46,3 @@ ArmPlatformIsMemoryInitialized
   tst   r0, #0x40000000

   bx	lr

     

-/**

-  Initialize the memory where the initial stacks will reside

-

-  This memory can contain the initial stacks (Secure and Secure Monitor stacks).

-  In some platform, this region is already initialized and the implementation of this function can

-  do nothing. This memory can also represent the Secure RAM.

-  This function is called before the satck has been set up. Its implementation must ensure the stack

-  pointer is not used (probably required to use assembly language)

-

-**/

-ArmPlatformInitializeBootMemory

-  mov   r5, lr

-

-  //

-  // Initialize PL354 SMC

-  //

-  LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)

-

-  // NOR Flash 0

-  mov   r2, PL354_SMC_DIRECT_CMD_ADDR_CS(0,0)

-  blx   SMCInitializeNOR

-

-  // NOR Flash 1

-  mov   r2, PL354_SMC_DIRECT_CMD_ADDR_CS(1,0)

-  blx   SMCInitializeNOR

-

-  // Setup SRAM

-  blx   SMCInitializeSRAM

-

-  // Memory Mapped Peripherals

-  blx   SMCInitializePeripherals

-

-  // Initialize VRAM

-  //TODO: Check if we really must inititialize Video SRAM in UEFI. Does Linux can do it ? Does the Video driver can do it ?

-  //      It will be faster (only initialize if required) and easier (remove assembly code because of a stack available) to move this initialization.

-  LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)

-  blx   SMCInitializeVRAM

-

-  bx	r5

-

-  END