diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-06-03 09:41:49 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-06-03 09:41:49 +0000 |
| commit | 76bc1743daa33717b30a06b821d315d7549941be (patch) | |
| tree | 3b6f3f288126e96823a7482553db2a2c28f07ad8 /ArmPlatformPkg | |
| parent | 6fd231c072abc7d066430bd72d469449aa981e28 (diff) | |
| download | edk2-platforms-76bc1743daa33717b30a06b821d315d7549941be.tar.xz | |
ArmPlatformPkg/ArmVExpressPkg: Create ArmVExpressPkg/Include/VExpressMotherBoard.h
This file contains the ARM Versatile Express motherboard definitions.
It allows to avoid duplication between different platforms based on ARM VExpress
motherboard.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11749 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg')
5 files changed, 154 insertions, 85 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc index 2aeeaf198b..75362e19da 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc @@ -230,12 +230,14 @@ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf [BuildOptions] - RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 - RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 - RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 - - ARMGCC:*_*_ARM_ARCHCC_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 - ARMGCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 + RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb + RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 + RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + RVCT:*_*_ARM_PLATFORM_FLAGS = -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 + + ARMGCC:*_*_ARM_ARCHCC_FLAGS == + ARMGCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + ARMGCC:*_*_ARM_PLATFORM_FLAGS = -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 ################################################################################ diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h index fa6e8d8bd0..3dc622ecc3 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h +++ b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h @@ -2,31 +2,34 @@ * Header defining Versatile Express constants (Base addresses, sizes, flags)
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef __ARM_VEXPRESS_H__
#define __ARM_VEXPRESS_H__
-/*******************************************
+#include <Base.h>
+#include <VExpressMotherBoard.h>
+
+/***********************************************************************************
// Platform Memory Map
-*******************************************/
+************************************************************************************/
// Can be NOR0, NOR1, DRAM
#define ARM_VE_REMAP_BASE 0x00000000
-#define ARM_VE_REMAP_SZ 0x04000000
+#define ARM_VE_REMAP_SZ SIZE_64MB
// Motherboard Peripheral and On-chip peripheral
#define ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE 0x10000000
-#define ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ 0x10000000 /* 256 MB */
+#define ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ SIZE_256MB
#define ARM_VE_BOARD_PERIPH_BASE 0x10000000
#define ARM_VE_CHIP_PERIPH_BASE 0x10020000
@@ -36,17 +39,17 @@ // NOR Flash 1
#define ARM_VE_SMB_NOR0_BASE 0x40000000
-#define ARM_VE_SMB_NOR0_SZ 0x04000000 /* 64 MB */
+#define ARM_VE_SMB_NOR0_SZ SIZE_64MB
// NOR Flash 2
#define ARM_VE_SMB_NOR1_BASE 0x44000000
-#define ARM_VE_SMB_NOR1_SZ 0x04000000 /* 64 MB */
+#define ARM_VE_SMB_NOR1_SZ SIZE_64MB
// SRAM
#define ARM_VE_SMB_SRAM_BASE 0x48000000
-#define ARM_VE_SMB_SRAM_SZ 0x02000000 /* 32 MB */
+#define ARM_VE_SMB_SRAM_SZ SIZE_32MB
// USB, Ethernet, VRAM
#define ARM_VE_SMB_PERIPH_BASE 0x4C000000
-#define ARM_VE_SMB_PERIPH_VRAM 0x4C000000
-#define ARM_VE_SMB_PERIPH_SZ 0x04000000 /* 32 MB */
+#define PL111_CLCD_VRAM_MOTHERBOARD_BASE ARM_VE_SMB_PERIPH_BASE
+#define ARM_VE_SMB_PERIPH_SZ SIZE_64MB
// DRAM
#define ARM_VE_DRAM_BASE 0x60000000
@@ -54,49 +57,48 @@ // External AXI between daughterboards (Logic Tile)
#define ARM_VE_EXT_AXI_BASE 0xE0000000
-#define ARM_VE_EXT_AXI_SZ 0x20000000
-
-/*******************************************
-// Motherboard peripherals
-*******************************************/
-
-// Define MotherBoard SYS flags offsets (from ARM_VE_BOARD_PERIPH_BASE)
-#define ARM_VE_SYS_FLAGS_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
-#define ARM_VE_SYS_FLAGS_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
-#define ARM_VE_SYS_FLAGS_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00034)
-#define ARM_VE_SYS_FLAGS_NV_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
-#define ARM_VE_SYS_FLAGS_NV_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
-#define ARM_VE_SYS_FLAGS_NV_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x0003C)
-#define ARM_VE_SYS_PROCID0_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00084)
-#define ARM_VE_SYS_PROCID1_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00088)
-#define ARM_VE_SYS_CFGDATA_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A0)
-#define ARM_VE_SYS_CFGCTRL_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A4)
-#define ARM_VE_SYS_CFGSTAT_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A8)
-
-// SP810 Controller
-#define SP810_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x01000)
-
-// Uart0
-#define PL011_CONSOLE_UART_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x09000)
-#define PL011_CONSOLE_UART_SPEED 38400
-
-// SP804 Timer Bases
-#define SP804_TIMER0_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x11000)
-#define SP804_TIMER1_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x11020)
-#define SP804_TIMER2_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x12000)
-#define SP804_TIMER3_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x12020)
-
-// Dynamic Memory Controller Base
-#define ARM_VE_DMC_BASE 0x100E0000
-
-// Static Memory Controller Base
-#define ARM_VE_SMC_CTRL_BASE 0x100E1000
+#define ARM_VE_EXT_AXI_SZ 0x20000000 /* 512 MB */
+
+
+/***********************************************************************************
+ Core Tile memory-mapped Peripherals
+************************************************************************************/
+
+// PL111 Colour LCD Controller - core tile
+#define PL111_CLCD_CORE_TILE_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x20000)
+
+// PL341 Dynamic Memory Controller Base
+#define ARM_VE_DMC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE0000)
+
+// PL354 Static Memory Controller Base
+#define ARM_VE_SMC_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE1000)
// System Configuration Controller register Base addresses
-//#define ARM_VE_SYS_CFG_CTRL_BASE 0x100E2000
-#define ARM_VE_SYS_CFGRW0_REG 0x100E2000
-#define ARM_VE_SYS_CFGRW1_REG 0x100E2004
-#define ARM_VE_SYS_CFGRW2_REG 0x100E2008
+//#define ARM_VE_SYS_CFG_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
+#define ARM_VE_SYS_CFGRW0_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
+#define ARM_VE_SYS_CFGRW1_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2004)
+#define ARM_VE_SYS_CFGRW2_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2008)
+
+#define ARM_PLATFORM_SCC_BASE ARM_VE_SYS_CFGRW0_REG
+
+// SP805 Watchdog on Cortex A9 core tile
+#define SP805_WDOG_CORE_TILE_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE5000)
+
+// BP147 TZPC Base Address
+#define ARM_VE_TZPC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE6000)
+
+// PL301 Fast AXI Base Address
+#define ARM_VE_FAXI_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE9000)
+
+// TZASC Trust Zone Address Space Controller Base Address
+#define ARM_VE_TZASC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xEC000)
+
+// PL310 L2x0 Cache Controller Base Address
+//#define ARM_VE_L2x0_CTLR_BASE 0x1E00A000
+
+/***********************************************************************************
+ Peripherals' misc settings
+************************************************************************************/
#define ARM_VE_CFGRW1_TZASC_EN_BIT_MASK 0x2000
#define ARM_VE_CFGRW1_REMAP_NOR0 0
@@ -104,14 +106,7 @@ #define ARM_VE_CFGRW1_REMAP_EXT_AXI (1 << 29)
#define ARM_VE_CFGRW1_REMAP_DRAM (1 << 30)
-// TZPC Base Address
-#define ARM_VE_TZPC_BASE 0x100E6000
-
-// PL301 Fast AXI Base Address
-#define ARM_VE_FAXI_BASE 0x100E9000
-
-// TZASC Defintions
-#define ARM_VE_TZASC_BASE 0x100EC000
+// TZASC - Other settings
#define ARM_VE_DECPROT_BIT_TZPC (1 << 6)
#define ARM_VE_DECPROT_BIT_DMC_TZASC (1 << 11)
#define ARM_VE_DECPROT_BIT_NMC_TZASC (1 << 12)
@@ -121,22 +116,19 @@ #define ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK (1 << 4)
#define ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK (1 << 5)
-// L2x0 Cache Controller Base Address
-//#define ARM_VE_L2x0_CTLR_BASE 0x1E00A000
-
-/*******************************************
+/***********************************************************************************
// Interrupt Map
-*******************************************/
+************************************************************************************/
// Timer Interrupts
-#define TIMER01_INTERRUPT_NUM 34
-#define TIMER23_INTERRUPT_NUM 35
+#define TIMER01_INTERRUPT_NUM 34
+#define TIMER23_INTERRUPT_NUM 35
-/*******************************************
+/***********************************************************************************
// EFI Memory Map in Permanent Memory (DRAM)
-*******************************************/
+************************************************************************************/
// This region is allocated at the bottom of the DRAM. It will be used
// for fixed address allocations such as Vector Table
@@ -144,7 +136,6 @@ // This region is the memory declared to PEI as permanent memory for PEI
// and DXE. EFI stacks and heaps will be declared in this region.
-#define ARM_VE_EFI_MEMORY_REGION_SZ 0x1000000
-
+#define ARM_VE_EFI_MEMORY_REGION_SZ SIZE_256MB
-#endif
+#endif
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h b/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h new file mode 100644 index 0000000000..3fcd74f683 --- /dev/null +++ b/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h @@ -0,0 +1,76 @@ +/** @file
+* Header defining Versatile Express constants (Base addresses, sizes, flags)
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __VEXPRESSMOTHERBOARD_H_
+#define __VEXPRESSMOTHERBOARD_H_
+
+#include <ArmPlatform.h>
+
+/***********************************************************************************
+// Motherboard memory-mapped peripherals
+************************************************************************************/
+
+// Define MotherBoard SYS flags offsets (from ARM_VE_BOARD_PERIPH_BASE)
+#define ARM_VE_SYS_LED_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00008)
+#define ARM_VE_SYS_FLAGS_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
+#define ARM_VE_SYS_FLAGS_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
+#define ARM_VE_SYS_FLAGS_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00034)
+#define ARM_VE_SYS_FLAGS_NV_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
+#define ARM_VE_SYS_FLAGS_NV_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
+#define ARM_VE_SYS_FLAGS_NV_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x0003C)
+#define ARM_VE_SYS_FLASH (ARM_VE_BOARD_PERIPH_BASE + 0x0004C)
+#define ARM_VE_SYS_PROCID0_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00084)
+#define ARM_VE_SYS_PROCID1_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00088)
+#define ARM_VE_SYS_CFGDATA_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A0)
+#define ARM_VE_SYS_CFGCTRL_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A4)
+#define ARM_VE_SYS_CFGSTAT_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A8)
+
+// SP810 Controller
+#define SP810_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x01000)
+
+// Uart0
+#define PL011_CONSOLE_UART_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x09000)
+
+// SP805 Watchdog on motherboard
+#define SP805_WDOG_MOTHERBOARD_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x0F000)
+
+// SP804 Timer Bases
+#define SP804_TIMER0_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x11000)
+#define SP804_TIMER1_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x11020)
+#define SP804_TIMER2_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x12000)
+#define SP804_TIMER3_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x12020)
+
+// PL031 Real Time Clock
+#define PL031_RTC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x17000)
+
+// PL111 Colour LCD Controller - motherboard
+#define PL111_CLCD_MOTHERBOARD_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x1F000)
+#define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1
+
+// VRAM offset for the PL111 Colour LCD Controller on the motherboard
+#define VRAM_MOTHERBOARD_BASE (ARM_VE_SMB_PERIPH_BASE + 0x00000)
+
+#define SYS_PROC_ID_UNSUPPORTED 0xFF
+#define SYS_PROC_ID_CORTEX_A9 0x0C
+
+//
+// Sites where the peripheral is fitted
+//
+#define ARM_VE_UNSUPPORTED ~0
+#define ARM_VE_MOTHERBOARD_SITE 0
+#define ARM_VE_DAUGHTERBOARD_1_SITE 1
+#define ARM_VE_DAUGHTERBOARD_2_SITE 2
+
+#endif /* VEXPRESSMOTHERBOARD_H_ */
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S index f18d0569fd..fe63904d62 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S @@ -67,7 +67,7 @@ ASM_PFX(ArmPlatformInitializeBootMemory): mov r5, lr
// Initialize PL354 SMC
LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
- LoadConstantToReg (ARM_VE_SMB_PERIPH_VRAM, r2)
+ LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
blx ASM_PFX(InitializeSMC)
bx r5
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm index 673052f14e..7d59f5017d 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm @@ -61,7 +61,7 @@ ArmPlatformInitializeBootMemory mov r5, lr
// Initialize PL354 SMC
LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
- LoadConstantToReg (ARM_VE_SMB_PERIPH_VRAM, r2)
+ LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
blx InitializeSMC
bx r5
|