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It is no longer necessary to inhibit DEBUG() calls at runtime, due to
the fact that we switched to a DebugLib implementation that takes care
of this. Since a platform could theoretically wire up DXE_RUNTIME_DRIVER
modules to a DebugLib/SerialPortLib implementation combo that does remap
the UART MMIO region for runtime and produces UEFI debug output on a UART
that is not owned by the OS, it is better not to handle this in the
driver directly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Commit 4bf95a9f361e ("MdeModulePkg/ResetSystemRuntimeDxe: Add more
debug message") broke the DEBUG build for all platforms that rely on
MMIO mapped UART devices, since it introduces a DEBUG() print that
may trigger at runtime, at which such UART devices are usually not
mapped, resulting in an OS crash.
Given that this mostly only affects ARM and AARCH64, it is not unlikely
that similar inadvertent breakage will occur again in the future, so
let's fix this once and for all by switching affected platforms to the
new DxeRuntimeDebugLibSerialPort DebugLib implementation that takes care
not to touch the UART hardware after ExitBootServices().
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Wire up the various drivers for the 96Boards LS connector and the
optional Secure96 mezzanine board.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This adds a driver that manages the 96Boards LS connector, i.e, it
installs a HII page to configure the type of mezzanine that is installed
in the slot, and it exposes this information via the LS connector protocol.
It is also in charge of applying the overlay to the platform device tree
at end of DXE.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add a driver that describes the Secure96 mezzanine board, and exposes
both the information required to describe it to the OS using a DT overlay,
and to describe it to UEFI itself.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Introduce a protocol describing the presence of a 96boards low speed (LS)
connector, and identifying the type of mezzanine that has been installed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Implement a I2C DXE driver that wires up the I2C devices exposed by
a 96boards mezzanine into the EDK2 I2C stack. Note that this requires
the platform to identify its I2C master implementations using special
GUIDs-as-protocols. It also assumes [for now] that I2C buses are not
shared between the 96boards connector and other platform peripherals.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Introduce the mezzanine protocol and the 96Boards package defining
the PCDs and GUIDs that may be used by implementations of the
protocol.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This adds support for using the random number generator in the Atmel
AtSha204a over I2C. Other functionality of the chip is currently
unsupported.
Note that the the I2C support in this device essentially violates the
protocol layering, by requiring that the device is woken up by driving
SDA low for a certain amount of time, which is something that cannot be
expressed in terms of an I2C packet sent to the device's slave address.
Instead, the slave address 0x0 is added to the device's address array,
and the wake is sent by sending a dummy write to address 0x0, and
ignoring the subsequent error. This requires the I2C bus to be clocked
at 100 kHz.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Currently, SynQuacerI2cStartRequest() increases the TPL to TPL_HIGH_LEVEL
while accessing the I2C controller hardware, but fails to restore the TPL
to the original level if the call to SynQuacerI2cMasterStart() fails, and
returns right away. Given the TPL_HIGH_LEVEL implies that interrupts are
disabled, this results in a complete system hang. So instead, break out
of the loop, so that the TPL restore will occur before leaving the
function.
Note that this will result in the bus control bits to be de-asserted in
case of a failure to send the START condition, which is an appropriate
cleanup action to take after SynQuacerI2cMasterStart() fails.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add a node for the I2C controller #1 to the device tree so the OS
may attach to it. This is the I2C controller that is attached to the
96boards mezzanine connector on Developer Box.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add a node for the SPI controller to the device tree so the OS may
attach to it. This is the SPI controller that is attached to the
96boards mezzanine connector on Developer Box.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add skeleton of HiKey960 platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Use common file Hisilicon.dsc.inc/Hisilicon.fdf.inc to reduce
redundant contents in both HiKey.dsc and HiKey.fdf.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Dw8250SerialPortRuntimeLib only exists in D02.
DebugLib isn't necessary on HiKey platform. So add CONFIG_NO_DEBUGLIB
on it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Include DxePcdLib for HiiDatabase. Otherwise, PlatformBootManager
can't be launched successfully.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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edk2 commit 1ec2e7d0e8db
("MdeModulePkg/DxeCapsuleLibFmp: Use BmpSupportLib") broke the build of
all platforms that include DxeCapsuleLibFmp, since none of them included
a BmpSupportLib (added as part of the same series).
BmpSupportLib itself depends on SafeIntLib, so add the two libraries to
all affected platforms.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
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Due to copy-paste error, both d03 and d05 ended up with capsule sections
named Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7 in their .fdf files.
Change these to the actual platform names.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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PcdCacheEnabled was never useful for these platforms, but it was
copied over from other platforms used as templates.
Delete it here to keep the platforms building once the Pcd is removed
from EmbeddedPkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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PcdCacheEnabled does nothing useful for these platforms.
Delete all uses of it here to keep the platforms building once the Pcd is
removed from EmbeddedPkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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PcdCacheEnabled was never useful for these platforms, but they copied it
over from other platforms used as templates.
Delete it here to keep the platforms building once the Pcd is removed
from EmbeddedPkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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On our SynQuacer based platform, power state handling and other
low-level duties are handled by the secure firmware, not by the
OS, so remove the various MHU/SCPI related nodes from the device
tree.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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We already disable SDR104 support on the SynQuacer eMMC controller to
work around the need for a special tuning quirk that is difficult to
implement without modifying the generic driver, even in the presence
of a SD/MMC override protocol designed to carry such quirks.
Unfortunately, as it turns out, DDR50 does not work either with the
particular 8 GB Kingston part that has been fitted on the rev0.2/0.3
96board samples. Since the mode UEFI drives the eMMC in is independent
from what the OS chooses, and the fact that you would not use eMMC in
the first place if performance was a major concern, let's just disable
DDR50 as well, and fall back to SDR50 mode.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Replace the old string with short one. The old one is
too long that can not be show integrallty in Setup nemu.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
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Add PXM method for Pcie device, HNS device and SAS device.
Add STA method for HNS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: hensonwang <wanghuiqiang@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
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Add ITS affinity structure in SRAT.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
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In SCT test,we find SP805 watchdog driver can't reset when timeout
so we use another driver in MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: GongChengYa <gongchengya1@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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In SCT test,we find SP805 watchdog driver can't reset when timeout
so we use another driver in MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: GongChengYa <gongchengya1@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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In order to replace command line parameter pcie_aspm=off, BIOS needs to
disable Pcie Aspm support during Pcie initilization.
D03 and D05 do not support PCIe ASPM, so we disable it in BIOS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: Yan Zhang <zhangyan81@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2,
indicator to obtain the processor family from the Processor Family 2 field.
ProcessorFamily2 is already specified as ProcessorFamilyARM in the existing
table.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Unify all D0x(include D06 in further) to cache coherent DmaLib.
This can improve boot speed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wang Yue <wangyue41@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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1. This driver install a protocol for SnpPV600Dxe driver.
The protocol indicate which ethernet port to use and port sequence.
2. Fixed bug:Confusing Ethernet port sequence.
Move the most right Ethernet port (when looking from the front
of the chassis) to the first one in BootManage for PXE boot.
https://bugs.linaro.org/show_bug.cgi?id=2657
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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This module install a protocol for SasDriverDxe. the protocol
include main information of sas controller, like controller ID,
enable or disable,base address of registers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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This module support updating the boot CPU firmware only.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Modify the feature of BMC set boot option as switching generic
BDS. Break BMC SetBoot option out into BmcConfigBootLib.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Hisilicon-specific PlatformBootManagerLib added. It is convenient
to add specific feature, like BMC control boot option.
Remove Intel BDS from dsc file because it is out of use.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Add Processor Properties Topology Table, PPTT include
Processor hierarchy node, Cache Type Structure and ID structure.
PPTT is needed for lscpu command to show socket information correctly.
https://bugs.linaro.org/show_bug.cgi?id=3206
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reveiwed-by: Jeremy Linton <jeremy.linton@arm.com>
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Move definition of Madt struct to head file, so PPTT driver
can include it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reveiwed-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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A set of mostly Ebl-related Pcds are about to be deleted from
edk2. Delete references to them here to keep platforms building.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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A set of mostly Ebl-related Pcds are about to be deleted from
edk2. Delete references to them here to keep platforms building.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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A set of mostly Ebl-related Pcds are about to be deleted from
edk2. Delete references to them here to keep platforms building.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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'AMD Seattle' is not a firmware vendor, nor is 'LeMaker Cello' So
let's do what other platforms do, and default to 'EDK II' unless
it is overridden at build time by setting FIRMWARE_VENDOR.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add the ConsolePrefDxe driver so we can get the console on the framebuffer
rather than on the serial port.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add the first part of the flash device (FD) to the capsule image so we
can update the secure and SCP firmware in one go along with the UEFI
firmware volume (FV).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Switch to the split prebuilt firmware image for the SCP and the AP
secure world. This allows Overdrive and Cello to share the latter
image, which we will update shortly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Implement support for the SynQuacer eMMC controller. This involves an
implementation of the SD/MMC override protocol to handle a couple of
quirks that would otherwise prevent this IP from being driven by the
generic SDHCI driver.
Also, add a HII page to the PlatformDxe driver that allows eMMC support
to be enabled, and wire it up for both DeveloperBox and EVB.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The base models could have different values for the revision ID field
in the System ID register. Base models do not have support for DVI
and so the revision ID field should also be masked out when checking
for the presence of DVI support.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
[Reworded adjacent code comments.]
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Reuse the BootLogoLib graphical progress bar to show the progress of a
capsule update, and in absence of a graphical console, write a period
to the text console for each block updated.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Even though the ARM ARM quite clearly states that the CNTFRQ field of
each MMIO timer frame should be a read-only alias of the CNTFRQ field
of the base frame, the SynQuacer SoC implements it as a register that
is programmable separately.
So let's program it from the hardware rather than overriding the
frequency using a DT property.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add the drivers that make the serial and graphical console behave more
intuitively.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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