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2018-03-12Hisilicon/D05: Support SBSA watchdogChenhui Sun
Add description of SBSA watchdogs to ACPI GTDT on D05. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chenhui Sun <sunchenhui@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-03-07Hisilicon: disable GICv3 legacy modegongchengya
Hi1616 GIC does not fully support GICv2 legacy mode, and SBSA watchdog interrupts 400 and 496 cannot be signaled to CPU, so we switch to pure GICv3 mode. For other Hisilicon platforms, we suppose they don't need V2 legacy mode either if they have GICv3. D03 also works for this patch. If the platforms only have GICv2, this change will have no impact on them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: gongchengya <gongchengya1@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-03-07Hisilicon/D0x: Set ACPI GTDT always-on flagJason Zhang
Timer is always working on Hisilicon D0x, even system enters WFI/WFE, and there is no other low power status, so we set "always-on" flag in ACPI GTDT. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-27Platform,Silicon: use DxeRuntimeDebugLibSerialPort for runtime DXE driversArd Biesheuvel
Commit 4bf95a9f361e ("MdeModulePkg/ResetSystemRuntimeDxe: Add more debug message") broke the DEBUG build for all platforms that rely on MMIO mapped UART devices, since it introduces a DEBUG() print that may trigger at runtime, at which such UART devices are usually not mapped, resulting in an OS crash. Given that this mostly only affects ARM and AARCH64, it is not unlikely that similar inadvertent breakage will occur again in the future, so let's fix this once and for all by switching affected platforms to the new DxeRuntimeDebugLibSerialPort DebugLib implementation that takes care not to touch the UART hardware after ExitBootServices(). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-02-16Platform/Hisilicon: move out SerialPortLib from common fileHaojian Zhuang
Dw8250SerialPortRuntimeLib only exists in D02. DebugLib isn't necessary on HiKey platform. So add CONFIG_NO_DEBUGLIB on it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-02-15AMD, Hisilicon, Socionext: fix build after DxeCapsuleLibFmp changesLeif Lindholm
edk2 commit 1ec2e7d0e8db ("MdeModulePkg/DxeCapsuleLibFmp: Use BmpSupportLib") broke the build of all platforms that include DxeCapsuleLibFmp, since none of them included a BmpSupportLib (added as part of the same series). BmpSupportLib itself depends on SafeIntLib, so add the two libraries to all affected platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2018-02-09(Platform/Silicon)/Hisilicon: drop use of PcdCacheEnabledLeif Lindholm
PcdCacheEnabled was never useful for these platforms, but it was copied over from other platforms used as templates. Delete it here to keep the platforms building once the Pcd is removed from EmbeddedPkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXMHeyi Guo
Add PXM method for Pcie device, HNS device and SAS device. Add STA method for HNS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: hensonwang <wanghuiqiang@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
2018-02-07Hisilicon/D05/ACPI: Add ITS PXMHeyi Guo
Add ITS affinity structure in SRAT. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
2018-02-07Hisilicon/PCIe: Disable PCIe ASPMHeyi Guo
In order to replace command line parameter pcie_aspm=off, BIOS needs to disable Pcie Aspm support during Pcie initilization. D03 and D05 do not support PCIe ASPM, so we disable it in BIOS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Signed-off-by: Yan Zhang <zhangyan81@huawei.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon/Smbios: Indicate use of ProcessorFamily2 in type 4 tableHeyi Guo
modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2, indicator to obtain the processor family from the Processor Family 2 field. ProcessorFamily2 is already specified as ProcessorFamilyARM in the existing table. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hilisicon: Change DmaLib to CoherentDmaLibHeyi Guo
Unify all D0x(include D06 in further) to cache coherent DmaLib. This can improve boot speed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Wang Yue <wangyue41@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon D03/D05: Open SnpPlatform source codeHeyi Guo
1. This driver install a protocol for SnpPV600Dxe driver. The protocol indicate which ethernet port to use and port sequence. 2. Fixed bug:Confusing Ethernet port sequence. Move the most right Ethernet port (when looking from the front of the chassis) to the first one in BootManage for PXE boot. https://bugs.linaro.org/show_bug.cgi?id=2657 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon D03/D05: Open SasPlatform source codeHeyi Guo
This module install a protocol for SasDriverDxe. the protocol include main information of sas controller, like controller ID, enable or disable,base address of registers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon D03/D05: Add capsule upgrade supportHeyi Guo
This module support updating the boot CPU firmware only. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-02-07Hisilicon/D0x: Break BMC SetBoot option out into separate libraryHeyi Guo
Modify the feature of BMC set boot option as switching generic BDS. Break BMC SetBoot option out into BmcConfigBootLib. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon/D0x/BDS: Switch to Generic BDS driverHeyi Guo
Hisilicon-specific PlatformBootManagerLib added. It is convenient to add specific feature, like BMC control boot option. Remove Intel BDS from dsc file because it is out of use. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-02-07Hisilicon/D05: Add PPTT supportHeyi Guo
Add Processor Properties Topology Table, PPTT include Processor hierarchy node, Cache Type Structure and ID structure. PPTT is needed for lscpu command to show socket information correctly. https://bugs.linaro.org/show_bug.cgi?id=3206 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org> Reveiwed-by: Jeremy Linton <jeremy.linton@arm.com>
2018-02-07Hisilicon/D05: Move Madt definition to head fileHeyi Guo
Move definition of Madt struct to head file, so PPTT driver can include it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org> Reveiwed-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-02-06<Platform|Silicon>/Hisilicon: drop unused EmbeddedPkg PcdsLeif Lindholm
A set of mostly Ebl-related Pcds are about to be deleted from edk2. Delete references to them here to keep platforms building. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-12-12Platform Silicon: remove obsolete ArmPlatformPkg PCD assignmentsArd Biesheuvel
Remove unused ArmPlatformPkg PCDs from all platform descriptions. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-30Platform Silicon: remove ArmPlatformInitializeSystemMemory () functionsArd Biesheuvel
The function ArmPlatformInitializeSystemMemory () has been removed from ArmPlatformLib, so remove all the [empty] implementations provided by the various platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-30Platform,Silicon: Update Hisilicon Shell tftp command configLeif Lindholm
EDK2 changed the tftp shell command from a library to a dynamic command. Update configuration files to reflect this. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-11-30Silicon/AMD Silicon/Hisilicon: remove ArmGetCpuCountPerCluster()Ard Biesheuvel
The function ArmGetCpuCountPerCluster () was moved out of ArmPlatformLib because it was unused (except internally by one of the implementations) So remove the remaining implementations from edk2-platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: switch to new PL011UartLibArd Biesheuvel
Switch to the new version of PL011UartLib which supersedes the one residing in Drivers/ inappropriately. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove stale EBL related PCD settingsArd Biesheuvel
Remove all gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt assignments, which are no longer meaningful with EBL removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove stale PL35xSmcLib referencesArd Biesheuvel
No drivers actually use PL35xSmcLib so remove any resolutions for it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove references to EBL librariesArd Biesheuvel
None of these platforms still include EBL, but some references remained to its support libraries. Get rid of that. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform/Hisilicon: remove bogus VExpress dependenciesArd Biesheuvel
Remove false copy-pasted dependencies on various VExpress support libraries. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove bogus ArmTrustedMonitorLib referencesArd Biesheuvel
Remove copy-pasted ArmTrustedMonitorLib library class resolutions that none of the platforms actually need. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-26Platform: remove bogus ArmPlatformSecExtraActionLib referencesArd Biesheuvel
Remove copy-pasted ArmPlatformSecExtraActionLib library class resolutions that none of the platforms actually need. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05Platform/Hisilicon: fix D02 driver indentation errorsLeif Lindholm
When building with a somewhat recent toolchain (GCC 6.3), the D02 platform fails due to (the implicit) -Werror=misleading-indentation. Cc: Heyi Guo <heyi.guo@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-10-05Hisilicon/D03/D05: Add AddressTranslationOffset supportYan Zhang
Assign valid value to AddressTranslationOffset to support address translation between domains of CPU and PCIe, which is need by GOP to enable frame buffer. This patch fix the bug: Kernel (4.12, without the vga driver) boot hang with kernel panic while kernel accesses UEFI GOP frame buffer. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yan Zhang <zhangyan81@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.Jason zhang
1. Because Hi161x chip doesn't support "ARI Forwarding Enable" function, BIOS will enumerate 32 same devices (Device Number 0~31) when a Non-ARI capable device attached in the RP. Hi161x chip will not fix it, need BIOS patch. 2. Just enlarge iatu for those root port with ARI capable device attached, Non-ARI capable device's RP, keep iatu limitation. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason zhang <zhangjinsong2@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05D05/ACPI: Modify I2C deviceMing Huang
1. Disable I2C0 device avoiding access conflict in OS, for it is used by UEFI to access DS3231 RTC chip and provide time services; 2. Modify _HID of I2C2 for matching the string in OS driver; Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05D05/ACPI: Disable D05 SAS0 and SAS2Ming Huang
There is no interface from SAS0 or SAS2 controller on D05, so SAS0 and SAS2 can't be used. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05Hisilicon/D03: Disable the function of PerfTuningChenhui Sun
The PerTuning function is not stable, it will cause the LSI SAS 3008/3108 crash, disable this function first. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chenhui Sun <chenhui.sun@linaro.org> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05D05/PCIe: Modify PcieRegionBase of secondary chipMing Huang
On D05 PCIe now, 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses are 0x20000000 and 0x30000000 based. These addresses overlap with the DDR memory range 0-1G. In this situation, on the inbound direction, our pcie will drop the DDR address access that are located in the pci range window and lead to a dataflow error. Modify 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses to 0x40000000 and decrease PciRegion Size accordingly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBaseHeyi Guo
Io BAR should be based IoBase and Mem BAR should be based PciRegionBase. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-05Hisilicon: Fix the drivers use the same GUID issueHeyi Guo
The drivers build from separate sources, their GUID should be different. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-09-01Platform/Hisilicon: switch to NonCoherentDmaLibArd Biesheuvel
Remove the shared ArmDmaLib resolution from the shared .dsc include file: it will be removed soon from upstream EDK2. Instead, replace it with an explicit NonCoherentDmaLib resolution for each driver that depends on DmaLib. This makes it more obvious which peripherals are non cache coherent, and forces derived platforms to choose a DmaLib resolution explicitly for newly added drivers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-08-29Silicon/Hisilicon: switch to NonDiscoverable driver for EHCIArd Biesheuvel
Replace the open coded PCI 'emulation' with a simple call into the NonDiscoverable device registration library, and fix up all platform .DSCs/FDFs accordingly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-08-29Silicon/Hisilicon/SasV1Dxe: remove bogus UncachedMemoryAllocationLib refArd Biesheuvel
This driver does not actually use UncachedMemoryAllocationLib anymore, so remove the bogus reference. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-08-03Platform,Silicon: Import Hisilicon D02,D03,D05 and HiKeyLeif Lindholm
Imported from commit efd798c1eb of https://git.linaro.org/uefi/OpenPlatformPkg.git Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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