| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-04-26 | Silicon/Socionext/SynQuacer: update PHY reference clock rate | Ard Biesheuvel | |
| As reported by Kojima-san, the PHY reference clock value we use in our ACPI and DT descriptions is out of sync with the hardware. Replace 125 MHz with 250 MHz throughout. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> | |||
| 2017-11-16 | Silicon/Socionext: add driver for NETSEC network controller | Ard Biesheuvel | |
| This adds the NetSecDxe driver provided by Socionext, but reworked extensively to improve compliance with the SimpleNetworkProtocol API, and to avoid uncached allocations for streaming DMA. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> | |||
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index : edk2-platforms.git | |
| (https://github.com/tianocore/edk2-platforms) |
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