diff options
author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-05-28 08:13:40 -0700 |
---|---|---|
committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-05-28 08:13:40 -0700 |
commit | 05915ed6f7e9f1f73f07d24bcb304f938fdc3d30 (patch) | |
tree | 16deb0db75e15838f1f9db9704c79cb772bcf677 | |
parent | 075f4b108a325e9cf2b903cd17fdbcac7598b6b0 (diff) | |
parent | 41f6cbce9aa24f9cd8a6eb4a340dcc2e9671cdcb (diff) | |
download | gem5-05915ed6f7e9f1f73f07d24bcb304f938fdc3d30.tar.xz |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 6f462916cb0eb309b6799e94fbf07629abb50eba
-rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 1 | ||||
-rw-r--r-- | src/cpu/simple_thread.hh | 1 | ||||
-rw-r--r-- | src/mem/packet.cc | 11 | ||||
-rw-r--r-- | src/mem/packet.hh | 16 | ||||
-rw-r--r-- | src/mem/physical.cc | 15 | ||||
-rw-r--r-- | src/mem/tport.cc | 84 | ||||
-rw-r--r-- | src/mem/tport.hh | 47 |
7 files changed, 91 insertions, 84 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index d78162243..d1214223b 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -53,7 +53,6 @@ #include "arch/vtophys.hh" #include "base/callback.hh" #include "cpu/profile.hh" -#include "mem/physical.hh" #include "sim/faults.hh" #include "sim/sim_events.hh" #include "sim/sim_exit.hh" diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 824914ad0..95848ee2c 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -38,7 +38,6 @@ #include "config/full_system.hh" #include "cpu/thread_context.hh" #include "cpu/thread_state.hh" -#include "mem/physical.hh" #include "mem/request.hh" #include "sim/byteswap.hh" #include "sim/eventq.hh" diff --git a/src/mem/packet.cc b/src/mem/packet.cc index 8c69def37..a257e16ab 100644 --- a/src/mem/packet.cc +++ b/src/mem/packet.cc @@ -193,11 +193,12 @@ fixPacket(PacketPtr func, PacketPtr timing) func->flags |= SATISFIED; return false; } else { - // In this case the timing packet only partially satisfies the - // requset, so we would need more information to make this work. - // Like bytes valid in the packet or something, so the request could - // continue and get this bit of possibly newer data along with the - // older data not written to yet. + // In this case the timing packet only partially satisfies + // the request, so we would need more information to make + // this work. Like bytes valid in the packet or + // something, so the request could continue and get this + // bit of possibly newer data along with the older data + // not written to yet. panic("Timing packet only partially satisfies the functional" "request. Now what?"); } diff --git a/src/mem/packet.hh b/src/mem/packet.hh index 413ffa26b..e2349e42f 100644 --- a/src/mem/packet.hh +++ b/src/mem/packet.hh @@ -506,16 +506,18 @@ class Packet bool intersect(PacketPtr p); }; -/** This function given a functional packet and a timing packet either satisfies - * the timing packet, or updates the timing packet to reflect the updated state - * in the timing packet. It returns if the functional packet should continue to - * traverse the memory hierarchy or not. +/** This function given a functional packet and a timing packet either + * satisfies the timing packet, or updates the timing packet to + * reflect the updated state in the timing packet. It returns if the + * functional packet should continue to traverse the memory hierarchy + * or not. */ bool fixPacket(PacketPtr func, PacketPtr timing); -/** This function is a wrapper for the fixPacket field that toggles the hasData bit - * it is used when a response is waiting in the caches, but hasn't been marked as a - * response yet (so the fixPacket needs to get the correct value for the hasData) +/** This function is a wrapper for the fixPacket field that toggles + * the hasData bit it is used when a response is waiting in the + * caches, but hasn't been marked as a response yet (so the fixPacket + * needs to get the correct value for the hasData) */ bool fixDelayedResponsePacket(PacketPtr func, PacketPtr timing); diff --git a/src/mem/physical.cc b/src/mem/physical.cc index 6621c36cf..9d840fe69 100644 --- a/src/mem/physical.cc +++ b/src/mem/physical.cc @@ -414,20 +414,7 @@ PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt) void PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt) { - //Since we are overriding the function, make sure to have the impl of the - //check or functional accesses here. - std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin(); - std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end(); - bool notDone = true; - - while (i != end && notDone) { - PacketPtr target = i->second; - // If the target contains data, and it overlaps the - // probed request, need to update data - if (target->intersect(pkt)) - notDone = fixPacket(pkt, target); - i++; - } + checkFunctional(pkt); // Default implementation of SimpleTimingPort::recvFunctional() // calls recvAtomic() and throws away the latency; we can save a diff --git a/src/mem/tport.cc b/src/mem/tport.cc index 9a4bd7967..8797cf6e6 100644 --- a/src/mem/tport.cc +++ b/src/mem/tport.cc @@ -31,23 +31,32 @@ #include "mem/tport.hh" void -SimpleTimingPort::recvFunctional(PacketPtr pkt) +SimpleTimingPort::checkFunctional(PacketPtr pkt) { - std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin(); - std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end(); - bool notDone = true; + DeferredPacketIterator i = transmitList.begin(); + DeferredPacketIterator end = transmitList.end(); - while (i != end && notDone) { - PacketPtr target = i->second; + while (i != end) { + PacketPtr target = i->pkt; // If the target contains data, and it overlaps the // probed request, need to update data - if (target->intersect(pkt)) - notDone = fixPacket(pkt, target); + if (target->intersect(pkt)) { + if (!fixPacket(pkt, target)) { + // fixPacket returns true for continue, false for done + return; + } + } i++; } +} - //Then just do an atomic access and throw away the returned latency +void +SimpleTimingPort::recvFunctional(PacketPtr pkt) +{ + checkFunctional(pkt); + + // Just do an atomic access and throw away the returned latency if (pkt->result != Packet::Success) recvAtomic(pkt); } @@ -67,12 +76,9 @@ SimpleTimingPort::recvTiming(PacketPtr pkt) pkt->makeTimingResponse(); sendTiming(pkt, latency); } - else { - if (pkt->cmd != MemCmd::UpgradeReq) - { - delete pkt->req; - delete pkt; - } + else if (pkt->cmd != MemCmd::UpgradeReq) { + delete pkt->req; + delete pkt; } return true; } @@ -81,12 +87,12 @@ void SimpleTimingPort::recvRetry() { assert(!transmitList.empty()); - if (Port::sendTiming(transmitList.front().second)) { + if (Port::sendTiming(transmitList.front().pkt)) { transmitList.pop_front(); DPRINTF(Bus, "No Longer waiting on retry\n"); if (!transmitList.empty()) { - Tick time = transmitList.front().first; - sendEvent.schedule(time <= curTick ? curTick+1 : time); + Tick time = transmitList.front().tick; + sendEvent->schedule(time <= curTick ? curTick+1 : time); } } @@ -101,29 +107,29 @@ SimpleTimingPort::sendTiming(PacketPtr pkt, Tick time) { // Nothing is on the list: add it and schedule an event if (transmitList.empty()) { - assert(!sendEvent.scheduled()); - sendEvent.schedule(curTick+time); - transmitList.push_back(std::pair<Tick,PacketPtr>(time+curTick,pkt)); + assert(!sendEvent->scheduled()); + sendEvent->schedule(curTick+time); + transmitList.push_back(DeferredPacket(time+curTick, pkt)); return; } // something is on the list and this belongs at the end - if (time+curTick >= transmitList.back().first) { - transmitList.push_back(std::pair<Tick,PacketPtr>(time+curTick,pkt)); + if (time+curTick >= transmitList.back().tick) { + transmitList.push_back(DeferredPacket(time+curTick, pkt)); return; } // Something is on the list and this belongs somewhere else - std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin(); - std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end(); + DeferredPacketIterator i = transmitList.begin(); + DeferredPacketIterator end = transmitList.end(); bool done = false; while (i != end && !done) { - if (time+curTick < i->first) { + if (time+curTick < i->tick) { if (i == transmitList.begin()) { //Inserting at begining, reschedule - sendEvent.reschedule(time+curTick); + sendEvent->reschedule(time+curTick); } - transmitList.insert(i,std::pair<Tick,PacketPtr>(time+curTick,pkt)); + transmitList.insert(i, DeferredPacket(time+curTick, pkt)); done = true; } i++; @@ -132,20 +138,20 @@ SimpleTimingPort::sendTiming(PacketPtr pkt, Tick time) } void -SimpleTimingPort::SendEvent::process() +SimpleTimingPort::processSendEvent() { - assert(port->transmitList.size()); - assert(port->transmitList.front().first <= curTick); - if (port->Port::sendTiming(port->transmitList.front().second)) { + assert(transmitList.size()); + assert(transmitList.front().tick <= curTick); + if (Port::sendTiming(transmitList.front().pkt)) { //send successful, remove packet - port->transmitList.pop_front(); - if (!port->transmitList.empty()) { - Tick time = port->transmitList.front().first; - schedule(time <= curTick ? curTick+1 : time); + transmitList.pop_front(); + if (!transmitList.empty()) { + Tick time = transmitList.front().tick; + sendEvent->schedule(time <= curTick ? curTick+1 : time); } - if (port->transmitList.empty() && port->drainEvent) { - port->drainEvent->process(); - port->drainEvent = NULL; + if (transmitList.empty() && drainEvent) { + drainEvent->process(); + drainEvent = NULL; } return; } diff --git a/src/mem/tport.hh b/src/mem/tport.hh index 3d28ea3e5..9e8a01786 100644 --- a/src/mem/tport.hh +++ b/src/mem/tport.hh @@ -58,9 +58,26 @@ class SimpleTimingPort : public Port { protected: + /** A deferred packet, buffered to transmit later. */ + class DeferredPacket { + public: + Tick tick; ///< The tick when the packet is ready to transmit + PacketPtr pkt; ///< Pointer to the packet to transmit + DeferredPacket(Tick t, PacketPtr p) + : tick(t), pkt(p) + {} + }; + + typedef std::list<DeferredPacket> DeferredPacketList; + typedef std::list<DeferredPacket>::iterator DeferredPacketIterator; + /** A list of outgoing timing response packets that haven't been * serviced yet. */ - std::list<std::pair<Tick,PacketPtr> > transmitList; + DeferredPacketList transmitList; + + /** This function attempts to send deferred packets. Scheduled to + * be called in the future via SendEvent. */ + void processSendEvent(); /** * This class is used to implemented sendTiming() with a delay. When @@ -68,27 +85,19 @@ class SimpleTimingPort : public Port * When the event time expires it attempts to send the packet. * If it cannot, the packet sent when recvRetry() is called. **/ - class SendEvent : public Event - { - SimpleTimingPort *port; - - public: - SendEvent(SimpleTimingPort *p) - : Event(&mainEventQueue), port(p) - { } - - virtual void process(); - - virtual const char *description() - { return "Future scheduled sendTiming event"; } - }; + typedef EventWrapper<SimpleTimingPort, &SimpleTimingPort::processSendEvent> + SendEvent; - SendEvent sendEvent; + Event *sendEvent; /** If we need to drain, keep the drain event around until we're done * here.*/ Event *drainEvent; + /** Check the list of buffered packets against the supplied + * functional request. */ + void checkFunctional(PacketPtr funcPkt); + /** Schedule a sendTiming() event to be called in the future. * @param pkt packet to send * @param time increment from now (in ticks) to send packet @@ -115,9 +124,13 @@ class SimpleTimingPort : public Port public: SimpleTimingPort(std::string pname, MemObject *_owner = NULL) - : Port(pname, _owner), sendEvent(this), drainEvent(NULL) + : Port(pname, _owner), + sendEvent(new SendEvent(this)), + drainEvent(NULL) {} + ~SimpleTimingPort() { delete sendEvent; } + /** Hook for draining timing accesses from the system. The * associated SimObject's drain() functions should be implemented * something like this when this class is used: |