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author | Steve Reinhardt <stever@gmail.com> | 2008-06-28 13:20:00 -0400 |
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committer | Steve Reinhardt <stever@gmail.com> | 2008-06-28 13:20:00 -0400 |
commit | 96bbccc36bad7c6f67b1cb70965eab3a621c7270 (patch) | |
tree | e43e352c7d264d3b84540dd5d3ed26b3e5386a4b | |
parent | caaac16803db6eaf3ee20b5d062ec2211fe6584d (diff) | |
parent | 3205768ea57b4e2f75561eebb39671045a6d6746 (diff) | |
download | gem5-96bbccc36bad7c6f67b1cb70965eab3a621c7270.tar.xz |
Automated merge after backout.
-rw-r--r-- | src/mem/bus.cc | 9 | ||||
-rw-r--r-- | src/python/swig/event.i | 4 | ||||
-rw-r--r-- | src/sim/sim_object.hh | 5 | ||||
-rw-r--r-- | src/sim/sim_object_params.hh | 2 |
4 files changed, 13 insertions, 7 deletions
diff --git a/src/mem/bus.cc b/src/mem/bus.cc index 3bf1c6cfc..606402a1e 100644 --- a/src/mem/bus.cc +++ b/src/mem/bus.cc @@ -523,9 +523,12 @@ Bus::recvStatusChange(Port::Status status, int id) for (iter = ranges.begin(); iter != ranges.end(); iter++) { DPRINTF(BusAddrRanges, "Adding range %#llx - %#llx for id %d\n", iter->start, iter->end, id); - if (portMap.insert(*iter, id) == portMap.end()) - panic("Two devices with same range\n"); - + if (portMap.insert(*iter, id) == portMap.end()) { + int conflict_id = portMap.find(*iter)->second; + fatal("%s has two ports with same range:\n\t%s\n\t%s\n", + name(), interfaces[id]->getPeer()->name(), + interfaces[conflict_id]->getPeer()->name()); + } } } DPRINTF(MMU, "port list has %d entries\n", portMap.size()); diff --git a/src/python/swig/event.i b/src/python/swig/event.i index ee1f3d00b..9a2093c99 100644 --- a/src/python/swig/event.i +++ b/src/python/swig/event.i @@ -44,8 +44,8 @@ void create(PyObject *object, Tick when); -class CountedDrainEvent -{ +class Event; +class CountedDrainEvent : public Event { public: void setCount(int _count); }; diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh index ec565ce82..00bb3fee6 100644 --- a/src/sim/sim_object.hh +++ b/src/sim/sim_object.hh @@ -36,10 +36,11 @@ #ifndef __SIM_OBJECT_HH__ #define __SIM_OBJECT_HH__ -#include <map> +#include <iostream> #include <list> +#include <map> +#include <string> #include <vector> -#include <iostream> #include "params/SimObject.hh" #include "sim/serialize.hh" diff --git a/src/sim/sim_object_params.hh b/src/sim/sim_object_params.hh index 4179a37bf..5a629a949 100644 --- a/src/sim/sim_object_params.hh +++ b/src/sim/sim_object_params.hh @@ -36,6 +36,8 @@ struct PyObject; #endif +#include <string> + struct SimObjectParams { virtual ~SimObjectParams() {} |