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authorSwapnil Haria <swapnilh@cs.wisc.edu>2015-11-16 05:08:54 -0600
committerSwapnil Haria <swapnilh@cs.wisc.edu>2015-11-16 05:08:54 -0600
commit08cec03f8ec3bc427700343a7bd7d216433f93fc (patch)
tree533d50e08b31a36394e50b4cede7a13b376fc09f
parentf50e92d2c7931bc5145d0c4f2ec94362a4414160 (diff)
downloadgem5-08cec03f8ec3bc427700343a7bd7d216433f93fc.tar.xz
x86: Invalidating TLB entry on page fault
As per the x86 architecture specification, matching TLB entries need to be invalidated on a page fault. For instance, after a page fault due to inadequate protection bits on a TLB hit, the TLB entry needs to be invalidated. This behavior is clearly specified in the x86 architecture manuals from both AMD and Intel. This invalidation is missing currently in gem5, due to which linux kernel versions 3.8 and up cannot be simulated efficiently. This is exposed by a linux optimisation in commit e4a1cc56e4d728eb87072c71c07581524e5160b1, which removes a tlb flush on updating page table entries in x86. Testing: Linux kernel versions 3.8 onwards were booting very slowly in FS mode, due to repeated page faults (~300000 before the first print statement in a bash file). Ensured that page fault rate drops drastically and observed reduction in boot time from order of hours to minutes for linux kernel v3.8 and v3.11
-rw-r--r--src/arch/x86/faults.cc3
-rw-r--r--src/arch/x86/faults.hh2
2 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index e3a4befb2..b7d9335d4 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -135,6 +135,9 @@ namespace X86ISA
void PageFault::invoke(ThreadContext * tc, const StaticInstPtr &inst)
{
if (FullSystem) {
+ /* Invalidate any matching TLB entries before handling the page fault */
+ tc->getITBPtr()->demapPage(addr, 0);
+ tc->getDTBPtr()->demapPage(addr, 0);
HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
X86FaultBase::invoke(tc);
/*
diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index f8715ded2..6eabd53fa 100644
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -42,7 +42,7 @@
#include <string>
-#include "arch/generic/tlb.hh"
+#include "arch/x86/tlb.hh"
#include "base/bitunion.hh"
#include "base/misc.hh"
#include "sim/faults.hh"