summaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2019-03-21Request::getVaddr()is-rebase10-DynInstPtrIru Cai
2019-03-20attack code and exp scriptIru Cai
2019-03-20invisispec-1.0 configsIru Cai
2019-03-20invisispec-1.0 sourceIru Cai
2018-11-16cpu: Fix the usage of const DynInstPtrRekai Gonzalez-Alberquilla
2018-11-15mem-cache: fix invalid iterator accessJavier Bueno
2018-11-15mem-cache: Make StridePrefetcher use Replacement PoliciesDaniel
2018-11-15mem-cache: Add invalidation function to StrideEntryDaniel
2018-11-15mem-cache: Make PCTable context independentDaniel
2018-11-15mem-cache: Vectorize StridePrefetcher's entries.Daniel
2018-11-15mem-cache: Return entry in StridePrefetcher::pcTableHit()Daniel
2018-11-15mem-cache: Cleanup prefetchersDaniel
2018-11-15scons: add --gold-linker to link with the gold linkerCiro Santilli
2018-11-14cpu: Fixed ratio of pred to hyst bits for LTAGE BimodalPau Cabre
2018-11-14mem-cache: Remove Cache dependency from TagsDaniel R. Carvalho
2018-11-14mem-cache: Move access latency calculation to CacheDaniel R. Carvalho
2018-11-14arch-arm: Print register name when warning on AT instructionsGiacomo Travaglini
2018-11-14mem-cache: implement a probe-based interfaceJavier Bueno
2018-11-14sim: Move BitUnion overloading to show/parseParamsGiacomo Travaglini
2018-11-14sim: Move paramIn/Out definition to header fileGiacomo Travaglini
2018-11-13cpu: Fixed PC shifting on LTAGE branch predictorPau Cabre
2018-11-13mem-cache: Align how we handle requests in atomic with timingNikos Nikoleris
2018-11-12systemc: Push python headers on top of sourcesGiacomo Travaglini
2018-11-12systemc: Stop using python to set/manage the global time resolution.Gabe Black
2018-11-12sim: Push the global frequency management code into C++.Gabe Black
2018-11-09configs: Revamp ruby mem test to align with MemTestNikos Nikoleris
2018-11-09systemc: Get rid of a duplicated base class initializer for sc_fifo.Gabe Black
2018-11-09systemc: Add a missing "const" on one of the sc_event operators.Gabe Black
2018-11-09systemc: Only build python utility code if python is enabled.Gabe Black
2018-11-09systemc: Separate and conditionalize exposing sc_main to python.Gabe Black
2018-11-09systemc: Seperate out the sc_main fiber and its bookkeeping.Gabe Black
2018-11-09systemc: Stop using python init to set up predefined message ids.Gabe Black
2018-11-09systemc: Wrap some report maps in functions.Gabe Black
2018-11-08configs: Add missing path to ruby importsDaniel R. Carvalho
2018-11-07mem-ruby: Use Packet writing functions instead of memcpyDaniel R. Carvalho
2018-11-07misc: Update workflow requirements in CONTRIBUTING.mdTony Gutierrez
2018-11-07arch-arm: Deprecate usage of legacy bootloader patchingGiacomo Travaglini
2018-11-07arch-arm: ArmSystem::resetAddr64 renamed to be used in AArch32Giacomo Travaglini
2018-11-07arch-arm: Implement AArch32 RVBARGiacomo Travaglini
2018-11-07arch-arm: Remove SCTLR.VE bitGiacomo Travaglini
2018-11-07arch-arm: Refactor ISA::clear by adding a ISA::clear32 methodGiacomo Travaglini
2018-11-07arch-arm: Remove MISCREG commented numbersGiacomo Travaglini
2018-11-07systemc: Fix some paths in the tlm SCons(script|struct).Gabe Black
2018-11-06mips: Change the integer and fp register widths to be 64 bits.Gabe Black
2018-11-06mips: Clean up type overrides for operands.Gabe Black
2018-11-06mips: Explicitly truncate the syscall return value down to 32 bits.Gabe Black
2018-11-05null: Claim to use 64 bit floating point registers.Gabe Black
2018-11-05sparc: Switch the FloatReg and FloatRegBits types to be 64 bit.Gabe Black
2018-11-05base: Add standard types for floating and nonfloating point register values.Gabe Black
2018-11-05systemc: Enable systemc support by default.Gabe Black