arch-riscv: Fix floating-poing op classes

This patch applies correct miscellaneous or multiply-accumulate op
classes to floating point instructions which had previously been
incorrectly classed as add or multiply instructions.

Change-Id: I959dd8d3152aa341e0f060b003ce1da8c4d688fb
Reviewed-on: https://gem5-review.googlesource.com/6521
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Alec Roelke <ar4jc@virginia.edu>

1 files changed, 32 insertions, 32 deletions

diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index baae5818e..ecee16118 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -366,10 +366,10 @@ decode QUADRANT default Unknown::unknown() {
             format Load {
                 0x2: flw({{
                     Fd_bits = (uint64_t)Mem_uw;
-                }});
+                }}, inst_flags=FloatMemReadOp);
                 0x3: fld({{
                     Fd_bits = Mem;
-                }});
+                }}, inst_flags=FloatMemReadOp);
             }
         }
 
@@ -460,10 +460,10 @@ decode QUADRANT default Unknown::unknown() {
             format Store {
                 0x2: fsw({{
                     Mem_uw = (uint32_t)Fs2_bits;
-                }});
+                }}, inst_flags=FloatMemWriteOp);
                 0x3: fsd({{
                     Mem_ud = Fs2_bits;
-                }});
+                }}, inst_flags=FloatMemWriteOp);
             }
         }
 
@@ -806,7 +806,7 @@ decode QUADRANT default Unknown::unknown() {
                         fd = fs1*fs2 + fs3;
                     }
                     Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
                 0x1: fmadd_d({{
                     if (std::isnan(Fs1) || std::isnan(Fs2) ||
                             std::isnan(Fs3)) {
@@ -829,7 +829,7 @@ decode QUADRANT default Unknown::unknown() {
                     } else {
                         Fd = Fs1*Fs2 + Fs3;
                     }
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
             }
             0x11: decode FUNCT2 {
                 0x0: fmsub_s({{
@@ -861,7 +861,7 @@ decode QUADRANT default Unknown::unknown() {
                         fd = fs1*fs2 - fs3;
                     }
                     Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
                 0x1: fmsub_d({{
                     if (std::isnan(Fs1) || std::isnan(Fs2) ||
                             std::isnan(Fs3)) {
@@ -884,7 +884,7 @@ decode QUADRANT default Unknown::unknown() {
                     } else {
                         Fd = Fs1*Fs2 - Fs3;
                     }
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
             }
             0x12: decode FUNCT2 {
                 0x0: fnmsub_s({{
@@ -916,7 +916,7 @@ decode QUADRANT default Unknown::unknown() {
                         fd = -(fs1*fs2 - fs3);
                     }
                     Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
                 0x1: fnmsub_d({{
                     if (std::isnan(Fs1) || std::isnan(Fs2) ||
                             std::isnan(Fs3)) {
@@ -939,7 +939,7 @@ decode QUADRANT default Unknown::unknown() {
                     } else {
                         Fd = -(Fs1*Fs2 - Fs3);
                     }
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
             }
             0x13: decode FUNCT2 {
                 0x0: fnmadd_s({{
@@ -971,7 +971,7 @@ decode QUADRANT default Unknown::unknown() {
                         fd = -(fs1*fs2 + fs3);
                     }
                     Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
                 0x1: fnmadd_d({{
                     if (std::isnan(Fs1) || std::isnan(Fs2) ||
                             std::isnan(Fs3)) {
@@ -994,7 +994,7 @@ decode QUADRANT default Unknown::unknown() {
                     } else {
                         Fd = -(Fs1*Fs2 + Fs3);
                     }
-                }}, FloatMultOp);
+                }}, FloatMultAccOp);
             }
             0x14: decode FUNCT7 {
                 0x0: fadd_s({{
@@ -1115,7 +1115,7 @@ decode QUADRANT default Unknown::unknown() {
                             fd = copysign(fs1, fs2);
                         }
                         Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                    }});
+                    }}, FloatMiscOp);
                     0x1: fsgnjn_s({{
                         uint32_t temp;
                         float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
@@ -1129,7 +1129,7 @@ decode QUADRANT default Unknown::unknown() {
                             fd = copysign(fs1, -fs2);
                         }
                         Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                    }});
+                    }}, FloatMiscOp);
                     0x2: fsgnjx_s({{
                         uint32_t temp;
                         float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
@@ -1143,7 +1143,7 @@ decode QUADRANT default Unknown::unknown() {
                             fd = fs1*(signbit(fs2) ? -1.0 : 1.0);
                         }
                         Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
-                    }});
+                    }}, FloatMiscOp);
                 }
                 0x11: decode ROUND_MODE {
                     0x0: fsgnj_d({{
@@ -1153,7 +1153,7 @@ decode QUADRANT default Unknown::unknown() {
                         } else {
                             Fd = copysign(Fs1, Fs2);
                         }
-                    }});
+                    }}, FloatMiscOp);
                     0x1: fsgnjn_d({{
                         if (issignalingnan(Fs1)) {
                             Fd = numeric_limits<double>::signaling_NaN();
@@ -1161,7 +1161,7 @@ decode QUADRANT default Unknown::unknown() {
                         } else {
                             Fd = copysign(Fs1, -Fs2);
                         }
-                    }});
+                    }}, FloatMiscOp);
                     0x2: fsgnjx_d({{
                         if (issignalingnan(Fs1)) {
                             Fd = numeric_limits<double>::signaling_NaN();
@@ -1169,7 +1169,7 @@ decode QUADRANT default Unknown::unknown() {
                         } else {
                             Fd = Fs1*(signbit(Fs2) ? -1.0 : 1.0);
                         }
-                    }});
+                    }}, FloatMiscOp);
                 }
                 0x14: decode ROUND_MODE {
                     0x0: fmin_s({{
@@ -1501,46 +1501,46 @@ decode QUADRANT default Unknown::unknown() {
                         uint32_t temp;
                         float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
                         switch (fpclassify(fs1)) {
-                        case FP_INFINITE:
+                          case FP_INFINITE:
                             if (signbit(fs1)) {
                                 Rd = 1 << 0;
                             } else {
                                 Rd = 1 << 7;
                             }
                             break;
-                        case FP_NAN:
+                          case FP_NAN:
                             if (issignalingnan(fs1)) {
                                 Rd = 1 << 8;
                             } else {
                                 Rd = 1 << 9;
                             }
                             break;
-                        case FP_ZERO:
+                          case FP_ZERO:
                             if (signbit(fs1)) {
                                 Rd = 1 << 3;
                             } else {
                                 Rd = 1 << 4;
                             }
                             break;
-                        case FP_SUBNORMAL:
+                          case FP_SUBNORMAL:
                             if (signbit(fs1)) {
                                 Rd = 1 << 2;
                             } else {
                                 Rd = 1 << 5;
                             }
                             break;
-                        case FP_NORMAL:
+                          case FP_NORMAL:
                             if (signbit(fs1)) {
                                 Rd = 1 << 1;
                             } else {
                                 Rd = 1 << 6;
                             }
                             break;
-                        default:
+                          default:
                             panic("Unknown classification for operand.");
                             break;
                         }
-                    }});
+                    }}, FloatMiscOp);
                 }
                 0x71: decode ROUND_MODE {
                     0x0: fmv_x_d({{
@@ -1548,46 +1548,46 @@ decode QUADRANT default Unknown::unknown() {
                     }}, FloatCvtOp);
                     0x1: fclass_d({{
                         switch (fpclassify(Fs1)) {
-                        case FP_INFINITE:
+                          case FP_INFINITE:
                             if (signbit(Fs1)) {
                                 Rd = 1 << 0;
                             } else {
                                 Rd = 1 << 7;
                             }
                             break;
-                        case FP_NAN:
+                          case FP_NAN:
                             if (issignalingnan(Fs1)) {
                                 Rd = 1 << 8;
                             } else {
                                 Rd = 1 << 9;
                             }
                             break;
-                        case FP_ZERO:
+                          case FP_ZERO:
                             if (signbit(Fs1)) {
                                 Rd = 1 << 3;
                             } else {
                                 Rd = 1 << 4;
                             }
                             break;
-                        case FP_SUBNORMAL:
+                          case FP_SUBNORMAL:
                             if (signbit(Fs1)) {
                                 Rd = 1 << 2;
                             } else {
                                 Rd = 1 << 5;
                             }
                             break;
-                        case FP_NORMAL:
+                          case FP_NORMAL:
                             if (signbit(Fs1)) {
                                 Rd = 1 << 1;
                             } else {
                                 Rd = 1 << 6;
                             }
                             break;
-                        default:
+                          default:
                             panic("Unknown classification for operand.");
                             break;
                         }
-                    }});
+                    }}, FloatMiscOp);
                 }
                 0x78: fmv_s_x({{
                     Fd_bits = (uint64_t)Rs1_uw;