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| author | Gabe Black <gabeblack@google.com> | 2018-10-12 17:51:14 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-11-05 23:43:10 +0000 |
| commit | 14b0481f7fdc355154001e842c960d6a1c2c2e1a (patch) | |
| tree | 3d16118a3e722e6df5b893c0c488eaef22729b84 | |
| parent | f3e17ca77a167ece1972ba73af1c63a85acf9ee8 (diff) | |
| download | gem5-14b0481f7fdc355154001e842c960d6a1c2c2e1a.tar.xz | |
null: Claim to use 64 bit floating point registers.
The NULL ISA doesn't actually have registers, so this setting doesn't
matter. By making it 64 bits the ISA is more compatible with the other
ISAs.
Change-Id: I2c9b6d9a6f612719b8b00eb9dbed55fa2159e9b5
Reviewed-on: https://gem5-review.googlesource.com/c/13617
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
| -rw-r--r-- | src/arch/null/registers.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh index 3d27d95a2..5dd873222 100644 --- a/src/arch/null/registers.hh +++ b/src/arch/null/registers.hh @@ -47,8 +47,8 @@ namespace NullISA { typedef uint64_t IntReg; -typedef uint32_t FloatRegBits; -typedef float FloatReg; +typedef uint64_t FloatRegBits; +typedef double FloatReg; typedef uint8_t CCReg; typedef uint64_t MiscReg; const RegIndex ZeroReg = 0; |