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| author | Derek Hower <drh5@cs.wisc.edu> | 2009-09-10 21:18:09 -0500 |
|---|---|---|
| committer | Derek Hower <drh5@cs.wisc.edu> | 2009-09-10 21:18:09 -0500 |
| commit | 26acdd4f346ecf1826960ea5fb361bc5ac197e31 (patch) | |
| tree | f5fcd2cf7e399a87f01cf4a9d73d01b9df56ac0f | |
| parent | e6e3ccf5c0f49342116eadd6386a4d169b8a6581 (diff) | |
| download | gem5-26acdd4f346ecf1826960ea5fb361bc5ac197e31.tar.xz | |
protocol: made MI_example work with unordered networks
| -rw-r--r-- | src/mem/protocol/MI_example-cache.sm | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm index 915a0eb99..64771bac5 100644 --- a/src/mem/protocol/MI_example-cache.sm +++ b/src/mem/protocol/MI_example-cache.sm @@ -17,6 +17,7 @@ machine(L1Cache, "MI Example L1 Cache") II, desc="Not Present/Invalid, issued PUT"; M, desc="Modified"; MI, desc="Modified, issued PUT"; + MII, desc="Modified, issued PUTX, received nack"; IS, desc="Issued request for LOAD/IFETCH"; IM, desc="Issued request for STORE/ATOMIC"; @@ -388,6 +389,16 @@ machine(L1Cache, "MI Example L1 Cache") o_popForwardedRequestQueue; } + transition(MI, Writeback_Nack, MII) { + o_popForwardedRequestQueue; + } + + transition(MII, Fwd_GETX, I) { + ee_sendDataFromTBE; + w_deallocateTBE; + o_popForwardedRequestQueue; + } + transition(II, Writeback_Nack, I) { w_deallocateTBE; o_popForwardedRequestQueue; |