diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:39 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:39 -0500 |
commit | 490dc30d9620891c54ddcd57c56adf092a71d79b (patch) | |
tree | 19d948e6fae6f9640569f12910be1050aff51339 | |
parent | 4c06be60fce383be08aaaf21fc4059dcc0f8a23a (diff) | |
download | gem5-490dc30d9620891c54ddcd57c56adf092a71d79b.tar.xz |
dev: Make the ethernet devices use a non-zero clock
This patch changes the NS gige controller to have a non-clock, and
sets the default to 500 MHz. The blocks that could prevoiusly be
by-passed with a zero clock are now always present, and the user is
left with the option of setting a very high clock frequency to achieve
a similar performance.
-rw-r--r-- | src/dev/Ethernet.py | 2 | ||||
-rw-r--r-- | src/dev/ns_gige.cc | 38 | ||||
-rw-r--r-- | src/dev/sinic.cc | 2 |
3 files changed, 19 insertions, 23 deletions
diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index a8b5555d9..191aad3a1 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -138,7 +138,7 @@ class EtherDevBase(EtherDevice): "Ethernet Hardware Address") # Override the default clock - clock = '0ns' + clock = '500MHz' dma_read_delay = Param.Latency('0us', "fixed delay for dma reads") dma_read_factor = Param.Latency('0us', "multiplier for dma reads") diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc index 90eb14acd..9269f7935 100644 --- a/src/dev/ns_gige.cc +++ b/src/dev/ns_gige.cc @@ -1138,18 +1138,16 @@ NSGigE::rxKick() uint32_t &extsts = is64bit ? rxDesc64.extsts : rxDesc32.extsts; next: - if (clock) { - if (rxKickTick > curTick()) { - DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n", - rxKickTick); + if (rxKickTick > curTick()) { + DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n", + rxKickTick); - goto exit; - } - - // Go to the next state machine clock tick. - rxKickTick = curTick() + clockPeriod(); + goto exit; } + // Go to the next state machine clock tick. + rxKickTick = clockEdge(Cycles(1)); + switch(rxDmaState) { case dmaReadWaiting: if (doRxDmaRead()) @@ -1457,7 +1455,7 @@ NSGigE::rxKick() DPRINTF(EthernetSM, "rx state machine exited rxState=%s\n", NsRxStateStrings[rxState]); - if (clock && !rxKickEvent.scheduled()) + if (!rxKickEvent.scheduled()) schedule(rxKickEvent, rxKickTick); } @@ -1586,17 +1584,15 @@ NSGigE::txKick() uint32_t &extsts = is64bit ? txDesc64.extsts : txDesc32.extsts; next: - if (clock) { - if (txKickTick > curTick()) { - DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n", - txKickTick); - goto exit; - } - - // Go to the next state machine clock tick. - txKickTick = curTick() + clockPeriod(); + if (txKickTick > curTick()) { + DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n", + txKickTick); + goto exit; } + // Go to the next state machine clock tick. + txKickTick = clockEdge(Cycles(1)); + switch(txDmaState) { case dmaReadWaiting: if (doTxDmaRead()) @@ -1900,7 +1896,7 @@ NSGigE::txKick() DPRINTF(EthernetSM, "tx state machine exited txState=%s\n", NsTxStateStrings[txState]); - if (clock && !txKickEvent.scheduled()) + if (!txKickEvent.scheduled()) schedule(txKickEvent, txKickTick); } @@ -2015,7 +2011,7 @@ NSGigE::transferDone() DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n"); - reschedule(txEvent, curTick() + clockPeriod(), true); + reschedule(txEvent, clockEdge(Cycles(1)), true); } bool diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc index cfb7548eb..8cb7aada7 100644 --- a/src/dev/sinic.cc +++ b/src/dev/sinic.cc @@ -1159,7 +1159,7 @@ Device::transferDone() DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n"); - reschedule(txEvent, curTick() + clockPeriod(), true); + reschedule(txEvent, clockEdge(Cycles(1)), true); } bool |