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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-09-05 14:43:09 +0100 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-09-28 10:13:27 +0000 |
commit | 54bc94114f22dfd7960c9ba9045f42ff276c3305 (patch) | |
tree | ee9eeea50db7da4de51a07803dd3e1d4a796f9bb | |
parent | 64b3a741f558c9fcfe70d27d74fe2c25d96770d7 (diff) | |
download | gem5-54bc94114f22dfd7960c9ba9045f42ff276c3305.tar.xz |
dev-arm: Take into account PPI enable bit
When checking for PPIs to send to the cpu in the PL390 GIC we
were forwarding any pending PPI regardless of their masking
in the distributor.
Change-Id: I2e294abeca733cca95cd0deeb9659c7d3d9d8734
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/12624
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
-rw-r--r-- | src/dev/arm/gic_v2.cc | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/src/dev/arm/gic_v2.cc b/src/dev/arm/gic_v2.cc index 6eaf06525..fe5e1eac8 100644 --- a/src/dev/arm/gic_v2.cc +++ b/src/dev/arm/gic_v2.cc @@ -742,11 +742,18 @@ GicV2::updateIntState(int hint) // Check PPIs if (cpuPpiPending[cpu]) { - for (int ppi = 0; ppi < PPI_MAX; ppi++) { - if (cpuPpiPending[cpu] & (1 << ppi)) - if (highest_pri > getIntPriority(cpu, SGI_MAX + ppi)) { - highest_pri = getIntPriority(cpu, SGI_MAX + ppi); - highest_int = SGI_MAX + ppi; + for (int ppi_idx = 0, int_num = SGI_MAX; + int_num < PPI_MAX + SGI_MAX; + ppi_idx++, int_num++) { + + const bool ppi_pending = bits(cpuPpiPending[cpu], ppi_idx); + const bool ppi_enabled = bits(getIntEnabled(cpu, 0), int_num); + const bool higher_priority = + highest_pri > getIntPriority(cpu, int_num); + + if (ppi_pending && ppi_enabled && higher_priority) { + highest_pri = getIntPriority(cpu, int_num); + highest_int = int_num; } } } |