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| author | Giacomo Gabrielli <Giacomo.Gabrielli@arm.com> | 2011-02-23 15:10:50 -0600 |
|---|---|---|
| committer | Giacomo Gabrielli <Giacomo.Gabrielli@arm.com> | 2011-02-23 15:10:50 -0600 |
| commit | 7ee2de31c4ed6d4eb0f57dcc798fd1126e9fa314 (patch) | |
| tree | 3a4b40dceb6f785966bc60bf751e37e7684ec55f | |
| parent | 3de8e0a0d4acaee84760961089db623518b784f7 (diff) | |
| download | gem5-7ee2de31c4ed6d4eb0f57dcc798fd1126e9fa314.tar.xz | |
ARM: NEON instruction templates modified to set the predicate flag to false when needed.
| -rw-r--r-- | src/arch/arm/isa/templates/macromem.isa | 2 | ||||
| -rw-r--r-- | src/arch/arm/isa/templates/mem.isa | 15 | ||||
| -rw-r--r-- | src/arch/arm/isa/templates/neon.isa | 4 |
3 files changed, 18 insertions, 3 deletions
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa index 7620fb871..b7ca7fa48 100644 --- a/src/arch/arm/isa/templates/macromem.isa +++ b/src/arch/arm/isa/templates/macromem.isa @@ -202,6 +202,8 @@ def template MicroNeonMixExecute {{ { %(op_wb)s; } + } else { + xc->setPredicate(false); } if (fault == NoFault && machInst.itstateMask != 0) { diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa index 66384331b..3d073b322 100644 --- a/src/arch/arm/isa/templates/mem.isa +++ b/src/arch/arm/isa/templates/mem.isa @@ -234,6 +234,8 @@ def template NeonLoadExecute {{ if (fault == NoFault) { %(op_wb)s; } + } else { + xc->setPredicate(false); } if (fault == NoFault && machInst.itstateMask != 0 && @@ -313,6 +315,8 @@ def template NeonStoreExecute {{ if (fault == NoFault) { %(op_wb)s; } + } else { + xc->setPredicate(false); } if (fault == NoFault && machInst.itstateMask != 0 && @@ -459,6 +463,8 @@ def template NeonStoreInitiateAcc {{ fault = xc->writeBytes(memUnion.bytes, %(size)d, EA, memAccessFlags, NULL); } + } else { + xc->setPredicate(false); } if (fault == NoFault && machInst.itstateMask != 0 && @@ -515,9 +521,12 @@ def template NeonLoadInitiateAcc {{ if (fault == NoFault) { fault = xc->readBytes(EA, NULL, %(size)d, memAccessFlags); } - } else if (fault == NoFault && machInst.itstateMask != 0 && - (!isMicroop() || isLastMicroop())) { - xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); + } else { + xc->setPredicate(false); + if (fault == NoFault && machInst.itstateMask != 0 && + (!isMicroop() || isLastMicroop())) { + xc->setMiscReg(MISCREG_ITSTATE, machInst.newItstate); + } } return fault; diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa index 02c2bb30d..2e88c9333 100644 --- a/src/arch/arm/isa/templates/neon.isa +++ b/src/arch/arm/isa/templates/neon.isa @@ -225,6 +225,8 @@ def template NeonEqualRegExecute {{ { %(op_wb)s; } + } else { + xc->setPredicate(false); } if (fault == NoFault && machInst.itstateMask != 0) { @@ -275,6 +277,8 @@ def template NeonUnequalRegExecute {{ { %(op_wb)s; } + } else { + xc->setPredicate(false); } if (fault == NoFault && machInst.itstateMask != 0) { |