mem: Avoid explicitly zeroing the memory backing store

This patch removes the explicit memset as it is redundant and causes
the simulator to touch the entire space, forcing the host system to
allocate the pages.

Anonymous pages are mapped on the first access, and the page-fault
handler is responsible for zeroing them. Thus, the pages are still
zeroed, but we avoid touching the entire allocated space which enables
us to use much larger memory sizes as long as not all the memory is
actually used.

5 files changed, 6 insertions, 37 deletions

diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 0d46dcde2..422de971e 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -180,10 +180,8 @@ def makeSparcSystem(mem_mode, MemClass, mdesc = None):
     self.t1000 = T1000()
     self.t1000.attachOnChipIO(self.membus)
     self.t1000.attachIO(self.iobus)
-    self.physmem = MemClass(range = AddrRange(Addr('1MB'), size = '64MB'),
-                            zero = True)
-    self.physmem2 = MemClass(range = AddrRange(Addr('2GB'), size ='256MB'),
-                             zero = True)
+    self.physmem = MemClass(range = AddrRange(Addr('1MB'), size = '64MB'))
+    self.physmem2 = MemClass(range = AddrRange(Addr('2GB'), size ='256MB'))
     self.mem_ranges = [self.physmem.range, self.physmem2.range]
     self.bridge.master = self.iobus.slave
     self.bridge.slave = self.membus.master
@@ -275,8 +273,7 @@ def makeArmSystem(mem_mode, machine_type, MemClass, mdesc = None,
     if bare_metal:
         # EOT character on UART will end the simulation
         self.realview.uart.end_on_eot = True
-        self.physmem = MemClass(range = AddrRange(Addr(mdesc.mem())),
-                                zero = True)
+        self.physmem = MemClass(range = AddrRange(Addr(mdesc.mem())))
         self.mem_ranges = [self.physmem.range]
     else:
         self.kernel = binary('vmlinux.arm.smp.fb.2.6.38.8')
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index b5d41ce93..ab994b6f0 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -162,8 +162,7 @@ class RealView(Platform):
 
     def setupBootLoader(self, mem_bus, cur_sys, loc):
         self.nvmem = SimpleMemory(range = AddrRange(Addr('2GB'),
-                                                    size = '64MB'),
-                                  zero = True)
+                                                    size = '64MB'))
         self.nvmem.port = mem_bus.master
         cur_sys.boot_loader = loc('boot.arm')
 
@@ -360,8 +359,7 @@ class VExpress_EMM(RealView):
                         InterruptLine=2, InterruptPin=2)
 
 
-    vram           = SimpleMemory(range = AddrRange(0x18000000, size='32MB'),
-                                  zero = True)
+    vram           = SimpleMemory(range = AddrRange(0x18000000, size='32MB'))
     rtc            = PL031(pio_addr=0x1C170000, int_num=36)
 
     l2x0_fake      = IsaFake(pio_addr=0x2C100000, pio_size=0xfff)
@@ -376,8 +374,7 @@ class VExpress_EMM(RealView):
     mmc_fake       = AmbaFake(pio_addr=0x1c050000)
 
     def setupBootLoader(self, mem_bus, cur_sys, loc):
-        self.nvmem = SimpleMemory(range = AddrRange(0, size = '64MB'),
-                                  zero = True)
+        self.nvmem = SimpleMemory(range = AddrRange(0, size = '64MB'))
         self.nvmem.port = mem_bus.master
         cur_sys.boot_loader = loc('boot_emm.arm')
         cur_sys.atags_addr = 0x80000100
diff --git a/src/mem/AbstractMemory.py b/src/mem/AbstractMemory.py
index f96ca5b78..22a4a1893 100644
--- a/src/mem/AbstractMemory.py
+++ b/src/mem/AbstractMemory.py
@@ -48,7 +48,6 @@ class AbstractMemory(MemObject):
     cxx_header = "mem/abstract_mem.hh"
     range = Param.AddrRange(AddrRange('128MB'), "Address range")
     null = Param.Bool(False, "Do not store data, always return zero")
-    zero = Param.Bool(False, "Initialize memory with zeros")
 
     # All memories are passed to the global physical memory, and
     # certain memories may be excluded from the global address map,
diff --git a/src/mem/abstract_mem.hh b/src/mem/abstract_mem.hh
index c1ecbdba4..57a47e390 100644
--- a/src/mem/abstract_mem.hh
+++ b/src/mem/abstract_mem.hh
@@ -203,13 +203,6 @@ class AbstractMemory : public MemObject
     bool isNull() const { return params()->null; }
 
     /**
-     * See if this memory should be initialized to zero or not.
-     *
-     * @return true if zero
-     */
-    bool initToZero() const { return params()->zero; }
-
-    /**
      * Set the host memory backing store to be used by this memory
      * controller.
      *
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 4b7001eb5..10176bba0 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -162,10 +162,6 @@ PhysicalMemory::createBackingStore(AddrRange range,
     // it appropriately
     backingStore.push_back(make_pair(range, pmem));
 
-    // count how many of the memories are to be zero initialized so we
-    // can see if some but not all have this parameter set
-    uint32_t init_to_zero = 0;
-
     // point the memories to their backing store, and if requested,
     // initialize the memory range to 0
     for (vector<AbstractMemory*>::const_iterator m = _memories.begin();
@@ -173,19 +169,6 @@ PhysicalMemory::createBackingStore(AddrRange range,
         DPRINTF(BusAddrRanges, "Mapping memory %s to backing store\n",
                 (*m)->name());
         (*m)->setBackingStore(pmem);
-
-        // if it should be zero, then go and make it so
-        if ((*m)->initToZero()) {
-            ++init_to_zero;
-        }
-    }
-
-    if (init_to_zero != 0) {
-        if (init_to_zero != _memories.size())
-            fatal("Some, but not all memories in range %s are set zero\n",
-                  range.to_string());
-
-        memset(pmem, 0, range.size());
     }
 }