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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:03 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:03 -0500
commit8c012e9571e3320aa9857e31356f5a0fe5f7dde1 (patch)
tree22db9bda773bb5588f0392e2c3066e81d70e2fd9
parent458bd025d4f53f89fa36f9657bc763f80ae00074 (diff)
downloadgem5-8c012e9571e3320aa9857e31356f5a0fe5f7dde1.tar.xz
ARM: Make the predecoder print out the ExtMachInst it gathered when traced.
-rw-r--r--src/arch/arm/predecoder.hh10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/arm/predecoder.hh b/src/arch/arm/predecoder.hh
index 63da78dd7..5aba16a6f 100644
--- a/src/arch/arm/predecoder.hh
+++ b/src/arch/arm/predecoder.hh
@@ -100,7 +100,8 @@ namespace ArmISA
emi.instBits = emi.instBits | word;
bigThumb = false;
offset += 2;
- DPRINTF(Predecoder, "Second half of 32 bit Thumb.\n");
+ DPRINTF(Predecoder, "Second half of 32 bit Thumb: %#x.\n",
+ emi.instBits);
} else {
uint16_t highBits = word & 0xF800;
if (highBits == 0xE800 || highBits == 0xF000 ||
@@ -109,9 +110,9 @@ namespace ArmISA
emi.bigThumb = 1;
if (offset == 0) {
// We've got the whole thing.
- DPRINTF(Predecoder,
- "All of 32 bit Thumb.\n");
emi.instBits = (data >> 16) | (data << 16);
+ DPRINTF(Predecoder, "All of 32 bit Thumb: %#x.\n",
+ emi.instBits);
offset += 4;
} else {
// We only have the first half word.
@@ -123,11 +124,12 @@ namespace ArmISA
}
} else {
// A 16 bit thumb inst.
- DPRINTF(Predecoder, "16 bit Thumb.\n");
offset += 2;
emi.instBits = word;
// Set the condition code field artificially.
emi.condCode = COND_UC;
+ DPRINTF(Predecoder, "16 bit Thumb: %#x.\n",
+ emi.instBits);
}
}
}